CN117747636A - SiC MOSFET of monolithic integrated overcurrent detection structure - Google Patents
SiC MOSFET of monolithic integrated overcurrent detection structure Download PDFInfo
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- CN117747636A CN117747636A CN202311773602.6A CN202311773602A CN117747636A CN 117747636 A CN117747636 A CN 117747636A CN 202311773602 A CN202311773602 A CN 202311773602A CN 117747636 A CN117747636 A CN 117747636A
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- 238000001514 detection method Methods 0.000 title claims abstract description 38
- 239000004065 semiconductor Substances 0.000 claims abstract description 23
- 238000002347 injection Methods 0.000 claims abstract description 3
- 239000007924 injection Substances 0.000 claims abstract description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 42
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 42
- 239000000758 substrate Substances 0.000 claims description 5
- 238000005468 ion implantation Methods 0.000 claims description 3
- 238000005070 sampling Methods 0.000 claims description 3
- 239000007943 implant Substances 0.000 claims 1
- 238000012876 topography Methods 0.000 claims 1
- 238000000034 method Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 238000012544 monitoring process Methods 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 238000002513 implantation Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- 230000001052 transient effect Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
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Abstract
The invention discloses a single-chip integrated over-current detection structure SiC MOSFET, which comprises a plurality of serially connected unit cells, wherein each unit cell comprises a PowerFET and a SenseFET, senseFET on-chip integrated over-current detection structure, each over-current detection structure comprises a polySi integrated on-chip, each polySi is provided with a resistor Rs, each resistor Rs is serially connected with a SeneFET, one end of each polySi is in short circuit with a source electrode of the corresponding SeneFET, the other end of each polySi is in short circuit with the source electrode of the corresponding PowerFET, each Rs is provided with a voltage Vs, so that a current signal of the corresponding SeneFET is converted into a voltage signal Vs, N+/P+ zener diodes are connected in parallel at two ends of each polySi, each N+/P+ zener diode is provided with an N+ type semiconductor and a P+ type semiconductor, and each N+ type semiconductor is a basic injection morphology structure of each unit cell, and therefore, the current real-time accurate detection of the SiC MOSFET chip is realized, the over-current detection circuit of the SiC MOSFET device is greatly simplified, and the detection precision and the detection delay are improved.
Description
Technical Field
The invention relates to the technical field of on-chip structures for detecting and protecting overcurrent of SiC MOSFETs, in particular to a SiC MOSFET with a monolithic integrated overcurrent detection structure.
Background
The SiC MOSFET device has the remarkable advantages of high frequency and low loss, and has very wide application in the fields of electric automobiles, photovoltaic inverters, charging piles and the like. In practical application, the power device is easy to generate transient over-current due to the existence of various emergency situations such as transient load fluctuation or load short circuit. However, siC MOSFETs are extremely prone to degradation and even failure during over-current or short circuits, which can create extremely high heat build-up inside the chip. Therefore, siC MOSFETs generally require fast over-current detection and protection to ensure safe and reliable operation in the system. At present, the common method for detecting and protecting the overcurrent of the SiC MOSFET comprises the following steps: (1) The drain current is detected by directly adopting a current probe or a coaxial resistor, but the probe and the coaxial resistor have high cost and are easy to damage; (2) The saturation voltage drop of the device is detected, the method belongs to the most common method in the industry, but high dv/dt caused by the fast switch of the SiC MOSFET is easy to cause false triggering of a desaturation circuit, and parasitic parameters in the desaturation circuit are easy to influence the accuracy of overcurrent protection triggering due to resonance; (3) By monitoring di/dt, the voltage change on parasitic inductance between a device power source and a Kelvin source in the fast switching process is obtained to judge whether the device is overcurrent or not, but the Vds detection in the on state needs a certain blanking time to prevent false triggering, and in addition, the parasitic inductance dependence on the source is strong based on the di/dt detection method. In general, the current overcurrent detection and protection of the SiC MOSFET are realized by adopting an external circuit, and the problems in the aspects of detection accuracy, response speed, cost and the like are unavoidable, so that the overcurrent detection and protection effect of the SiC MOSFET device is directly influenced. The methods of SiC MOSFET over-current detection and protection based on the on-axis resistance over-current detection, desaturation detection, di/dt based over-current detection methods are shown in fig. 1-3.
Disclosure of Invention
In view of the above, the present invention aims to provide a single-chip integrated SiC MOSFET with an overcurrent detection structure, in which a current detection structure is directly integrated inside a SiC MOSFET chip, and an integrated resistor is used to convert a current into a voltage signal and directly serve as a feedback output, so that the current condition of the SiC MOSFET can be accurately detected in real time, and the SiC MOSFET current can be accurately monitored, and no delay information feedback can be realized. And by designing a proper voltage feedback value, the voltage signal is directly fed back to the drive control and protection, so that the SiC MOSFET overcurrent monitoring circuit is greatly simplified.
In order to solve the technical problems, the invention provides a single-chip integrated over-current detection structure SiC MOSFET, which comprises a plurality of cells connected in series, wherein each cell comprises a PowerFET and a SenseFET, the over-current detection structure is integrated on a sheet of the SenseFET, the over-current detection structure comprises a polySi integrated on the sheet, the polySi has a resistor Rs, the resistor Rs is connected in series with the SenseFET, one end of the polySi is short-circuited with a source electrode of the SenseFET, the other end of the polySi is short-circuited with the source electrode of the PowerFET, the Rs has a voltage Vs, so that a current signal of the SenseFET is converted into a voltage signal, and N+/P+ zener diodes are connected at two ends of the polySi in parallel, and the N+/P+ zener diodes are provided with an N+ type semiconductor and a P+ type semiconductor, and the N+ type semiconductor and the P+ type semiconductor are basic injection morphology structures of the cells.
In some embodiments, it is preferred that the PowerFET and SenseFET structures be identical.
In some embodiments, preferably, one end of the polySi shorted to the source of the SenseFET is shorted to the cathode of the n+/p+ zener diode, and one end of the polySi shorted to the source of the PowerFET is shorted to the anode of the n+/p+ zener diode.
In some embodiments, the polySi is preferably a continuous curved structure, such that the sampling resistor Rs is integrated on-chip.
In some embodiments, preferably, the ratio of the SenseFET to the PowerFET is less than one thousandth, the PowerFET is used to handle the main power, the SenseFET is used for current sensing, and the current flowing through the PowerFET and the SenseFET is proportional to the ratio of the PowerFET and the SenseFET, respectively.
In some embodiments, it is preferred that the poly Si is located only within the structure of the cells of the SenseeFET.
In some embodiments, the cell preferably includes a silicon carbide epitaxial layer, the silicon carbide epitaxial layer has a basic implantation morphology of P-base, p+ type semiconductor and n+ type semiconductor formed thereon by ion implantation, a JFET region is formed between adjacent P-base, the JFET region has Gate thereon, and the p+ type semiconductor and n+ type semiconductor have Source of simultaneous ohmic contact thereon.
In some embodiments, it is preferred that the poly Si is located only on the P+ type semiconductor within the structure of the cell of the SenseFET.
In some embodiments, preferably, a substrate is further provided under the silicon carbide epitaxial layer, and a drain is further provided under the substrate.
Compared with the prior art, the invention has the following advantages:
1. according to the invention, the current is accurately detected in real time in the SiC MOSFET chip in a monolithic integration mode, so that an overcurrent detection circuit of the SiC MOSFET device is greatly simplified, and the detection precision and the detection delay are improved.
2. The preparation processes of the integrated SenseFET and SiC MOSFET are completely compatible, extra process complexity is not required to be increased, and the area, layout and the like of the SenseFET can be flexibly designed according to design requirements.
3. The sampling resistor Rs integrated by the invention can be directly formed by utilizing polySi, and the preparation process is relatively simple and feasible.
4. The zener diode integrated by the invention is directly formed by utilizing the N+/P+ junction, and no extra preparation process is needed.
5. The single-chip integrated structure process disclosed by the invention has extremely high compatibility with the SiC MOSFET process, is low in implementation cost, and has high value for improving the overcurrent detection performance of the SiC MOSFET.
Drawings
Fig. 1 is a circuit diagram of a conventional method for detecting an overcurrent based on a coaxial resistor.
Fig. 2 is a circuit diagram of a conventional desaturation detection method.
Fig. 3 is a circuit schematic diagram of a conventional di/dt-based overcurrent detection method.
Fig. 4 is a schematic diagram of a three-dimensional on-chip structure of the SiC MOSFET of the present invention.
Fig. 5 is a circuit schematic of the monolithically integrated overcurrent detection structure of the present invention.
Detailed Description
In order to facilitate understanding of the technical scheme of the present invention, the following detailed description is made with reference to the accompanying drawings and specific embodiments.
Referring to fig. 4 and 5, a SiC MOSFET of a monolithically integrated overcurrent detection structure includes a plurality of cells connected in series, where in an embodiment of the present invention, the cells are conventional cells, that is, the cells include a silicon carbide epitaxial layer, a basic implantation profile of a P-base, a p+ semiconductor, and an n+ semiconductor is formed on the silicon carbide epitaxial layer by ion implantation, a JFET region is formed between adjacent P-bases, gate is formed on the JFET region, source is formed on the p+ semiconductor and the n+ semiconductor, a substrate is further formed under the silicon carbide epitaxial layer, and a drain is further formed under the substrate, in the present invention, the cells are divided into two parts, i.e., a PowerFET and a SenseFET, and the ratio of SenseFET to PowerFET is less than one thousandth, in the embodiment, 2000:1, wherein the PowerFET continues to be used for processing main power, the SenseFET is used as current detection, and the structures of the PowerFET and the SenseFET are completely consistent, so that the current flowing through the PowerFET and the SenseFET is directly determined by the proportion of the two cells, and thus the current flowing through the SiC MOSFET device can be obtained by monitoring the current of the SenseFET. The N+/P+ zener diode is formed by utilizing an N+/P+ junction inside the SiC MOSFET, so that when the SiC MOSFET is larger in overcurrent to form higher Vs output voltage, the parallel zener diode is subjected to zener breakdown, the Vs output voltage is ensured to be stabilized at the zener breakdown voltage, and the Vs output voltage cannot be continuously increased.
The foregoing is merely a preferred embodiment of the present invention, and the scope of the invention is defined by the claims, and those skilled in the art should also consider the scope of the present invention without departing from the spirit and scope of the invention.
Claims (9)
1. The SiC MOSFET of the monolithic integrated overcurrent detection structure comprises a plurality of serially connected cells, and is characterized in that each cell comprises a PowerFET and a SenseFET, the overcurrent detection structure is integrated on a sheet of the SenseFET, the overcurrent detection structure comprises a polySi integrated on the sheet, the polySi is provided with a resistor Rs, the resistor Rs is serially connected with the SenseFET, one end of the polySi is in short circuit with a source electrode of the SenseFET, the other end of the polySi is in short circuit with the source electrode of the PowerFET, the Rs is provided with a voltage Vs, so that a current signal of the SenseFET is converted into a voltage signal Vs, and N+/P+ zener diodes are connected at two ends of the polySi in parallel, and the N+/P+ zener diodes are provided with an N+ type semiconductor and a P+ type semiconductor, and the N+ type semiconductor and the P+ type semiconductor are basic injection morphology structures of the cells.
2. The SiC MOSFET of claim 1 wherein the PowerFET and SenseFET structures are identical.
3. The SiC MOSFET of claim 1 wherein the end of the polySi shorted to the source of the SenseFET is shorted to the cathode of the n+/p+ zener diode and the end of the polySi shorted to the source of the PowerFET is shorted to the anode of the n+/p+ zener diode.
4. The SiC MOSFET of claim 1 wherein the polySi is a continuous curved structure such that the sampling resistor Rs is integrated on-chip.
5. The SiC MOSFET of claim 1 wherein the ratio of the SenseFET to the PowerFET is less than one thousandth, the PowerFET is configured to handle primary power, the SenseFET is configured to sense current, and the current through the PowerFET and the SenseFET is proportional to the ratio of the PowerFET and the SenseFET, respectively.
6. The SiC MOSFET of claim 1 wherein the polySi is located only within the structure of the cell of the SenseFET.
7. The SiC MOSFET of claim 1 wherein the cell comprises an epitaxial layer of silicon carbide having a basic implant topography of P-base, p+ and n+ semiconductors formed thereon by ion implantation, a JFET region formed between adjacent P-base, the JFET region having Gate thereon, the p+ and n+ semiconductors having Source thereon with simultaneous ohmic contact.
8. SiC MOSFET of a monolithically integrated overcurrent detection structure according to claims 6 and 7, wherein the polySi is located only on the p+ -type semiconductor within the structure of the cell of the SenseFET.
9. The SiC MOSFET of claim 7 wherein the silicon carbide epitaxial layer further has a substrate thereunder and a drain thereunder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311773602.6A CN117747636A (en) | 2023-12-21 | 2023-12-21 | SiC MOSFET of monolithic integrated overcurrent detection structure |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311773602.6A CN117747636A (en) | 2023-12-21 | 2023-12-21 | SiC MOSFET of monolithic integrated overcurrent detection structure |
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| Publication Number | Publication Date |
|---|---|
| CN117747636A true CN117747636A (en) | 2024-03-22 |
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| CN202311773602.6A Pending CN117747636A (en) | 2023-12-21 | 2023-12-21 | SiC MOSFET of monolithic integrated overcurrent detection structure |
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- 2023-12-21 CN CN202311773602.6A patent/CN117747636A/en active Pending
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