JPH09162391A - Insulated gate bipolar transistor - Google Patents
Insulated gate bipolar transistorInfo
- Publication number
- JPH09162391A JPH09162391A JP31766395A JP31766395A JPH09162391A JP H09162391 A JPH09162391 A JP H09162391A JP 31766395 A JP31766395 A JP 31766395A JP 31766395 A JP31766395 A JP 31766395A JP H09162391 A JPH09162391 A JP H09162391A
- Authority
- JP
- Japan
- Prior art keywords
- cell region
- main
- current
- sense
- sense cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 21
- 239000004065 semiconductor Substances 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 9
- 210000004027 cell Anatomy 0.000 description 123
- 238000010586 diagram Methods 0.000 description 11
- 238000002955 isolation Methods 0.000 description 3
- 230000006378 damage Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 210000001744 T-lymphocyte Anatomy 0.000 description 1
- 235000006732 Torreya nucifera Nutrition 0.000 description 1
- 244000111306 Torreya nucifera Species 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】この発明は、インバータ装置
などの半導体電力変換装置に適用されるパワースイッチ
ングデバイスとしての絶縁ゲート型バイポーラトランジ
スタ（ＩＧＢＴ）に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulated gate bipolar transistor (IGBT) as a power switching device applied to a semiconductor power conversion device such as an inverter device.
【０００２】[0002]
【従来の技術】絶縁ゲート型バイポーラトランジスタ
（以下ＩＧＢＴと称する）は、比較的低いオン電圧で、
高速ターンオフが可能な電圧駆動の半導体スイッチング
デバイスであり、パワーエレクトロニクスの分野で広く
採用されている。ところでインバータ装置などでは、電
動機の起動時突入電流、負荷短絡、アーム短絡等の事故
が発生するため、ＩＧＢＴには高電圧、大電流の極めて
厳しい責務が課せられている。2. Description of the Related Art An insulated gate bipolar transistor (hereinafter referred to as an IGBT) has a relatively low on-voltage.
It is a voltage-driven semiconductor switching device capable of high-speed turn-off and is widely used in the field of power electronics. By the way, in an inverter device or the like, an accident such as a rush current, a load short circuit, an arm short circuit, or the like occurs at the time of starting the electric motor, so that an extremely strict duty of high voltage and large current is imposed on the IGBT.
【０００３】そこで、短絡事故の発生時にはインバータ
の保護回路により電流が遮断されるまでの間にＩＧＢＴ
が破壊するのを防ぐために、前記の保護装置とは別にＩ
ＧＢＴに流れる過電流を瞬時に検出すると共に、この過
電流検出信号をもとにしてゲート制御を行い、電源が遮
断される以前にＩＧＢＴの電流を制限してＩＧＢＴの短
絡耐量内に抑えるようにした過電流保護方式が一般に採
用されている。Therefore, in the event of a short circuit accident, the IGBT is protected until the current is cut off by the protection circuit of the inverter.
In order to prevent the destruction of the
The overcurrent flowing in the GBT is instantly detected, and the gate control is performed based on this overcurrent detection signal to limit the current of the IGBT before the power is cut off so as to keep it within the short-circuit withstand capability of the IGBT. The overcurrent protection method described above is generally adopted.
【０００４】図７は前記保護方式によるＩＧＢＴの過電
流保護回路図を示す。図において、主素子１１（主ＩＧ
ＢＴ）と電流検出用の副素子１２（副ＩＧＢＴ）は並列
接続され、副素子１２と電流検出抵抗１４とは直列接続
している。副素子１２と電流検出抵抗１４の接続点１９
とスイッチング素子であるＭＯＳＦＥＴ１３のゲート１
６と接続し、ドレイン１８は主素子１１のゲート１５お
よび副素子１２のゲート１７と接続する。かかる構成
で、負荷短絡事故などによる過電流が主素子１１、副素
子１２に流れ、これに伴って電流検出抵抗１４の両端に
発生した電圧がＭＯＳＦＥＴ１３のしきい値電圧を超え
ると、ＭＯＳＦＥＴがオン動作して主素子１１、および
副素子１２のゲート電圧を絞り込み、主素子１１に流れ
る主電流を低めるように制限する。この場合に、電流検
出抵抗値、ＭＯＳＦＥＴのしきい値電圧を適宜設定する
ことで、被保護素子である主素子１１に流れる主電流を
主素子１１の短絡耐量以内に抑えることができる。FIG. 7 shows an overcurrent protection circuit diagram of an IGBT according to the protection method. In the figure, the main element 11 (main IG
BT) and the sub-element 12 for current detection (sub-IGBT) are connected in parallel, and the sub-element 12 and the current detection resistor 14 are connected in series. Connection point 19 between sub-element 12 and current detection resistor 14
And the gate 1 of MOSFET 13 which is a switching element
6, and the drain 18 is connected to the gate 15 of the main element 11 and the gate 17 of the sub element 12. With such a configuration, when an overcurrent due to a load short-circuit accident or the like flows through the main element 11 and the sub element 12, and the voltage generated across the current detection resistor 14 exceeds the threshold voltage of the MOSFET 13, the MOSFET is turned on. By operating, the gate voltage of the main element 11 and the sub element 12 is narrowed down, and the main current flowing in the main element 11 is limited to be low. In this case, by appropriately setting the current detection resistance value and the threshold voltage of the MOSFET, the main current flowing through the main element 11 which is the protected element can be suppressed within the short circuit withstand capability of the main element 11.
【０００５】ところで、前記のように被保護対象である
主素子１１のＩＧＢＴに対して、電流検出用の副素子１
２のＩＧＢＴを含む過電流保護回路を独立した外部回路
として構成したものでは、チップの温度上昇などの点で
主素子１１と副素子１２の間で動作特性の比例性を持た
せることが困難である。しかも、インバータでの短絡現
象にはアーム短絡、直列短絡、出力短絡、地絡などがあ
り、その短絡モードの違いによって被保護素子の主素子
１１に印加されるコレクタ・エミッタ電圧ＶCEが変動す
ることが予想されることから、前記のように主素子１１
と副素子１２との電流比率が変動して、その電流制限値
も大きく変化することになるため、安定した過電流保護
動作を実現することが難しい。By the way, as described above, with respect to the IGBT of the main element 11 to be protected, the sub element 1 for current detection is used.
In the case where the overcurrent protection circuit including the second IGBT is configured as an independent external circuit, it is difficult to make the operation characteristics proportional between the main element 11 and the sub element 12 in terms of chip temperature rise and the like. is there. Moreover, the short-circuit phenomenon in the inverter includes arm short-circuit, series short-circuit, output short-circuit, ground fault, etc., and the collector-emitter voltage V CE applied to the main element 11 of the protected element varies depending on the difference in the short-circuit mode. Since it is expected that the main element 11
Since the current ratio between the sub-element 12 and the sub-element 12 fluctuates and the current limit value also largely changes, it is difficult to realize a stable overcurrent protection operation.
【０００６】そこで、半導体基板に集積形成したＩＧＢ
Ｔセルの一部を電流検出用のセンスセルとして用い、該
センスセルのエミッタ電極を同じ基板上に形成した主セ
ルのエミッタ電極から切り離し過電流保護回路の電流検
出抵抗に接続するように構成したものが、この発明と同
一出願人より特願平６−２７０７４号として既に出願さ
れている。Therefore, the IGB integratedly formed on the semiconductor substrate
A configuration is used in which a part of the T cell is used as a sense cell for current detection, and the emitter electrode of the sense cell is separated from the emitter electrode of the main cell formed on the same substrate and is connected to the current detection resistor of the overcurrent protection circuit. The same applicant as this invention has already filed as Japanese Patent Application No. 6-27074.
【０００７】[0007]
【発明が解決しようとする課題】ところで、前記のよう
に同一半導体基板に主セルと電流検出用のセンスセルを
組み込んだ構成のものについて、様々な実験、考察を行
った結果、次のような特性上の不具合が生じることが明
らかになった。すなわち、半導体基板上におけるセンス
セルの組み込み位置によっては、主セル領域とセンスセ
ル領域との境界領域でキャリアの相互干渉が生じ、これ
が基で主セル領域に流れる主電流とセンスセル領域に流
れる電流の比率が変化するようになる。しかも、ＩＧＢ
Ｔ素子では過電流保護回路の電流検出抵抗により、エミ
ッタ電位の上昇したセンスセルとエミッタがアース電位
である主セルとでは、各々のゲート電位が異なるために
電流密度に差が生じ、この結果として、コレクタ−エミ
ッタ間電圧ＶCEが変化すると過電流保護による主電流の
制限電流値も変動し、その傾向はコレクタ・エミッタ電
圧ＶCEが低い低電圧領域では制限電流値が増大するよう
になる。By the way, as a result of various experiments and consideration for the structure in which the main cell and the sense cell for current detection are incorporated in the same semiconductor substrate as described above, the following characteristics are obtained. It became clear that the above trouble would occur. That is, depending on the position where the sense cell is incorporated on the semiconductor substrate, mutual interference of carriers occurs in the boundary region between the main cell region and the sense cell region, and the ratio of the main current flowing in the main cell region to the current flowing in the sense cell region is based on this. It will change. Moreover, IGB
In the T element, due to the current detection resistance of the overcurrent protection circuit, a difference in current density occurs between the sense cell whose emitter potential has risen and the main cell whose emitter is at ground potential, because the respective gate potentials are different, and as a result, When the collector-emitter voltage V CE changes, the limiting current value of the main current due to overcurrent protection also changes, which tends to increase in the low voltage region where the collector-emitter voltage V CE is low.
【０００８】しかも、このような制限電流値の電圧依存
性が大きくなると、ＩＧＢＴをインバータ装置に適用す
る場合には過電流保護動作の面で不都合が生じることか
ら、できる限り制限電流値の電圧依存性を低く抑えるこ
とが要求される。この発明の目的は、前記の課題を解決
し、様々な動作環境下でも主電流と検出電流との比率を
一定に保ち、過電流保護回路と組み合わせて負荷短絡時
における制限電流値の電圧依存性を抑えて過電流保護が
行え、且つ、主セルに流れる主電流値とセンスセルに流
れる検出電流値の比率を一定に保ち、さらに主電流の監
視を低電流レベルでもできるようにした電流検出機能付
きの絶縁ゲート型バイポーラトランジスタを提供するこ
とにある。Moreover, if the voltage dependence of the limiting current value becomes large, inconvenience occurs in the overcurrent protection operation when the IGBT is applied to the inverter device. Therefore, the voltage dependence of the limiting current value is as much as possible. It is required to keep the property low. The object of the present invention is to solve the above-mentioned problems, keep the ratio of the main current and the detected current constant even under various operating environments, and combine with an overcurrent protection circuit to determine the voltage dependence of the limit current value at the time of load short circuit. With a current detection function that suppresses overcurrent and keeps the ratio of the main current value flowing in the main cell to the detection current value flowing in the sense cell constant, and that the main current can be monitored even at a low current level. To provide an insulated gate bipolar transistor.
【０００９】[0009]
【課題を解決するための手段】前記の目的を達成するめ
に、多数の主セルで構成される主セル領域を有する半導
体基板の一部に電流検出用の複数個のセンスセルで構成
されるセンスセル領域を形成した絶縁ゲート型バイポー
ラトランジスタにおいて、該センスセル領域を２分割
し、第１のセンスセル領域が主セル領域から電気的に隔
離され、第２のセンスセル領域が主セル領域と隣接して
配置される構成とする。この第１のセンスセル領域の端
部が主セル領域の端部から１００μｍ以上離れて配置さ
れるとよい。センスセル領域の総面積に対して第２のセ
ンスセル領域の面積が５％ないし３０％を占めると効果
的である。In order to achieve the above-mentioned object, a sense cell region composed of a plurality of sense cells for current detection is provided in a part of a semiconductor substrate having a main cell region composed of a large number of main cells. In the insulated gate bipolar transistor having the structure described above, the sense cell region is divided into two, the first sense cell region is electrically isolated from the main cell region, and the second sense cell region is arranged adjacent to the main cell region. The configuration. The end of the first sense cell region may be arranged 100 μm or more away from the end of the main cell region. It is effective that the area of the second sense cell region occupies 5% to 30% of the total area of the sense cell region.
【００１０】前記の構成とすることで、ＩＧＢＴに流れ
る電流は、主セルと同一半導体基板に形成した電流検出
用セルのエミッタ電極を通じて外部に接続した保護回路
の電流検出抵抗によって検出され、負荷短絡などで過電
流が流れた際には、保護回路の動作により主電流をＩＧ
ＢＴの短絡耐量以内に制限してセルを破壊から保護す
る。この過電流保護動作は従来の方式と同様であるが、
その場合にセンスセルを２分割し、第１のセンスセルを
主セルとの間に電流の影響が及ばない程度に間隔をあけ
るか、あるいは第１のセンスセルと主セルとの間に分離
領域（トレンチ分離、誘電分離など）を設けるなどし
て、第１のセンスセルを主セルから電気的に隔離し、第
１センスセルに比べてかなり小さな第２のセンスセルを
主セルに隣接させるように半導体基板上にレイアウトす
ることで、主セルとセンスセルとの間の電流干渉を極力
抑え、コレクタ−エミッタ電圧ＶCEが変動しても、主セ
ルとセンスセルとの間の電流比率を一定に保つことがで
き、かつ電流比率の変化に起因する制限電流値の電圧依
存性も小さくできる。さらに小さな面積の第２のセンス
セルを設けることで、定格コレクタ電流以下の領域でも
主セルに流れる電流値にほぼ比例してセンスセルに流れ
る検出電流値が変化するようにでき、常時主電流値を監
視できる。With the above structure, the current flowing in the IGBT is detected by the current detection resistor of the protection circuit externally connected through the emitter electrode of the current detection cell formed on the same semiconductor substrate as the main cell, and the load is short-circuited. When an overcurrent flows due to the
Protect the cell from damage by limiting it to within the short-circuit tolerance of BT. This overcurrent protection operation is similar to the conventional method,
In that case, the sense cell is divided into two, and the first sense cell is spaced from the main cell so that the influence of the current is not exerted, or the isolation region (trench isolation) is provided between the first sense cell and the main cell. , Dielectric isolation, etc.) to electrically isolate the first sense cell from the main cell and to lay out on the semiconductor substrate a second sense cell, which is considerably smaller than the first sense cell, adjacent to the main cell. By doing so, the current interference between the main cell and the sense cell is suppressed as much as possible, and even if the collector-emitter voltage V CE fluctuates, the current ratio between the main cell and the sense cell can be kept constant, and the current can be kept constant. The voltage dependence of the limited current value due to the change in the ratio can also be reduced. By providing the second sense cell having a smaller area, the detected current value flowing in the sense cell can be changed almost in proportion to the current value flowing in the main cell even in the region of the rated collector current or less, and the main current value is constantly monitored. it can.
【００１１】[0011]
【発明の実施の形態】図１はこの発明の一実施例の構成
図で、同図（ａ）はＩＧＢＴの平面図、同図（ｂ）はセ
ンスセル領域の拡大平面図を示す。同図（ａ）におい
て、ＩＧＢＴチップ１は主セル領域とセンスセル領域で
構成されるが、そのセル領域を被覆している電極は主セ
ル電極２とセンスセル電極３で構成される。同図（ｂ）
において、主セル電極内端２ａとセンスセル電極外端３
ａとを点線で示しており、実線は各セル領域を示してい
る。センスセル領域は第１のセンスセル領域５と第２の
センスセル領域６から構成され、第１センスセル領域５
の端部と主セル領域４の端部との距離Ｌは１００μｍ以
上離されている。第２のセンスセル領域６と主セル領域
４とは互いに隣接して配置される（例えば１０μｍ程度
離して配置される）。また第１のセンスセル領域５と第
２のセンスセル領域６とは数十μｍ離して配置される。
後述の実験データによるとセンスセル領域の全面積に対
して第２のセンスセル領域６の面積を５％から３０％と
することで、コレクタ・エミッタ間に印加される電圧
（以下、コレクタ・エミッタ電圧ＶCEという）が変動し
ても、主セル領域の電流とセンスセル領域の電流との間
の電流比率を一定に保つことができ、かつ電流比率の変
化に起因する制限電流値の電圧依存性も小さくできる。
また定格コレクタ電流以下の領域でも主セル領域に流れ
る電流値にほぼ比例してセンスセル領域に流れる検出電
流値が変化するようにでき、常時コレクタ電流値Ｉ
c （主電流値）を監視できる。尚、第１のセンスセル領
域５のエミッタと第２のセンスセル領域６のエミッタと
はセンスセル電極３で接続される。尚、セル形状は図示
しないが、四角形、三角形、丸形およびストライプ形等
である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT FIG. 1 is a block diagram of an embodiment of the present invention.
In the figure, (a) is a plan view of the IGBT and (b) is a plan view.
An enlarged plan view of the cell region is shown. The same figure (a)
The IGBT chip 1 has a main cell area and a sense cell area.
However, the electrode covering the cell area is the main cell.
And a sense cell electrode 3. The same figure (b)
At the main cell electrode inner end 2a and the sense cell electrode outer end 3
a is indicated by a dotted line, and the solid line indicates each cell region.
You. The sense cell region includes the first sense cell region 5 and the second sense cell region 5.
The sense cell region 6 includes the first sense cell region 5
The distance L between the edge of the cell and the edge of the main cell region 4 is 100 μm or less.
Has been separated. Second sense cell region 6 and main cell region
4 are arranged adjacent to each other (for example, about 10 μm)
Placed apart). In addition, the first sense cell region 5
The second sense cell region 6 is separated from the second sense cell region 6 by several tens of μm.
According to the experimental data described below,
Then, the area of the second sense cell region 6 is changed from 5% to 30%.
Voltage applied between the collector and emitter
(Hereinafter, collector-emitter voltage VCESaid)
Between the current in the main cell area and the current in the sense cell area
Current ratio can be kept constant and the current ratio
The voltage dependence of the limiting current value due to the increase in the voltage can be reduced.
Also, even in the area below the rated collector current, it will flow into the main cell area.
Detected current flowing in the sense cell region almost in proportion to the current value
The flow current value can be changed and the collector current value I
c(Main current value) can be monitored. The first sense cell area
The emitter of the region 5 and the emitter of the second sense cell region 6
Are connected by the sense cell electrode 3. The cell shape is shown
Not, but square, triangle, round and stripe shapes, etc.
It is.
【００１２】図２は第１のセンスセル領域と主セル領域
の要部断面図を示す。センスセル領域５の端部と主セル
領域４の端部との距離Ｌは１００μｍ以上離れている。
図３はコレクタ・エミッタ電圧ＶCEを一定とした場合の
検出電流値とコレクタ電流（主電流）との関係図を示
す。センスセル領域の総面積に対して第２のセンスセル
領域の面積を減少させると定格コレクタ電流以下で検出
電流値はコレクタ電流に比例しなくなる。その面積は総
面積に対して５％以下となると顕著となり３０％以上に
なると全コレクタ電流で比例関係は維持される。FIG. 2 is a cross-sectional view of an essential part of the first sense cell region and the main cell region. The distance L between the end of the sense cell region 5 and the end of the main cell region 4 is 100 μm or more.
FIG. 3 shows the relationship between the detected current value and the collector current (main current) when the collector-emitter voltage V CE is constant. When the area of the second sense cell region is reduced with respect to the total area of the sense cell region, the detected current value is not proportional to the collector current at the rated collector current or less. When the area is 5% or less with respect to the total area, it becomes remarkable, and when it is 30% or more, the proportional relationship is maintained for all collector currents.
【００１３】図４はコレクタ・エミッタ電圧ＶCEを一定
とした場合の検出電流値とＩＧＢＴの飽和電圧Ｖ
CE(sat) の関係図を示す。センスセル領域がすべて第１
のセンスセル領域Ｄで構成される場合は、すべて第２の
センスセル領域Ａで構成される場合と比べて、検出電流
値のばらつき幅が小さく、飽和電圧に対する依存性も小
さい。FIG. 4 shows the detected current value and the IGBT saturation voltage V when the collector-emitter voltage V CE is constant.
The relationship diagram of CE (sat) is shown. All sense cell areas are first
In the case of being constituted by the sense cell region D, the variation width of the detected current value is smaller and the dependency on the saturation voltage is smaller than in the case of being entirely constituted by the second sense cell region A.
【００１４】図５は検出電流のばらつき幅と第２のセン
スセル領域のセンスセル領域の総面積に占める割合との
関係図を示す。第２のセンスセル領域のセンスセル領域
の総面に占める割合が３０％を超えると急激にばらつき
は増大する。図６はコレクタ電流が一定の場合の検出電
流値とコレクタ・エミッタ電圧ＶCEとの関係図を示す。
センスセル領域がすべて第１のセンスセル領域Ｄで構成
される場合は、すべて第２のセンスセル領域で構成され
る場合Ａと比べて、検出電流値のコレクタ・エミッタ電
圧ＶCEの依存性は小さく、コレクタ・エミッタ電圧Ｖ CE
が７０Ｖ以上で検出電流は一定となる。第２のセンスセ
ル領域のセンスセル領域の総面積に占める割合が３０％
以下ではセンスセル領域がすべて第１のセンスセル領域
で構成される場合Ｄとほぼ同じであった。FIG. 5 shows the variation width of the detected current and the second sensitivity.
The ratio of the cell area to the total area of the sense cell area
A relationship diagram is shown. Sense cell region of second sense cell region
When the ratio of the total surface area of the
Will increase. Figure 6 shows the detection current when the collector current is constant.
Current value and collector-emitter voltage VCEShows the relationship diagram with.
The sense cell area is entirely composed of the first sense cell area D
If all are configured, it is composed of the second sense cell area.
In comparison with A, the collector / emitter voltage of the detected current value is
Pressure VCEHas a small dependency on the collector-emitter voltage V CE
Is 70 V or more, the detected current becomes constant. Second sense
30% of the total area of the sense cell region
In the following, all sense cell regions are the first sense cell region
When it was composed of, it was almost the same as D.
【００１５】尚、前記の実験データから、実用的には設
計に余裕を持たせ、センスセル領域の総面積に対して第
２のセンスセル領域の面積を１０％から２０％の範囲に
設定するとよい。また、この実施例はＩＧＢＴモジュー
ルなどのパワーモジュールの他に過電流などの保護回路
を内蔵したインテリジェントパワーモジュール（通称Ｉ
ＰＭという）などにも適用できる。From the above experimental data, it is advisable to allow a margin for the design practically and set the area of the second sense cell region within the range of 10% to 20% with respect to the total area of the sense cell region. In addition, in this embodiment, in addition to a power module such as an IGBT module, an intelligent power module (commonly referred to as I
It can also be applied to).
【００１６】[0016]
【発明の効果】この発明によれば、多数の主セルで構成
される主セル領域を有する半導体基板の一部に電流検出
用の複数個のセンスセルで構成されるセンスセル領域を
形成し、該センスセル領域を２分割し、第１のセンスセ
ル領域を主セル領域から１００μｍ以上離して電気的に
隔離し、第２のセンスセル領域を主セル領域と隣接して
配置し、センスセル領域の総面積に対して第２のセンス
セル領域の面積を５％ないし３０％とすることで、主セ
ル領域の電流とセンスセル領域の電流との間の電流比率
を安定に保ちつつ、センスセル領域の電流でＩＧＢＴに
流れる電流を精度良く検出ができ、これにより制限電流
値の電源電圧に対する依存性をを低く抑えて安定した過
電流保護ができると共に、定格コレクタ電流以下でのコ
レクタ電流（主電流）の監視を定常的に行うことができ
る。According to the present invention, a sense cell region composed of a plurality of sense cells for current detection is formed in a part of a semiconductor substrate having a main cell region composed of a large number of main cells. The region is divided into two, the first sense cell region is electrically separated from the main cell region by 100 μm or more, the second sense cell region is arranged adjacent to the main cell region, and the total area of the sense cell region is By setting the area of the second sense cell region to 5% to 30%, the current flowing in the IGBT by the current of the sense cell region is kept stable while keeping the current ratio between the current of the main cell region and the current of the sense cell region stable. This enables accurate detection, which suppresses the dependence of the limit current value on the power supply voltage to provide stable overcurrent protection, and also allows the collector current below the rated collector current (main ) Monitoring can be carried out steadily the.
【図１】この発明の一実施例の構成図で、（ａ）はＩＧ
ＢＴの平面図、（ｂ）はセンスセル領域の拡大平面図を
示すFIG. 1 is a configuration diagram of an embodiment of the present invention, in which (a) is an IG.
A plan view of the BT, (b) is an enlarged plan view of the sense cell region.
【図２】第１のセンスセル領域と主セル領域の要部断面
図FIG. 2 is a cross-sectional view of essential parts of a first sense cell region and a main cell region.
【図３】コレクタ・エミッタ電圧ＶCEを一定とした場合
の検出電流値とコレクタ電流Ｉ C （主電流）との関係図FIG. 3 Collector-emitter voltage VCEWhen is constant
Detected current value and collector current I CRelationship diagram with (main current)
【図４】コレクタ・エミッタ電圧ＶCEを一定とした場合
の検出電流値とＩＧＢＴの飽和電圧ＶCE(sat) の関係図FIG. 4 is a diagram showing the relationship between the detected current value and the IGBT saturation voltage V CE (sat) when the collector-emitter voltage V CE is constant.
【図５】検出電流のばらつきと第２のセンスセル領域の
センスセル領域の総面積に占める割合との関係図FIG. 5 is a relational diagram of variations in detected current and a ratio of the second sense cell region to the total area of the sense cell region.
【図６】コレクタ電流が一定の場合の検出電流値と印加
電圧との関係図FIG. 6 is a diagram showing the relationship between the detected current value and the applied voltage when the collector current is constant.
【図７】ＩＧＢＴの過電流保護回路図FIG. 7: IGBT overcurrent protection circuit diagram
１ ＩＧＢＴチップ ２ 主セル電極 ２ａ 主セル電極内端 ３ センスセル電極 ３ａ センスセル電極外端 ４ 主セル領域 ５ 第１のセンスセル領域 ６ 第２のセンスセル領域 １１ 主素子 １２ 副素子 １３ ＭＯＳＦＥＴ １４ 電流検出抵抗 １５ ゲート １６ ゲート １７ ゲート １８ ドレイン １９ 接続点 DESCRIPTION OF SYMBOLS 1 IGBT chip 2 Main cell electrode 2a Main cell electrode inner end 3 Sense cell electrode 3a Sense cell electrode outer end 4 Main cell region 5 First sense cell region 6 Second sense cell region 11 Main element 12 Sub-element 13 MOSFET 14 Current detection resistor 15 Gate 16 Gate 17 Gate 18 Drain 19 Connection point
フロントページの続き (72)発明者 簑谷 由成 神奈川県川崎市川崎区田辺新田１番１号 富士電機株式会社内Front page continued (72) Inventor Yunari Kaya 1-1, Tanabe Nitta, Kawasaki-ku, Kawasaki-shi, Kanagawa Fuji Electric Co., Ltd.
Claims (3)
する半導体基板の一部に電流検出用の複数個のセンスセ
ルで構成されるセンスセル領域を形成した絶縁ゲート型
バイポーラトランジスタにおいて、該センスセル領域を
２分割し、第１のセンスセル領域が主セル領域から電気
的に隔離され、第２のセンスセル領域が主セル領域と隣
接して配置されることを特徴とする絶縁ゲート型バイポ
ーラトランジスタ。1. An insulated gate bipolar transistor in which a sense cell region composed of a plurality of sense cells for current detection is formed in a part of a semiconductor substrate having a main cell region composed of a large number of main cells. An insulated gate bipolar transistor, wherein the region is divided into two, the first sense cell region is electrically isolated from the main cell region, and the second sense cell region is arranged adjacent to the main cell region.
の端部から１００μｍ以上離れて配置されることを特徴
とする請求項１記載の絶縁ゲート型バイポーラトランジ
スタ。2. The insulated gate bipolar transistor according to claim 1, wherein the end of the first sense cell region is arranged at a distance of 100 μm or more from the end of the main cell region.
ンスセル領域の面積が５％ないし３０％占めることを特
徴とする請求項１記載の絶縁ゲート型バイポーラトラン
ジスタ。3. The insulated gate bipolar transistor according to claim 1, wherein the area of the second sense cell region occupies 5% to 30% of the total area of the sense cell region.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31766395A JPH09162391A (en) | 1995-12-06 | 1995-12-06 | Insulated gate bipolar transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31766395A JPH09162391A (en) | 1995-12-06 | 1995-12-06 | Insulated gate bipolar transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09162391A true JPH09162391A (en) | 1997-06-20 |
Family
ID=18090652
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP31766395A Pending JPH09162391A (en) | 1995-12-06 | 1995-12-06 | Insulated gate bipolar transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09162391A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19823140B4 (en) * | 1997-10-22 | 2008-01-03 | Fairchild Korea Semiconductor Ltd., Puchon | Sample field effect transistor |
| KR100914561B1 (en) * | 2006-06-30 | 2009-08-31 | 산요덴키가부시키가이샤 | Insulated gate type semiconductor device |
| DE102011086034A1 (en) | 2010-12-22 | 2012-06-28 | Mitsubishi Electric Corporation | Semiconductor device |
| US8633723B2 (en) | 2010-02-18 | 2014-01-21 | Fuji Electric Co., Ltd. | Semiconductor apparatus |
| CN103928505A (en) * | 2013-01-14 | 2014-07-16 | 力芯科技股份有限公司 | Power Mosfet Device |
| CN104350275A (en) * | 2012-08-30 | 2015-02-11 | 富士电机株式会社 | Igniter, igniter control method, and internal combustion engine ignition apparatus |
-
1995
- 1995-12-06 JP JP31766395A patent/JPH09162391A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19823140B4 (en) * | 1997-10-22 | 2008-01-03 | Fairchild Korea Semiconductor Ltd., Puchon | Sample field effect transistor |
| KR100914561B1 (en) * | 2006-06-30 | 2009-08-31 | 산요덴키가부시키가이샤 | Insulated gate type semiconductor device |
| US8633723B2 (en) | 2010-02-18 | 2014-01-21 | Fuji Electric Co., Ltd. | Semiconductor apparatus |
| DE102011086034A1 (en) | 2010-12-22 | 2012-06-28 | Mitsubishi Electric Corporation | Semiconductor device |
| CN102565508A (en) * | 2010-12-22 | 2012-07-11 | 三菱电机株式会社 | Semiconductor device |
| US8823360B2 (en) | 2010-12-22 | 2014-09-02 | Mitsubishi Electric Corporation | Semiconductor device |
| US9121899B2 (en) | 2010-12-22 | 2015-09-01 | Mitsubishi Electric Corporation | Semiconductor device |
| CN104350275A (en) * | 2012-08-30 | 2015-02-11 | 富士电机株式会社 | Igniter, igniter control method, and internal combustion engine ignition apparatus |
| US9644596B2 (en) | 2012-08-30 | 2017-05-09 | Fuji Electric Co., Ltd. | Igniter, igniter control method, and internal combustion engine ignition apparatus |
| CN103928505A (en) * | 2013-01-14 | 2014-07-16 | 力芯科技股份有限公司 | Power Mosfet Device |
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