CN117713701A - Class F Doherty architecture high-power class amplifier - Google Patents

Class F Doherty architecture high-power class amplifier Download PDF

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Publication number
CN117713701A
CN117713701A CN202311826984.4A CN202311826984A CN117713701A CN 117713701 A CN117713701 A CN 117713701A CN 202311826984 A CN202311826984 A CN 202311826984A CN 117713701 A CN117713701 A CN 117713701A
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power amplifier
matching network
class
output
amplifier
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黄亮
鲍培德
刘宗江
辛丽莉
吕华阳
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Syntronic Beijing R&d Center Co ltd
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Syntronic Beijing R&d Center Co ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0277Selecting one or more amplifiers from a plurality of amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56Modifications of input or output impedances, not otherwise provided for
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217Class D power amplifiers; Switching amplifiers
    • H03F3/2176Class E amplifiers

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microwave Amplifiers (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses a high-power class amplifier of a Doherty architecture suitable for class F, which comprises: the power divider, the main power amplifier bias and input matching network, the auxiliary power amplifier bias and input matching network, the main power amplifier tube, the auxiliary power amplifier tube, the main power amplifier bias and output harmonic impedance matching network 'double T-shaped' structure, the auxiliary power amplifier bias and output harmonic impedance matching network 'double T-shaped' structure, the main power amplifier output fundamental wave impedance matching network, the auxiliary power amplifier output fundamental wave impedance matching network, the main power amplifier input phase compensation line, the auxiliary power amplifier output phase compensation line and the impedance transformation network. The F-class integral Doherty power amplifier has higher working efficiency and lower harmonic distortion in a larger output dynamic range between the rollback power and the saturated power, and the F-class Doherty framework power amplifier has higher output power level and is suitable for the power amplifier design of a 5G macro base station.

Description

Class F Doherty architecture high-power class amplifier
Technical Field
The invention relates to the technical field of mobile communication, in particular to a class F Doherty architecture high-power class amplifier.
Background
With the development of the 5G age, modern modulation schemes such as OFDM (Orthogonal Frequency Division Multiplexing ), CDMA (Code Division Multiple Access, code division multiple access) and the like have come into wide use. These modern modulation techniques can increase the utilization of the spectrum, but also create peak-to-average ratio issues. The Doherty architecture is commonly used for power amplifiers at present. The framework has higher efficiency of back-off power and saturated power, and can meet peak-to-average ratio and linearity. In order to obtain higher efficiency, the main power amplification tube and the auxiliary power amplification tube can work in class F when in saturated power, so that the saturated power efficiency of the integral Doherty power amplifier is directly improved, and the back-off power efficiency of the main power amplifier is indirectly improved.
The power amplifier of the Doherty architecture of class F is currently used for low power class design. The fundamental wave impedance of the output of the power amplification tube with low power level is larger, the fundamental wave impedance change is smaller in the dynamic range of larger input power, the harmonic wave impedance is easy to control, and the fundamental wave matching network and the harmonic suppression network are easy to design. The fundamental wave impedance of the output of the power amplification tube with high power class is smaller, the fundamental wave impedance change is larger in the dynamic range of larger input power, the harmonic wave impedance is difficult to control, and the fundamental wave matching network and the harmonic suppression network are difficult to design.
Related technical patents of the F-class Doherty architecture power amplifier disclosed in the prior art, wherein:
patent application number CN111404490a discloses a hybrid continuous type Doherty power amplifier. The output matching network and the rear matching network of the invention both adopt step impedance transformation structures. Although the output bandwidth can be increased, its steering power for harmonic impedance is weak.
Patent application number CN111884600A discloses a Doherty power amplifier and a main power amplifier output matching structure suitable for a 5G base station. According to the schematic diagram of the patent, a matching network similar to a single T-shaped structure is adopted at the output of the main power amplifier, and in addition, according to the efficiency curve of the patent, the power amplifier can achieve higher efficiency of more than 60% at the back-off power of 37dBm and the saturated power of 48dBm, but has efficiency of only 45% -46% at the output power of 40dBm-44dBm, and cannot meet the requirement of higher working efficiency in a 12dB dynamic range.
Patent application number CN113346844a discloses a class F high efficiency Doherty power amplifier. The output matching network of the invention adopts a transformation structure with step impedance, and the harmonic network adopts a similar single T-shaped network. The power amplifier has higher rollback efficiency and saturation efficiency, but has smaller output saturated power and lower gain.
Disclosure of Invention
The present invention is directed to a class F Doherty architecture high power class amplifier to solve the above-mentioned problems.
In order to achieve the above purpose, the present invention provides the following technical solutions: a class F Doherty architecture high power class amplifier comprising: the power divider, the main power amplifier bias and input matching network, the auxiliary power amplifier bias and input matching network, the main power amplifier tube, the auxiliary power amplifier tube, the main power amplifier bias and output harmonic impedance matching network 'double T-shaped' structure, the auxiliary power amplifier bias and output harmonic impedance matching network 'double T-shaped' structure, the main power amplifier output fundamental wave impedance matching network, the auxiliary power amplifier output fundamental wave impedance matching network, the main power amplifier input phase compensation line, the auxiliary power amplifier output phase compensation line and the impedance transformation network;
the power distributor distributes power to radio frequency signals, and the distributed radio frequency signals respectively enter a main power amplification path and an auxiliary power amplification path; the main power amplification path and the auxiliary power amplification path are used for amplifying the input radio frequency signals, the amplified radio frequency signals passing through the main power amplification path and the auxiliary power amplification path are subjected to power synthesis at an output impedance combining point, enter an impedance transformation network, and output the amplified output radio frequency signals to a load terminal;
the main power amplifier path comprises a main power amplifier input phase compensation line, a main power amplifier bias and input matching network, a main power amplifier tube, a main power amplifier bias and output harmonic impedance matching network 'double T-shaped' structure and a main power amplifier output fundamental wave impedance matching network in sequence; the auxiliary power amplifier path comprises an auxiliary power amplifier input phase compensation line, an auxiliary power amplifier bias and input matching network, an auxiliary power amplifier tube, an auxiliary power amplifier bias and output harmonic impedance matching network 'double T-shaped' structure, an auxiliary power amplifier output fundamental wave impedance matching network and an auxiliary power amplifier phase compensation line.
Preferably, the power divider is implemented by an integrated 3dB, 90 ° bridge.
Preferably, the main power amplifier bias and input matching network and the auxiliary power amplifier bias and input matching network are realized through microstrip lines and capacitive impedance matching networks.
Preferably, the main power amplifier bias and output harmonic impedance matching network and the auxiliary power amplifier bias and output harmonic impedance matching network are realized through a double-T-shaped microstrip impedance matching network, and the output harmonic impedance matching network has the function of enabling the second harmonic output by the power amplifier to be short-circuited and the third harmonic to be open-circuited, so that the power amplifier works in class F.
Preferably, the power distribution ratio of the main power amplification tube and the auxiliary power amplification tube is 1.0:1.585.
Preferably, the main power amplifier output fundamental wave impedance matching network and the auxiliary power amplifier output fundamental wave impedance matching network are respectively matched to the impedance of the rollback power and the impedance of the saturated power through the microstrip impedance matching network.
Preferably, the input phase compensation line of the main power amplifier and the input phase compensation line of the auxiliary power amplifier are made to be consistent in phase of the main power amplifier path and the auxiliary power amplifier path by adjusting the electric length of the microstrip line.
Preferably, the output phase compensation line of the auxiliary power amplifier is to adjust the electrical length of the microstrip line, so that the output impedance of the auxiliary power amplifier tends to infinity when the auxiliary power amplifier is in the back-off power.
Preferably, the impedance transformation network transforms the impedance of the output junction point of the main power amplification path and the auxiliary power amplification path into a termination impedance of 50 ohms through a micro-strip line with a quarter wavelength.
Preferably, the power amplifier of the main power amplifier works in a continuous F-type mode when the input power is saturated, and works in an approximate F-type mode when the input power is backed off by 8.2 dB;
the power amplifier of the auxiliary power amplifier works in a continuous F-type mode when the input power is saturated, and does not work when the input power is backed off by 8.2 dB.
Compared with the prior art, the invention has the beneficial effects that:
firstly, harmonic networks of the output of a main power amplifier and an auxiliary power amplifier are designed in a double T shape, so that the main power amplifier and the auxiliary power amplifier work in a continuous F type when saturated power is adopted, and the efficiency of a power amplifier of an integral F type Doherty framework is directly improved; meanwhile, the design of double T-shaped of the main power amplifier and the auxiliary power amplifier is further intensively optimized, so that the main power amplifier works in the approximate F type when the main power amplifier backs off the power, the auxiliary power amplifier is not started when the auxiliary power amplifier backs off the power, and the efficiency of the power amplifier of the F type Doherty architecture is indirectly improved.
Secondly, the output power of the power amplifier of the F-class Doherty framework is 63% -82% in the dynamic range of 8.2dB, and no low-efficiency area exists.
And the output saturated power and the output back-off power of the F-class Doherty framework power amplifier are 58.2dBm and 50dBm respectively, so that the power class is higher, and the power amplifier is suitable for the design of the power amplifier of the 5G macro base station.
Finally, the gains of the power amplifier of the F-class Doherty framework in the B28 (758 MHz-803 MHz) are larger than 22dB, and the gains are higher.
Drawings
Fig. 1 is a block diagram of a power amplifier of a conventional reverse Doherty architecture;
FIG. 2 is a block diagram of a class F Doherty architecture power amplifier of the invention
FIG. 3 is a schematic diagram of a class F Doherty architecture power amplifier of the invention
Fig. 4 is a schematic diagram of the main power amplifier path of the present invention at the time of back-off power;
FIG. 5 is a schematic diagram of the main power amplifier path of the present invention at saturated power;
FIG. 6 is a schematic diagram of the auxiliary power amplifier circuit of the present invention when saturated power is applied;
FIG. 7 shows a conventional power amplifier bias and output fundamental impedance matching network
Fig. 8 is a conventional power amplifier bias and output harmonic impedance matching network and fundamental impedance matching network.
Fig. 9 is a power amplifier bias and output harmonic impedance matching network (double-T-shaped structure) and fundamental impedance matching network of the present invention.
FIG. 10 is an AMAM curve of a power amplifier of the class F Doherty architecture of the invention;
FIG. 11 is an efficiency curve of a power amplifier of the class F Doherty architecture of the invention;
FIG. 12 is a time domain plot of voltage and current at the drain of a power amplifier of the class F Doherty architecture of the invention;
fig. 13 is a schematic flow chart of the present invention.
Fig. 14 is a comprehensive comparison of the rf performance of the present invention and the patent of the known class F Doherty power amplifier.
Fig. 15 is a position of fundamental wave impedance and harmonic wave impedance after passing through the fundamental wave matching network and the harmonic matching network in a Simith circle chart when the main power amplifier is in back-off power.
Fig. 16 is a position of fundamental wave impedance and harmonic wave impedance in a Simith circle chart after passing through the fundamental wave matching network and the harmonic matching network when the main power amplifier is at saturated power.
Fig. 17 is a position of fundamental wave impedance and harmonic wave impedance after passing through the fundamental wave matching network and the harmonic matching network in a Simith circle chart when the auxiliary power amplifier is in saturated power.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1-17, the present invention provides a technical solution: a class F Doherty architecture high power class amplifier comprising the following steps:
firstly, determining VSWR= 2.585 according to a data manual of DWX20G6C-96HC and a peak-to-average ratio actually required;
secondly, determining the impedance of the main power amplifier and the auxiliary power amplifier at an output combination point according to VSWR= 2.585; when the power amplifier of the Doherty framework is in the back-off power, the impedance of the main power amplifier at the output junction point is 16 ohms, and the impedance of the auxiliary power amplifier at the output junction point tends to infinity; when the power amplifier of the Doherty framework is in saturated power, the impedance of the main power amplifier at the output junction point is 41.36 ohms, and the impedance of the auxiliary power amplifier at the output junction point is 26.094 ohms;
thirdly, a main power amplifier is utilized, and a Load pull tool is utilized to scan out the Load impedance of a fundamental wave of 3.723+j 1.840 ohms and the source impedance of the fundamental wave of 2.453+j 4.176 ohms when the saturated power is 54 dBm; according to the fundamental load impedance and the VSWR= 2.585 circle, scanning out fundamental load impedance of 5.782+j by 6.047 ohms when the back-off power is 50dBm, and repeating iteration until the fundamental load impedance is optimal;
fourthly, the auxiliary power amplifier uses a Load pull tool to scan out fundamental wave Load impedance of 2.844+j 0.523 ohm and fundamental wave source impedance of 1.149-j 3.618 ohm when saturated power is 56 dBm; repeating iteration until the optimal value is reached;
fifthly, the main power amplifier utilizes a Load pull tool to scan high-efficiency second harmonic impedance and high-efficiency third harmonic impedance on the basis of fundamental wave Load impedance when saturated power is adopted, and then scan high-efficiency second harmonic impedance and high-efficiency third harmonic impedance on the basis of fundamental wave Load impedance when power is backed. Repeating the weighing, determining that the second harmonic load impedance is 0.031-j 197.627 ohm and the third harmonic load impedance is 7.879E-9+j 86.919 ohm;
six, an auxiliary power amplifier is used for respectively scanning high-efficiency second harmonic impedance and third harmonic impedance on the basis of fundamental wave Load impedance when saturated power is applied by using a Load pull tool; the second harmonic load impedance was determined to be 0.046-j 90.468 ohms and the third harmonic load impedance was determined to be 7.897E-9+ j 86.919 ohms.
Seven, the main power amplifier adjusts the third harmonic impedance to 7.879E-9+j 86.919 ohms by using three microstrip lines of TL17, TL15 and TL13 in a double T shape, adjusts the second harmonic impedance to 0.031-j 197.627 by using TL16, TL18 and TL14 in a double T shape, and respectively adjusts the fundamental wave load impedance to 3.723+j 1.840 ohms and 5.782+j 6.047 ohms at saturated power and rollback power by using TL19, TL27, C9 and C11; after the fundamental wave impedance and the harmonic wave impedance output by the main power amplifier pass through the double T-shaped harmonic matching network and the fundamental wave matching network, the effect of the fundamental wave impedance on the Simith circle chart is shown in fig. 15 and 16;
eight, auxiliary power amplifier, three microstrip lines of TL30, TL31 and TL29 of double T shape are utilized to adjust the third harmonic impedance to 7.897E-9+j 86.919 ohm, TL33, TL32 and TL34 of double T shape are utilized to adjust the second harmonic impedance to 0.046-j 90.468 ohm, and TL35, TL28 and C15 are utilized to adjust the fundamental wave load impedance to 2.844+j 0.523 ohm. After the fundamental wave impedance and the harmonic wave impedance output by the auxiliary power amplifier pass through the double T-shaped harmonic matching network and the fundamental wave matching network, the effect of the fundamental wave impedance and the harmonic wave impedance on the Simith circle chart is shown in fig. 17;
9. the fundamental wave load impedance, the second harmonic load impedance and the third harmonic load impedance with the center frequency of 780.5MHz are selected for optimization matching; but B28 (758 MHz-803 MHz) is the frequency range of 45 MHz. Therefore, we need to repeatedly optimize the matching network of the double T shape, so that the load impedance of the main power amplifier and the auxiliary power amplifier has excellent radio frequency performance in the whole frequency band of B28;
10. a main power amplifier, which matches the input source impedance to 2.453-j 4.176 ohms by using TL6, TL5, TL7, C1, C2 and C3 of Part1 of FIG. 3;
11. auxiliary power amplifiers, using TL9, TL8, TL10, C6, C5, C4 of fig. 3Part5, match the input source impedance to 2.844+j 0.523 ohms.
12. The main power amplifier path is subjected to joint simulation of Part4, part6, part7 and Part9 in fig. 3, and is repeatedly optimized to obtain the optimal performance of the main power amplifier path;
13. the auxiliary power amplifier path is subjected to joint simulation of Part5, part6, part8 and Part10 in the figure 3, and is repeatedly optimized to obtain the optimal performance of the auxiliary power amplifier path;
14. the power amplifier of the integral F-type Doherty framework is realized by joint simulation of all parts in FIG. 3, and the electric lengths of the microstrip lines of Part2, part3, part11 and Part12 are adjusted to align the phases of a main power amplification path and an auxiliary power amplification path, so that the optimal performance of the integral F-type Doherty power amplifier is obtained.
15. Simulation result of integral F-type Doherty power amplifier:
(1) In the 758MHz-803MHz frequency band, the saturated output power reaches 58.2dBm, and the gain of the B28 (758 MHz-803 MHz) full frequency band is more than 22dB; as shown in fig. 8;
(2) The drain efficiency of the output saturated power of 58.2dBm reaches 74% -82% in the full frequency band; as shown in fig. 9;
(3) Drain efficiency of 8.2dB back-off power of 50.0dBm reaches 60% -72% in the full frequency band; as shown in fig. 9;
(4) The output power is 63% -82% in the dynamic range of 8.2 dB; as shown in fig. 9;
(5) The drain voltage and the drain current have less overlapping in the time domain diagram, and the characteristics of the class F power amplifier are met.
The SnP1 in part1 of FIG. 3 is a power divider and adopts a 3dB and 90-degree integrated bridge. The method comprises the steps of equally dividing one path of radio frequency signals into two paths of radio frequency signals; TL4 in Part2 of fig. 3 is the phase compensation line of the main power amplifier input. The electric length of TL4 is adjusted, so that the phase of a main power amplifier path can be adjusted; TL3 in Part3 of fig. 3 is the phase compensation line of the auxiliary power amplifier input. The electric length of TL4 is adjusted, so that the phase of the auxiliary power amplifier path can be adjusted; TL5, TL6, TL7 and C2 in Part4 of fig. 3 are main power amplifier input matching networks. The fundamental wave impedance input by the main power amplifier is matched to 50 ohms of the input end of the main power amplifier; TL8, TL9, TL10 and C6 in Part5 of fig. 3 are auxiliary power amplifier input matching networks that match the fundamental impedance of the input of the auxiliary power amplifier to 50 ohms of the input of the auxiliary power amplifier; part6 of fig. 3 is a large signal ADS model of the energy-power amplifier tube DWX20G6C-96 HC. The Carrier represents a main power amplifier tube, and the Peak represents an auxiliary power amplifier tube; part7 of fig. 3 is a main power amplifier bias and output harmonic impedance matching network (double T-shaped). TL13, TL17 and TL15 are third harmonic impedance for controlling the main power amplifier, TL16, TL14 and TL18 are second harmonic impedance for controlling the main power amplifier, and TL18, C13 and C12 are bias networks for outputting the main power amplifier; taking fig. 9 as an example, the innovation point of the output harmonic network of the main power amplifier and the auxiliary power amplifier of the present invention is explained in detail: TL1, TL2, TL3 of fig. 9 are microstrip lines of one-twelfth of the fundamental wavelength. The actual one-twelfth wavelength microstrip line corresponds to one-quarter wavelength for 3 times the fundamental frequency, i.e. when f3=3f0, λ/12=λ3/4 is satisfied. In fig. 9, the parallel connection of TL2 and TL3 has a terminal open line with a length of λ3/4, and after impedance transformation, a short circuit state is presented at a point a, and then TL1 with a length of λ3/4 is connected in series, so that a primary impedance change is realized, and the short circuit at the point a changes to a state that the drain output of the power amplifier tube is in an open circuit. Similarly, the fundamental frequencies of an actual eighth-wavelength microstrip line and a quarter-wavelength microstrip line for 2-frequency multiplication are equivalent to a quarter-wavelength and a half-wavelength, respectively. I.e. when f2=2f0, λ/8=λ2/4 and λ/4=λ2/2 are satisfied. Therefore, the parallel connection TL5 and TL6 can be short-circuited at the point B after impedance change, and then a section of tuning line TL4 is connected in series for fine adjustment, so that the tuning line TL4 and the third harmonic open-circuit parts (TL 1, TL2 and TL 3) are combined to reach a quarter wavelength, and the short-circuit conversion from the point B to the drain output end can be realized; part8 of fig. 3 is an auxiliary power amplifier bias and output harmonic impedance matching network (double T-shaped). TL29, TL30 and TL31 are third harmonic impedance for controlling the main power amplifier, TL32, TL33 and TL34 are second harmonic impedance for controlling the main power amplifier, and TL32, C14 and C16 are bias networks for outputting the auxiliary power amplifier; part9 of fig. 3 is a main power amplifier output fundamental wave impedance matching network. TL19, TL27, C9, C11 are fundamental wave impedances for matching the output impedance of the main power amplifier to the saturated power and the back-off power of the main power amplifier; part10 of fig. 3 is an auxiliary power amplifier output fundamental wave impedance matching network. TL35, TL28 and C15 are fundamental wave impedances for matching the output impedance of the auxiliary power amplifier to the saturated power of the auxiliary power amplifier; part11 of fig. 3 is a phase compensation line of the auxiliary power amplifier output. The electric length of TL1 is adjusted to enable the output impedance to be in an open circuit state when the auxiliary power amplifier is in the back-off power; part12 of fig. 3 is an impedance transformation network. And adjusting the impedance and the electrical length of TL2, and converting the impedance of the output combination point of the main power amplifier and the auxiliary power amplifier into 50 ohm terminal impedance.
In the power amplifier of the F-class Doherty architecture, in the frequency range of 758MHz-803MHz, the saturated output power reaches 58.2dBm, the drain efficiency of the output saturated power reaches 74% -82% in the full frequency range, the drain efficiency of the 8.2dB rollback power of 50.0dBm reaches 60% -72% in the full frequency range, the drain efficiency of the output power reaches 63% -82% in the dynamic range of 8.2dB, and the gain of the full frequency range is greater than 22dB.
The output part of the main power amplifier in the invention skillfully selects the fundamental wave load impedance, the second harmonic load impedance and the third harmonic load impedance of the back-off power and the saturated power, and utilizes the harmonic network of the double T-shaped structure and the matching network of the fundamental wave impedance to jointly optimize, thereby directly improving the efficiency of the main power amplifier at the saturated power and indirectly improving the efficiency of the main power amplifier at the back-off power.
The output part of the auxiliary power amplifier in the invention skillfully selects the fundamental wave impedance value and the harmonic impedance value, adopts a double T-shaped microstrip impedance matching network, and is matched with the auxiliary power amplifier to output the fundamental wave impedance matching network for common optimization, thereby directly improving the efficiency of the auxiliary power amplifier in saturated power.
While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations may be made therein without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims (10)

1. A class F Doherty architecture high power class amplifier characterized by: the structure comprises: the power divider, the main power amplifier bias and input matching network, the auxiliary power amplifier bias and input matching network, the main power amplifier tube, the auxiliary power amplifier tube, the main power amplifier bias and output harmonic impedance matching network 'double T-shaped' structure, the auxiliary power amplifier bias and output harmonic impedance matching network 'double T-shaped' structure, the main power amplifier output fundamental wave impedance matching network, the auxiliary power amplifier output fundamental wave impedance matching network, the main power amplifier input phase compensation line, the auxiliary power amplifier output phase compensation line and the impedance transformation network;
the power distributor distributes power to radio frequency signals, and the distributed radio frequency signals respectively enter a main power amplification path and an auxiliary power amplification path; the main power amplification path and the auxiliary power amplification path are used for amplifying the input radio frequency signals, the amplified radio frequency signals passing through the main power amplification path and the auxiliary power amplification path are subjected to power synthesis at an output impedance combining point, enter an impedance transformation network, and output the amplified output radio frequency signals to a load terminal;
the main power amplifier path comprises a main power amplifier input phase compensation line, a main power amplifier bias and input matching network, a main power amplifier tube, a main power amplifier bias and output harmonic impedance matching network 'double T-shaped' structure and a main power amplifier output fundamental wave impedance matching network in sequence; the auxiliary power amplifier path comprises an auxiliary power amplifier input phase compensation line, an auxiliary power amplifier bias and input matching network, an auxiliary power amplifier tube, an auxiliary power amplifier bias and output harmonic impedance matching network 'double T-shaped' structure, an auxiliary power amplifier output fundamental wave impedance matching network and an auxiliary power amplifier phase compensation line.
2. A class F Doherty architecture high power class amplifier of claim 1 wherein: the power divider is implemented by an integrated 3dB, 90 ° bridge.
3. A class F Doherty architecture high power class amplifier of claim 1 wherein: the main power amplifier bias and input matching network and the auxiliary power amplifier bias and input matching network are realized through the microstrip line and the impedance matching network of the capacitor.
4. A class F Doherty architecture high power class amplifier of claim 1 wherein: the main power amplifier bias and output harmonic impedance matching network and the auxiliary power amplifier bias and output harmonic impedance matching network are realized through a double-T-shaped microstrip impedance matching network, and the output harmonic impedance matching network has the function of enabling the second harmonic output by the power amplifier to be short-circuited and enabling the third harmonic to be open-circuited, so that the power amplifier works in class F.
5. A class F Doherty architecture high power class amplifier of claim 1 wherein: the power distribution ratio of the main power amplification tube to the auxiliary power amplification tube is 1.0:1.585.
6. A class F Doherty architecture high power class amplifier of claim 1 wherein: the main power amplifier output fundamental wave impedance matching network and the auxiliary power amplifier output fundamental wave impedance matching network are respectively matched to the impedance of the back-off power and the saturated power through the microstrip impedance matching network.
7. A class F Doherty architecture high power class amplifier of claim 1 wherein: the input phase compensation line of the main power amplifier and the input phase compensation line of the auxiliary power amplifier are formed by adjusting the electric length of the microstrip line of the main power amplifier, so that the phases of the main power amplifier path and the auxiliary power amplifier path are consistent.
8. A class F Doherty architecture high power class amplifier of claim 1 wherein: the output phase compensation line of the auxiliary power amplifier is characterized in that the output impedance of the auxiliary power amplifier tends to infinity when the auxiliary power amplifier is in back-off power by adjusting the electric length of the microstrip line.
9. A class F Doherty architecture high power class amplifier of claim 1 wherein: the impedance transformation network is used for transforming the impedance of the output combination point of the main power amplification path and the auxiliary power amplification path into the terminal impedance of 50 ohms through a micro-strip line with quarter wavelength.
10. A class F Doherty architecture high power class amplifier of claim 1 wherein: the power amplifier of the main power amplifier works in a continuous F-type mode when the input power is saturated, and works in an approximate F-type mode when the input power is backed off by 8.2 dB;
the power amplifier of the auxiliary power amplifier works in a continuous F-type mode when the input power is saturated, and does not work when the input power is backed off by 8.2 dB.
CN202311826984.4A 2023-12-28 2023-12-28 Class F Doherty architecture high-power class amplifier Pending CN117713701A (en)

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Application Number Priority Date Filing Date Title
CN202311826984.4A CN117713701A (en) 2023-12-28 2023-12-28 Class F Doherty architecture high-power class amplifier

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CN117713701A true CN117713701A (en) 2024-03-15

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