CN117713511A - Single-power-supply-adjustable driving resistor SiC MOSFET driving circuit - Google Patents

Single-power-supply-adjustable driving resistor SiC MOSFET driving circuit Download PDF

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Publication number
CN117713511A
CN117713511A CN202410079715.4A CN202410079715A CN117713511A CN 117713511 A CN117713511 A CN 117713511A CN 202410079715 A CN202410079715 A CN 202410079715A CN 117713511 A CN117713511 A CN 117713511A
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sic mosfet
circuit
resistor
voltage
driving circuit
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Inventor
姚佳飞
任嵩茗
蒋正飞
代玙璇
郭宇锋
蔡志匡
王子轩
张珺
杨可萌
李曼
陈静
张茂林
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Nanjing University Of Posts And Telecommunications Nantong Institute Co ltd
Nanjing University of Posts and Telecommunications
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Nanjing University Of Posts And Telecommunications Nantong Institute Co ltd
Nanjing University of Posts and Telecommunications
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Priority to CN202410079715.4A priority Critical patent/CN117713511A/en
Publication of CN117713511A publication Critical patent/CN117713511A/en
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Abstract

The invention relates to a single-power supply adjustable driving resistor SiC MOSFET driving circuit, which comprises a power supply circuit, a variable grid resistor driving circuit and a double-pulse testing circuit for testing the switching characteristic of a target SiC MOSFET Q5, wherein different driving resistors are switched at different stages of the switching-on/off process of the target SiC MOSFET Q5, so that the switching-on/off speed of the target SiC MOSFET Q5 is improved, and the grid electrode of the target SiC MOSFET Q5 is charged and discharged by adopting one resistor in the period of changing the drain-source current of switching-on/off of a device, the switching-on/off delay of the device is reduced, and the rising speed of voltage and current is improved. Compared with the traditional driving circuit, the driving resistor is increased in the rest period of switching on/off of the device to inhibit voltage and current spikes and oscillation in the switching process of the target SiC MOSFET Q5, the voltage and current overshoot and oscillation can be effectively inhibited, meanwhile, the lower switching loss is kept, the gate driving performance of the target SiC MOSFET Q5 is improved, and the driving circuit is simple in structure and easy to realize.

Description

Single-power-supply-adjustable driving resistor SiC MOSFET driving circuit
Technical Field
The invention relates to a single-power-supply adjustable driving resistor SiC MOSFET driving circuit, and belongs to the technical field of driving circuits.
Background
Silicon carbide (SiC) power devices are typical representatives of third generation power semiconductor materials due to the advantages of wide band gap, high breakdown field, high thermal conductivity, high carrier saturation rate and the like, and particularly have the advantages of high frequency, high temperature conductivity, low on-resistance and the like of SiC power MOSFETs, so that the SiC power devices have the irreplaceable advantages in high-speed motor driving. Because the switching speed of the SiC MOSFET is high, di/dt and dv/dt of the device are overlarge in the switching process, voltage and current oscillation can be generated, the electromagnetic compatibility of the system is reduced, and the switching loss of the device is increased.
Aiming at the problem of voltage current oscillation in the switching process of the SiC MOSFET, the literature ' Mao Peng, the winding and the driving are clear, zhang Weiping ' the characteristic analysis of the SiC MOSFET and the research of a driving circuit [ J ] the power electronic technology, 2017,51 (09): 24-27+67) ' adopts an auxiliary circuit to inhibit the voltage oscillation, but simultaneously reduces the turn-off speed of the SiC MOSFET, and ensures the normal driving of the SiC MOSFET, but can not solve the problem of poor waveform of the SiC MOSFET in the switching process.
The literature 'P.Nayak and K.Hatua.Parasitic Inductance and Capacitance-Assisted Active Gate Driving Technique to Minimize Switching Loss of SiC MOSFET [ J ]. IEEE Transactions on Industrial Electronics,2017,64 (10): 8288-8298' adopts different gate voltages and gate resistances at different stages of the switching process according to parasitic parameters of the main loop, realizes quasi-zero voltage conduction and quasi-zero current shutoff, inhibits voltage and current oscillation, and reduces switching loss. However, the complexity of such circuits is detrimental to engineering applications.
Disclosure of Invention
The invention aims to solve the technical problem of providing a single-power-supply adjustable driving resistor SiC MOSFET driving circuit which can reduce the voltage and current overshoot phenomenon in the switching process, and has a simple circuit structure and is easy to realize.
The invention adopts the following technical scheme for solving the technical problems: the invention designs a single-power adjustable driving resistor SiC MOSFET driving circuit which is used for realizing on or off of a target SiC MOSFET Q5 and comprises a power circuit, a variable grid resistor driving circuit and a closed-loop circuit where the target SiC MOSFET Q5 is positioned, wherein the variable grid resistor driving circuit comprises an on driving circuit, an off driving circuit and a pulse width modulation generator; the two power supply ends of the power supply circuit are respectively connected with the power supply end of the on-drive circuit and the power supply end of the off-drive circuit, and the power supply circuit respectively outputs positive voltage,The negative voltage is supplied to the on driving circuit and the off driving circuit for power supply; the output end of the pulse width modulation generator is respectively connected with the control end of the on-driving circuit and the control end of the off-driving circuit, and the pulse width modulation generator generates a pulse signal to alternatively control the on-driving circuit or the off-driving circuit to work; the output end of the turn-on driving circuit is connected with the output end of the turn-off driving circuit and is abutted against the grid electrode of the target SiC MOSFET Q5, and the grid electrode of the target SiC MOSFET Q5 is respectively abutted against the feedback end of the turn-on driving circuit and the feedback end of the turn-off driving circuit and is used for applying the grid source voltage V of the grid electrode of the target SiC MOSFET Q5 gs The feedback end of the on-drive circuit and the feedback end of the off-drive circuit are connected, and the on-or off of the target SiC MOSFET Q5 is controlled based on the selection of the on-drive circuit and the off-drive circuit.
As a preferred technical scheme of the invention: the turn-on driving circuit comprises a PMOS transistor Q1, a PMOS transistor Q2, a resistor R3, a resistor R4, a diode D1, a diode D2, a NAND gate circuit A2, a comparator P1 and a comparator P2, wherein the positive input end of the comparator P1 is connected with a preset reference voltage Vref1, the negative input end of the comparator P2 is connected with the preset reference voltage Vref2, the negative input end of the comparator P1 is connected with the negative input end of the comparator P2 to form a feedback end of the turn-on driving circuit, the output end of the comparator P1 and the output end of the comparator P2 are respectively connected with two input ends of the NAND gate circuit A2, the output end of the NAND gate circuit A2 is connected with the grid electrode of the PMOS transistor Q2, the source electrode of the PMOS transistor Q1 forms a power end of the turn-on driving circuit, the grid electrode of the PMOS transistor Q1 forms a control end of the turn-on driving circuit, the drain electrode of the PMOS transistor Q1 is connected with one end of the resistor R3, the other end of the PMOS transistor Q2 is connected with one end of the negative input end of the resistor R4, and the other end of the resistor R4 is connected with the positive electrode of the diode D1 of the diode D2.
As a preferred technical scheme of the invention: the turn-off driving circuit comprises an NMOS transistor Q3, an NMOS transistor Q4, a resistor R5, a resistor R6, a diode D3, a diode D4, an AND gate circuit A3, a comparator P3 and a comparator P4, wherein the positive input end of the comparator P3 is connected with a preset reference voltage Vref3, the negative input end of the comparator P4 is connected with the preset reference voltage Vref4, the negative input end of the comparator P3 is connected with the negative input end of the comparator P4 to form a feedback end of the turn-off driving circuit, the output end of the comparator P3 and the output end of the comparator P4 are respectively connected with two input ends of the AND gate circuit A3, the output end of the AND gate circuit A3 is connected with the grid electrode of the NMOS transistor Q3, the source electrode of the NMOS transistor Q4 forms a power end of the turn-off driving circuit, the grid electrode of the NMOS transistor Q4 forms a control end of the turn-off driving circuit, the drain electrode of the NMOS transistor Q4 is connected with one end of the resistor R6, the other end of the NMOS transistor Q3, one end of the source electrode of the NMOS transistor Q5 is connected with one end of the negative electrode of the NMOS transistor D3, and the other end of the diode D4 is connected with the positive electrode of the diode D4 of the turn-off driving circuit.
As a preferred technical scheme of the invention: the power supply circuit comprises a voltage source V1, a voltage dividing resistor R2, an operational amplifier A1, a capacitor C1 and a capacitor C2, wherein the positive electrode of the voltage source V1 forms an output end of the power supply circuit corresponding to positive voltage, the positive electrode of the voltage source V1 is respectively connected with one end of the resistor R1, one end of the capacitor C1 and the power supply positive end of the operational amplifier A1, the negative electrode of the voltage source V1 forms an output end of the power supply circuit corresponding to negative voltage, the negative electrode of the voltage source V1 is respectively connected with one end of the resistor R2, one end of the capacitor C2 and the power supply negative end of the operational amplifier A1, the other end of the resistor R2 and the positive input end of the operational amplifier A1 are connected, the negative input end of the operational amplifier A1 is connected with the output end of the operational amplifier A1, and the other end of the capacitor C1 and the other end of the capacitor C2 are connected with the ground.
As a preferred technical scheme of the invention: the closed loop circuit where the target SiC MOSFET Q5 is located further comprises a SiC transistor Q6, a resistor R7, a resistor R8, a voltage source V2, a voltage source V3, an inductor L1, an inductor L2, an inductor L3, a capacitor C3 and a capacitor C4, and a double-pulse test circuit for testing the switching characteristics of the target SiC MOSFET Q5 is formed, wherein the source electrode of the target SiC MOSFET Q5 is connected with one end of the inductor L3, the other end of the inductor L3, one end of the resistor R8, one end of the capacitor C3 and the negative electrode of the voltage source V3 are connected and grounded, the source electrode of the SiC transistor Q6, the drain electrode of the target SiC MOSFET Q5 and one end of the capacitor C4 are connected, the other end of the capacitor C4 is connected with the other end of the resistor R8, the negative electrode of the SiC transistor Q6 is connected with the positive electrode of the voltage source V2 after the grid electrode of the resistor R7 is connected with the drain electrode of the inductor L1, one end of the drain electrode of the SiC transistor Q6, one end of the inductor L2 is connected with one end of the other end of the inductor L2, the other end of the capacitor C3 is connected with the positive electrode of the capacitor V3.
As a preferred technical scheme of the invention: the pulse width modulation generator generates a pulse signal through PWM control to alternatively control the on-driving circuit or the off-driving circuit to work.
As a preferred technical scheme of the invention: based on the alternative work of the on-drive circuit and the off-drive circuit in the variable gate resistance drive circuit, the target SiC MOSFET Q5 is controlled to be turned on or turned off so as to realize the gate-source voltage V of the gate of the target SiC MOSFET Q5 gs As a detection object for determining an operation state when the target SiC MOSFET Q5 is turned on, wherein when the target SiC MOSFET Q5 is turned on from an off state, a gate-source voltage V gs Start to rise when the gate-source voltage V gs When the voltage is larger than the preset reference voltage, the PMOS transistor Q2 in the switching-on driving circuit is triggered to be turned on, and when the gate-source voltage V gs After the continuous increase, the PMOS transistor Q2 turns off; when the target SiC MOSFET Q5 is turned off from the on state, the gate-source voltage V gs Start to fall when the gate-source voltage V gs When the voltage is smaller than the preset reference voltage, the NMOS transistor Q3 in the trigger turn-off driving circuit is turned on, and when the gate-source voltage V gs After the continuous decrease, the NMOS transistor Q3 turns off.
Compared with the prior art, the single-power-supply adjustable driving resistor SiC MOSFET driving circuit has the following technical effects:
(1) The invention designs a single-power supply adjustable driving resistor SiC MOSFET driving circuit which is used for realizing the on-off of a target SiC MOSFET Q5 and comprises a power supply circuit, a variable grid resistor driving circuit and a double-pulse testing circuit for testing the switching characteristic of the target SiC MOSFET Q5, wherein the on-off speed of the target SiC MOSFET Q5 is improved by switching different driving resistors at different stages of the on-off process of the target SiC MOSFET Q5, and the grid of the target SiC MOSFET Q5 is charged and discharged by adopting one resistor in the period of the change of the drain-source current of the on-off of a device, so that the on-off delay of the device is reduced, and the rising speed of voltage and current is improved. Compared with the traditional driving circuit, the driving resistor is increased in the rest period of switching on/off of the device to inhibit voltage and current spikes and oscillation in the switching process of the target SiC MOSFET Q5, the voltage and current overshoot and oscillation can be effectively inhibited, meanwhile, the lower switching loss is kept, the gate driving performance of the target SiC MOSFET Q5 is improved, and the driving circuit is simple in structure and easy to realize.
Drawings
FIG. 1 is a schematic diagram of a single power supply adjustable drive resistor SiC MOSFET drive circuit according to the present invention;
FIG. 2 is a schematic diagram of an embodiment of the present invention applied to the turn-on time of a SiC MOSFET;
FIG. 3 is a schematic diagram of an embodiment of the present invention applied to the turn-off time of a SiC MOSFET;
FIG. 4 is a schematic diagram of a drive circuit designed in the on-phase of a SiC MOSFET in accordance with the present invention;
FIG. 5 is a schematic diagram of a drive circuit designed in the off-phase of a SiC MOSFET according to the present invention;
FIG. 6 shows the design circuit and conventional drive circuit of the present invention in the SiC MOSFET on-phase I d Is a waveform schematic diagram of (a);
FIG. 7 is a graph showing the drain current variation rate waveforms of the design circuit and the conventional driving circuit during the on-phase of the SiC MOSFET according to the present invention;
FIG. 8 shows the design circuit and conventional drive circuit of the present invention in the turn-off phase V of the SiC MOSFET ds Is a waveform schematic diagram of (a);
fig. 9 is a schematic diagram of the drain-source voltage variation rate waveforms of the design circuit and the conventional driving circuit in the turn-off stage of the SiC MOSFET.
Detailed Description
The following describes the embodiments of the present invention in further detail with reference to the drawings.
The invention designs a single-power adjustable driving resistor SiC MOSFET driving circuit which is used for realizing on or off of a target SiC MOSFET Q5, and comprises a power circuit, a variable grid resistor driving circuit and a closed loop circuit where the target SiC MOSFET Q5 is positioned, wherein the variable grid resistor driving circuit comprises an on driving circuit, an off driving circuit and a pulse width modulation generator; the two power supply ends of the power supply circuit are respectively connected with the power supply end of the on-state driving circuit and the power supply end of the off-state driving circuit, and the power supply circuit respectively outputs positive voltage and negative voltage to the on-state driving circuit and the off-state driving circuit to supply power; the output end of the pulse width modulation generator is respectively connected with the control end of the on-drive circuit and the control end of the off-drive circuit, and the pulse width modulation generator generates a pulse signal through PWM control to selectively control the on-drive circuit or the off-drive circuit to work; the output end of the turn-on driving circuit is connected with the output end of the turn-off driving circuit and is abutted against the grid electrode of the target SiC MOSFET Q5, and the grid electrode of the target SiC MOSFET Q5 is respectively abutted against the feedback end of the turn-on driving circuit and the feedback end of the turn-off driving circuit and is used for applying the grid source voltage V of the grid electrode of the target SiC MOSFET Q5 gs The feedback end of the on-drive circuit and the feedback end of the off-drive circuit are connected, and the on-or off of the target SiC MOSFET Q5 is controlled based on the selection of the on-drive circuit and the off-drive circuit.
In practical application, the design scheme is specifically designed for the variable gate resistor driving circuit, as shown in fig. 1, where the specifically designed turn-on driving circuit includes a PMOS transistor Q1, a PMOS transistor Q2, a resistor R3, a resistor R4, a diode D1, a diode D2, a nand gate circuit A2, a comparator P1, and a comparator P2, where the positive input terminal of the comparator P1 is connected to a preset reference voltage Vref1, the negative input terminal of the comparator P2 is connected to a preset reference voltage Vref2, the negative input terminal of the comparator P1 is connected to the negative input terminal of the comparator P2 to form a feedback terminal of the turn-on driving circuit, the output terminal of the comparator P1 and the output terminal of the comparator P2 are respectively connected to two input terminals of the nand gate circuit A2, the source electrode of the PMOS transistor Q1 forms a power supply terminal of the turn-on driving circuit, the gate electrode of the PMOS transistor Q1 forms a control terminal of the driving circuit, one end of the drain electrode of the PMOS transistor Q1 is connected to one end of the resistor R3, the other end of the drain electrode of the PMOS transistor R3 is connected to the positive electrode of the PMOS transistor Q2, and the other end of the drain electrode of the resistor D4 is connected to the drain electrode of the diode D2.
As shown in fig. 1, the specifically designed turn-off driving circuit includes an NMOS transistor Q3, an NMOS transistor Q4, a resistor R5, a resistor R6, a diode D3, a diode D4, an and gate circuit A3, a comparator P3, and a comparator P4, wherein a positive input end of the comparator P3 is connected to a preset reference voltage Vref3, a negative input end of the comparator P4 is connected to a preset reference voltage Vref4, a negative input end of the comparator P3 is connected to a negative input end of the comparator P4 to form a feedback end of the turn-off driving circuit, an output end of the comparator P3 and an output end of the comparator P4 are respectively connected to two input ends of the and gate circuit A3, an output end of the and gate circuit A3 is connected to a gate electrode of the NMOS transistor Q3, a source electrode of the NMOS transistor Q4 forms a power supply end of the turn-off driving circuit, a gate electrode of the NMOS transistor Q4 forms a control end of the turn-off driving circuit, a drain electrode of the NMOS transistor Q4 is connected to one end of the resistor R6, another end of the resistor R6, one end of the NMOS transistor Q3 is connected to one end of the drain electrode of the resistor Q3, and another end of the other end of the resistor R5 is connected to the drain electrode of the diode D3 of the diode D4.
In practical application, as shown in fig. 1, the power supply circuit specifically comprises a voltage source V1, a voltage dividing resistor R2, an operational amplifier A1, a capacitor C1, and a capacitor C2, wherein the positive electrode of the voltage source V1 forms an output end of the power supply circuit corresponding to a positive voltage, the positive electrode of the voltage source V1 is respectively connected with one end of the resistor R1, one end of the capacitor C1, and the positive power end of the operational amplifier A1, the negative electrode of the voltage source V1 forms an output end of the power supply circuit corresponding to a negative voltage, the negative electrode of the voltage source V1 is respectively connected with one end of the resistor R2, one end of the capacitor C2, and the negative power end of the operational amplifier A1, the other end of the resistor R1, the positive input end of the operational amplifier A1 are connected with the output end thereof, and the output end of the operational amplifier A1, the other end of the capacitor C2 are connected with ground.
The power supply circuit is designed in such a way that through a voltage source V1, positive voltage and negative voltage are generated for the later stage variable grid resistance driving circuit through voltage division and circuit isolation, compared with a dual power supply, the power supply circuit has the advantages of reducing one voltage source, reducing cost, reducing operation difficulty and simultaneously reducing occupation of circuit space.
In practical applications, the closed loop circuit is designed as a double pulse test circuit for testing the switching characteristics of the target SiC MOSFET Q5, as shown in fig. 1, and specifically includes the target SiC MOSFET Q5, a SiC transistor Q6, a resistor R7, a resistor R8, a voltage source V2, a voltage source V3, an inductor L1, an inductor L2, an inductor L3, a capacitor C3, and a capacitor C4, wherein a source of the target SiC MOSFET Q5 is connected to one end of the inductor L3, another end of the inductor L3, one end of the resistor R8, one end of the capacitor C3, a negative electrode of the voltage source V3 are connected to ground, three of a source of the SiC transistor Q6, a drain of the target SiC MOSFET Q5, and one end of the capacitor C4 are connected, another end of the capacitor C4 is connected to another end of the resistor R8, a gate of the SiC transistor Q6 is connected in series with the resistor R7, a negative electrode of the voltage source V2 is connected to one end of the inductor L1, another end of the drain of the SiC transistor Q6, another end of the inductor L2, one end of the inductor L2 is connected to one end of the inductor L2, and another end of the inductor L3 is connected to the other end of the capacitor is connected to the positive electrode of the capacitor V3.
In practical applications, as shown in fig. 2, the target SiC MOSFET Q5 is in four stages in the on process.
Wherein,at t 0 -t 1 When the driving signal of the target SiC MOSFET Q5 is changed from low level to high level, the driving signal is applied to the gate-source capacitance C of the target SiC MOSFET Q5 gs Charging is carried out until the gate-source voltage of the target SiC MOSFET Q5 reaches the threshold voltage V th . At this time, the target SiC MOSFET Q5 is in the off-region, and the target SiC MOSFET Q5 drain current I d Remain at zero.
At t 1 -t 2 When the gate-source voltage of the target SiC MOSFET Q5 reaches the threshold voltage, the target SiC MOSFET Q5 starts to turn on, the drain current of the target SiC MOSFET Q5 starts to rise, the gate-source voltage of the target SiC MOSFET Q5 continues to rise to the miller plateau voltage, and the rate of change of the drain current of the target SiC MOSFET Q5 is as follows:
wherein g m Is the transconductance of the target SiC MOSFET Q5.
At t 2 -t 3 In this stage, the drain-source voltage Vds of the target SiC MOSFET Q5 will quickly drop to the on state. At this time, the target SiC MOSFET Q5 gate current I g Mainly flows through the total driving resistor R of corresponding stage in corresponding conducting or blocking state in the variable grid resistor driving circuit g Grid drain parasitic capacitance C of target SiC MOSFET Q5 gd The voltage of the grid source of the target SiC MOSFET Q5 is not greatly changed and is maintained at the Miller platform voltage, and the grid current I of the target SiC MOSFET Q5 d The approximate satisfaction equation is as follows:
target SiC MOSFET Q5 drain-source voltage V ds The rate of change of (2) is as follows:
at t 3 -t 4 Is the stage of the target SiC MOSFET Q5 conductionOn, target SiC MOSFET Q5 drain voltage V ds Maintaining the same conduction voltage drop as the target SiC MOSFET Q5 drain current I d Maintaining at the load current, the target SiC MOSFET Q5 gate voltage V gs Continues to increase to the driving voltage V CC 。
The target SiC MOSFET Q5 is shown in fig. 3 at four stages in the turn-off process.
Wherein at t 0 -t 1 When the driving signal of the target SiC MOSFET Q5 changes from high to low, the parasitic capacitance of the target SiC MOSFET Q5 discharges to the gate source of the target SiC MOSFET Q5 through the driving resistor and the source inductance until the gate source voltage of the target SiC MOSFET Q5 reaches the miller voltage. At this stage, the drain-source voltage and drain current of the target SiC MOSFET Q5 remain unchanged.
At t 1 -t 2 When the gate-source voltage of the target SiC MOSFET Q5 drops to the miller voltage, the drain-source voltage of the target SiC MOSFET Q5 begins to rise, and the load current flows into the target SiC MOSFET Q5 and remains unchanged until the drain-source voltage of the target SiC MOSFET Q5 rises to the dc bus voltage. Accordingly, the drain current of the target SiC MOSFET Q5 remains unchanged, and at this time, the target SiC MOSFET Q5 is in the saturation region, and the gate-source voltage is maintained at the miller voltage.
At t 2 -t 3 Stage, target SiC MOSFET Q5 drain-source voltage V ds After rising to the DC bus voltage, the free-flow diode D starts to conduct, the load current is transferred from the target SiC MOSFET Q5 to the free-flow diode, and the drain current I of the target SiC MOSFET Q5 d The decrease starts. At this stage, the gate-source voltage of the target SiC MOSFET Q5 drops to the threshold voltage V th Target SiC MOSFET Q5 is turned off, target SiC MOSFET Q5 drain current I d Drop to zero, target SiC MOSFET Q5 drain-source voltage V ds The rate of change at this stage is as follows:
at t 3 -t 4 Target SiC MOSFET Q5 drain current I d After the voltage drops to zero, the target SiC MOSFET Q5 is turned off, and the drain-source voltage V of the target SiC MOSFET Q5 ds The voltage of the direct current bus is kept unchanged, and the drain current I of the target SiC MOSFET Q5 d And the voltage of the grid electrode and the source electrode of the target SiC MOSFET Q5 is kept to be zero, and the voltage of the grid electrode and the source electrode of the target SiC MOSFET Q5 is continuously reduced to the low level of the driving voltage, so that the erroneous connection of the target SiC MOSFET Q5 is prevented.
As shown in fig. 4, in the operating state of the target SiC MOSFET Q5 during the on process, when the trigger condition is not reached, the PMOS transistor Q2 is turned off, and the current passes through R3 and R4, and at this time, the driving circuit is charged and discharged through two resistors. When the triggering condition is reached, i.e. V of the target SiC MOSFET Q5 gs When the reference voltage Vref2 is increased, the leakage current of the target SiC MOSFET Q5 starts to rise, the PMOS transistor Q2 is turned on, and at the moment, a resistor is used for charging and discharging the driving circuit, so that the leakage current is quickly raised, and the turn-on loss is reduced. When V is gs After the reference voltage Vref1 is reached in the increasing process, the PMOS transistor Q2 is turned off again, and two resistors are used for working, so that voltage, current overshoot and oscillation can be effectively restrained.
As shown in fig. 5, in the operating state during the turn-off process of the target SiC MOSFET Q5, when the trigger condition is not reached, the NMOS transistor Q3 is turned off, and the current passes through R5 and R6, at this time, the driving circuit is charged and discharged through two resistors. When the triggering condition is reached, i.e. V of the target SiC MOSFET Q5 gs When the reference voltage Vref3 is reduced, the leakage current of the target SiC MOSFET Q5 starts to be reduced, the NMOS transistor Q3 is turned on, and at the moment, a resistor is used for working the driving circuit, so that the leakage current is reduced rapidly, and the turn-on loss is reduced. When V is gs After reaching the reference voltage Vref4 in the process of reduction, the NMOS transistor Q3 is turned off again, the driving resistance becomes large, and voltage, current overshoot and oscillation can be effectively restrained.
Fig. 6 shows that fig. 6 shows the design circuit of the present invention and the conventional driving circuit in the turn-on stage I d FIG. 7 is a diagram showing the drain current change rate di of the target SiC MOSFET Q5 when the target SiC MOSFET Q5 starts to turn on during the turn-on phase of the design circuit according to the present invention and the conventional driving circuit d And/dt is positive, by measuring the source inductance L of the target SiC MOSFET Q5 3 Electric at both endsPressure V di/dt The drain current change rate di in the turn-on process of the target SiC MOSFET Q5 can be obtained d /dt。
Fig. 8, 9 show, fig. 8 shows the design circuit of the present invention and the conventional driving circuit in the turn-off stage V ds FIG. 9 is a schematic diagram showing the drain-source voltage change rate of the designed circuit and the conventional driving circuit in the turn-off stage, and the drain-source voltage change rate dv of the target SiC MOSFET Q5 when the target SiC MOSFET Q5 starts to turn off ds And/dt is positive by measuring resistance R 8 Voltage V at both ends dv/dt The drain-source voltage change rate dv in the turn-off process of the target SiC MOSFET Q5 can be obtained ds /dt。
In the double-pulse test process, the single-power adjustable drive resistor SiC MOSFET drive circuit can enable waveforms to be more stable in the on-phase and the off-phase of the target SiC MOSFET Q5, effectively inhibit voltage, current overshoot and oscillation, simultaneously keep lower switching loss, and improve the gate drive performance of the target SiC MOSFET Q5.
The design is applied in practice, and based on the alternative operation of the on-drive circuit and the off-drive circuit in the variable gate resistance drive circuit, the target SiC MOSFET Q5 is controlled to be turned on or off so as to obtain the gate-source voltage V of the gate of the target SiC MOSFET Q5 gs As a detection object for determining an operation state when the target SiC MOSFET Q5 is turned on, wherein when the target SiC MOSFET Q5 is turned on from an off state, a gate-source voltage V gs Start to rise when the gate-source voltage V gs When the voltage is larger than the preset reference voltage, the PMOS transistor Q2 in the switching-on driving circuit is triggered to be turned on, and when the gate-source voltage V gs After the continuous increase, the PMOS transistor Q2 turns off; when the target SiC MOSFET Q5 is turned off from the on state, the gate-source voltage V gs Start to fall when the gate-source voltageV gs When the voltage is smaller than the preset reference voltage, the NMOS transistor Q3 in the trigger turn-off driving circuit is turned on, and when the gate-source voltage V gs After the continuous decrease, the NMOS transistor Q3 turns off.
According to the technical scheme, the single-power-supply adjustable driving resistor SiC MOSFET driving circuit is designed, and the on/off speed of the target SiC MOSFET Q5 is improved by switching different driving resistors at different stages of the on/off process of the target SiC MOSFET Q5, wherein the grid electrode of the target SiC MOSFET Q5 is charged and discharged by adopting one resistor in the period of change of drain-source current of the on/off of the device, the on/off delay of the device is reduced, and the rising rate of voltage and current is improved. Compared with a traditional drive circuit, the drive circuit solves the problems of low switching speed and serious switching loss caused by the fact that the traditional drive circuit reduces the overshoot current voltage of a switch, can effectively inhibit voltage, current overshoot and oscillation, simultaneously keeps lower switching loss, improves the grid drive performance of the target SiC MOSFET Q5, and is simple in circuit structure and easy to realize.
The embodiments of the present invention have been described in detail with reference to the drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the spirit of the present invention.

Claims (7)

1. The utility model provides a single power adjustable drive resistance SiC MOSFET drive circuit for realize opening or turn-off to target SiC MOSFET Q5, its characterized in that: the power supply circuit, the variable gate resistance driving circuit and the closed loop circuit where the target SiC MOSFET Q5 is located are included, wherein the variable gate resistance driving circuit comprises an on driving circuit, an off driving circuit and a pulse width modulation generator; the two power supply ends of the power supply circuit are respectively connected with the power supply end of the on-state driving circuit and the power supply end of the off-state driving circuit, and the power supply circuit respectively outputs positive voltage and negative voltage to the on-state driving circuit and the off-state driving circuit to supply power; pulse widthThe output end of the modulation generator is respectively connected with the control end of the on-drive circuit and the control end of the off-drive circuit, and the pulse width modulation generator generates a pulse signal to selectively control the on-drive circuit or the off-drive circuit to work; the output end of the turn-on driving circuit is connected with the output end of the turn-off driving circuit and is abutted against the grid electrode of the target SiC MOSFET Q5, and the grid electrode of the target SiC MOSFET Q5 is respectively abutted against the feedback end of the turn-on driving circuit and the feedback end of the turn-off driving circuit and is used for applying the grid source voltage V of the grid electrode of the target SiC MOSFET Q5 gs The feedback end of the on-drive circuit and the feedback end of the off-drive circuit are connected, and the on-or off of the target SiC MOSFET Q5 is controlled based on the selection of the on-drive circuit and the off-drive circuit.
2. The single power supply adjustable drive resistor SiC MOSFET drive circuit of claim 1, wherein: the turn-on driving circuit comprises a PMOS transistor Q1, a PMOS transistor Q2, a resistor R3, a resistor R4, a diode D1, a diode D2, a NAND gate circuit A2, a comparator P1 and a comparator P2, wherein the positive input end of the comparator P1 is connected with a preset reference voltage Vref1, the negative input end of the comparator P2 is connected with the preset reference voltage Vref2, the negative input end of the comparator P1 is connected with the negative input end of the comparator P2 to form a feedback end of the turn-on driving circuit, the output end of the comparator P1 and the output end of the comparator P2 are respectively connected with two input ends of the NAND gate circuit A2, the output end of the NAND gate circuit A2 is connected with the grid electrode of the PMOS transistor Q2, the source electrode of the PMOS transistor Q1 forms a power end of the turn-on driving circuit, the grid electrode of the PMOS transistor Q1 forms a control end of the turn-on driving circuit, the drain electrode of the PMOS transistor Q1 is connected with one end of the resistor R3, the other end of the PMOS transistor Q2 is connected with one end of the negative input end of the resistor R4, and the other end of the resistor R4 is connected with the positive electrode of the diode D1 of the diode D2.
3. The single power supply adjustable drive resistor SiC MOSFET drive circuit of claim 1, wherein: the turn-off driving circuit comprises an NMOS transistor Q3, an NMOS transistor Q4, a resistor R5, a resistor R6, a diode D3, a diode D4, an AND gate circuit A3, a comparator P3 and a comparator P4, wherein the positive input end of the comparator P3 is connected with a preset reference voltage Vref3, the negative input end of the comparator P4 is connected with the preset reference voltage Vref4, the negative input end of the comparator P3 is connected with the negative input end of the comparator P4 to form a feedback end of the turn-off driving circuit, the output end of the comparator P3 and the output end of the comparator P4 are respectively connected with two input ends of the AND gate circuit A3, the output end of the AND gate circuit A3 is connected with the grid electrode of the NMOS transistor Q3, the source electrode of the NMOS transistor Q4 forms a power end of the turn-off driving circuit, the grid electrode of the NMOS transistor Q4 forms a control end of the turn-off driving circuit, the drain electrode of the NMOS transistor Q4 is connected with one end of the resistor R6, the other end of the NMOS transistor Q3, one end of the source electrode of the NMOS transistor Q5 is connected with one end of the negative electrode of the NMOS transistor D3, and the other end of the diode D4 is connected with the positive electrode of the diode D4 of the turn-off driving circuit.
4. The single power supply adjustable drive resistor SiC MOSFET drive circuit of claim 1, wherein: the power supply circuit comprises a voltage source V1, a voltage dividing resistor R2, an operational amplifier A1, a capacitor C1 and a capacitor C2, wherein the positive electrode of the voltage source V1 forms an output end of the power supply circuit corresponding to positive voltage, the positive electrode of the voltage source V1 is respectively connected with one end of the resistor R1, one end of the capacitor C1 and the power supply positive end of the operational amplifier A1, the negative electrode of the voltage source V1 forms an output end of the power supply circuit corresponding to negative voltage, the negative electrode of the voltage source V1 is respectively connected with one end of the resistor R2, one end of the capacitor C2 and the power supply negative end of the operational amplifier A1, the other end of the resistor R2 and the positive input end of the operational amplifier A1 are connected, the negative input end of the operational amplifier A1 is connected with the output end of the operational amplifier A1, and the other end of the capacitor C1 and the other end of the capacitor C2 are connected with the ground.
5. The single power supply adjustable drive resistor SiC MOSFET drive circuit of claim 1, wherein: the closed loop circuit where the target SiC MOSFET Q5 is located further comprises a SiC transistor Q6, a resistor R7, a resistor R8, a voltage source V2, a voltage source V3, an inductor L1, an inductor L2, an inductor L3, a capacitor C3 and a capacitor C4, and a double-pulse test circuit for testing the switching characteristics of the target SiC MOSFET Q5 is formed, wherein the source electrode of the target SiC MOSFET Q5 is connected with one end of the inductor L3, the other end of the inductor L3, one end of the resistor R8, one end of the capacitor C3 and the negative electrode of the voltage source V3 are connected and grounded, the source electrode of the SiC transistor Q6, the drain electrode of the target SiC MOSFET Q5 and one end of the capacitor C4 are connected, the other end of the capacitor C4 is connected with the other end of the resistor R8, the negative electrode of the SiC transistor Q6 is connected with the positive electrode of the voltage source V2 after the grid electrode of the resistor R7 is connected with the drain electrode of the inductor L1, one end of the drain electrode of the SiC transistor Q6, one end of the inductor L2 is connected with one end of the other end of the inductor L2, the other end of the capacitor C3 is connected with the positive electrode of the capacitor V3.
6. The single power supply adjustable drive resistor SiC MOSFET drive circuit of claim 1, wherein: the pulse width modulation generator generates a pulse signal through PWM control to alternatively control the on-driving circuit or the off-driving circuit to work.
7. The single power supply adjustable drive resistor SiC MOSFET drive circuit of claim 1, wherein: based on the alternative work of the on-drive circuit and the off-drive circuit in the variable gate resistance drive circuit, the target SiC MOSFET Q5 is controlled to be turned on or turned off so as to realize the gate-source voltage V of the gate of the target SiC MOSFET Q5 gs As a detection object for determining an operation state when the target SiC MOSFET Q5 is turned on, wherein when the target SiC MOSFET Q5 is turned on from an off state, a gate-source voltage V gs Start to rise when the gate-source voltage V gs When the voltage is larger than the preset reference voltage, the PMOS transistor Q2 in the switching-on driving circuit is triggered to be turned on, and when the gate-source voltage V gs After the continuous increase, the PMOS transistor Q2 turns offThe method comprises the steps of carrying out a first treatment on the surface of the When the target SiC MOSFET Q5 is turned off from the on state, the gate-source voltage V gs Start to fall when the gate-source voltage V gs When the voltage is smaller than the preset reference voltage, the NMOS transistor Q3 in the trigger turn-off driving circuit is turned on, and when the gate-source voltage V gs After the continuous decrease, the NMOS transistor Q3 turns off.
CN202410079715.4A 2024-01-19 2024-01-19 Single-power-supply-adjustable driving resistor SiC MOSFET driving circuit Pending CN117713511A (en)

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