CN117687465A - Source follower and low dropout linear voltage regulator - Google Patents
Source follower and low dropout linear voltage regulator Download PDFInfo
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- CN117687465A CN117687465A CN202410155801.9A CN202410155801A CN117687465A CN 117687465 A CN117687465 A CN 117687465A CN 202410155801 A CN202410155801 A CN 202410155801A CN 117687465 A CN117687465 A CN 117687465A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
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- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
A source follower and low dropout linear regulator, the source follower comprising: the device comprises a basic source electrode following module and a voltage adjusting module, wherein: the input end of the basic source electrode following module is the input end of the source electrode follower, and the output end of the basic source electrode following module is the output end of the source electrode follower; the input end of the voltage adjusting module inputs power supply voltage, and the output end of the voltage adjusting module is coupled with the output end of the source follower; the voltage adjustment module is suitable for adjusting the output voltage of the source follower in the same direction when the power supply voltage changes. By adopting the scheme, the conversion degree of the output voltage of the low dropout linear voltage regulator along with the power supply voltage is slowed down.
Description
Technical Field
The invention relates to the technical field of electronics and electrics, in particular to a source follower and a low-dropout linear voltage regulator.
Background
In low dropout linear regulators (Low Dropout Regular, LDOs), super source followers (Super Source Follower, SSF) are often used to reduce the impact of power transistors on the loop.
In the prior art, the super source follower has weak capability of suppressing fluctuation of the power supply voltage on the power supply line. When the supply voltage jumps (i.e., fluctuates upward) or jumps (i.e., fluctuates downward), the output voltage of the low dropout linear regulator also jumps or jumps accordingly.
Disclosure of Invention
One of the objectives of the present invention is to provide a source follower, with which the output voltage of a low dropout linear regulator can be slowed down with the variation of the power supply voltage.
In a first aspect, the present invention provides a source follower applied to a low dropout linear regulator, comprising: the device comprises a basic source electrode following module and a voltage adjusting module, wherein: the input end of the basic source electrode following module is the input end of the source electrode follower, and the output end of the basic source electrode following module is the output end of the source electrode follower; the input end of the voltage adjusting module inputs power supply voltage, and the output end of the voltage adjusting module is coupled with the output end of the source follower; the voltage adjustment module is suitable for adjusting the output voltage of the source follower in the same direction when the power supply voltage changes.
In the embodiment of the invention, the source electrode following function of the source electrode follower is realized through the basic source electrode following module. When the power supply voltage changes, the output voltage of the source follower is adjusted in the same direction through the voltage adjusting module, so that the fluctuation condition of the output voltage of the low dropout linear voltage regulator can be relieved.
Optionally, the voltage adjustment module includes: fifth PMOS pipe, sixth PMOS pipe, third NMOS pipe and separation module, wherein: the source electrode of the fifth PMOS tube inputs the power supply voltage, the grid electrode of the fifth PMOS tube is coupled with the drain electrode of the fifth PMOS tube, and the drain electrode of the fifth PMOS tube is coupled with the drain electrode of the third NMOS tube; the source electrode of the sixth PMOS tube inputs the power supply voltage, and the drain electrode of the sixth PMOS tube is coupled with the output end of the basic source electrode following module; the grid electrode of the third NMOS tube is coupled with the bias current output end of the basic source electrode following module, and the source electrode of the third NMOS tube is grounded; and the first end of the blocking module is coupled with the grid electrode of the fifth PMOS tube, and the second end of the blocking module is coupled with the grid electrode of the sixth PMOS tube.
By arranging the blocking module, when the power supply voltage jumps up, the grid voltage of the sixth PMOS tube cannot change. The source voltage of the sixth PMOS tube jumps upwards, so that the voltage between the source gates of the sixth PMOS tube is increased, the current of the sixth PMOS tube is increased, and the output voltage of the source follower is increased, so that the jumping fluctuation condition of the output voltage of the low-dropout linear voltage stabilizer using the source follower can be relieved.
Correspondingly, when the power supply voltage jumps down, the grid voltage of the sixth PMOS tube cannot change. The source voltage of the sixth PMOS tube jumps downwards, so that the voltage between the source gates of the sixth PMOS tube is reduced, the current of the sixth PMOS tube is reduced, the output voltage of the source follower is reduced, and the jump fluctuation condition of the output voltage of the low-dropout linear voltage regulator can be relieved.
Optionally, the blocking module includes any one of the following: low pass filter, switched capacitor, active filter.
Optionally, the low-pass filter includes: a first capacitor and a first resistor, wherein: the first end of the first resistor is coupled with the grid electrode of the fifth PMOS tube, and the second end of the first resistor is coupled with the first end of the first capacitor and the grid electrode of the sixth PMOS tube; the second end of the first capacitor is grounded.
Optionally, the source follower further includes: and the dynamic bias circuit is suitable for acquiring the output current of the low dropout linear voltage regulator and adjusting the output current of the source follower based on the output current of the low dropout linear voltage regulator.
By setting the dynamic bias circuit, the output current of the low dropout linear voltage regulator is dynamically tracked, and then the output current of the source follower is dynamically adjusted in the same direction, so that the output voltage of the source follower can be adjusted, and the fluctuation condition of the output voltage of the low dropout linear voltage regulator using the source follower can be further slowed down.
Optionally, the dynamic bias circuit includes: seventh PMOS pipe and eighth PMOS pipe, wherein: the source electrode of the seventh PMOS tube inputs the power supply voltage, the grid electrode of the seventh PMOS tube is coupled with the output end of the source electrode follower, and the drain electrode of the seventh PMOS tube is coupled with the bias current output end of the basic source electrode follower module; the source electrode of the eighth PMOS tube inputs the power supply voltage, the grid electrode of the eighth PMOS tube is coupled with the grid electrode of the seventh PMOS tube, and the drain electrode of the eighth PMOS tube is coupled with the output end of the source follower; and the output end of the source follower is coupled with the grid electrode of the power tube in the low dropout linear voltage regulator.
Optionally, the basic source follower module includes: the first PMOS tube, the second PMOS tube, the third PMOS tube, the fourth PMOS tube, the current source, the triode, the first NMOS tube and the second NMOS tube, wherein: the source electrode of the first PMOS tube inputs the power supply voltage, the grid electrode of the first PMOS tube is coupled with the drain electrode of the first PMOS tube, and the drain electrode of the first PMOS tube is coupled with the first end of the current source; the second end of the current source is grounded; the source electrode of the second PMOS tube inputs the power supply voltage, the grid electrode of the second PMOS tube is coupled with the grid electrode of the first PMOS tube, and the drain electrode of the second PMOS tube is coupled with the drain electrode of the first NMOS tube; the source electrode of the third PMOS tube inputs the power supply voltage, the grid electrode of the third PMOS tube is coupled with the grid electrode of the first PMOS tube, and the drain electrode of the third PMOS tube is coupled with the source electrode of the fourth PMOS tube; the grid electrode of the fourth PMOS tube inputs a control signal, and the drain electrode of the fourth PMOS tube is coupled with the drain electrode of the second NMOS tube; the grid electrode of the first NMOS tube is coupled with the drain electrode of the first NMOS tube, and the source electrode of the first NMOS tube is grounded; the grid electrode of the second NMOS tube is coupled with the grid electrode of the first NMOS tube, and the source electrode of the second NMOS tube is grounded; and the collector electrode of the triode is coupled with the drain electrode of the third PMOS tube, the base electrode of the triode is coupled with the drain electrode of the fourth PMOS tube, and the emitter electrode of the triode is grounded.
In a second aspect, the present invention further provides a low dropout linear regulator having a supply voltage ripple suppression capability using the source follower described above.
Optionally, the low dropout linear regulator may further include: the circuit comprises an operational amplifier, a first sampling resistor, a second capacitor and a power tube, wherein: the first input end of the operational amplifier is coupled with the first end of the second sampling resistor, the second input end of the operational amplifier inputs the reference voltage, and the output end of the operational amplifier is coupled with the input end of the source follower; the first end of the power tube inputs the power supply voltage, the second end of the power tube is coupled with the first end of the first sampling resistor, and the control end of the power tube is coupled with the output end of the source follower; the second end of the first sampling resistor is coupled with the first end of the second sampling resistor; the second end of the second sampling resistor is grounded; the first end of the second capacitor is coupled with the first end of the first sampling resistor, and the second end of the second capacitor is coupled with the second end of the second sampling resistor.
Optionally, the power tube is a P-type MOS tube.
Drawings
FIG. 1 is a schematic diagram of a low dropout linear regulator of the prior art;
FIG. 2 is a schematic diagram of a basic source follower module according to an embodiment of the invention;
FIG. 3 is a schematic diagram of a source follower according to an embodiment of the present invention;
fig. 4 is a schematic diagram of another source follower according to an embodiment of the present invention.
Detailed Description
Referring to fig. 1, a schematic diagram of a conventional low dropout linear regulator is shown. In fig. 1, the low dropout linear regulator includes an operational amplifier EA, a super source follower SSF, a power transistor M1, a first sampling resistor RS1, a second sampling resistor RS2, and a second capacitor C2.
In fig. 1, a first input terminal of the operational amplifier EA is coupled to a first terminal of the second sampling resistor RS2, a second input terminal of the operational amplifier EA inputs the reference voltage VREF, and an output terminal EAO of the operational amplifier EA is coupled to an input terminal of the super source follower SSF. The output terminal PGATE of the super source follower SSF is coupled to the control terminal of the power transistor M1. The power tube M1 is a P-type MOS tube, the drain electrode of the power tube M1 inputs the power voltage VIN, and the source electrode of the power tube M1 is coupled with the first end of the first sampling resistor RS 1. The second end of the first sampling resistor RS1 is coupled to the first end of the second sampling resistor RS2, and the second end of the second sampling resistor RS2 is grounded. The first end of the second capacitor C2 is coupled to the first end of the first sampling resistor RS1, and the second end of the second capacitor C2 is coupled to the second end of the second sampling resistor RS 2. The source of the power tube M1 may be the output terminal of the low dropout linear regulator.
In the prior art, the super source follower SSF has weak capability of suppressing the fluctuation of the power supply voltage VIN on the power supply line. When the power supply voltage VIN jumps (i.e. fluctuates upwards) or jumps (i.e. fluctuates downwards), the output voltage of the SSF cannot track the power supply voltage fluctuation in time, so that the output voltage of the low dropout linear regulator using the super source follower also jumps or jumps correspondingly.
In the embodiment of the invention, the source electrode following function of the source electrode follower is realized through the basic source electrode following module. When the power supply voltage changes, the voltage adjusting module adjusts the output voltage of the source follower in the same direction, so that the fluctuation condition of the output voltage of the source follower can be relieved.
In order to make the above objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.
The embodiment of the invention provides a source follower, which comprises: the device comprises a basic source electrode following module and a voltage adjusting module, wherein:
the input end of the basic source electrode following module is the input end of the source electrode follower, and the output end of the basic source electrode following module is the output end of the source electrode follower;
the input end of the voltage adjusting module can be used for inputting power supply voltage, and the output end of the voltage adjusting module can be coupled with the output end of the source follower (namely the output end of the basic source follower module); when the power supply voltage changes, the voltage adjusting module can adjust the output voltage of the source follower in the same direction when the power supply voltage jumps up or jumps down, and then can adjust the output voltage of the source follower in the same direction.
In a specific implementation, when the power supply voltage changes, the voltage adjustment module adjusts the output voltage of the source follower in the same direction, which may be that: when the power supply voltage jumps upwards, namely the power supply voltage fluctuates upwards, the voltage adjusting module increases the output current of the source follower; when the power supply voltage jumps down, i.e. the power supply voltage fluctuates downwards, the voltage adjustment module reduces the output current of the source follower.
The specific structure of the source follower provided by the present invention is described in detail below.
Referring to fig. 2, a schematic diagram of a basic source follower module is provided. It is understood that the basic source follower module described above may employ an existing Super Source Follower (SSF).
In fig. 2, the source follower may include a first PMOS transistor P1, a second PMOS transistor P2, a third PMOS transistor P3, a fourth PMOS transistor P4, a first NMOS transistor N1, a second NMOS transistor N2, a current source I, and a triode Q1, wherein:
the source electrode of the first PMOS tube P1 inputs the power supply voltage VIN, the grid electrode of the first PMOS tube P1 is coupled with the grid electrode of the second PMOS tube P2, and the drain electrode of the first PMOS tube P1 is coupled with the grid electrode of the first PMOS tube P1 and the first end of the current source I;
the source electrode of the second PMOS tube P2 inputs the power supply voltage VIN, the grid electrode of the second PMOS tube P2 is coupled with the grid electrode of the first PMOS tube P1, and the drain electrode of the second PMOS tube P2 is coupled with the drain electrode of the first NMOS tube N1;
the source electrode of the third PMOS tube P3 inputs the power supply voltage VIN, the grid electrode of the third PMOS tube P3 is coupled with the grid electrode of the first PMOS tube P1, and the drain electrode of the third PMOS tube P3 is coupled with the source electrode of the fourth PMOS tube P4;
the grid electrode of the fourth PMOS tube P4 is an input end of the source electrode follower, and the drain electrode of the fourth PMOS tube P4 is coupled with the drain electrode of the second NMOS tube N2; the grid electrode of the fourth PMOS tube P4 is coupled with the output end EAO of the operational amplifier; the drain electrode of the fourth PMOS tube P4 is the output end PGATE of the source follower;
the grid electrode of the first NMOS tube N1 is coupled with the drain electrode of the first NMOS tube N1, and the source electrode of the first NMOS tube N1 is grounded;
the grid electrode of the second NMOS tube N2 is coupled with the grid electrode of the first NMOS tube N1, and the source electrode of the second NMOS tube N2 is grounded;
the collector of the triode Q1 is coupled with the drain electrode of the third PMOS tube P3, the base electrode of the triode Q1 is coupled with the drain electrode of the fourth PMOS tube P4, and the emitter electrode of the triode Q1 is grounded;
the second terminal of the current source I is grounded.
In fig. 2, the first PMOS transistor P1 and the second PMOS transistor P2 form a current mirror circuit. The first NMOS transistor N1 and the second NMOS transistor N2 also form a current mirror, and provide bias current. Specifically, the first NMOS transistor N1 provides the bias current for the second PMOS transistor P2, so as to drive the second PMOS transistor P2. The second NMOS transistor N2 provides bias current to the third PMOS transistor P3 to drive the third PMOS transistor P3.
Referring to fig. 3, a schematic diagram of a source follower in an embodiment of the present invention is provided.
In the embodiment of the present invention, the voltage adjustment module may include a fifth PMOS transistor P5, a sixth PMOS transistor P6, a third NMOS transistor N3, and a blocking module.
In a specific implementation, the source of the fifth PMOS transistor P5 may be input with the power supply voltage VIN, the gate of the fifth PMOS transistor P5 may be coupled to the drain of the fifth PMOS transistor P5, and the drain of the fifth PMOS transistor P5 may be coupled to the drain of the third NMOS transistor N3;
the source of the sixth PMOS tube P6 can be input with the power supply voltage VIN, and the drain of the sixth PMOS tube P6 is coupled with the output end of the basic source follower module;
the grid electrode of the third NMOS tube N3 can be coupled with the bias current output end of the basic source electrode following module, and the source electrode of the third NMOS tube N3 is grounded;
the first end of the blocking module may be coupled to the gate of the fifth PMOS transistor P5, and the second end of the blocking module may be coupled to the gate of the sixth PMOS transistor P6.
By arranging the blocking module, when the power supply voltage VIN input by the source electrode of the fifth PMOS transistor P5 changes, the voltage of the gate electrode of the fifth PMOS transistor P5 changes correspondingly. However, the gate voltage of the sixth PMOS transistor P6 does not change with the power voltage VIN.
When the power supply voltage VIN jumps, the source voltage of the sixth PMOS transistor P6 jumps, and thus the voltage between the source and the gate of the sixth PMOS transistor P6 increases, the current of the sixth PMOS transistor P6 increases, so that the output voltage of the source follower increases. Accordingly, when the power voltage VIN jumps down, the gate voltage of the sixth PMOS transistor P6 will not change. The source voltage of the sixth PMOS transistor P6 jumps down, so that the voltage between the source and the gate of the sixth PMOS transistor P6 decreases, and the current of the sixth PMOS transistor P6 decreases, so that the output voltage of the source follower decreases.
With reference to fig. 1, the super source follower SSF in fig. 1 is replaced by a source follower provided in the embodiment of the present invention, so as to obtain a structure of a low dropout linear voltage regulator in the embodiment of the present invention.
As for the low dropout linear regulator provided in the embodiment of the present invention, when the source follower provided in the above embodiment is adopted, it can be known that:
when the power supply voltage VIN becomes larger, the output current of the source follower increases accordingly, so that the output voltage of the source follower becomes larger. Accordingly, the gate voltage of the power transistor M1 becomes large. In other words, the gate voltage of the power transistor M1 increases as the power supply voltage increases. Since the source of the power transistor M1 inputs the power supply voltage VIN, when the power supply voltage VIN jumps, the voltage of the source of the power transistor M1 increases. Therefore, the variation amplitude of the source voltage and the gate voltage of the power tube M1 can be approximately equal, that is, the variation difference between the source voltage and the gate voltage of the power tube M1 is approximately 0, so that the variation amplitude of the output voltage of the low dropout linear voltage regulator using the source follower is smaller.
Accordingly, when the power supply voltage VIN becomes smaller, the output current of the source follower becomes smaller accordingly, so the output voltage of the source follower decreases accordingly. The gate voltage of the power transistor M1 decreases. In other words, the gate voltage of the power transistor M1 decreases with a decrease in the power supply voltage. Since the source of the power transistor M1 inputs the power supply voltage VIN, when the power supply voltage VIN jumps down, the voltage of the source of the power transistor M1 decreases. Therefore, the variation amplitude of the source voltage and the gate voltage of the power tube M1 can be approximately equal, that is, the variation difference between the source voltage and the gate voltage of the power tube M1 is approximately 0, so that the variation amplitude of the output voltage of the low dropout linear voltage regulator using the source follower is smaller.
In an implementation, the bias current output end of the basic source follower module may be an output end of a current mirror formed by the first NMOS transistor N1 and the second NMOS transistor N2.
In some embodiments, the bias current output terminal of the basic source follower module may be the gate of the first NMOS transistor N1. And providing bias current for the fifth PMOS tube P5 through the third NMOS tube N3.
In a specific implementation, the blocking module may be a low pass filter, or a switched capacitor, or an active filter, etc.
In some embodiments, the blocking module is a low pass filter. The low-pass filter comprises a first capacitor C1 and a first resistor, wherein:
the first end of the first resistor is coupled with the grid electrode of the fifth PMOS tube P5, and the second end of the first resistor is coupled with the first end of the first capacitor C1 and the grid electrode of the sixth PMOS tube P6;
the second end of the first capacitor C1 is grounded.
Since the up-and-down fluctuation of the power supply voltage VIN can be regarded as a high-frequency signal, the gate voltage of the sixth PMOS transistor P6 can be prevented from fluctuating up-and-down with the power supply voltage VIN by providing a low-pass filter.
In an embodiment of the present invention, the source follower may further include a dynamic bias circuit. The dynamic bias circuit can acquire the output current of the low dropout linear voltage regulator and adjust the output current of the source follower based on the output current of the low dropout linear voltage regulator.
In implementations, the dynamic bias circuit may dynamically track the output current of the low dropout linear regulator. When the output current of the low dropout linear voltage regulator is increased, the dynamic bias circuit can dynamically adjust the bias current of the source follower, and then the capability of adjusting the fluctuation of the input voltage VIN by the output voltage of the source follower can be dynamically improved.
Specifically, when the output current of the low dropout linear regulator increases, the dynamic bias circuit may dynamically increase the bias current of the source follower; accordingly, when the output current of the low dropout linear regulator decreases, the dynamic bias circuit can dynamically decrease the bias current of the source follower.
Therefore, by arranging the dynamic bias circuit, the output current of the low-dropout linear voltage regulator is dynamically tracked, and further the bias current of the source follower is dynamically adjusted in the same direction, so that the capability of adjusting the fluctuation of the input voltage VIN by the output voltage of the source follower can be improved, and the fluctuation condition of the output voltage of the low-dropout linear voltage regulator using the source follower can be further relieved.
Referring to fig. 4, a schematic diagram of another source follower in an embodiment of the present invention is provided.
In a specific implementation, the dynamic bias circuit may include a seventh PMOS transistor P7 and an eighth PMOS transistor P8, where:
the source electrode of the seventh PMOS tube P7 inputs the power supply voltage VIN, the grid electrode of the seventh PMOS tube P7 is coupled with the output end of the source electrode follower, the drain electrode of the seventh PMOS tube P7 is coupled with the bias current output end of the basic source electrode follower module;
the source electrode of the eighth PMOS tube P8 is input with the power supply voltage VIN, the grid electrode of the eighth PMOS tube P8 is coupled with the grid electrode of the seventh PMOS tube P7, and the drain electrode of the eighth PMOS tube P8 is coupled with the output end of the source electrode follower.
In summary, the source follower provided in the above embodiment is sampled to slow down the variation of the output voltage of the low dropout linear regulator along with the power supply voltage.
The embodiment of the invention also provides a low-dropout linear voltage regulator, which comprises: the source follower provided in the above embodiment.
In an implementation, the low dropout linear regulator further includes an operational amplifier, a first sampling resistor, a second capacitor, and a power tube.
In a specific implementation, the first input end of the operational amplifier may be coupled to the first end of the second sampling resistor, the second input end of the operational amplifier may input the reference voltage, and the output end of the operational amplifier may be coupled to the input end of the source follower;
the first end of the power tube can be used for inputting power supply voltage, the second end of the power tube can be coupled with the first end of the first sampling resistor, and the control end of the power tube can be coupled with the output end of the source follower;
the second end of the first sampling resistor may be coupled to the first end of the second sampling resistor;
the second end of the second sampling resistor may be grounded;
the first terminal of the second capacitor may be coupled to the first terminal of the first sampling resistor, and the second terminal of the second capacitor may be coupled to the second terminal of the second sampling resistor.
In implementations, the first end of the op-amp may be the "+" end and the second end of the op-amp may be the "-" end.
In a specific implementation, the power tube may be a P-type MOS tube. When the power tube is a P-type MOS tube, the first end of the power tube is a source electrode of the power tube, the second end of the power tube is a drain electrode of the power tube, and the control end of the power tube is a grid electrode of the power tube.
In an embodiment of the present invention, the schematic structural diagram of the low dropout linear regulator described above may correspond to fig. 1. It should be noted that, in the low dropout linear regulator provided in the embodiment of the present invention, the super source follower in fig. 1 is essentially replaced by the source follower provided in the above embodiment.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.
Claims (8)
1. A source follower for use in a low dropout linear voltage regulator, the source follower comprising: the device comprises a basic source electrode following module and a voltage adjusting module, wherein:
the input end of the basic source electrode following module is the input end of the source electrode follower, and the output end of the basic source electrode following module is the output end of the source electrode follower; the basic source follower module includes: the first PMOS tube, the second PMOS tube, the third PMOS tube, the fourth PMOS tube, the current source, the triode, the first NMOS tube and the second NMOS tube, wherein: the source electrode of the first PMOS tube inputs power supply voltage, the grid electrode of the first PMOS tube is coupled with the drain electrode of the first PMOS tube, and the drain electrode of the first PMOS tube is coupled with the first end of the current source; the second end of the current source is grounded; the source electrode of the second PMOS tube inputs the power supply voltage, the grid electrode of the second PMOS tube is coupled with the grid electrode of the first PMOS tube, and the drain electrode of the second PMOS tube is coupled with the drain electrode of the first NMOS tube; the source electrode of the third PMOS tube inputs the power supply voltage, the grid electrode of the third PMOS tube is coupled with the grid electrode of the first PMOS tube, and the drain electrode of the third PMOS tube is coupled with the source electrode of the fourth PMOS tube; the grid of the fourth PMOS tube is the input end of the source electrode follower, a control signal is input, and the drain electrode of the fourth PMOS tube is coupled with the drain electrode of the second NMOS tube and is the output end of the source electrode follower; the grid electrode of the first NMOS tube is coupled with the drain electrode of the first NMOS tube, and the source electrode of the first NMOS tube is grounded; the grid electrode of the second NMOS tube is coupled with the grid electrode of the first NMOS tube, and the source electrode of the second NMOS tube is grounded; the collector of the triode is coupled with the drain electrode of the third PMOS tube, the base of the triode is coupled with the drain electrode of the fourth PMOS tube, and the emitter of the triode is grounded;
the input end of the voltage adjusting module inputs power supply voltage, and the output end of the voltage adjusting module is coupled with the output end of the source follower; the voltage adjusting module is suitable for adjusting the output voltage of the source follower in the same direction when the power supply voltage changes; the voltage adjustment module includes: fifth PMOS pipe, sixth PMOS pipe, third NMOS pipe and separation module, wherein: the source electrode of the fifth PMOS tube inputs the power supply voltage, the grid electrode of the fifth PMOS tube is coupled with the drain electrode of the fifth PMOS tube, and the drain electrode of the fifth PMOS tube is coupled with the drain electrode of the third NMOS tube; the source electrode of the sixth PMOS tube inputs the power supply voltage, and the drain electrode of the sixth PMOS tube is coupled with the output end of the basic source electrode following module; the grid electrode of the third NMOS tube is coupled with the bias current output end of the basic source electrode following module, and the source electrode of the third NMOS tube is grounded; and the first end of the blocking module is coupled with the grid electrode of the fifth PMOS tube, and the second end of the blocking module is coupled with the grid electrode of the sixth PMOS tube.
2. The source follower of claim 1, wherein the blocking module comprises any one of: low pass filter, switched capacitor, active filter.
3. The source follower of claim 2, wherein the low pass filter comprises: a first capacitor and a first resistor, wherein:
the first end of the first resistor is coupled with the grid electrode of the fifth PMOS tube, and the second end of the first resistor is coupled with the first end of the first capacitor and the grid electrode of the sixth PMOS tube;
the second end of the first capacitor is grounded.
4. The source follower of claim 1, further comprising: and the dynamic bias circuit is suitable for acquiring the output current of the low dropout linear voltage regulator and adjusting the output current of the source follower based on the output current of the low dropout linear voltage regulator.
5. The source follower of claim 4, wherein the dynamic bias circuit comprises: seventh PMOS pipe and eighth PMOS pipe, wherein:
the source electrode of the seventh PMOS tube inputs the power supply voltage, the grid electrode of the seventh PMOS tube is coupled with the output end of the source electrode follower, and the drain electrode of the seventh PMOS tube is coupled with the bias current output end of the basic source electrode follower module;
the source electrode of the eighth PMOS tube inputs the power supply voltage, the grid electrode of the eighth PMOS tube is coupled with the grid electrode of the seventh PMOS tube, and the drain electrode of the eighth PMOS tube is coupled with the output end of the source follower;
and the output end of the source follower is coupled with the grid electrode of the power tube in the low dropout linear voltage regulator.
6. A low dropout linear regulator, comprising: the source follower according to any one of claims 1 to 5.
7. The low dropout linear regulator of claim 6, further comprising: the circuit comprises an operational amplifier, a first sampling resistor, a second capacitor and a power tube, wherein:
the first input end of the operational amplifier is coupled with the first end of the second sampling resistor, the second input end of the operational amplifier inputs the reference voltage, and the output end of the operational amplifier is coupled with the input end of the source follower;
the first end of the power tube inputs the power supply voltage, the second end of the power tube is coupled with the first end of the first sampling resistor, and the control end of the power tube is coupled with the output end of the source follower;
the second end of the first sampling resistor is coupled with the first end of the second sampling resistor;
the second end of the second sampling resistor is grounded;
the first end of the second capacitor is coupled with the first end of the first sampling resistor, and the second end of the second capacitor is coupled with the second end of the second sampling resistor.
8. The low dropout linear regulator of claim 7, wherein said power tube is a P-type MOS tube.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410155801.9A CN117687465B (en) | 2024-02-04 | 2024-02-04 | Source follower and low dropout linear voltage regulator |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016082420A1 (en) * | 2014-11-24 | 2016-06-02 | 深圳市中兴微电子技术有限公司 | Low dropout linear voltage regulator |
| CN106788434A (en) * | 2016-12-19 | 2017-05-31 | 电子科技大学 | A kind of source-follower buffer circuit |
| CN108803764A (en) * | 2018-06-25 | 2018-11-13 | 电子科技大学 | A kind of LDO circuit of fast transient response |
| CN113268102A (en) * | 2021-02-21 | 2021-08-17 | 中山大学 | Low-dropout linear regulator circuit with ultra-low power consumption and rapid transient response |
| CN115903984A (en) * | 2022-12-21 | 2023-04-04 | 桂林海纳德半导体科技有限公司 | Self-adaptive super-source follower circuit and LDO voltage stabilizing chip |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016082420A1 (en) * | 2014-11-24 | 2016-06-02 | 深圳市中兴微电子技术有限公司 | Low dropout linear voltage regulator |
| CN106788434A (en) * | 2016-12-19 | 2017-05-31 | 电子科技大学 | A kind of source-follower buffer circuit |
| CN108803764A (en) * | 2018-06-25 | 2018-11-13 | 电子科技大学 | A kind of LDO circuit of fast transient response |
| CN113268102A (en) * | 2021-02-21 | 2021-08-17 | 中山大学 | Low-dropout linear regulator circuit with ultra-low power consumption and rapid transient response |
| CN115903984A (en) * | 2022-12-21 | 2023-04-04 | 桂林海纳德半导体科技有限公司 | Self-adaptive super-source follower circuit and LDO voltage stabilizing chip |
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| CN117687465B (en) | 2024-06-28 |
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