CN117674873A - Low-power consumption receiver and communication device - Google Patents
Low-power consumption receiver and communication device Download PDFInfo
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- CN117674873A CN117674873A CN202311393877.7A CN202311393877A CN117674873A CN 117674873 A CN117674873 A CN 117674873A CN 202311393877 A CN202311393877 A CN 202311393877A CN 117674873 A CN117674873 A CN 117674873A
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- 238000004891 communication Methods 0.000 title claims abstract description 16
- 230000010355 oscillation Effects 0.000 claims abstract description 35
- 238000001914 filtration Methods 0.000 claims abstract description 29
- 238000005070 sampling Methods 0.000 claims abstract description 28
- 230000000903 blocking effect Effects 0.000 claims abstract description 9
- 239000003990 capacitor Substances 0.000 claims description 54
- 230000003321 amplification Effects 0.000 claims description 5
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/16—Multiple-frequency-changing
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/294—Indexing scheme relating to amplifiers the amplifier being a low noise amplifier [LNA]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The invention provides a low-power consumption receiver and a communication device, comprising: the device comprises a bias module, a transformer, a local oscillation module, a single-balance passive sampling mixer and an intermediate frequency amplifier; the transformer receives the radio frequency signal and performs noise and impedance matching on the radio frequency signal; the single-balanced passive sampling mixer down-converts the single-ended radio frequency signal output by the transformer to obtain an intermediate frequency signal output by difference; the intermediate frequency amplifier performs high-pass filtering and amplifying on the intermediate frequency signal. The low-power consumption receiver omits a low-noise amplifier and a direct current elimination unit; directly carrying out high-pass filtering after mixing, and filtering blocking signals as early as possible; the structure realizes the same function and more excellent performance of the common structure, and has the technical advantages of small area, low power consumption, low cost, low noise coefficient, high linearity, blocking resistance and the like.
Description
Technical Field
The present invention relates to the field of communications, and in particular, to a low power consumption receiver and a communication device.
Background
The millimeter wave frequency band has higher available bandwidth and higher detection precision, so that the millimeter wave chip has wide application in the aspects of wireless communication, radar, guidance, remote sensing technology, radio astronomy, electronic countermeasure and the like. In recent years, with the continued opening of millimeter wave bands, millimeter wave chips have become hot spots.
The current common receiving module structure comprises a low noise amplifier, a mixer, a transimpedance amplifier and a direct current cancellation structure. The linearity and noise coefficient of the traditional structure are required to be balanced, the noise coefficient and power consumption are also required to be balanced, and the linearity, noise coefficient and power consumption are not optimized at the same time.
Therefore, how to design a receiving module with low power consumption, high linearity and low noise figure is always one of the technical problems to be solved by those skilled in the art.
It should be noted that the foregoing description of the background art is only for the purpose of providing a clear and complete description of the technical solution of the present invention and is presented for the convenience of understanding by those skilled in the art. The above-described solutions are not considered to be known to the person skilled in the art simply because they are set forth in the background of the invention section.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a low power consumption receiver and a communication device, which are used for solving the problems that the power consumption, linearity and noise figure of the receiver cannot be considered in the prior art.
To achieve the above and other related objects, the present invention provides a low power consumption receiver, including at least:
the device comprises a bias module, a transformer, a local oscillation module, a single-balance passive sampling mixer and an intermediate frequency amplifier;
the transformer is connected with the bias module and receives radio frequency signals, and performs noise and impedance matching on the radio frequency signals;
the single-balanced passive sampling mixer is connected with the output ends of the transformer, the bias module and the local oscillation module, and is used for performing down-conversion on the single-ended radio frequency signal output by the transformer to obtain an intermediate frequency signal with differential output;
the intermediate frequency amplifier is connected with the output end of the single-balance passive sampling mixer, and performs high-pass filtering and amplification on the intermediate frequency signal.
Optionally, the turns ratio of the primary coil and the secondary coil of the transformer is not less than 1:3.
Optionally, the coupling coefficient of the transformer is not less than 0.7 and not more than 1.
More optionally, one end of the primary coil of the transformer receives the radio frequency signal, and the other end is grounded; one end of a secondary coil of the transformer is connected with the direct-current bias voltage provided by the bias module, and the other end of the secondary coil of the transformer outputs a single-ended radio frequency signal.
Optionally, the single-balanced passive sampling mixer includes a first NMOS transistor, a second NMOS transistor, a first capacitor, and a second capacitor;
the grid electrode of the first NMOS tube is connected with the source electrode of the second NMOS tube and is used as the input end of the single-balanced passive sampling mixer, the direct-current bias voltage provided by the bias module and the first local oscillation signal provided by the local oscillation module are received by the grid electrode of the first NMOS tube, the direct-current bias voltage and the second local oscillation signal provided by the local oscillation module are received by the grid electrode of the second NMOS tube, the drain electrode of the first NMOS tube is connected with the first end of the first capacitor, the drain electrode of the second NMOS tube is connected with the first end of the second capacitor, and the first capacitor and the second end of the second capacitor are grounded;
the first local oscillation signal and the second local oscillation signal are in opposite phase and equal in amplitude.
Optionally, the intermediate frequency amplifier comprises a high-pass filtering unit and an amplifying unit;
the high-pass filtering unit carries out high-pass filtering on the intermediate frequency signal so as to filter blocking signals;
the amplifying unit amplifies the intermediate frequency signal after high-pass filtering.
More optionally, the high-pass filtering unit includes a third capacitor, a fourth capacitor, a first resistor and a second resistor;
one end of the third capacitor receives the normal phase signal of the intermediate frequency signal, and the other end of the third capacitor is connected with the normal phase input end of the amplifying unit; one end of the first resistor is connected with the positive input end of the amplifying unit, and the other end of the first resistor is connected with the positive output end of the amplifying unit;
one end of the fourth capacitor receives an inverted signal of the intermediate frequency signal, and the other end of the fourth capacitor is connected with an inverted input end of the amplifying unit; one end of the second resistor is connected with the inverting input end of the amplifying unit, and the other end of the second resistor is connected with the inverting output end of the amplifying unit.
More optionally, the third capacitor, the fourth capacitor, the first resistor, and the second resistor are all adjustable.
More optionally, the amplifying unit includes a first current source, a second current source, a third current source, a fourth current source, a first PMOS transistor, a second PMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a third resistor, a fourth resistor, a fifth resistor, and a sixth resistor;
one end of the first current source is connected with a power supply voltage, and the other end of the first current source is connected with a source electrode of the first PMOS tube; the grid electrodes of the first PMOS tube and the third NMOS tube are connected together and serve as the non-inverting input end of the amplifying unit; the drain electrode of the first PMOS tube is connected with the drain electrode of the third NMOS tube and is used as the positive phase output end of the amplifying unit; the source electrode of the third NMOS tube is connected with one end of the second current source, and the other end of the second current source is grounded;
one end of the third current source is connected with the power supply voltage, and the other end of the third current source is connected with the source electrode of the second PMOS tube; the grid electrodes of the second PMOS tube and the fourth NMOS tube are connected together and serve as the inverting input end of the amplifying unit; the drain electrode of the second PMOS tube is connected with the drain electrode of the fourth NMOS tube and is used as the inverting output end of the amplifying unit; the source electrode of the fourth NMOS tube is connected with one end of the fourth current source, and the other end of the fourth current source is grounded;
the third resistor is connected between the sources of the first PMOS tube and the second PMOS tube, and the fourth resistor is connected between the sources of the third NMOS tube and the fourth NMOS tube; the fifth resistor and the sixth resistor are connected in series and then connected between the non-inverting output end and the inverting output end of the amplifying unit.
More optionally, the fifth resistor and the sixth resistor are adjustable.
To achieve the above and other related objects, the present invention also provides a communication device, including at least: the low power consumption receiver.
As described above, the low power consumption receiver and the communication device of the present invention have the following advantages:
the low-power consumption receiver omits a low-noise amplifier and a direct current elimination unit; directly carrying out high-pass filtering after mixing, and filtering blocking signals as early as possible; the structure realizes the same function and more excellent performance of the common structure, and has the technical advantages of small area, low power consumption, low cost, low noise coefficient, high linearity, blocking resistance and the like.
Drawings
Fig. 1 shows a schematic structure of a high linearity low noise receiver.
Fig. 2 is a schematic diagram of a low power consumption receiver according to the present invention.
Fig. 3 shows a schematic diagram of the structure of the single balanced passive sampling mixer of the present invention.
Fig. 4 is a schematic diagram of the structure of the intermediate frequency amplifier of the present invention.
Description of element reference numerals
1. High linearity low noise receiver
11. Bias unit
12. Transformer
13. Low noise amplifier
14. Local oscillation unit
15. Mixer with a high-speed mixer
16. Transimpedance amplifier
17. DC eliminating unit
2. Low power consumption receiver
21. Bias module
22. Transformer
23. Local oscillation module
24. Single-balance passive sampling mixer
25. Intermediate frequency amplifier
251. High-pass filtering unit
252. Amplifying unit
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
Please refer to fig. 1-4. It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
As shown in fig. 1, a high linearity low noise receiver 1 includes a bias unit 11, a transformer 12, a low noise amplifier 13 (LNA), a local oscillator unit 14, a MIXER 15 (MIXER), a transimpedance amplifier 16 (TIA), and a dc cancellation unit 17 (DCOC). Wherein the bias unit 11 provides a bias voltage; the transformer 12 is connected with an antenna, and converts a single-ended signal received by the antenna into a differential signal (one end of a primary coil of the transformer is connected with the antenna, the other end of the primary coil of the transformer is grounded, a middle tap of a secondary coil of the transformer is connected with a bias voltage, and differential signals are output at two ends of the primary coil of the transformer); the low noise amplifier 13 is connected to the output end of the transformer 11, and provides a radio frequency gain for the high linearity low noise receiver 1, the low noise amplifier 13 is a low noise amplifier or a cascade structure of a plurality of low noise amplifiers, the more the number of stages of the low noise amplifier, the better the noise coefficient of the later stage can be suppressed, but the worse the linearity, and the poorer the anti-blocking capability; the local oscillation unit 14 provides a local oscillation signal; the mixer 15 is connected to the output ends of the low noise amplifier 13 and the local oscillator unit 14, and obtains an intermediate frequency signal through mixing; the transimpedance amplifier 16 is connected to the output end of the mixer 15, and consists of a high-gain operational amplifier 161 and a feedback resistor Rf, and provides extremely low input impedance and higher transimpedance gain; the dc cancellation unit 17 is connected to the output end of the transimpedance amplifier 16, and is configured to perform low-pass filtering on the output signal of the transimpedance amplifier 16 and then negatively feed back the output signal to the input of the transimpedance amplifier 16, so that frequency signals before the low-pass corner frequency are cancelled, and the transimpedance amplifier 16 and the dc cancellation unit 17 exhibit bandpass characteristics. For low noise requirements, the feedback resistance of the transimpedance amplifier 16 needs to be sufficiently large, but linearity is difficult to ensure, and the dc cancellation unit 17 itself deteriorates the overall noise figure.
Based on this, the present invention proposes a low power consumption receiver 2 for taking into account low power consumption, high linearity and low noise figure.
As shown in fig. 2, the low power consumption receiver 2 includes:
the device comprises a bias module 21, a transformer 22, a local oscillation module 23, a single-balance passive sampling mixer 24 and an intermediate frequency amplifier 25.
As shown in fig. 2, the bias module 21 provides the dc bias voltage for the low power consumption receiver 2, and any circuit structure capable of generating the dc bias voltage is suitable for the present invention, which is not described herein.
As shown in fig. 2, the transformer 22 is connected to the bias module 21 and receives radio frequency signals, and performs noise and impedance matching on the radio frequency signals.
Specifically, in this embodiment, the rf signal is provided by an antenna, and the antenna receives the rf signal and transmits the rf signal to the transformer 22. In this embodiment, the transformer 22 has a high turns ratio and a high coupling coefficient, can provide a small insertion loss, has excellent noise matching and impedance matching capabilities, and also provides a certain voltage gain, so that the purposes of low noise coefficient and suppression of post-stage noise can be achieved under the condition of zero power consumption. As an example, the turns ratio of the primary and secondary windings of the transformer 22 is not less than 1:3, including but not limited to 1:5, 1:6; the coupling coefficient of the transformer 22 is not less than 0.7 and not more than 1, including but not limited to 0.75, 0.8, 0.85, 0.9; the turns ratio and the coupling coefficient of the transformer 22 can be set according to practical needs, and are not limited to the present embodiment.
Specifically, in this embodiment, the transformer 22 has a single-ended input and single-ended output structure, the transformer 22 includes a primary coil and a secondary coil, one end of the primary coil receives the radio frequency signal, and the other end is grounded; one end of the secondary coil is connected with the bias module 11, and the other end of the secondary coil outputs a single-ended radio frequency signal.
As shown in fig. 2, the local oscillation module 23 is configured to provide a local oscillation signal to the low power consumption receiver 2. The local oscillation module 23 includes, but is not limited to, a frequency synthesizer, and any circuit structure capable of providing a local oscillation signal required for frequency conversion is suitable for the present invention, and is not described herein in detail.
As shown in fig. 2, the single-balanced passive sampling mixer 24 is connected to the output ends of the transformer 22, the bias module 21 and the local oscillation module 23, and performs down-conversion on the single-ended radio frequency signal output by the transformer 22 to obtain an intermediate frequency signal with differential output.
Specifically, the single-balanced passive sampling mixer 24 is a single-ended input, double-ended output structure; the single balanced passive sampling mixer 24 of the present invention has better linearity and lower 1/f noise than an active mixer; the single balanced passive sampling mixer 24 of the present invention has a higher voltage gain (by way of example, 5.5dB higher) than the double balanced passive sampling mixer.
Specifically, as shown in fig. 3, in the present embodiment, the single-balanced passive sampling mixer 24 includes a first NMOS transistor MN1, a second NMOS transistor MN2, a first capacitor C1, and a second capacitor C2. The source electrodes of the first NMOS transistor MN1 and the second NMOS transistor MN2 are connected together and serve as the input end of the single-balanced passive sampling mixer 24, the gate electrode of the first NMOS transistor MN1 receives the dc BIAS voltage BIAS provided by the BIAS module 21 and the first local oscillation signal lon_p provided by the local oscillation module 23, the gate electrode of the second NMOS transistor receives the dc BIAS voltage BIAS and the second local oscillation signal lon_n provided by the local oscillation module 23, the drain electrode of the first NMOS transistor MN1 is connected to the first end of the first capacitor C1, the drain electrode of the second NMOS transistor MN2 is connected to the first end of the second capacitor C2, the first ends of the first capacitor C1 and the second capacitor C2 output the intermediate frequency signal, and the second ends of the first capacitor C1 and the second capacitor C2 are both grounded; the first local oscillation signal LOIN_P is opposite to the second local oscillation signal LOIN_N, and has the same amplitude (differential signal). Further, the sizes of the first NMOS transistor MN1 and the second NMOS transistor MN2 are set, so that the loss of the single-balanced passive sampling mixer 24 is reduced by adjusting the on-resistance; biasing the first NMOS transistor MN1 and the second NMOS transistor MN2 in an just-opened state; thereby providing high Q impedance to the transformer 22, facilitating impedance matching of the transformer 22, and maintaining high linearity.
As another implementation manner of the present invention, the first capacitor C1 and the second capacitor C2 are capacitors with fixed capacitance values or adjustable capacitors, and the first capacitor C1 and the second capacitor C2 are used for filtering radio frequency signals fed through local oscillators to an intermediate frequency, and specific values are set according to needs.
It should be noted that, under the condition of zero power consumption, the transformer 22 and the single-balanced passive sampling mixer 24 of the present invention can provide enough voltage gain, which reduces the burden for the subsequent low-noise design of the intermediate frequency amplifier 25, and the post intermediate frequency amplifier 25 can meet the overall noise factor of the low-power consumption receiver 2 without very large power consumption.
As shown in fig. 2, the intermediate frequency amplifier 25 is connected to the output of the single balanced passive sampling mixer 24, and performs high-pass filtering and amplifying on the intermediate frequency signal.
Specifically, in the present embodiment, the intermediate frequency amplifier 25 includes a high-pass filtering unit 251 and an amplifying unit 252. The high-pass filtering unit 251 performs high-pass filtering on the intermediate frequency signal to filter the blocking signal as soon as possible, so as to avoid saturation of the amplifying unit 252. The amplifying unit 252 amplifies the intermediate frequency signal after the high-pass filtering.
More specifically, as shown in fig. 4, the high-pass filtering unit 251 includes, as an example, a third capacitor C3, a fourth capacitor C4, a first resistor R1, and a second resistor R2. One end of the third capacitor C3 receives the positive phase signal of the intermediate frequency signal (i.e. the positive phase input terminal in_p of the intermediate frequency amplifier 25), and the other end is connected to the positive phase input terminal of the amplifying unit 252; one end of the first resistor R1 is connected to the non-inverting input end of the amplifying unit 252, and the other end is connected to the non-inverting output end of the amplifying unit 252; the third capacitor C3 and the first resistor R1 form a high-pass filter for the normal phase input signal. One end of the fourth capacitor C4 receives the inverted signal of the intermediate frequency signal (i.e. the inverted input terminal in_n of the intermediate frequency amplifier 25), and the other end is connected to the inverted input terminal of the amplifying unit 252; one end of the second resistor R2 is connected to the inverting input end of the amplifying unit 252, and the other end is connected to the inverting output end of the amplifying unit 252; the fourth capacitor C4 and the second resistor R2 form a high-pass filter for the inverted input signal. In practical use, the present invention is applicable to any circuit structure capable of implementing high-pass filtering, and is not limited to this embodiment.
As another implementation manner of the present invention, the third capacitor C3, the fourth capacitor C4, the first resistor R1 and the second resistor R2 are all adjustable. Reducing the variation of the corner frequency of the high-pass filter under different processes based on the adjustment of the third capacitor C3 and the fourth capacitor C4; based on the adjustment of the first resistor R1 and the second resistor R2, the switching of a plurality of gears of corner frequency of the high-pass filter is supported; specific numerical values are set according to actual needs, and are not described in detail herein.
More specifically, as shown in fig. 4, the amplifying unit 252 includes, as an example, a first current source I1, a second current source I2, a third current source I3, a fourth current source I4, a first PMOS transistor MP1, a second PMOS transistor MP2, a third NMOS transistor MN3, a fourth NMOS transistor MN4, a third resistor R3, a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6. One end of the first current source I1 is connected with a power supply voltage, and the other end of the first current source I1 is connected with a source electrode of the first PMOS tube MP 1; the gates of the first PMOS MP1 and the third NMOS MN3 are connected together and serve as a non-inverting input terminal of the amplifying unit 252 (in this example, connected between the third capacitor C3 and the first resistor R1); the drain electrode of the first PMOS MP1 is connected to the drain electrode of the third NMOS MN3 and is used as the positive phase output end of the amplifying unit 252 (i.e. the positive phase output end out_p of the intermediate frequency amplifier 25); the source electrode of the third NMOS MN3 is connected to one end of the second current source I2, and the other end of the second current source I2 is grounded. One end of the third current source I3 is connected with the power supply voltage, and the other end of the third current source I is connected with the source electrode of the second PMOS tube MP 2; the gates of the second PMOS MP2 and the fourth NMOS MN4 are connected together and serve as an inverting input terminal of the amplifying unit 252 (in this example, connected between the fourth capacitor C4 and the second resistor R2); the drain electrode of the second PMOS MP2 is connected to the drain electrode of the fourth NMOS MN4 and is used as the inverting output terminal of the amplifying unit 252 (i.e. the inverting output terminal out_n of the intermediate frequency amplifier 25); the source of the fourth NMOS transistor 252 is connected to one end of the fourth current source I4, and the other end of the fourth current source I4 is grounded. The third resistor R3 is connected between the sources of the first PMOS tube MP1 and the second PMOS tube MP2, and the fourth resistor R4 is connected between the sources of the third NMOS tube MN3 and the fourth NMOS tube MN 4; the fifth resistor R5 and the sixth resistor R6 are connected in series and then connected between the non-inverting output terminal and the inverting output terminal of the amplifying unit 252. The first PMOS transistor MP1 and the third NMOS transistor MN3, and the second PMOS transistor MP2 and the fourth NMOS transistor MN4 are respectively used as transconductance units at two ends of the differential. The current flowing through the first PMOS transistor MP1 and the third NMOS transistor MN3 share the same current source, and under the same current, multiple transconductance amplification factors can be provided more than that of a single third NMOS transistor MN 3; similarly, the structures of the second PMOS MP2 and the fourth NMOS MN4 can also provide one more transconductance amplification. The third resistor R3 and the fourth resistor R4 play a role of linearizing the transconductance unit; meanwhile, since the third resistor R3 is proportional to the fifth resistor R5 and the sixth resistor R6, and the fourth resistor R4 is proportional to the fifth resistor R5 and the sixth resistor R6, when the process, the voltage, the temperature, etc. are changed, the changes occurring in the resistors are counteracted, and thus gain independent of the process, the voltage, the temperature is obtained.
As another implementation manner of the present invention, the fifth resistor R5 and the sixth resistor R6 are adjustable. The gain control of the intermediate frequency amplifier 25 may be achieved based on the adjustment of the fifth resistor R5 and the sixth resistor R6, and specific values are set according to actual needs, which are not described in detail herein.
The intermediate frequency amplifier 25 of the present embodiment can maintain high linearity and provide an acceptable noise figure.
The present invention also provides a communication device including at least: the low power consumption receiver 2 of the present invention, the low power consumption receiver 2 is used for receiving signals. As another example, the communication apparatus further includes a transmitter, the receiver and the transmitter are connected to the same antenna, and reception and transmission of signals are achieved by time-division multiplexing of the antennas. The communication device can configure related devices to realize communication functions according to needs, and details are not repeated here.
In summary, the present invention provides a low power consumption receiver and a communication device, including: the device comprises a bias module, a transformer, a local oscillation module, a single-balance passive sampling mixer and an intermediate frequency amplifier; the transformer is connected with the bias module and receives radio frequency signals, and performs noise and impedance matching on the radio frequency signals; the single-balanced passive sampling mixer is connected with the output ends of the transformer, the bias module and the local oscillation module, and is used for performing down-conversion on the single-ended radio frequency signal output by the transformer to obtain an intermediate frequency signal with differential output; the intermediate frequency amplifier is connected with the output end of the single-balance passive sampling mixer, and performs high-pass filtering and amplification on the intermediate frequency signal. The low-power consumption receiver omits a low-noise amplifier and a direct current elimination unit; the high-pass filtering is directly carried out after mixing, so that blocking signals are filtered as soon as possible, the same function and more excellent performance of a common structure are realized, and the high-performance high-frequency mixer has the technical advantages of small area, low power consumption, low cost, low noise coefficient, high linearity, blocking resistance and the like. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (11)
1. A low power receiver, the low power receiver comprising at least:
the device comprises a bias module, a transformer, a local oscillation module, a single-balance passive sampling mixer and an intermediate frequency amplifier;
the transformer is connected with the bias module and receives radio frequency signals, and performs noise and impedance matching on the radio frequency signals;
the single-balanced passive sampling mixer is connected with the output ends of the transformer, the bias module and the local oscillation module, and is used for performing down-conversion on the single-ended radio frequency signal output by the transformer to obtain an intermediate frequency signal with differential output;
the intermediate frequency amplifier is connected with the output end of the single-balance passive sampling mixer, and performs high-pass filtering and amplification on the intermediate frequency signal.
2. The low power consumption receiver of claim 1, wherein: the turns ratio of the primary coil and the secondary coil of the transformer is not less than 1:3.
3. The low power consumption receiver of claim 1, wherein: the coupling coefficient of the transformer is not less than 0.7 and not more than 1.
4. A low power consumption receiver according to any of claims 1-3, characterized in that: one end of a primary coil of the transformer receives the radio frequency signal, and the other end of the primary coil of the transformer is grounded; one end of a secondary coil of the transformer is connected with the direct-current bias voltage provided by the bias module, and the other end of the secondary coil of the transformer outputs a single-ended radio frequency signal.
5. The low power consumption receiver of claim 1, wherein: the single-balance passive sampling mixer comprises a first NMOS tube, a second NMOS tube, a first capacitor and a second capacitor;
the grid electrode of the first NMOS tube is connected with the source electrode of the second NMOS tube and is used as the input end of the single-balanced passive sampling mixer, the direct-current bias voltage provided by the bias module and the first local oscillation signal provided by the local oscillation module are received by the grid electrode of the first NMOS tube, the direct-current bias voltage and the second local oscillation signal provided by the local oscillation module are received by the grid electrode of the second NMOS tube, the drain electrode of the first NMOS tube is connected with the first end of the first capacitor, the drain electrode of the second NMOS tube is connected with the first end of the second capacitor, and the second end of the first capacitor and the second end of the second capacitor are grounded;
the first local oscillation signal and the second local oscillation signal are in opposite phase and equal in amplitude.
6. The low power consumption receiver of claim 1, wherein: the intermediate frequency amplifier comprises a high-pass filtering unit and an amplifying unit;
the high-pass filtering unit carries out high-pass filtering on the intermediate frequency signal so as to filter blocking signals;
the amplifying unit amplifies the intermediate frequency signal after high-pass filtering.
7. The low power consumption receiver of claim 6, wherein: the high-pass filtering unit comprises a third capacitor, a fourth capacitor, a first resistor and a second resistor;
one end of the third capacitor receives the normal phase signal of the intermediate frequency signal, and the other end of the third capacitor is connected with the normal phase input end of the amplifying unit; one end of the first resistor is connected with the positive input end of the amplifying unit, and the other end of the first resistor is connected with the positive output end of the amplifying unit;
one end of the fourth capacitor receives an inverted signal of the intermediate frequency signal, and the other end of the fourth capacitor is connected with an inverted input end of the amplifying unit; one end of the second resistor is connected with the inverting input end of the amplifying unit, and the other end of the second resistor is connected with the inverting output end of the amplifying unit.
8. The low power consumption receiver of claim 7, wherein: the third capacitor, the fourth capacitor, the first resistor and the second resistor are all adjustable.
9. The low power consumption receiver of claim 6, wherein: the amplifying unit comprises a first current source, a second current source, a third current source, a fourth current source, a first PMOS tube, a second PMOS tube, a third NMOS tube, a fourth NMOS tube, a third resistor, a fourth resistor, a fifth resistor and a sixth resistor;
one end of the first current source is connected with a power supply voltage, and the other end of the first current source is connected with a source electrode of the first PMOS tube; the grid electrodes of the first PMOS tube and the third NMOS tube are connected together and serve as the non-inverting input end of the amplifying unit; the drain electrode of the first PMOS tube is connected with the drain electrode of the third NMOS tube and is used as the positive phase output end of the amplifying unit; the source electrode of the third NMOS tube is connected with one end of the second current source, and the other end of the second current source is grounded;
one end of the third current source is connected with the power supply voltage, and the other end of the third current source is connected with the source electrode of the second PMOS tube; the grid electrodes of the second PMOS tube and the fourth NMOS tube are connected together and serve as the inverting input end of the amplifying unit; the drain electrode of the second PMOS tube is connected with the drain electrode of the fourth NMOS tube and is used as the inverting output end of the amplifying unit; the source electrode of the fourth NMOS tube is connected with one end of the fourth current source, and the other end of the fourth current source is grounded;
the third resistor is connected between the sources of the first PMOS tube and the second PMOS tube, and the fourth resistor is connected between the sources of the third NMOS tube and the fourth NMOS tube; the fifth resistor and the sixth resistor are connected in series and then connected between the non-inverting output end and the inverting output end of the amplifying unit.
10. The low power consumption receiver of claim 9, wherein: the fifth resistor and the sixth resistor are adjustable.
11. A communication device, the communication device comprising at least: a low power receiver as claimed in any one of claims 1 to 10.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311393877.7A CN117674873A (en) | 2023-10-25 | 2023-10-25 | Low-power consumption receiver and communication device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202311393877.7A CN117674873A (en) | 2023-10-25 | 2023-10-25 | Low-power consumption receiver and communication device |
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| US20040214547A1 (en) * | 2003-04-28 | 2004-10-28 | Samsung Electronics Co., Ltd. | Circuit and method for receiving and mixing radio frequencies in a direct conversion receiver |
| CN103546176A (en) * | 2012-07-16 | 2014-01-29 | 达斯特网络公司 | Wireless receiver and signal processing method |
| CN110945781A (en) * | 2017-07-20 | 2020-03-31 | 华为技术有限公司 | Single balanced voltage mode passive mixer with symmetric sideband gain |
| WO2022078581A1 (en) * | 2020-10-13 | 2022-04-21 | Telefonaktiebolaget Lm Ericsson (Publ) | Receiver circuit |
| CN115940974A (en) * | 2022-10-24 | 2023-04-07 | 天津大学 | Broadband anti-blocking radio frequency receiver |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040214547A1 (en) * | 2003-04-28 | 2004-10-28 | Samsung Electronics Co., Ltd. | Circuit and method for receiving and mixing radio frequencies in a direct conversion receiver |
| CN103546176A (en) * | 2012-07-16 | 2014-01-29 | 达斯特网络公司 | Wireless receiver and signal processing method |
| CN110945781A (en) * | 2017-07-20 | 2020-03-31 | 华为技术有限公司 | Single balanced voltage mode passive mixer with symmetric sideband gain |
| WO2022078581A1 (en) * | 2020-10-13 | 2022-04-21 | Telefonaktiebolaget Lm Ericsson (Publ) | Receiver circuit |
| CN115940974A (en) * | 2022-10-24 | 2023-04-07 | 天津大学 | Broadband anti-blocking radio frequency receiver |
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