CN117596311A - Multi-protocol decoding circuit of RFID chip - Google Patents

Abstract

The application relates to a multi-protocol decoding circuit of an RFID chip, wherein under a plurality of communication protocols, a mapping relation between a parameter threshold range and reference decoding data is provided through a configuration register module, so that no matter which communication protocol is based on which coding signal is used for coding, a measuring module can be used for measuring characteristic parameters corresponding to target communication protocols in all communication protocols, wherein the characteristic parameters at least comprise target duration of a jump edge in the coding signal, the characteristic parameters are matched with the parameter threshold range of the target communication protocol through a threshold matching module, the target threshold range is obtained, and finally the reference decoding data corresponding to the target threshold range is obtained based on the mapping relation, so that decoding of the plurality of communication protocols is realized through the mapping relation under the plurality of communication protocols.

Description

Multi-protocol decoding circuit of RFID chip

Technical Field

The application relates to the technical field of radio frequency tags, in particular to a multi-protocol decoding circuit of an RFID chip.

Background

As shown in fig. 1, the communication process between the RFID chip 102 and the base station 101 uses a low-frequency radio electromagnetic wave (< 1 MHz) as a carrier wave, transmits information in a modulated manner, receives information in a demodulated manner, and exchanges information in an inductive coupling manner. The modulation and demodulation of the RFID chip are finished on the analog side, and the encoding and decoding are finished on the digital side.

Because of the numerous types of RFID chips and many encoding modes, different communication protocols may be required for different types of RFID chips and RFID chips in different application scenarios, and thus a general decoding circuit capable of supporting multiple protocols is urgently needed.

Disclosure of Invention

The application provides a decoding circuit of a multiprotocol with high versatility.

A multi-protocol decoding circuit of an RFID chip, the multi-protocol decoding circuit comprising:

the measuring module is used for measuring characteristic parameters of the coded signals in a working state; the characteristic parameters correspond to a target communication protocol and at least comprise target duration of a jump edge in the coded signal;

the configuration register module is used for providing mapping relations between parameter threshold ranges and reference decoding data under various communication protocols;

the threshold matching module is respectively connected with the configuration registering module and the measuring module and is used for:

matching the characteristic parameters with the parameter threshold range of the target communication protocol to obtain a target threshold range;

and acquiring reference decoding data corresponding to the target threshold range based on the mapping relation to obtain target decoding data.

In one embodiment, the measurement module comprises:

the rising edge detection unit is used for detecting the rising edge of the coded signal to obtain a rising edge signal;

the falling edge detection unit is used for detecting the falling edge of the coded signal to obtain a falling edge signal;

the timing unit is respectively connected with the rising edge detection unit, the falling edge detection unit and the threshold matching module and is used for timing a target edge signal in an enabling state to obtain the target duration; wherein the target edge signal comprises at least one of the rising edge signal and the falling edge signal; and when the timing unit is in the enabling state, the measuring module is in the working state.

In one embodiment, the multi-protocol decoding circuit further comprises:

and the enabling control module is connected with the timing unit and used for controlling the timing unit to enter the enabling state according to an enabling control signal.

In one embodiment, the enabling control module is further connected to the threshold matching module, and is configured to control the timing unit to exit the enabling state if the target decoded data is invalid data.

In one embodiment, the rising edge detection unit is further connected to the enabling control module, and is configured to detect a rising edge of the listening signal, obtain the enabling control signal, and output the enabling control signal to the enabling control module; the interception signal is a signal obtained by demodulating the modulation signal by 100% amplitude through the RFID chip.

In one embodiment, the multi-protocol decoding circuit further comprises:

and the decryption module is connected with the threshold matching module and is used for decrypting the target decoding data if the target decoding data is valid data.

In one embodiment, the multi-protocol decoding circuit further comprises:

and the buffer register module is connected with the decryption module and used for sequentially storing the effective data and outputting the effective data in parallel.

In one embodiment, the multi-protocol decoding circuit further comprises:

and the interrupt module is connected with the threshold matching module and is used for outputting a first interrupt signal if the target decoding data is invalid data.

In one embodiment, the multi-protocol decoding circuit further comprises:

the counting module is connected with the buffer register module and used for counting the effective data stored in the buffer register module;

and the interrupt module is connected with the counting module and is used for outputting a second interrupt signal if the counted number reaches a number threshold value.

In one embodiment, the threshold matching module is further configured to:

judging whether the data is in a data decoding stage or not according to the reference decoded data corresponding to the target threshold range;

and if the data decoding stage is judged, taking the reference decoded data corresponding to the target threshold range as the target decoded data.

According to the multi-protocol decoding circuit of the RFID chip, under the condition that a plurality of communication protocols are provided by the configuration register module, the mapping relation between the parameter threshold range and the reference decoding data is provided, so that no matter which communication protocol is based on which coding signal is coded, the measurement module can be used for measuring the characteristic parameters corresponding to the target communication protocol in each communication protocol, wherein the characteristic parameters at least comprise the target duration of the jump edge in the coding signal, the threshold matching module is used for matching the characteristic parameters with the parameter threshold range of the target communication protocol to obtain the target threshold range, and finally the reference decoding data corresponding to the target threshold range is obtained based on the mapping relation to obtain the target decoding data.

Drawings

FIG. 1 is a block diagram of a communication circuit between a base station and an RFID chip of the present application;

FIG. 2 is a block diagram of a multi-protocol decoding circuit of an RFID chip according to an embodiment of the present application;

FIG. 3 is a waveform diagram of a coded signal before and after demodulation under binary pulse length modulation coding and quaternary pulse length modulation coding according to an embodiment of the present application;

FIG. 4 is a decoding situation when a target duration falls within a threshold range of each parameter under the encoding of the quaternary pulse length modulation method according to an embodiment of the present application;

FIG. 5 is a waveform diagram of a coded signal before and after demodulation under pulse width modulation coding according to an embodiment of the present application;

FIG. 6 is a waveform diagram of a coded signal before and after demodulation under ISO18000-2B modulation method coding in an embodiment of the present application;

FIG. 7 is a decoding situation when a target duration of SOF phase falls into a threshold range of each parameter under the coding of an ISO18000-2B modulation mode;

FIG. 8 is a waveform diagram of a coded signal before and after demodulation under pulse synchronous modulation coding according to an embodiment of the present application;

FIG. 9 is a block diagram of a multi-protocol decoding circuit of an RFID chip according to another embodiment of the present application;

FIG. 10 is a block diagram of a multi-protocol decoding circuit of an RFID chip according to another embodiment of the present application;

FIG. 11 is a block diagram of a multi-protocol decoding circuit of an RFID chip according to another embodiment of the present application;

fig. 12 is a block diagram of a multi-protocol decoding circuit of an RFID chip according to another embodiment of the present application.

Detailed Description

It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without undue burden, are within the scope of the present application.

It should be noted that all directional indicators (such as up, down, left, right, front, and rear … …) in the embodiments of the present application are merely used to explain the relative positional relationship, movement conditions, etc. between the components in a specific posture (as shown in the drawings), if the specific posture is changed, the directional indicators correspondingly change, and the connection may be a direct connection or an indirect connection.

In addition, descriptions such as those related to "first," "second," and the like, are provided for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated in this application. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be regarded as not exist and not within the protection scope of the present application.

FIG. 2 is a block diagram of a multi-protocol decoding circuit of an RFID chip according to an embodiment, and as shown in FIG. 2, the multi-protocol decoding circuit includes a measurement module 110, a configuration register module 120, and a threshold matching module 130; the measurement module 110 is used for measuring characteristic parameters of the coded signals in an operating state; the characteristic parameter corresponds to a target communication protocol and at least comprises a target duration of a jump edge in the coded signal; the configuration register module 120 is configured to provide a mapping relationship between the parameter threshold range and the reference decoded data under a plurality of communication protocols; the threshold matching module 130 is respectively connected with the configuration registering module 120 and the measuring module 110, and is used for matching the characteristic parameter with the parameter threshold range of the target communication protocol to obtain a target threshold range; and acquiring reference decoding data corresponding to the target threshold range based on the mapping relation to obtain target decoding data.

It can be understood that when the base station encodes data, for encoded data under different communication protocols, encoded signals of different pulse waveforms can be generated based on mapping relations between the encoded data and parameter threshold ranges, so that characteristic parameters of the encoded signals fall within a certain parameter threshold range corresponding to the encoded data, wherein the encoded signals are baseband signals with encoded information; and further modulating the coded signal to obtain a modulated signal and further transmitting the modulated signal to the RFID chip end. The RFID chip demodulates the modulated signal after receiving the encoded signal transmitted from the base station, so as to obtain a corresponding encoded signal, where the encoded signal measured by the measurement module 110 is obtained by demodulating a portion (e.g., a modulated signal in a period t0 in fig. 3) of the modulated signal with an amplitude exceeding 80% by the RFID chip when the RFID chip demodulates the encoded signal. Different communication protocols, the coding modes of the coded signals are different, and the characteristic parameters are determined by the coding modes of the coded signals, namely, the types of the communication protocols, so that the characteristic parameters measured by the measuring module correspond to the target communication protocol, and the target communication protocol is one of a plurality of communication protocols; the characteristic parameter may include a target duration, the measured target duration also corresponding to the target communication protocol and carrying decoding information of the encoded signal. The target duration is related to a transition edge of the code signal, the transition edge may include at least one of a rising edge and a falling edge, and according to different communication protocols, the target duration may be a duration between the same transition edges in the code signal, a duration between different transition edges, or a duration when no change in level occurs after the transition edge is detected.

For example, for different communication protocols, the encoding scheme may include a series of protocols including Binary Pulse Length Modulation (BPLM), quaternary Pulse Length Modulation (QPLM), pulse Width Modulation (PWM), ISO18000-2B, and Pulse Synchronization Modulation (PSM). The coded signals before and after demodulation under each communication protocol are shown in fig. 3 to 8, wherein the signal Coil is the waveform of the signals at two ends of the inductor of the RFID chip, that is, the waveform of the coded signal before demodulation received by the RFID chip, and the signal lfd_data is the coded signal after demodulation.

Different communication protocols and characteristic parameters can be different, and for the communication protocols of which the coding modes are Binary Pulse Length Modulation (BPLM), quaternary Pulse Length Modulation (QPLM), pulse Width Modulation (PWM) and ISO18000-2B, the threshold matching module can carry out matching judgment only according to target duration in the characteristic parameters; and for the communication protocol with the encoding mode of pulse synchronous modulation PSM, the threshold matching module also needs to combine other parameters except for the target duration in the characteristic parameters to carry out matching judgment.

Each communication protocol may include a plurality of parameter threshold ranges and a plurality of reference decoding data, where each parameter threshold range corresponds to each reference decoding data one by one, and thus the mapping relationship between the parameter threshold ranges and the reference decoding data may include a plurality of mapping pairs formed by the parameter threshold ranges and the reference decoding data. The method comprises the steps that a currently adopted communication protocol is used as a target communication protocol, a threshold matching module matches characteristic parameters with a parameter threshold range of the target communication protocol, the parameter threshold range successfully matched is used as a target threshold range, and then reference decoding data corresponding to the target threshold range is obtained based on the mapping pair to obtain target decoding data; the reference decoded data corresponding to the target threshold range can be directly used as target decoded data, and can also be used as target decoded data when a specific condition is met.

Specifically, for a communication protocol in which the encoding mode is binary pulse length modulation BPLM, referring to fig. 3, the target duration of the encoded signal may be the duration between two adjacent falling edges, denoted as T _GAP1 Target time length T _GAP1 Matching with a range of parameter thresholds, i.e. target duration T _GAP1 Falls within a parameter threshold range; target time length T _GAP1 When the reference decoding data are matched with the threshold ranges of the parameters, the corresponding reference decoding data can be referred to as shown in a table 1; wherein T is _DATA0,min A minimum critical value of a time length between two falling edges when preset decoding data is 0; t (T) _DATA1,min A minimum critical value of a time length between two falling edges when preset decoding data is 1; t (T) _STOP,min Is the minimum threshold for the duration between two falling edges when the preset decoded data is STOP.

TABLE 1

Parameter threshold range	Referencing decoded data
		T GAP1 <T DATA0,min	Error
T DATA0,min ≤T GAP1 <T DATA1,min	0
		T DATA1,min ≤T GAP1 <T Stop,min	1
T Stop,min ≤T GAP1	Stop

For a communication protocol with a code pattern of a binary pulse length modulation BPLM, with continued reference to fig. 3, which is similar to the binary pulse length modulation BPLM except that the time period between two adjacent falling edges represents two bits of data, a target time period T _GAP1 When matching the threshold ranges of the parameters, the corresponding reference decoded data can be referred to as shown in Table 2, wherein T _DATA00,min A minimum critical value of a time length between two falling edges when preset decoding data is 00; t (T) _DATA01,min A minimum critical value of a time length between two falling edges when preset decoding data is 01; t (T) _DATA10,min A minimum critical value of a time length between two falling edges when preset decoding data is 10; t (T) _DATA11,min The time length between two falling edges is the most when the preset decoding data is 11A small critical value; t (T) _STOP,min Is the minimum threshold for the duration between two falling edges when the preset decoded data is STOP. T (T) _GAP1 The reference decoded data case when the respective parameter threshold ranges fall is shown with reference to fig. 4.

TABLE 2

For a communication protocol in which the coding mode is pulse width modulation, referring to fig. 5, the target duration of the coded signal may be the duration between the falling edge and the adjacent rising edge, i.e., the duration of the low level, denoted as T _GAP2 ，T _GAP2 Matching the parameter threshold range, i.e. T _GAP2 Falls within a parameter threshold range; t (T) _GAP2 When the reference decoding data matches with the threshold range of each parameter, the corresponding reference decoding data can be referred to as shown in table 3; wherein T is _DATA0,min A minimum critical value for a time duration of 0 time for preset decoding data; t (T) _DATA1,min A minimum critical value for a time duration of 1 hour for preset decoding data; t (T) _STOP,min The minimum threshold value of the time duration when the preset decoded data is Error. In this encoding scheme, the decoding circuit cannot decode the STOP data, and the decoding process cannot be terminated by itself, so that the decoding circuit can be controlled externally to terminate decoding.

TABLE 3 Table 3

Parameter threshold range	Referencing decoded data
		T GAP2 <T DATA0,min	Error
T DATA0,min ≤T GAP2 <T DATA1,min	0
		T DATA1,min ≤T GAP2 <T Stop,min	1
T Stop,min ≤T GAP2	Error

For the case where the communication protocol is ISO18000-2B modulation, reference is made to fig. 6. The target duration of the encoded signal may be the duration between the falling edges, denoted T _GAP3 ，T _GAP3 Matching the parameter threshold range, i.e. T _GAP3 Falls within a parameter threshold range; t (T) _GAP3 When the reference decoding data matches with the threshold range of each parameter, the corresponding reference decoding data can be referred to as shown in table 4; wherein T is _DATA0,min The minimum critical value is the preset minimum critical value when the decoded data is 0; t (T) _DATA1,min The minimum critical value is the preset minimum critical value when the decoded data is 1; t (T) _STOP,min Is the minimum threshold value when the preset decoded data is STOP. The downlink in the ISO18000-2B protocol includes three phases: SOF (Start of Frame), CMD and STOP phases, wherein the SOF phase includes 3 data, namely, violaion, data 0 and data 1 in order, and the target decoded data obtained by the threshold matching module 130 is the data obtained by CMD phase decoding, as shown in fig. 7.

TABLE 4 Table 4

Parameter thresholdRange	Referencing decoded data
		T GAP3 <T DATA0,min	Error
T DATA0,min ≤T GAP3 <T DATA1,min	0
		T DATA1,min ≤T GAP3 <T VIO,min	1
T VIO,min ≤T GAP3 <T Stop,min	VIOLATION
		After SOF stage has T Stop,min ≤T GAP3	Stop

For a communication protocol in which the coding scheme is pulse synchronization modulation, reference is made to fig. 8. The PSM code is a code that a base station and an RFID tag need to be synchronized, in a interception stage, the RFID tag needs to repeatedly send a signal pattern according to a certain rule, and after the base station detects the signal pattern, the base station sends a command to a certain modulation position (for example, at a time t1 in the figure) of the signal pattern to be modulated together, so that a Coil signal received by the RFID tag can generate a waveform with 100% amplitude modulation, and at the moment, an interception signal LFD_GAP demodulated by an analog demodulation front end comprises a low-level pulse, wherein the interception signal LFD_GAP is a signal with 100% amplitude demodulation; then the RFID tag automatically turns off the transmitting process and turns on the receiving process, then the base station transmits a 1bit command according to a stipulated time interval (32 carrier periods T0 shown as a signal Coil), the base station modulates 80% of amplitude when transmitting DATA 0, at the moment, the coded signal LFD_DATA corresponds to a low-level pulse which can be demodulated, the base station does not modulate when transmitting the bit 1 command, and the coded signal LFD_DATA keeps high-level output; the decoding circuit decodes after shifting to the receiving process, i.e., at time t 2.

The characteristic parameters can also comprise rising edge detection conditions in the coded signals, wherein the rising edge detection conditions comprise two conditions of detecting rising edges of the coded signals and detecting no rising edges of the coded signals, and in the coding mode, the threshold matching module needs to perform matching judgment by combining the rising edge detection conditions of the coded signals and a parameter threshold range besides the target duration. The target duration of the encoded signal may be the duration of the encoded signal from the high level to the current time after the rising edge is detected, and the duration of the encoded signal from the high level to the current time after the data 1 is received, denoted as T _GAP4 The matching of the characteristic parameter and the parameter threshold range may be that one of the characteristic parameters is matched with the parameter threshold range, i.e. the characteristic parameter falls into the parameter threshold range; when the characteristic parameters are matched with the threshold ranges of the parameters, the corresponding reference decoding data can be referred to as shown in a table 5; when the rising edge of the coding signal LFD_DATA is detected in the current period, the decoded DATA in the current decoding period can be obtained as DATA 0; the time period T from the high level of the encoded signal clocked by the clocking unit 113 to the current time after the LFD_DATA rising edge is detected _GAP4 When the decoding period exceeds 1.5Ts, the decoding data of the current decoding period can be obtained to be 1; the time period T from the high level to the current time of the encoded signal re-clocked by the clocking unit 113 upon receipt of the decoded data 1 _GAP4 When the decoding period exceeds 1Ts, the decoded data of the current decoding period is 1. Where Ts is the decoding period, which may be equal to 32T0, T0 is the carrier period of the signal Coil. In this encoding scheme, the decoding circuit cannot decode the STOP data, and the decoding process cannot be terminated by itself, so that the decoding circuit can be controlled externally to terminate decoding.

TABLE 5

In this way, the multi-protocol decoding circuit of the RFID chip of the present application provides the mapping relationship between the parameter threshold range and the reference decoding data under multiple communication protocols through the configuration register module 120, so that no matter what communication protocol the coding signal is based on, the measurement module 110 can be used to measure the characteristic parameters corresponding to the target communication protocols in the various communication protocols, where the characteristic parameters at least include the target duration of the jump edge in the coding signal, and then the threshold matching module 130 matches the characteristic parameters with the parameter threshold range of the target communication protocol to obtain the target threshold range, and finally obtains the reference decoding data corresponding to the target threshold range based on the mapping relationship, thereby realizing decoding of multiple communication protocols. In addition, the decoding is performed by comparing the characteristic parameters with the mapping relation, so that the decoding mode is simple, and the design requirement on a decoding circuit is low.

In one embodiment, as shown in fig. 9, the measurement module 110 includes a rising edge detection unit 111 and a falling edge detection unit 112, where the rising edge detection unit 111 is configured to detect a rising edge of the encoded signal, to obtain a rising edge signal; the falling edge detection unit 112 is configured to detect a falling edge of the encoded signal, and obtain a falling edge signal; the timing unit 113 is respectively connected to the rising edge detection unit 111, the falling edge detection unit 112, and the threshold matching module 130, and is configured to clock the target edge signal in an enabled state to obtain a target duration; wherein the target edge signal comprises at least one of a rising edge signal and a falling edge signal; when the timing unit 113 is in the enabled state, the measurement module 110 is in the working state.

It will be appreciated that the rising edge detection unit 111 and the falling edge detection unit 112 detect the rising edge and the falling edge of the encoded signal, respectively, to obtain a rising edge signal and a falling edge signal, and the timing unit 113 clocks at least one of the rising edge signal and the falling edge signal according to a desired target period. For the timing of the rising edge signal, the timing unit 113 may clock a trigger pulse in the rising edge signal, which indicates that the rising edge detection unit 111 detects a rising edge of the encoded signal at this time; similarly, for timing of the falling edge signal, the timing unit 113 may clock a trigger pulse in the falling edge signal, which indicates that the falling edge detection unit 112 detects the falling edge of the encoded signal at this time.

For example, for communication protocols such as binary pulse length modulation BPLM, quaternary pulse length modulation QPLM, and the like, the target duration is the duration between two falling edges, and the timing unit 113 may simply perform timing according to the falling edge signal, and uses the duration between two adjacent trigger pulses of the falling edge signal as the target duration T _GAP1 The falling edge detection unit 112 generates a trigger pulse of the falling edge signal when a falling edge is detected; for pwm, the target duration may be a duration between the falling edge and the rising edge, i.e., a duration of a low level, so the timing unit 113 needs to perform timing according to the rising edge signal and the falling edge signal at the same time, and if the trigger pulse of the falling edge signal is received at a previous time and the trigger pulse of the rising edge signal is received at a subsequent time in adjacent times, the duration between the two trigger pulses is taken as the target duration T _GAP2 The trigger pulse of the rising edge signal is generated when the rising edge is detected by the rising edge detection unit 111; for ISO18000-2B, the target time length is the time length between two falling edges, the timing unit 113 may simply count time according to the falling edge signal, and the time length between two adjacent trigger pulses of the falling edge signal is taken as the target time length T _GAP3 The method comprises the steps of carrying out a first treatment on the surface of the For pulse synchronous modulation, the characteristic parameters can comprise rising edge signals and target duration, and the threshold matching module can be further connected with the rising edge detection unit to receive the rising edge signals in the characteristic parameters; the rising edge detection condition can be determined according to the rising edge signal, and if the trigger pulse exists in the rising edge signal, the rising edge detection is indicated; the target time length isWhen detecting the time period from the high level of the encoded signal to the current time after the rising edge, the timing unit 113 may perform timing according to the rising edge signal and the falling edge signal at the same time to receive the trigger pulse of the rising edge, and the time period between the trigger pulses of the falling edge not received is taken as the target time period T _GAP4 The method comprises the steps of carrying out a first treatment on the surface of the When the target time length is the time length from the high level of the encoded signal to the current time after receiving the data 1, the timing unit 113 may perform timing according to the falling edge signal, and when the last time target decoded data is the data 1, the time when the data is 1 is obtained is taken as the starting time, and the time length between the time when the data is 1 and the trigger pulse when the falling edge is not received is taken as the target time length T _GAP4 。

The timing unit 113 may directly set the timing unit 113 to an enabled state only when the timing unit 113 is in the enabled state, and when the non-data decoding stage does not exist in the communication process, for example, the timing unit 113 may directly enter the enabled state under a communication protocol such as binary pulse length modulation BPLM, quaternary pulse length modulation QPLM, and ISO 18000-2B; for a communication protocol in which a non-data decoding phase exists during communication, the timing unit 113 needs to be set to an enabled state only at the time of the data decoding phase, for example, the timing unit 113 needs to start to enter the enabled state at time t2 under the pulse synchronization modulation PSM protocol.

By arranging the rising edge detection unit 111 and the falling edge detection unit 112 to detect the rising edge and the falling edge of the encoded signal respectively, thereby obtaining a rising edge signal and a falling edge signal, the timing unit 113 can directly select at least one of the rising edge signal and the falling edge signal to perform timing according to the requirement, and does not need to determine the rising edge and the falling edge in the encoded signal first, and further performs timing according to the requirement, thereby reducing the complexity of measuring the target duration.

In one embodiment, as shown in fig. 10, the multi-protocol decoding circuit further includes an enable control module 140, where the enable control module 140 is connected to the timing unit 113, and is configured to control the timing unit 113 to enter an enabled state according to an enable control signal.

It is understood that the enabled state of the timing unit 113 may be controlled by the setting enabled control module 140; the enable control signal may be manually input, or may be generated by the decoding circuit when a specific condition is satisfied, and the enable control module 140 may output a driving signal to the timing unit 113 to control the timing unit 113 to enter an enabled state after receiving the enable control signal. Thus, the timing control of the timing unit 113 can be realized, the communication protocol with non-decoding stage is prevented from being decoded by mistake, and the decoding effectiveness of the decoding circuit is improved.

In one embodiment, the enabling control module 140 is further connected to the threshold matching module 130, and is configured to control the timing unit 113 to exit the enabling state if the target decoded data is invalid data.

It can be understood that the obtained target decoding data may be valid data such as data 0 or data 1, and may be directly output to a subsequent processing system; the target decoded data may be invalid data such as Error, VIOLATION, STOP, and in this case, decoding is stopped and checking is performed, so that the enable control module 140 can interrupt decoding when the data is invalid.

In one embodiment, as shown in fig. 10, the rising edge detection unit 111 is further connected to the enable control module 140, and is configured to detect a rising edge of the listening signal, obtain an enable control signal, and output the enable control signal to the enable control module 140; the interception signal is a signal obtained by demodulating the modulation signal by 100% amplitude through the RFID chip.

It will be appreciated that, in the case where the communication protocol is pulse synchronous modulation, since there may be a listening phase, decoding needs to decode the encoded signal after the listening phase, and thus the rising edge of the listening signal may be detected by the rising edge detection unit 111 to obtain the enable control signal rcv_en (shown in fig. 8), and the enable control signal rcv_en starts to jump at the end time of the listening phase, i.e. at time t2, so as to control the timing unit 113 to enter the enable state.

In this way, by detecting whether to enter the data decoding stage of the target communication protocol, the enabling control signal is automatically generated after determining to enter the data decoding stage, so as to control the timing unit 113 to perform timing, without manually determining and controlling, and the automation degree is high.

In one embodiment, as shown in fig. 11, the multi-protocol decoding circuit further includes a decryption module 150, where the decryption module 150 is connected to the threshold matching module 130, and is configured to decrypt the target decoded data if the target decoded data is valid data.

It can be understood that when the base station encodes the data, in order to ensure information security, the base station may encrypt the effective data first and then encode the effective data, so after the decoding circuit obtains the target decoded data, if the target decoded data is the effective data, the target decoded data may not be directly used by a subsequent processing system, so the decryption module 150 may be configured to decrypt the target decoded data, thereby directly obtaining decrypted plaintext data, and being convenient for subsequent direct use.

In one embodiment, as shown in fig. 11, the multi-protocol decoding circuit further includes a buffer register module 160, where the buffer register module 160 is connected to the decryption module 150, and is configured to sequentially store valid data and perform parallel output.

It will be appreciated that the buffer register module 160 may perform parallel output after the stored valid data reaches a certain amount, wherein the amount may be set manually, for example, set to 8 bits, 16 bits, etc.; the buffer register module 160 can realize parallel output of effective data, so that subsequent data processing is easier and more efficient.

In one embodiment, the multi-protocol decoding circuit further includes an interrupt module 170, as shown in fig. 12, where the interrupt module 170 is connected to the threshold matching module 130, and is configured to output a first interrupt signal if the target decoded data is invalid data.

It can be understood that if the target decoded data is invalid data such as Error, VIOLATION, STOP, the interrupt module 170 outputs a first interrupt signal to prompt.

In one embodiment, as shown in fig. 12, the multi-protocol decoding circuit further includes a counting module 180 and an interrupt module 170, where the counting module 180 is connected to the buffer module 160 and is used for counting valid data stored in the buffer module 160; the interrupt module 170 is connected to the count module, and is configured to output a second interrupt signal if the counted number reaches the number threshold.

It is understood that the number threshold may be a maximum number of data that the buffer register module 160 may store, and if the number counted by the count module 180 reaches the number threshold, it indicates that the buffer register module 160 has reached the upper storage limit, and at this time, a second interrupt signal may be output to the external host through the interrupt module 170 for prompting.

In one embodiment, the threshold matching module 130 is further configured to: judging whether the data is in a data decoding stage or not according to the reference decoded data corresponding to the target threshold range; and if the data decoding stage is judged, taking the reference decoded data corresponding to the target threshold range as target decoded data.

It will be appreciated that for the case where the communication protocol is ISO18000-2B modulation, since the CMD phase follows the SOF phase, only the reference decoded data obtained after the SOF phase can be regarded as target decoded data. Since the SOF phase includes 3 data, that is, violaion, data 0, and data 1 in sequence, the threshold matching module 130 may determine whether the SOF phase has been undergone according to whether the three reference decoded data have been sequentially obtained, and if the SOF phase has been undergone, it indicates that the SOF phase has been undergone, and the reference decoded data corresponding to the target threshold range obtained from this point in time may be directly used as the target decoded data. The threshold matching module 130 is used for judging the data decoding stage, so that the accuracy of data decoding is improved.

The embodiment of the present invention further provides a multi-protocol decoding circuit of an RFID chip, which includes a measurement module 110, a configuration registering module 120, a threshold matching module 130, an enabling control module 140, a decryption module 150, a buffer registering module 160, an interrupt module 170, and a counting module 180, where the measurement module 110 includes a rising edge detection unit 111, a falling edge detection unit 112, and a timing unit 113, and connection relationships and working principles of the module units may be referred to the above embodiments and fig. 12, and are not repeated herein.

The foregoing description is only of the preferred embodiments of the present application, and is not intended to limit the scope of the claims, and all equivalent structures or equivalent processes using the descriptions and drawings of the present application, or direct or indirect application in other related technical fields are included in the scope of the claims of the present application.

Claims (10)

1. A multi-protocol decoding circuit of an RFID chip, the multi-protocol decoding circuit comprising:

the measuring module is used for measuring characteristic parameters of the coded signals in a working state; the characteristic parameters correspond to a target communication protocol and at least comprise target duration of a jump edge in the coded signal;

the configuration register module is used for providing mapping relations between parameter threshold ranges and reference decoding data under various communication protocols;

the threshold matching module is respectively connected with the configuration registering module and the measuring module and is used for:

matching the characteristic parameters with the parameter threshold range of the target communication protocol to obtain a target threshold range;

and acquiring reference decoding data corresponding to the target threshold range based on the mapping relation to obtain target decoding data.

2. The multi-protocol decoding circuit of an RFID chip of claim 1, wherein the measurement module comprises:

the rising edge detection unit is used for detecting the rising edge of the coded signal to obtain a rising edge signal;

the falling edge detection unit is used for detecting the falling edge of the coded signal to obtain a falling edge signal;

the timing unit is respectively connected with the rising edge detection unit, the falling edge detection unit and the threshold matching module and is used for timing a target edge signal in an enabling state to obtain the target duration; wherein the target edge signal comprises at least one of the rising edge signal and the falling edge signal; and when the timing unit is in the enabling state, the measuring module is in the working state.

3. The multi-protocol decoding circuit of an RFID chip of claim 2, further comprising:

and the enabling control module is connected with the timing unit and used for controlling the timing unit to enter the enabling state according to an enabling control signal.

4. The multi-protocol decoding circuit of the RFID chip of claim 3, wherein the enable control module is further coupled to the threshold matching module for controlling the timing unit to exit the enabled state if the target decoded data is invalid data.

5. The multi-protocol decoding circuit of the RFID chip according to claim 3, wherein the rising edge detection unit is further connected to the enable control module, and is configured to detect a rising edge of the listening signal, obtain the enable control signal, and output the enable control signal to the enable control module; the interception signal is a signal obtained by demodulating the modulation signal by 100% amplitude through the RFID chip.

6. The multi-protocol decoding circuit of an RFID chip of any one of claims 1-5, further comprising:

and the decryption module is connected with the threshold matching module and is used for decrypting the target decoding data if the target decoding data is valid data.

7. The multi-protocol decoding circuit of an RFID chip of claim 6, further comprising:

and the buffer register module is connected with the decryption module and used for sequentially storing the effective data and outputting the effective data in parallel.

8. The multi-protocol decoding circuit of an RFID chip of claim 1, further comprising:

and the interrupt module is connected with the threshold matching module and is used for outputting a first interrupt signal if the target decoding data is invalid data.

9. The multi-protocol decoding circuit of an RFID chip of claim 7, further comprising:

the counting module is connected with the buffer register module and used for counting the effective data stored in the buffer register module;

and the interrupt module is connected with the counting module and is used for outputting a second interrupt signal if the counted number reaches a number threshold value.

10. The multi-protocol decoding circuit of an RFID chip of claim 1, wherein the threshold matching module is further configured to:

judging whether the data is in a data decoding stage or not according to the reference decoded data corresponding to the target threshold range;

and if the data decoding stage is judged, taking the reference decoded data corresponding to the target threshold range as the target decoded data.