CN117577748A - LED epitaxial wafer, preparation method thereof and LED - Google Patents

LED epitaxial wafer, preparation method thereof and LED Download PDF

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Publication number
CN117577748A
CN117577748A CN202311549761.8A CN202311549761A CN117577748A CN 117577748 A CN117577748 A CN 117577748A CN 202311549761 A CN202311549761 A CN 202311549761A CN 117577748 A CN117577748 A CN 117577748A
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layer
epitaxial wafer
light
emitting diode
silicon substrate
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刘春杨
胡加辉
金从龙
顾伟
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Jiangxi Zhao Chi Semiconductor Co Ltd
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    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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    • H01L33/12Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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Abstract

The invention discloses a light-emitting diode epitaxial wafer, a preparation method thereof and an LED (light-emitting diode), wherein the light-emitting diode epitaxial wafer comprises a silicon substrate, and a niobium nitride nucleation layer, a buffer layer, an N-type semiconductor layer, a multiple quantum well luminescent layer, an electron blocking layer, a P-type semiconductor layer and a P-type contact layer are sequentially arranged on the silicon substrate. The light-emitting diode epitaxial wafer provided by the invention can reduce lattice mismatch between the silicon substrate and the GaN epitaxial layer, reduce dislocation density and improve crystal quality.

Description

LED epitaxial wafer, preparation method thereof and LED
Technical Field
The invention relates to the technical field of photoelectricity, in particular to a light-emitting diode epitaxial wafer, a preparation method thereof and an LED.
Background
GaN materials have been widely used in high frequency, high temperature, high voltage electronic device fields, light Emitting Diodes (LEDs), and semiconductor Lasers (LD), etc., because of their low heat generation efficiency, radiation resistance, high breakdown voltage, high electron saturation drift velocity, and small dielectric constant, and have become a hot spot for current research. With the development of group iii nitride epitaxy technology and the advancement of device fabrication processes, it is necessary and challenging to prepare GaN materials of higher quality with fewer defects in order to meet the requirements of high performance high power GaN-based optoelectronic devices and power electronics devices.
Many technical difficulties are faced in the epitaxial growth process of GaN-based LEDs: (1) electrons easily overflow to the P layer through the quantum well; (2) P-GaN doping is difficult and hole mobility is low; (3) A polarized electric field exists between the well barriers due to lattice mismatch, so that the overlapping rate of electron hole wave functions is reduced; (4) The lattice mismatch and thermal mismatch between the silicon substrate and the epitaxial layer are relatively large, so that the clock defect density of the epitaxial layer becomes high. A commonly used silicon substrate for epitaxial growth of GaN films in this field is sapphire (Al 2 O 3 ) Silicon carbide (SiC) and silicon (Si), in which the epitaxial growth of GaN films on sapphire and SiC silicon substrates is very mature, but the price is expensive, especially SiC is expensive, greatly increasing the production cost, and the heat dissipation effect of sapphire itself is poor, making it difficult to realize large-size epitaxial growth. While the silicon substrate epitaxially grows a GaN film, although the silicon substrate has good thermal conductivity, large-size epitaxy, especially 6-inch, 8-inch and 12-inch epitaxial wafers can be realized, the production cost can be reduced, and the silicon substrate epitaxially grows a GaN epitaxial layer, the lattice mismatch and the thermal mismatch of the GaN epitaxial layer are larger, and the defect density in the GaN epitaxial layer is higher. In order to grow the high-quality low-dislocation-density GaN epitaxial wafer on the silicon substrate, the selection and the growth mode of the material of the nucleation layer are particularly important, and the quality of the nucleation layer determines the quality of the crystal of the subsequent epitaxial layer.
In the existing Si-based GaN LED epitaxial process, low-temperature AlN and high-temperature AlN are generally adopted as a nucleation layer and a buffer layer between a silicon substrate and a GaN epitaxial layer, so as to solve the problem of back melting and etching between the silicon substrate and the GaN epitaxial layer; the low-temperature AlN is used as a nucleation layer, the low-temperature growth makes the AlN surface rough and becomes a nucleation point for growing a subsequent buffer layer, and the low-temperature AlN can release partial stress generated between the silicon substrate and the epitaxial layer due to mismatch by sacrificing the self crystal quality through low-temperature growth, but the rough surface can enable the subsequent epitaxial layer to generate more points, so that dislocation density is increased and the crystal quality of the epitaxial layer is poor. The lattice constant (0.5431 nm) of Si is larger than the difference between GaN (0.3189 nm) and AlN (0.3112 nm), the crystal quality of the GaN epitaxial layer grown on the low-temperature AlN nucleation layer and the high-temperature AlN buffer layer is not high, the AlN serving as the nucleation layer still has larger lattice mismatch, and the nucleation layer with the lattice constant more matched with the silicon substrate and similar structure with GaN needs to be found, so that the dislocation density is further reduced, and the crystal quality of the epitaxial layer is improved.
Disclosure of Invention
The invention aims to solve the technical problem of providing a light-emitting diode epitaxial wafer which can reduce lattice mismatch between a silicon substrate and a GaN epitaxial layer, reduce dislocation density and improve crystal quality.
The invention also aims to provide a preparation method of the light-emitting diode epitaxial wafer, which has simple process and can stably prepare the light-emitting diode epitaxial wafer with good luminous efficiency.
In order to solve the technical problems, the invention provides a light-emitting diode epitaxial wafer which comprises a silicon substrate, wherein a niobium nitride nucleation layer, a buffer layer, an N-type semiconductor layer, a multiple quantum well light-emitting layer, an electron blocking layer, a P-type semiconductor layer and a P-type contact layer are sequentially arranged on the silicon substrate.
In one embodiment, the niobium nitride nucleation layer is prepared by the following method:
and placing the silicon substrate in a PVD system, introducing argon and nitrogen, sputtering the metal niobium as a target material, and growing a niobium nitride nucleation layer through magnetron sputtering.
In one embodiment, the silicon substrate is placed in a PVD system, the growth temperature in the reaction chamber is controlled to 300-600 ℃, the sputtering power is 2000-4000W, and the pressure is 1-10 torr.
In one embodiment, during the process of growing the niobium nitride nucleation layer, the flowing-in flow of the argon and the nitrogen is kept unchanged, and the metal niobium sputtering target is closed every 5-20 seconds.
In one embodiment, the argon gas is introduced at a flow rate of 20sccm to 300sccm;
the flow rate of the nitrogen gas is 10sccm to 40sccm.
In one embodiment, the ratio of the flow rates of argon to nitrogen is (1 to 10): 1.
in one embodiment, after the growth of the niobium nitride nucleation layer is completed, transferring the niobium nitride nucleation layer into MOCVD for annealing treatment under a nitrogen atmosphere;
the annealing time of the annealing treatment is 5-15 min, the annealing temperature is 1000-1100 ℃, and the pressure is 100-500 torr.
In one embodiment, the niobium nitride nucleation layer has a thickness of 5nm to 50nm.
In order to solve the problems, the invention also provides a preparation method of the light-emitting diode epitaxial wafer, which comprises the following steps:
s1, preparing a silicon substrate;
s2, sequentially depositing a niobium nitride nucleation layer, a buffer layer, an N-type semiconductor layer, a multiple quantum well light-emitting layer, an electron blocking layer, a P-type semiconductor layer and a P-type contact layer on the silicon substrate.
Correspondingly, the invention further provides an LED, and the LED comprises the LED epitaxial wafer.
The implementation of the invention has the following beneficial effects:
the invention provides a light-emitting diode epitaxial wafer which comprises a silicon substrate, wherein a niobium nitride nucleation layer, a buffer layer, an N-type semiconductor layer, a multiple quantum well light-emitting layer, an electron blocking layer, a P-type semiconductor layer and a P-type contact layer are sequentially arranged on the silicon substrate. Niobium nitride (NbN) as a material having excellent optical properties, nbN having a lattice constant of 0.445nm, interposed between the lattice constant of Si (0.5431 nm) and the lattice constant of AlN (0.3112 nm); compared with the conventional low-temperature AlN nucleation layer, the NbN serving as the nucleation layer has smaller lattice mismatch degree, can better play a role in buffering transition, and can reduce dislocation generated due to lattice mismatch, so that the crystal quality of epitaxial layer growth is improved; nbN has very low internal stress and excellent adhesion, can be well adhered to Si substrate materials, has a similar crystal structure with AlN and GaN, and has good matching property when AlN or GaN is epitaxially grown on NbN. Further, the inventor finds that the PVD intermittently grows the NbN film, can reduce amorphous NbN production, is beneficial to improving the crystal quality of the NbN film, converts the NbN film into crystals after being subjected to nitrogen annealing in MOCVD, and further improves the crystal quality of the NbN film, thereby improving the crystal quality of a subsequent epitaxial layer.
Drawings
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to the present invention;
fig. 2 is a flowchart of a method for preparing an led epitaxial wafer according to the present invention.
Detailed Description
The present invention will be described in further detail below in order to make the objects, technical solutions and advantages of the present invention more apparent.
Unless otherwise indicated or contradicted, terms or phrases used herein have the following meanings:
in the present invention, "preferred" is merely to describe embodiments or examples that are more effective, and it should be understood that they are not intended to limit the scope of the present invention.
In the invention, the technical characteristics described in an open mode comprise a closed technical scheme composed of the listed characteristics and also comprise an open technical scheme comprising the listed characteristics.
In the present invention, the numerical range is referred to, and both ends of the numerical range are included unless otherwise specified.
In order to solve the above problems, the present invention provides a light emitting diode epitaxial wafer, as shown in fig. 1, comprising a silicon substrate 100, wherein a niobium nitride nucleation layer 200, a buffer layer 300, an N-type semiconductor layer 400, a multiple quantum well light emitting layer 500, an electron blocking layer 600, a P-type semiconductor layer 700, and a P-type contact layer 800 are sequentially disposed on the silicon substrate 100.
Niobium nitride (NbN) as a material having excellent optical properties, nbN having a lattice constant of 0.445nm, interposed between the lattice constant of Si (0.5431 nm) and the lattice constant of AlN (0.3112 nm); compared with the conventional low-temperature AlN nucleation layer, the NbN serving as the nucleation layer has smaller lattice mismatch degree, can better play a role in buffering transition, and can reduce dislocation generated due to lattice mismatch, so that the crystal quality of epitaxial layer growth is improved; nbN has very low internal stress and excellent adhesion, can be well adhered to Si substrate materials, has a similar crystal structure with AlN and GaN, and has good matching property when AlN or GaN is epitaxially grown on NbN.
In one embodiment, the niobium nitride nucleation layer 200 is made using the following method:
the silicon substrate is placed in a PVD system, argon and nitrogen are introduced, the sputtering target is metallic niobium, and the niobium nitride nucleation layer 200 is grown through magnetron sputtering.
In one embodiment, during the process of growing the niobium nitride nucleation layer 200, the flow of argon and nitrogen is kept constant, and the metal niobium sputtering target is closed every 5s to 20 s. Exemplary off-times for the metallic niobium sputtering targets are, but not limited to, 6s, 7s, 8s, 9s, 10s, 11s, 12s, 13s, 14s, 15s, 16s, 17s, 18s, 19 s. The inventors found that when the niobium nitride nucleation layer 200 is grown by magnetron sputtering, the metal niobium sputtering target is intermittently turned on, so that the NbN film can be intermittently grown, thus reducing the generation of amorphous NbN and being beneficial to improving the crystal quality of the NbN film.
In one embodiment, the argon gas is introduced at a flow rate of 20sccm to 300sccm; exemplary flow rates of argon are, but not limited to, 50sccm, 100sccm, 150sccm, 200sccm, 250 sccm; the flow rate of the nitrogen is 10 sccm-40 sccm; exemplary inlet flows of the nitrogen gas are, but not limited to, 15sccm, 20sccm, 25sccm, 30sccm, 35 sccm. In one embodiment, the ratio of the flow rates of argon to nitrogen is (1 to 10): 1. preferably, the ratio of the flow rates of argon to nitrogen is (6-8): 1.
in one embodiment, the silicon substrate is placed in a PVD system, the growth temperature in the reaction chamber is controlled to 300-600 ℃, the sputtering power is 2000-4000W, and the pressure is 1-10 torr. Exemplary growth temperatures are, but are not limited to, 350 ℃, 400 ℃, 450 ℃, 500 ℃, 550 ℃. Exemplary sputtering powers are 2500W, 3000W, 3500W, but are not limited thereto. Exemplary pressures are, but are not limited to, 2torr, 3torr, 4torr, 5torr, 6torr, 7torr, 8torr, 9 torr.
In one embodiment, after the growth of the niobium nitride nucleation layer 200 is completed, the niobium nitride nucleation layer is transferred into MOCVD for annealing treatment under nitrogen atmosphere; the annealing time of the annealing treatment is 5-15 min, the annealing temperature is 1000-1100 ℃, and the annealing pressure is 100-500 torr. Exemplary annealing temperatures are, but are not limited to, 1010 ℃, 1020 ℃, 1030 ℃, 1040 ℃, 1050 ℃, 1060 ℃, 1070 ℃, 1080 ℃, 1090 ℃. Exemplary annealing times are, but are not limited to, 6min, 7min, 8min, 9min, 10min, 11min, 12min, 13min, 14 min. Exemplary annealing pressures are, but are not limited to, 150torr, 200torr, 250torr, 300torr, 350torr, 400torr, 450 torr. The inventor finds that after the niobium nitride nucleation layer 200 is grown and then transferred into MOCVD, after nitrogen annealing, the NbN film can be converted into crystals, and the crystal quality of the NbN film is further improved, so that the crystal quality of the subsequent epitaxial layer is improved.
In one embodiment, the thickness of the niobium nitride nucleation layer 200 is 5nm to 50nm. Exemplary thicknesses of the niobium nitride nucleation layer 200 are 10nm, 15nm, 20nm, 25nm, 30nm, 35nm, 40nm, 45nm, but are not limited thereto.
Correspondingly, the invention provides a preparation method of the light-emitting diode epitaxial wafer, as shown in fig. 2, comprising the following steps:
s1, preparing a silicon substrate 100;
s2, sequentially depositing a niobium nitride nucleation layer 200, a buffer layer 300, an N-type semiconductor layer 400, a multiple quantum well light emitting layer 500, an electron blocking layer 600, a P-type semiconductor layer 700 and a P-type contact layer 800 on the silicon substrate 100.
In one embodiment, the buffer layer 300 is formed by the following method:
the temperature of the reaction chamber is controlled at 1000-1200 ℃, the pressure is controlled at 30-70 torr, an N source and an Al source are introduced, and an AlN buffer layer with the thickness of 100-300 nm is grown.
In one embodiment, an undoped GaN layer is interposed between the buffer layer 300 and the N-type semiconductor layer 400, and the undoped GaN layer is prepared by the following method:
the temperature of the reaction chamber is controlled at 1000-1200 ℃, the pressure is controlled at 100-200 torr, an N source and a Ga source are introduced, and an undoped GaN layer with the thickness of 1-3 μm is grown.
In one embodiment, the N-type semiconductor layer 400 is manufactured by the following method:
the temperature of the reaction chamber is controlled at 1000-1200 ℃, the pressure is controlled at 100-200 torr, an N source, a Ga source and a Si source are introduced, and an N-type semiconductor layer with the thickness of 1-3 μm is grown.
In one embodiment, the multiple quantum well light emitting layer 500 is fabricated using the following method:
the multi-quantum well light-emitting layer consists of 5-12 periods of InGaN/GaN, wherein InGaN is a well layer and GaN is a barrier layer.
Controlling the temperature of the reaction chamber at 800-900 ℃ and the pressure at 100-200 torr, introducing an N source, a Ga source and an In source, and growing an InGaN layer;
controlling the temperature of the reaction chamber at 900-1000 ℃ and the pressure at 100-200 torr, introducing an N source and a Ga source, and growing a GaN layer;
and alternately growing the InGaN layer and the GaN layer to obtain the multi-quantum well light-emitting layer.
In one embodiment, the electron blocking layer 600 is formed by the following method:
the temperature of the reaction chamber is controlled at 950-1100 ℃, the pressure is controlled at 50-100 torr, an N source, a Ga source and an Al source are introduced, and an AlGaN electron blocking layer with the thickness of 20-50 nm is grown.
In one embodiment, the P-type semiconductor layer 700 is formed by the following method:
the temperature of the reaction chamber is controlled at 950-1050 ℃, the pressure is controlled at 100-600 torr, an N source, a Ga source and an Mg source are introduced, and a P-type semiconductor layer with the thickness of 30-200 nm is grown.
In one embodiment, the P-type contact layer 800 is formed by the following method:
the temperature of the reaction chamber is controlled at 1000-1100 ℃, the pressure is controlled at 100-300 torr, an N source, a Ga source and an Mg source are introduced, and a P-type GaN contact layer with the thickness of 10-50 nm is grown.
Correspondingly, the invention further provides an LED, and the LED comprises the LED epitaxial wafer. The photoelectric efficiency of the LED is effectively improved, and other items have good electrical properties.
The invention is further illustrated by the following examples:
example 1
The embodiment provides a light-emitting diode epitaxial wafer, which comprises a silicon substrate, wherein a niobium nitride nucleation layer, a buffer layer, an N-type semiconductor layer, a multi-quantum well light-emitting layer, an electron blocking layer, a P-type semiconductor layer and a P-type contact layer are sequentially arranged on the silicon substrate.
The niobium nitride nucleation layer is prepared by the following method:
and placing the silicon substrate in a PVD system, introducing argon and nitrogen, sputtering the metal niobium as a target material, and growing a niobium nitride nucleation layer through magnetron sputtering.
In the growth process of the niobium nitride nucleation layer, the growth temperature in the reaction chamber is controlled to be 300 ℃, the pressure is 5torr, the inflow rate of argon and nitrogen is kept unchanged, the metal niobium sputtering target is closed once every 5 seconds, and the ratio of the inflow rate of the argon to the nitrogen is 3:1.
transferring the niobium nitride nucleation layer into MOCVD after the growth of the niobium nitride nucleation layer is completed, and carrying out annealing treatment in nitrogen atmosphere; the annealing time of the annealing treatment is 10min, the annealing temperature is 1050 ℃, and the pressure is 300torr.
The thickness of the niobium nitride nucleation layer is 10nm.
Example 2
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that: the growth temperature in the reaction chamber was controlled to 400℃and the rest was the same as in example 1.
Example 3
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that: the growth temperature in the reaction chamber was controlled to 500℃and the rest was the same as in example 1.
Example 4
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that: the growth temperature in the reaction chamber was controlled to 600℃and the rest was the same as in example 1.
Example 5
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that: the thickness of the niobium nitride nucleation layer was 15nm, the remainder being the same as in example 1.
Example 6
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that: the thickness of the niobium nitride nucleation layer was 20nm, the remainder being the same as in example 1.
Example 7
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that: the thickness of the niobium nitride nucleation layer was 25nm, the remainder being the same as in example 1.
Example 8
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that: the ratio of the inflow rates of the argon and the nitrogen is 5:1, the remainder being the same as in example 1.
Example 9
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that: the ratio of the inflow rates of the argon and the nitrogen is 7:1, the remainder being the same as in example 1.
Example 10
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that: the ratio of the inflow rates of the argon and the nitrogen is 9:1, the remainder being the same as in example 1.
Example 11
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that: the metallic niobium sputtering target was turned off once every 10s intervals, and the rest was the same as in example 1.
Example 12
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that: the metallic niobium sputtering target was turned off once every 15s, the remainder being the same as in example 1.
Example 13
The present embodiment provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that: the metallic niobium sputtering target was turned off once every 20s, the remainder being the same as in example 1.
Comparative example 1
The comparative example provides a light-emitting diode epitaxial wafer, which comprises a silicon substrate, wherein an AlN nucleation layer, a buffer layer, an N-type semiconductor layer, a multiple quantum well light-emitting layer, an electron blocking layer, a P-type semiconductor layer and a P-type contact layer are sequentially arranged on the silicon substrate.
The AlN nucleation layer has a growth temperature of 800 ℃, a growth pressure of 50torr and a thickness of 20nm.
The light emitting diode epitaxial wafers prepared in examples 1to 13 and comparative example 1 were prepared into 10mil×25mil chips using the same chip process conditions, 300 LED chips were extracted, and each performance was tested at 120mA current, and specific test results are shown in table 1.
Table 1 results of Performance test of LEDs prepared in examples 1to 13 and comparative example 1
From the above results, the light emitting diode epitaxial wafer provided by the invention comprises a silicon substrate, wherein a niobium nitride nucleation layer, a buffer layer, an N-type semiconductor layer, a multiple quantum well light emitting layer, an electron blocking layer, a P-type semiconductor layer and a P-type contact layer are sequentially arranged on the silicon substrate. The design of the structure is beneficial to reducing lattice mismatch between the silicon substrate and the GaN epitaxial layer, reducing dislocation density and improving crystal quality.
While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that changes and modifications may be made without departing from the principles of the invention, such changes and modifications are also intended to be within the scope of the invention.

Claims (10)

1. The light-emitting diode epitaxial wafer is characterized by comprising a silicon substrate, wherein a niobium nitride nucleation layer, a buffer layer, an N-type semiconductor layer, a multiple quantum well light-emitting layer, an electron blocking layer, a P-type semiconductor layer and a P-type contact layer are sequentially arranged on the silicon substrate.
2. The light-emitting diode epitaxial wafer of claim 1, wherein the niobium nitride nucleation layer is prepared by:
and placing the silicon substrate in a PVD system, introducing argon and nitrogen, sputtering the metal niobium as a target material, and growing a niobium nitride nucleation layer through magnetron sputtering.
3. The led epitaxial wafer of claim 2, wherein the silicon substrate is placed in a PVD system, the growth temperature in the reaction chamber is controlled to 300 ℃ to 600 ℃, the sputtering power is 2000W to 4000W, and the pressure is 1torr to 10torr.
4. The led epitaxial wafer of claim 2, wherein the flow of argon and nitrogen is maintained during the growth of the niobium nitride nucleation layer, and the metal niobium sputtering target is turned off every 5s to 20 s.
5. The light-emitting diode epitaxial wafer of claim 2, wherein the argon gas is introduced at a flow rate of 20sccm to 300sccm;
the flow rate of the nitrogen gas is 10sccm to 40sccm.
6. The light-emitting diode epitaxial wafer according to claim 2, wherein the ratio of the flow rates of argon to nitrogen is (1-10): 1.
7. the light-emitting diode epitaxial wafer according to claim 1, wherein after the niobium nitride nucleation layer is grown, the wafer is transferred into MOCVD and annealed in a nitrogen atmosphere;
the annealing time of the annealing treatment is 5-15 min, the annealing temperature is 1000-1100 ℃, and the pressure is 100-500 torr.
8. The light-emitting diode epitaxial wafer of claim 1, wherein the niobium nitride nucleation layer has a thickness of 5nm to 50nm.
9. A method for preparing the light-emitting diode epitaxial wafer according to any one of claims 1to 8, comprising the steps of:
s1, preparing a silicon substrate;
s2, sequentially depositing a niobium nitride nucleation layer, a buffer layer, an N-type semiconductor layer, a multiple quantum well light-emitting layer, an electron blocking layer, a P-type semiconductor layer and a P-type contact layer on the silicon substrate.
10. An LED, characterized in that the LED comprises a light emitting diode epitaxial wafer according to any one of claims 1to 8.
CN202311549761.8A 2023-11-20 2023-11-20 LED epitaxial wafer, preparation method thereof and LED Pending CN117577748A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117832347A (en) * 2024-03-04 2024-04-05 江西兆驰半导体有限公司 Micro-LED epitaxial wafer, preparation method thereof and LED chip

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117832347A (en) * 2024-03-04 2024-04-05 江西兆驰半导体有限公司 Micro-LED epitaxial wafer, preparation method thereof and LED chip
CN117832347B (en) * 2024-03-04 2024-05-14 江西兆驰半导体有限公司 Micro-LED epitaxial wafer, preparation method thereof and LED chip

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