CN117456888A - Pixel circuit and display panel - Google Patents
Pixel circuit and display panel Download PDFInfo
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- CN117456888A CN117456888A CN202310538640.7A CN202310538640A CN117456888A CN 117456888 A CN117456888 A CN 117456888A CN 202310538640 A CN202310538640 A CN 202310538640A CN 117456888 A CN117456888 A CN 117456888A
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- 239000003990 capacitor Substances 0.000 claims abstract description 15
- 239000010409 thin film Substances 0.000 claims description 9
- 229910044991 metal oxide Inorganic materials 0.000 claims description 3
- 150000004706 metal oxides Chemical class 0.000 claims description 3
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000002096 quantum dot Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The application discloses pixel circuit and display panel, this pixel circuit includes drive transistor, light emitting device, storage capacitor, initializing transistor and multiplexing transistor, through the grid of initializing transistor, the grid of multiplexing transistor sharing same scanning line, not only can initialize light emitting device's positive pole potential, drive transistor's grid potential, still reduced the required scanning line quantity of pixel circuit, this complexity and occupation space that has reduced pixel circuit.
Description
Technical Field
The application relates to the technical field of display, in particular to a pixel circuit and a display panel.
Background
Each pixel circuit in the display panel comprises a driving transistor, a light emitting device and at least one switching transistor, wherein the driving transistor is mainly used for controlling the light emitting current flowing through the light emitting device, and the at least one switching transistor is mainly used for configuring the gate-source voltage of the driving transistor.
However, in order to configure the potential of the key node in the pixel circuit, the conventional technical scheme needs to be implemented by adopting a plurality of scan lines and/or more transistors, which increases the complexity and the occupied space of the pixel circuit.
Disclosure of Invention
The application provides a pixel circuit and a display panel, so as to alleviate the technical problem that more scanning lines are needed.
In a first aspect, the present application provides a pixel circuit, the pixel circuit including a driving transistor, a light emitting device, a storage capacitor, an initialization transistor, and a multiplexing transistor, one of source/drain electrodes of the driving transistor being electrically connected to a positive power supply line; the anode of the light-emitting device is electrically connected with the other of the source electrode and the drain electrode of the driving transistor, and the cathode of the light-emitting device is connected with a negative power line; one end of the storage capacitor is electrically connected with the grid electrode of the driving transistor, and the other end of the storage capacitor is electrically connected with the anode of the light-emitting device; one of the source electrode and the drain electrode of the initializing transistor is electrically connected with a reference voltage line or a positive power line, the other of the source electrode and the drain electrode of the initializing transistor is electrically connected with the grid electrode of the driving transistor, and the grid electrode of the initializing transistor is electrically connected with the scanning line; one of the source electrode and the drain electrode of the multiplexing transistor is electrically connected with the data line, the other of the source electrode and the drain electrode of the multiplexing transistor is electrically connected with the anode of the light emitting device, and the grid electrode of the multiplexing transistor is electrically connected with the scanning line.
In some embodiments, the pixel circuit further includes a first light emission control transistor and a second light emission control transistor, one of source/drain electrodes of the first light emission control transistor is electrically connected to the positive power line, the other of source/drain electrodes of the first light emission control transistor is electrically connected to one of source/drain electrodes of the driving transistor, and a gate electrode of the first light emission control transistor is electrically connected to the light emission control line; one of the source/drain electrodes of the second light-emitting control transistor is electrically connected with the other of the source/drain electrodes of the driving transistor, the other of the source/drain electrodes of the second light-emitting control transistor is electrically connected with the anode of the light-emitting device, and the grid electrode of the second light-emitting control transistor is electrically connected with the light-emitting control line.
In some embodiments, the pixel circuit further includes a first compensation transistor and a second compensation transistor, one of the source/drain electrodes of the first compensation transistor is electrically connected to the negative power line, the other of the source/drain electrodes of the first compensation transistor is electrically connected to the other of the source/drain electrodes of the driving transistor, and the gate electrode of the first compensation transistor is electrically connected to the sense control line; one of the source/drain electrodes of the second compensation transistor is electrically connected with one of the source/drain electrodes of the driving transistor, the other of the source/drain electrodes of the second compensation transistor is electrically connected with the grid electrode of the driving transistor, and the grid electrode of the second compensation transistor is electrically connected with the sensing control line.
In some embodiments, the driving transistor, the initializing transistor, the multiplexing transistor, the first light emission control transistor, the second light emission control transistor, the first compensation transistor, and the second compensation transistor are metal oxide thin film transistors having the same channel type.
In some embodiments, the working process of the pixel circuit in one frame includes an initialization phase, a writing phase, a compensation phase and a light-emitting phase which are sequentially performed; wherein, the initialization transistor and the multiplexing transistor are in a conducting state at least a part of the time in the initialization stage.
In some of these embodiments, the initialization transistor, the multiplexing transistor, are in an on state at least part of the time in the write phase.
In some embodiments, the first compensation transistor and the second compensation transistor are in an on state during the compensation phase.
In some of these embodiments, the first light emission control transistor, the second light emission control transistor are in an off state in the initialization phase, the writing phase, and the compensation phase, and are in an on state in the light emission phase.
In some embodiments, the scan lines are used to transmit scan signals, which have at least one pulse in each of the initialization phase and the write phase.
In a second aspect, the present application provides a display panel, which includes a plurality of pixel circuits in at least one embodiment, wherein the plurality of pixel circuits synchronously initialize a gate potential of a driving transistor and an anode potential of a light emitting device in an initialization phase, write corresponding data signals row by row in a writing phase, synchronously compensate the gate potential of the driving transistor in a compensation phase, and simultaneously emit light in a light emitting phase.
According to the pixel circuit and the display panel, the grid electrode of the initializing transistor and the grid electrode of the multiplexing transistor share the same scanning line, so that the anode potential of the light emitting device and the grid electrode potential of the driving transistor can be initialized, the number of scanning lines required by the pixel circuit is reduced, and the complexity and the occupied space of the pixel circuit are reduced.
In addition, the data line not only can initialize the anode potential of the light emitting device through the multiplexing transistor, but also can charge the pixel circuit, and can play a double role as one transistor, so that the number of transistors in the pixel circuit is reduced, and the complexity and the occupied space of the pixel circuit are further reduced.
Drawings
Technical solutions and other advantageous effects of the present application will be made apparent from the following detailed description of specific embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present application.
Fig. 2 is a timing diagram of the pixel circuit shown in fig. 1.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
The present embodiment provides a pixel circuit, as shown in fig. 1, which includes a driving transistor T1, a light emitting device D1, and a storage capacitor C1, wherein one of the source/drain electrodes of the driving transistor T1 is electrically connected to a positive power line; the anode of the light emitting device D1 is electrically connected with the other of the source electrode and the drain electrode of the driving transistor T1, and the cathode of the light emitting device D1 is connected with a negative power line; one end of the storage capacitor C1 is electrically connected to the gate of the driving transistor T1, and the other end of the storage capacitor C1 is electrically connected to the anode of the light emitting device D1.
The light emitting device D1 may be one of an organic light emitting diode, a micro light emitting diode, a mini light emitting diode, or a quantum dot light emitting diode. The electrical connection in the present application is understood to be a connection form in which electrical signals can be transmitted between different components in the circuit configuration through electrical components such as wires or other components.
In one embodiment, in view of the above-mentioned technical problem that the pixel circuit needs more scan lines, the pixel circuit further includes an initialization transistor T7 and a multiplexing transistor T4, wherein one of the source/drain of the initialization transistor T7 is electrically connected to the reference voltage line or the positive power line, the other of the source/drain of the initialization transistor T7 is electrically connected to the gate of the driving transistor T1, and the gate of the initialization transistor T7 is electrically connected to the scan line; one of the source/drain electrodes of the multiplexing transistor T4 is electrically connected to the data line, the other of the source/drain electrodes of the multiplexing transistor T4 is electrically connected to the anode of the light emitting device D1, and the gate electrode of the multiplexing transistor T4 is electrically connected to the scan line.
It can be appreciated that the pixel circuit provided in this embodiment not only can initialize the anode potential of the light emitting device D1 and the gate potential of the driving transistor T1, but also can reduce the number of scan lines required by the pixel circuit by sharing the same scan line with the gate of the initializing transistor T7 and the gate of the multiplexing transistor T4, which reduces the complexity and the occupied space of the pixel circuit.
In addition, the data line not only can initialize the anode potential of the light emitting device D1 through the multiplexing transistor T4, but also can charge the pixel circuit, and can play a dual role as one transistor, which reduces the number of transistors used in the pixel circuit, and further reduces the complexity and the occupied space of the pixel circuit.
In one embodiment, the pixel circuit further includes a first light emitting control transistor T5 and a second light emitting control transistor T6, wherein one of the source/drain electrodes of the first light emitting control transistor T5 is electrically connected to the positive power line, the other of the source/drain electrodes of the first light emitting control transistor T5 is electrically connected to one of the source/drain electrodes of the driving transistor T1, and the gate electrode of the first light emitting control transistor T5 is electrically connected to the light emitting control line; one of the source/drain electrodes of the second light emission control transistor T6 is electrically connected to the other of the source/drain electrodes of the driving transistor T1, the other of the source/drain electrodes of the second light emission control transistor T6 is electrically connected to the anode of the light emitting device D1, and the gate electrode of the second light emission control transistor T6 is electrically connected to the light emission control line.
In this embodiment, the gate of the first light emitting control transistor T5 and the gate of the second light emitting control transistor T6 may share the same light emitting control line, so that the number of signal lines required by the pixel circuit is further reduced, the complexity and the occupied space of the pixel circuit can be further reduced, and the aperture ratio of the display panel is improved.
In one embodiment, the pixel circuit further includes a first compensation transistor T3 and a second compensation transistor T2, wherein one of the source/drain electrodes of the first compensation transistor T3 is electrically connected to the negative power line, the other of the source/drain electrodes of the first compensation transistor T3 is electrically connected to the other of the source/drain electrodes of the driving transistor T1, and the gate electrode of the first compensation transistor T3 is electrically connected to the sensing control line; one of the source/drain electrodes of the second compensation transistor T2 is electrically connected to one of the source/drain electrodes of the driving transistor T1, the other of the source/drain electrodes of the second compensation transistor T2 is electrically connected to the gate electrode of the driving transistor T1, and the gate electrode of the second compensation transistor T2 is electrically connected to the sense control line.
It should be noted that, in this embodiment, the gate of the first compensation transistor T3 and the gate of the second compensation transistor T2 may share the same sensing control line, so as to further reduce the number of signal lines required by the pixel circuit, further reduce the complexity and the occupied space of the pixel circuit, and improve the aperture ratio of the display panel.
In one embodiment, the driving transistor T1, the initializing transistor T7, the multiplexing transistor T4, the first light emitting control transistor T5, the second light emitting control transistor T6, the first compensation transistor T3, and the second compensation transistor T2 are thin film transistors having the same channel type, for example, may be metal oxide thin film transistors, and in particular, may be indium gallium zinc oxide thin film transistors; alternatively, the thin film transistor may be a polysilicon thin film transistor, and specifically, a low-temperature polysilicon thin film transistor. In other embodiments, the specific type of each thin film transistor may also be not limited in the present application.
The positive power line is used for transmitting a power positive signal VDD, the negative power line is used for transmitting a power negative signal VSS, and the potential of the power positive signal VDD is higher than that of the power negative signal VSS. The scan line is used for transmitting a scan signal Gn. The Data line is used for transmitting a Data signal Data. The emission control line is used for transmitting an emission control signal EM. The sensing control line is used for transmitting a sensing control signal Sense. The reference voltage line is used for transmitting the reference voltage signal Vref.
In one embodiment, as shown in fig. 2, the operation of the pixel circuit in one frame includes the following stages sequentially performed:
initialization stage S10: the light emitting control signal EM and the sensing control signal Sense are at low potential, and the first light emitting control transistor T5, the second light emitting control transistor T6, the first compensation transistor T3 and the second compensation transistor T2 are all in an off state or an off state; the scan signals G1 to Gn transmitted in all scan lines in the display panel have one pulse at the same time, and the initializing transistor T7 and the multiplexing transistor T4 in each pixel circuit are turned on or turned on at the same time, and at this time, the potential of the Data signal Data is a fixed initializing potential, and the gate potential of the driving transistor T1 and the anode potential of the light emitting device D1 in all pixel circuits are initialized by the initializing transistor T7 and the multiplexing transistor T4, respectively.
Writing stage S20: the light emitting control signal EM and the sensing control signal Sense are at low potential, and the first light emitting control transistor T5, the second light emitting control transistor T6, the first compensation transistor T3 and the second compensation transistor T2 are all in an off state or an off state; each scanning line starts to transmit the scanning signals G1 to Gn line by line, that is, the scanning signals G1 to Gn sequentially have one pulse, the initializing transistor T7 and the multiplexing transistor T4 in each pixel circuit are turned on or turned on line by line in a line unit, the pulse amplitude Vdata of the Data signal Data is written into the anode of each line of the light emitting device D1, and the anode of the light emitting device D1 is simultaneously connected with the storage capacitor C1 and the equivalent capacitor of the light emitting device D1, so that the pulse amplitude Vdata of the Data signal Data can be stably stored in the equivalent capacitor; it should be noted that, the pulse amplitude Vdata of the Data signal Data is smaller than the turn-on voltage of the light emitting device D1; meanwhile, the potential of the power positive signal VDD or the reference voltage signal Vref is written to the gate of the driving transistor T1 through the initializing transistor T7.
Compensation stage S30: the scan signal G1 to the scan signal Gn and the emission control signal EM are all at low potential, the Sense control signal Sense is at high potential, the initialization transistor T7, the multiplexing transistor T4, the first emission control transistor T5 and the second emission control transistor T6 are all at off state or off state, the first compensation transistor T3 and the second compensation transistor T2 are all at on state or on state, the gate of the driving transistor T1 is connected with the drain of the driving transistor T1 and forms a diode with the source of the driving transistor T1, and by the end of this stage, the gate potential of the driving transistor T1 is changed from the potential of the power positive signal VDD or the reference voltage signal Vref to the sum of the potential (VSS) of the power negative signal VSS and the threshold voltage (Vth) of the driving transistor T1, that is +vth, and since the gate voltage of the second emission control transistor T6 is very high, the source voltage of the second emission control transistor T6 is substantially consistent with the drain voltage of the second emission control transistor T6, that is, the voltage of the storage capacitor C1 is consistent with the voltage of both ends of the driving transistor T1 and the voltage of the source voltage +vtc 1 is also consistent with the voltage difference between both ends of the driving transistor and the source voltage +vtc 1.
Light-emitting stage S40: the scanning signals G1 to Gn and the sensing control signal Sense are all in low potential, the light-emitting control signal EM is in high potential, the initialization transistor T7, the multiplexing transistor T4, the first compensation transistor T3 and the second compensation transistor T2 are all in an off state or an off state, and the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are all in an on state or an on state; due to the storage capacitor C1, the voltage difference Vgs between the gate and the source of the driving transistor T1 is always vss+vth-Vdata, and at this time, the light emitting current i=k (Vgs-Vth) ≡2=k (VSS-Vdata) ≡2 flowing through the driving transistor T1, where K is a constant. It can be seen that the light emitting current I is irrelevant to the threshold voltage (Vth) of the driving transistor T1 at this time, thereby realizing the compensation function of the driving transistor T1 in each pixel circuit, improving the light emitting uniformity of each pixel circuit, and further improving the display effect of the display product.
As is clear from the above description, the initializing transistor T7 and the multiplexing transistor T4 are in the on state at least for a part of the time in the initializing stage, and can correspond to the gate potential of the driving transistor T1 and the anode potential of the light emitting device D1, respectively.
In one embodiment, the initializing transistor T7 and the multiplexing transistor T4 are in an on state at least a part of the time in the writing phase, so that the gate potential of the driving transistor T1 can be initialized again in the writing phase, and the Data signal Data is written to one end of the storage capacitor C1 and/or the anode of the light emitting device D1.
In one embodiment, the first compensation transistor T3 and the second compensation transistor T2 are in a conducting state in the compensation phase, so that the structure of the driving transistor T1 can be changed to be a diode to perform potential compensation on the gate of the driving transistor T1.
In one embodiment, the first and second light emission control transistors T5 and T6 are in an off state in the initialization phase, the writing phase and the compensation phase, and are in an on state in the light emission phase. This makes it possible to form a desired conduction path to reset the potential of the corresponding node in the pixel circuit in the non-light-emitting period, and to constitute a light-emitting loop in the light-emitting period to allow a light-emitting current to flow through the light-emitting device D1.
In one embodiment, the scan signal has at least one pulse in each of the initialization phase and the write phase. Each pulse of the scan signal corresponds to one turn-on of the initialization transistor T7 and the multiplexing transistor T4.
In one embodiment, the present embodiment provides a display panel, which includes a plurality of pixel circuits in at least one embodiment, wherein the plurality of pixel circuits synchronously initialize the gate potential of the driving transistor T1 and the anode potential of the light emitting device D1 in an initialization phase, write corresponding Data signals Data row by row in a writing phase, synchronously compensate the gate potential of the driving transistor T1 in a compensation phase, and simultaneously in a light emitting phase.
It can be appreciated that, in the display panel provided in this embodiment, the gate of the initializing transistor T7 and the gate of the multiplexing transistor T4 share the same scan line, so that the anode potential of the light emitting device D1 and the gate potential of the driving transistor T1 can be initialized, and the number of scan lines required by the pixel circuit is reduced, which reduces the complexity and the occupied space of the pixel circuit.
In addition, the data line not only can initialize the anode potential of the light emitting device D1 through the multiplexing transistor T4, but also can charge the pixel circuit, and can play a dual role as one transistor, which reduces the number of transistors used in the pixel circuit, and further reduces the complexity and the occupied space of the pixel circuit.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.
The pixel circuit and the display panel provided by the embodiments of the present application are described in detail, and specific examples are applied to illustrate the principles and the implementation of the present application, and the description of the above embodiments is only used to help understand the technical solution and the core idea of the present application; those of ordinary skill in the art will appreciate that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.
Claims (10)
1. A pixel circuit, comprising:
a driving transistor, one of source/drain electrodes of which is electrically connected with a positive power line;
a light emitting device having an anode electrically connected to the other of the source/drain electrodes of the driving transistor and a cathode connected to a negative power line;
one end of the storage capacitor is electrically connected with the grid electrode of the driving transistor, and the other end of the storage capacitor is electrically connected with the anode of the light-emitting device;
an initializing transistor, wherein one of a source electrode and a drain electrode of the initializing transistor is electrically connected with a reference voltage line or the positive power line, the other of the source electrode and the drain electrode of the initializing transistor is electrically connected with a gate electrode of the driving transistor, and the gate electrode of the initializing transistor is electrically connected with a scanning line; and
and one of the source electrode and the drain electrode of the multiplexing transistor is electrically connected with the data line, the other of the source electrode and the drain electrode of the multiplexing transistor is electrically connected with the anode of the light emitting device, and the grid electrode of the multiplexing transistor is electrically connected with the scanning line.
2. The pixel circuit of claim 1, wherein the pixel circuit further comprises:
a first light emitting control transistor, one of source/drain electrodes of the first light emitting control transistor is electrically connected with the positive power line, the other of source/drain electrodes of the first light emitting control transistor is electrically connected with one of source/drain electrodes of the driving transistor, and a grid electrode of the first light emitting control transistor is electrically connected with the light emitting control line; and
and one of the source electrode and the drain electrode of the second light-emitting control transistor is electrically connected with the other of the source electrode and the drain electrode of the driving transistor, the other of the source electrode and the drain electrode of the second light-emitting control transistor is electrically connected with the anode of the light-emitting device, and the grid electrode of the second light-emitting control transistor is electrically connected with the light-emitting control line.
3. The pixel circuit of claim 2, wherein the pixel circuit further comprises:
a first compensation transistor, one of the source/drain electrodes of the first compensation transistor is electrically connected with the negative power line, the other of the source/drain electrodes of the first compensation transistor is electrically connected with the other of the source/drain electrodes of the driving transistor, and the grid electrode of the first compensation transistor is electrically connected with the sensing control line; and
and one of the source/drain electrodes of the second compensation transistor is electrically connected with one of the source/drain electrodes of the driving transistor, the other of the source/drain electrodes of the second compensation transistor is electrically connected with the grid electrode of the driving transistor, and the grid electrode of the second compensation transistor is electrically connected with the sensing control line.
4. The pixel circuit according to claim 3, wherein the driving transistor, the initializing transistor, the multiplexing transistor, the first light emission control transistor, the second light emission control transistor, the first compensation transistor, and the second compensation transistor are metal oxide thin film transistors having the same channel type.
5. A pixel circuit according to claim 3, wherein the operation of the pixel circuit in a frame comprises an initialization phase, a writing phase, a compensation phase and a light-emitting phase, which are performed sequentially;
wherein the initialization transistor and the multiplexing transistor are in a conducting state at least for part of the time in the initialization stage.
6. The pixel circuit of claim 5, wherein the initialization transistor, the multiplexing transistor are in an on state at least a portion of the time in the write phase.
7. The pixel circuit of claim 6, wherein the first compensation transistor and the second compensation transistor are in an on state during the compensation phase.
8. The pixel circuit according to claim 7, wherein the first light emission control transistor, the second light emission control transistor are in an off state in the initialization phase, the writing phase, and the compensation phase, and are in an on state in the light emission phase.
9. A pixel circuit according to any one of claims 1 to 8, wherein the scan lines are adapted to transmit scan signals having at least one pulse in each of the initialization phase and the write phase.
10. A display panel comprising a plurality of pixel circuits according to any one of claims 1 to 9, wherein the data lines are for transmitting data signals;
the pixel circuits synchronously initialize the gate potential of the driving transistor and the anode potential of the light emitting device in an initialization stage, write the corresponding data signals row by row in a writing stage, synchronously compensate the gate potential of the driving transistor in a compensation stage, and simultaneously emit light in a light emitting stage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310538640.7A CN117456888A (en) | 2023-05-12 | 2023-05-12 | Pixel circuit and display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310538640.7A CN117456888A (en) | 2023-05-12 | 2023-05-12 | Pixel circuit and display panel |
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| Publication Number | Publication Date |
|---|---|
| CN117456888A true CN117456888A (en) | 2024-01-26 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202310538640.7A Pending CN117456888A (en) | 2023-05-12 | 2023-05-12 | Pixel circuit and display panel |
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| CN (1) | CN117456888A (en) |
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- 2023-05-12 CN CN202310538640.7A patent/CN117456888A/en active Pending
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