CN112908246A - Pixel circuit, driving method thereof and display panel - Google Patents
Pixel circuit, driving method thereof and display panel Download PDFInfo
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- CN112908246A CN112908246A CN202110209333.5A CN202110209333A CN112908246A CN 112908246 A CN112908246 A CN 112908246A CN 202110209333 A CN202110209333 A CN 202110209333A CN 112908246 A CN112908246 A CN 112908246A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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Abstract
The invention discloses a pixel circuit, a driving method thereof and a display panel. The pixel circuit includes: a drive transistor; the first initialization module comprises a control end, a first end and a second end; the control end of the first initialization module is connected with a first initialization control signal, the first end of the first initialization module is connected with a first initialization voltage signal, and the second end of the first initialization module is electrically connected with the grid electrode of the driving transistor; the first initialization module is used for initializing the grid electrode of the driving transistor; the second initialization module comprises a first transistor, wherein the first pole of the first transistor is connected with a second initialization control signal, the second pole of the first transistor is electrically connected with the first pole of the driving transistor, and the grid electrode of the first transistor is electrically connected with the first pole or the second pole of the first transistor; the second initialization control signal is used for initializing the first pole of the driving transistor. Compared with the prior art, the embodiment of the invention improves the problem of residual shadows and improves the display effect of the display panel.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a pixel circuit, a driving method thereof and a display panel.
Background
With the continuous development of display technology, the application range of display panels is wider and wider, and the requirements of people on the display panels are higher and higher. In particular, the display quality of the display panel is always one of the important indicators for the quality of the display panel for consumers and panel manufacturers. In a conventional display panel, a plurality of pixel circuits and light emitting devices are generally included, and the light emitting devices are driven by the pixel circuits to emit light, thereby performing display. However, the conventional display panel has an afterimage phenomenon, which affects the display effect of the display panel.
Disclosure of Invention
The embodiment of the invention provides a pixel circuit, a driving method thereof and a display panel, which are used for improving the problem of afterimage and improving the display effect of the display panel.
In order to achieve the technical purpose, the embodiment of the invention provides the following technical scheme:
a pixel circuit, comprising:
the grid electrode of the driving transistor is used for writing a data signal, and the first pole of the driving transistor is connected with a first power supply signal;
the first initialization module comprises a control end, a first end and a second end; a control end of the first initialization module is connected with a first initialization control signal, a first end of the first initialization module is connected with a first initialization voltage signal, and a second end of the first initialization module is electrically connected with a grid electrode of the driving transistor; the first initialization module is used for initializing the grid electrode of the driving transistor;
the second initialization module comprises a first transistor, wherein a first pole of the first transistor is connected to a second initialization control signal, a second pole of the first transistor is electrically connected with a first pole of the driving transistor, and a grid electrode of the first transistor is electrically connected with the first pole or the second pole of the first transistor; the second initialization control signal is used for initializing the first pole of the driving transistor.
It can be seen from the foregoing technical solutions that, an embodiment of the present invention provides a pixel circuit structure, which includes a first initialization module and a second initialization module, and the first initialization module and the second initialization module can respectively initialize a gate and a first electrode of a driving transistor, reduce a hysteresis voltage of the driving transistor, complete initialization of the driving transistor, and forcibly reset the gate and a source of the driving transistor in different working states in a previous frame, so that the gate voltage is equal to or greater than the source voltage, change a voltage bias direction of the driving transistor, and reduce an influence caused by a previous frame of picture, so as to improve a residual image. The second initialization module comprises a first transistor, and the grid electrode of the first transistor is electrically connected with the first pole or the second pole of the first transistor, which is equivalent to a diode connection mode. The second initialization control signal directly initializes the first pole of the driving transistor, thereby being beneficial to reducing the number of signal lines, leading the pixel circuit to have simple structure and stronger practicability, and being beneficial to the wiring of the display panel.
Further, the first initialization control signal is multiplexed into the second initialization control signal. By the arrangement, the number of control signal lines can be reduced, and the simplification of the wiring of the display panel is facilitated; meanwhile, the design of the scanning driving circuit can be simplified by reducing the number of the control signal lines, and the narrow frame design of the display panel is facilitated.
Further, the first transistor is a P-type transistor, and a gate of the first transistor is electrically connected to a first pole of the first transistor;
or, the first transistor is an N-type transistor, and a gate of the first transistor is electrically connected to the second pole of the first transistor.
Further, the first initialization module includes a second transistor, a gate of the second transistor is connected to the first initialization control signal, a first pole of the second transistor is connected to the first initialization voltage signal, and a second pole of the second transistor is electrically connected to the gate of the driving transistor.
Further, the pixel circuit further includes: an anode initialization module; the anode initialization module comprises a third transistor, wherein the grid electrode of the third transistor is connected with a third initialization control signal, the first pole of the third transistor is connected with a second initialization voltage signal, and the second pole of the third transistor is electrically connected with the light-emitting device; the anode initialization module is used for initializing the anode of the light-emitting device. Therefore, before the light-emitting device emits light, the anode of the light-emitting device is initialized, the influence of the previous frame display on the frame display can be avoided, and a better display effect is realized.
Preferably, the first initialization control signal is multiplexed into the third initialization control signal; or, the second initialization control signal is multiplexed into the third initialization control signal.
Further, the first initialization voltage signal is multiplexed into the second initialization voltage signal. Thus, the second initialization voltage signal does not need to be additionally arranged, and the wiring of the display panel is simplified.
Further, the pixel circuit further includes: a light emission control module; the light emitting control module comprises a fourth transistor and a fifth transistor;
a grid electrode of the fourth transistor is connected with a light-emitting control signal, and the fourth transistor is connected between the first power supply signal and the first pole of the driving transistor in series;
the grid electrode of the fifth transistor is connected with the light-emitting control signal, and the fifth transistor is connected between the second pole of the driving transistor and the anode of the light-emitting device in series.
Further, the pixel circuit further includes: a data writing module; the data writing module comprises a sixth transistor and a seventh transistor;
a gate of the sixth transistor is connected to a data writing control signal, a first pole of the sixth transistor is connected to a data signal, and a second pole of the sixth transistor is electrically connected to the first pole of the driving transistor;
the gate of the seventh transistor is connected to the data write control signal, the first pole of the seventh transistor is electrically connected to the gate of the driving transistor, and the second pole of the seventh transistor is electrically connected to the second pole of the driving transistor.
Accordingly, the present invention also provides a display panel comprising: any embodiment of the invention provides a pixel circuit.
Correspondingly, the invention also provides a driving method of the pixel circuit, which comprises the following steps:
the first initialization control signal controls the first initialization module to be conducted so that a first initialization voltage signal initializes the grid electrode of the driving transistor;
the second initialization control signal controls the second initialization module to be conducted, so that the second initialization control signal initializes the first pole of the driving transistor.
The pixel circuit provided by the embodiment of the invention comprises a first initialization module and a second initialization module, and can respectively initialize the grid electrode and the first electrode of the driving transistor, reduce the hysteresis voltage of the driving transistor, complete the initialization of the driving transistor, and forcibly reset the grid electrode and the source electrode of the driving transistor in different working states in the previous frame, so that the grid electrode voltage is equal to or greater than the voltage of the source electrode, the voltage bias direction of the driving transistor is changed, the influence brought by the previous frame of picture is reduced, and the afterimage is improved. The second initialization module comprises a first transistor, and the grid electrode of the first transistor is electrically connected with the first pole or the second pole of the first transistor, which is equivalent to a diode connection mode. That is, the second initialization control signal directly initializes the first electrode of the driving transistor, which is advantageous for reducing the number of signal lines, simplifying the pixel circuit structure, enhancing the practicability, and facilitating the wiring of the display panel. Therefore, compared with the prior art, the pixel circuit provided by the embodiment of the invention is beneficial to improving the problem of image sticking and improving the display effect of the display panel.
Drawings
FIG. 1 is a diagram illustrating a conventional image sticking phenomenon of a display panel;
fig. 2 is a circuit diagram of a pixel circuit according to an embodiment of the invention;
fig. 3 is a schematic diagram of a driving timing sequence of a pixel circuit according to an embodiment of the invention;
FIG. 4 is a circuit diagram of another pixel circuit according to an embodiment of the present invention;
fig. 5 is a circuit diagram of another pixel circuit according to an embodiment of the invention;
FIG. 6 is a schematic diagram of a driving timing sequence of another pixel circuit according to an embodiment of the present invention;
fig. 7 is a circuit diagram of another pixel circuit according to an embodiment of the invention;
FIG. 8 is a schematic diagram illustrating a driving timing sequence of a pixel circuit according to another embodiment of the present invention;
fig. 9 is a circuit diagram of another pixel circuit according to an embodiment of the invention;
FIG. 10 is a schematic diagram illustrating a driving timing sequence of a pixel circuit according to another embodiment of the present invention;
fig. 11 is a circuit diagram of another pixel circuit according to an embodiment of the invention;
FIG. 12 is a schematic diagram illustrating a driving timing sequence of a pixel circuit according to another embodiment of the present invention;
fig. 13 is a circuit diagram of another pixel circuit according to an embodiment of the invention;
fig. 14 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 15 is a flowchart illustrating a driving method of a pixel circuit according to an embodiment of the invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
As described in the background, the conventional display panel has a problem of image sticking. The problem of image sticking of the display panel will be described below. Fig. 1 is a schematic diagram illustrating an image sticking phenomenon of a conventional display panel. Referring to fig. 1, in the process of testing the performance of the display panel, the black-and-white picture and the intermediate gray scale picture of the display panel are set to be switched. Specifically, the display panel is set to display a black-and-white image (e.g., black blocks of 0 gray scale on the left side and white blocks of 255 gray scale on the right side) in the previous frame, and is kept for a preset time (e.g., 10s), and then switched to an intermediate gray scale image (e.g., 48 gray scale) for display in the current frame. Because of the existence of the afterimage of the black and white picture, the brightness of the original black block is higher than that of the original white block in the final display picture, which is reflected in that the part of the original black block is deeper than that of the original white block, i.e. the display panel has the afterimage, which affects the display effect of the display panel.
The inventor researches and finds that the reason of the problem is as follows: the existing display panel generally includes a plurality of pixel circuits including a driving transistor that drives a light emitting device to emit light, the driving transistor controlling light emission luminance of the light emitting device by controlling a driving current flowing through the light emitting device. The magnitude of the driving current generated by the driving transistor is related to the difference between the gate-source voltages of the driving transistor. Under different display gray scales, the working states of the driving transistors are different, namely, the gate-source voltage difference is different, and the hysteresis voltage of the corresponding driving transistors is different. Due to the influence of the hysteresis voltage of the driving transistor, different driving currents are generated when the same gate voltage is written into the gate of the driving transistor, so that the brightness of the light emitting device is different, and afterimages are formed.
In a conventional pixel circuit, when initializing a driving transistor, a gate is normally initialized and a source is placed in a Floating state (Floating), and since a parasitic capacitance exists in the driving transistor, a source potential also jumps when resetting only the gate of the driving transistor. Therefore, the reset of the driving transistor is insufficient in the prior art, and the display panel has a residual image.
In view of the foregoing problems, embodiments of the present invention provide a pixel circuit, which can be applied to display panels such as an organic light emitting diode display panel, a micro light emitting diode display panel, or a quantum dot light emitting diode display panel. Fig. 2 is a circuit diagram of a pixel circuit according to an embodiment of the invention. Referring to fig. 2, the pixel circuit includes: a driving transistor DTFT, a first initialization module 110, and a second initialization module 120.
The gate of the driving transistor DTFT is used for writing a data signal Vdata, and the first pole of the driving transistor DTFT is connected to a first power supply signal VDD; the driving transistor DTFT is used for driving the light emitting device OLED to emit light under the action of the first power signal VDD and the second power signal VSS. For example, a first pole of the driving transistor DTFT may be referred to as a source electrode, and a second pole of the driving transistor DTFT may be referred to as a drain electrode, and since the structures of the transistors are symmetrical in the display panel, the source electrode and the drain electrode of the transistors such as the driving transistor DTFT are not distinguished.
The first initialization module 110 includes a control terminal, a first terminal and a second terminal; a control terminal of the first initialization module 110 is connected to a first initialization control signal S1, a first terminal of the first initialization module 110 is connected to a first initialization voltage signal Vref1, and a second terminal of the first initialization module 110 is electrically connected to a gate of the driving transistor DTFT; the first initialization module 110 is used for initializing the gate of the driving transistor DTFT. When the first initialization module 110 is turned on, the first initialization voltage signal Vref1 initializes the gate of the driving transistor DTFT.
The second initialization module 120 includes a first transistor M1, a first pole of the first transistor M1 is connected to the second initialization control signal S2, a second pole of the first transistor M1 is electrically connected to the first pole of the driving transistor DTFT, and a gate of the first transistor M1 is electrically connected to the first pole or the second pole thereof; the second initialization control signal S2 is used to initialize the first pole of the driving transistor DTFT.
The pixel circuit provided by the embodiment of the invention comprises a first initialization module 110 and a second initialization module 120, which can respectively initialize the grid electrode and the first electrode of a driving transistor DTFT, reduce the hysteresis voltage of the driving transistor, complete the initialization of the driving transistor, and forcibly reset the grid electrode and the source electrode of the driving transistor DTFT which are in different working states in the previous frame, so that the grid electrode voltage is equal to or greater than the voltage of the source electrode, the voltage bias direction of the driving transistor is changed, the influence brought by the picture in the previous frame is reduced, and the afterimage is improved.
The second initialization module 120 includes a first transistor M1, and a gate of the first transistor M1 is electrically connected to a first pole or a second pole thereof, which is equivalent to a diode connection manner. For example, if the first transistor M1 is a P-type transistor, and the gate thereof is electrically connected to the first electrode, the first transistor M1 is turned on when the second electrode voltage of the first transistor M1 is higher than the voltage of the second initialization control signal S2, and the first transistor M1 is turned off otherwise. That is, the second initialization control signal S2 is used to control the first transistor M1 to be turned on and also to initialize the first electrode of the driving transistor DTFT, thereby being beneficial to reducing the number of signal lines, simplifying the pixel circuit structure, enhancing the practicability, and facilitating the wiring of the display panel. In addition, for the first initialization module 110, in order to ensure reliable turn-on, the voltage of the first initialization voltage signal Vref1 needs to be set to be greater than or equal to the first initialization control signal S1, and meanwhile, if the voltages of the first initialization control signal S1 and the second initialization control signal S2 are set to be equal, the voltage of the first initialization voltage signal Vref1 is greater than or equal to the second initialization control signal S2. Further, when the P-type driving transistor DTFT is initialized, the voltage for initializing the first pole is lower than the voltage for initializing the gate electrode of the P-type driving transistor DTFT, so as to ensure that the gate-source voltage Vgs of the driving transistor DTFT is greater than or equal to 0, which is equivalent to performing reverse bias initialization on the driving transistor DTFT, thereby facilitating the driving transistor DTFT to realize sufficient reset, releasing holes trapped at the TFT channel interface when the device is turned on, effectively reducing the hysteresis voltage of the driving transistor DTFT, facilitating the improvement of the image sticking problem, and improving the display effect of the display panel.
It should be noted that the first initialization module 110 and the second initialization module 120 may be turned on in the same time period to respectively initialize the gate and the first pole of the driving transistor DTFT; it may not function at the same time period but it is necessary to ensure that the initialization of the driving transistor DTFT is completed before the light emitting device OLED emits light.
With continued reference to fig. 2, on the basis of the above embodiments, the pixel circuit optionally further includes an anode initialization module 130, a light-emitting control module 140, a data writing module 150, and a storage module 160.
The anode initialization module 130 includes a control terminal, a first terminal and a second terminal. The anode initialization module 130 has a control terminal connected to the third initialization control signal S3, a first terminal connected to the second initialization voltage signal Vref2, and a second terminal electrically connected to the anode of the light emitting device OLED. The anode initialization module 130 is configured to be turned on before the light emitting period, so that the second initialization voltage signal Vref2 completes initialization of the anode of the light emitting device OLED. Alternatively, the second initialization voltage signal Vref2 is set to a lower voltage, for example, a negative voltage. Therefore, when the OLED is displayed, the driving current is small in low gray scale, the charging to the OLED is slow, and the display brightness is low; and the driving current is larger under high gray scale, and the OLED is charged more quickly. Therefore, the low voltage of the anode initialization has a large influence on the low gray scale display, and the influence on the high gray scale display can be ignored, so that the display brightness difference between the high gray scale and the low gray scale is large, and the contrast ratio is favorably improved.
The light emitting control module 140 includes a first control terminal, a second control terminal, a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The first control end and the second control end of the light emission control module 140 are both connected to the light emission control signal EM, the first input end is connected to the first power signal VDD, the first output end is electrically connected to the first pole of the driving transistor DTFT, the second input end is electrically connected to the second pole of the driving transistor DTFT, and the second output end is electrically connected to the anode of the light emitting device OLED. The light emission control module 140 is turned on during a light emission period to provide a voltage to the first electrode of the driving transistor DTFT and provide a path between the driving transistor DTFT and the light emitting device OLED, so as to transmit a driving current generated by the driving transistor DTFT to the light emitting device OLED. And the cathode of the light-emitting device OLED is connected with a second power supply signal VSS.
The data writing module 150 includes a control terminal, a first terminal, a second terminal, a third terminal and a fourth terminal, the control terminal of the data writing module 150 is connected to the data writing control signal S4, the first terminal is connected to the data signal Vdata, the second terminal is electrically connected to the first pole of the driving transistor DTFT, the third terminal is electrically connected to the second pole of the driving transistor DTFT, and the fourth terminal is electrically connected to the gate of the driving transistor DTFT. The data writing module 150 is configured to be turned on in a data writing stage, and write the data signal Vdata into the gate of the driving transistor DTFT along the directions of the first pole, the second pole, and the gate of the driving transistor DTFT.
The memory module 160 includes a first terminal and a second terminal, the first terminal of the memory module 160 is connected to the first power signal VDD, and the second terminal is electrically connected to the gate of the driving transistor DTFT. The storage module 160 is configured to store a gate potential of the driving transistor DTFT to ensure that the gate potential of the driving transistor DTFT is stable in a light emitting phase, so that the driving transistor DTFT generates a stable driving current.
In the above embodiments, the first transistor M1 is illustrated as a P-type transistor by way of example, but the present invention is not limited thereto, and in other embodiments, the first transistor M1 may be an N-type transistor. For convenience of explanation, the driving process of the pixel circuit will be described below when the first transistor M1 is a P-type transistor, in which the gate of the first transistor M1 is electrically connected to the first pole thereof, and the second initialization control signal S2 is active low. In this embodiment, the second initialization control signal S2 is used to initialize the first electrode of the driving transistor DTFT as well as to control the first transistor M1 to be turned on. It is understood that the lower the voltage of the second initialization control signal S2, the more advantageous the effect of initialization of the first pole of the driving transistor DTFT.
Fig. 3 is a schematic diagram of a driving timing sequence of a pixel circuit according to an embodiment of the invention. With reference to fig. 2 and 3, the driving process of the pixel circuit is as follows:
the initialization phase T1 includes a first initialization phase T11, a second initialization phase T12, and an anode initialization phase T13. In the first initialization period T11, the first initialization control signal S1 is at a low level, and the second initialization control signal S2, the third initialization control signal S3, the data write control signal S4 and the emission control signal EM are all at a high level. The first initialization control signal S1 controls the first initialization module 110 to be turned on, the second initialization control signal S2 controls the second initialization module 120 (the first transistor M1) to be turned off, the third initialization control signal S3 controls the anode initialization module 130 to be turned off, the data write control signal S4 controls the data write module 150 to be turned off, and the emission control signal EM controls the emission control module 140 to be turned off. In this way, the first initialization voltage signal Vref1 initializes the gate of the driving transistor DTFT through the first initialization module 110, so that the gate of the driving transistor DTFT in a different operation state in the previous frame is forcibly reset. The first initialization voltage signal Vref1 is at a low level (e.g., -7V, -10V, or-14V) to ensure that the residual potential (different gray-scale residual potentials) displayed on the driving transistor DTFT in the previous frame is cleared, so as to prepare for the next data writing and ensure that the driving transistor DTFT is turned on during the data writing period T2.
In the second initialization period T12, the second initialization control signal S2 is low, and the first initialization control signal S1, the third initialization control signal S3, the data write control signal S4 and the emission control signal EM are all high. The first initialization control signal S1 controls the first initialization module 110 to be turned off, the second initialization control signal S2 controls the second initialization module 120 (the first transistor M1) to be turned on, the third initialization control signal S3 controls the anode initialization module 130 to be turned off, the data write control signal S4 controls the data write module 150 to be turned off, and the emission control signal EM controls the emission control module 140 to be turned off. In this way, the second initialization control signal S2 initializes the first pole of the driving transistor DTFT through the first transistor M1 while controlling the first transistor M1 to be turned on, and resets the first pole of the driving transistor DTFT in a different operation state in the previous frame in a very strong manner. Optionally, the second initialization control signal S2 is set to be less than or equal to the first initialization voltage signal Vref1, so that the gate-source voltage Vgs of the driving transistor DTFT is greater than or equal to 0, so as to implement reverse bias initialization of the driving transistor DTFT, release holes trapped at the channel interface of the driving transistor DTFT when the device is turned on, reduce the hysteresis voltage of the driving transistor DFTF, and facilitate improvement of the image sticking problem.
In the anode initialization period T13, the third initialization control signal S3 is at a low level, and the first initialization control signal S1, the second initialization control signal S2, the data write control signal S4 and the emission control signal EM are all at a high level. The first initialization control signal S1 controls the first initialization module 110 to be turned off, the second initialization control signal S2 controls the second initialization module 120 (the first transistor M1) to be turned off, the third initialization control signal S3 controls the anode initialization module 130 to be turned on, the data write control signal S4 controls the data write module 150 to be turned off, and the emission control signal EM controls the emission control module 140 to be turned off. Thus, the second initialization voltage signal Vref2 initializes the anode of the light emitting device OLED through the anode initialization module 130. The second initialization voltage signal Vref2 is at a low voltage level to realize reverse initialization of the anode of the light emitting device OLED, which is beneficial to improving contrast.
In the data writing phase T2, the data writing control signal S4 is at a low level, and the first initialization control signal S1, the second initialization control signal S2, the third initialization control signal S3 and the emission control signal EM are all at a high level. The first initialization control signal S1 controls the first initialization module 110 to be turned off, the second initialization control signal S2 controls the second initialization module 120 (the first transistor M1) to be turned off, the third initialization control signal S3 controls the anode initialization module 130 to be turned off, the data write control signal S4 controls the data write module 150 to be turned on, and the emission control signal EM controls the emission control module 140 to be turned off. Thus, the data signal Vdata is written to the gate of the driving transistor DTFT via the source and drain of the driving transistor DTFT. The gate voltage of the driving transistor DTFT gradually increases and when the data is written to Vdata + Vth, the data writing phase is completed. Where Vth is a threshold voltage of the driving transistor DTFT.
In the light-emitting period T3, the light-emitting control signal EM is at a low level, and the first initialization control signal S1, the second initialization control signal S2, the third initialization control signal S3 and the data write control signal S4 are all at a high level. The first initialization control signal S1 controls the first initialization module 110 to be turned off, the second initialization control signal S2 controls the second initialization module 120 (the first transistor M1) to be turned off, the third initialization control signal S3 controls the anode initialization module 130 to be turned on, the data write control signal S4 controls the data write module 150 to be turned off, and the emission control signal EM controls the emission control module 140 to be turned on. In this way, the first pole of the driving transistor DTFT applies the first power signal VDD through the light emission control module 140, so as to generate a driving current, and the driving current flows into the anode of the light emitting device OLED, so as to drive the light emitting device OLED to emit light. Then, in the light emitting period T3, the driving current Id generated by the driving transistor DTFT is:
Id＝(W/2L)μCox(Vdata+Vth-VDD-Vth)2＝(W/2L)μCox(VDD-Vdata)2
where W is the channel width, L is the channel length, μ is the electron mobility, and Cox is the unit area channel capacitance. The channel width W, channel length L, electron mobility μ, and channel capacitance Cox per unit area can all be considered constant. Therefore, the pixel circuit provided by the embodiment of the invention eliminates the influence of the threshold voltage Vth on the driving current Id, and realizes threshold compensation.
It should be noted that, in the above embodiments, the case where the initialization phase T1 is divided into three independent initialization sub-phases (including the first initialization phase T11, the second initialization phase T12 and the anode initialization phase T13) is exemplarily shown, but the present invention is not limited thereto, and in other embodiments, the three initialization sub-phases may be performed simultaneously.
Fig. 4 is a circuit diagram of another pixel circuit according to an embodiment of the invention. Referring to fig. 4, on the basis of the foregoing embodiments, this embodiment provides a possible implementation manner for the configuration of each module, and optionally, the first initialization module 110 includes a second transistor M2, a gate of the second transistor M2 is connected to the first initialization control signal S1, a first pole of the second transistor M2 is connected to the first initialization voltage signal Vref1, and a second pole of the second transistor M2 is electrically connected to a gate of the driving transistor DTFT. By the arrangement, the circuit is simple in structure and easy to realize. Optionally, the channel type of the second transistor M2 is the same as that of the first transistor M1, and both the second transistor M2 and the first transistor M1 are P-type transistors, so that the first transistor M1 and the second transistor M2 can be manufactured in the same manufacturing process, and the manufacturing process is simplified.
With continued reference to fig. 4, in one embodiment of the invention, the anode initialization module 130 includes a third transistor M3, a gate of the third transistor M3 is connected to the third initialization control signal S3, a first pole of the third transistor M3 is connected to the second initialization voltage signal Vref2, and a second pole of the third transistor M3 is electrically connected to the light emitting device OLED. In the embodiment of the present invention, the anode initialization module 130 is formed by one transistor, and the circuit structure is simple and easy to implement. Optionally, the channel type of the third transistor M3 is the same as that of the first transistor M1, and both are P-type transistors, so that the third transistor M3 and the first transistor M1 or the second transistor M2 can be manufactured in the same manufacturing process, and the manufacturing process is simplified.
With continued reference to fig. 4, in one embodiment of the present invention, the light emitting control module 140 includes a fourth transistor M4 and a fifth transistor M5.
A gate of the fourth transistor M4 is connected to the emission control signal EM, and the fourth transistor M4 is connected in series between the first power signal VDD and the first pole of the driving transistor DTFT; a gate of the fifth transistor M5 is connected to the emission control signal EM, and the fifth transistor M5 is connected in series between the second pole of the driving transistor DTFT and the anode of the light emitting device OLED. Optionally, the fourth transistor M4 and the fifth transistor M5 are the same as the transistors in the above embodiments in channel type, and are both P-type transistors, so that they are fabricated in the same fabrication process, and the fabrication process is simplified.
With continued reference to FIG. 4, in one embodiment of the present invention, the data write module 150 includes a sixth transistor M6 and a seventh transistor M7.
A gate of the sixth transistor M6 is connected to the data writing control signal S4, a first pole of the sixth transistor M6 is connected to the data signal Vdata, and a second pole of the sixth transistor M6 is electrically connected to the first pole of the driving transistor DTFT; a gate of the seventh transistor M7 is connected to the data write control signal S4, a first pole of the seventh transistor M7 is electrically connected to the gate of the driving transistor DTFT, and a second pole of the seventh transistor M7 is electrically connected to the second pole of the driving transistor DTFT. Optionally, the sixth transistor M6 and the seventh transistor M7 are the same as the transistors in the above embodiments in channel type, and are both P-type transistors, so that they are fabricated in the same fabrication process, and the fabrication process is simplified.
With continued reference to fig. 4, in one embodiment of the invention, the storage module 160 includes a capacitor Cst. The first end of the capacitor Cst is connected to the first power signal VDD, and the second end of the capacitor Cst is electrically connected to the gate of the driving transistor DTFT for storing the potential of the gate of the driving transistor DTFT.
In summary, the pixel circuit shown in fig. 4 constitutes an 8T1C structure. The driving process of the pixel circuit is explained below. Illustratively, the pixel circuit shown in fig. 4 can still adopt the driving sequence shown in fig. 3, and with reference to fig. 3 and fig. 4, the driving process of the pixel circuit includes:
the initialization phase T1 includes a first initialization phase T11, a second initialization phase T12, and an anode initialization phase T13. In the first initialization period T11, the first initialization control signal S1 is at a low level, and the second initialization control signal S2, the third initialization control signal S3, the data write control signal S4 and the emission control signal EM are all at a high level. The first initialization control signal S1 controls the second transistor M2 to be turned on, the second initialization control signal S2 controls the first transistor M1 to be turned off, the third initialization control signal S3 controls the third transistor M3 to be turned off, the data write control signal S4 controls the sixth transistor M6 and the seventh transistor M7 to be turned off, and the emission control signal EM controls the fourth transistor M4 and the fifth transistor M5 to be turned off. In this way, the first initialization voltage signal Vref1 is transmitted to the gate of the driving transistor DTFT through the first and second poles of the second transistor M2, initializes the gate of the driving transistor DTFT, and forcibly resets the gate of the driving transistor DTFT in a different operation state in the previous frame. The first initialization voltage signal Vref1 is at a low level to ensure that the residual potential displayed on the driving transistor DTFT in the previous frame is cleared; the low level of the first initialization voltage signal Vref1 is maintained by the capacitor Cst, thereby ensuring that the driving transistor DTFT is turned on during the data writing period T2.
In the second initialization period T12, the second initialization control signal S2 is low, and the first initialization control signal S1, the third initialization control signal S3, the data write control signal S4 and the emission control signal EM are all high. The first initialization control signal S1 controls the second transistor M2 to be turned off, the second initialization control signal S2 controls the first transistor M1 to be turned on, the third initialization control signal S3 controls the third transistor M3 to be turned off, the data write control signal S4 controls the sixth transistor M6 and the seventh transistor M7 to be turned off, and the emission control signal EM controls the fourth transistor M4 and the fifth transistor M5 to be turned off. In this way, the second initialization control signal S2 controls the first transistor M1 to be turned on, and at the same time, is transmitted to the first pole of the driving transistor DTFT through the first pole and the second pole of the first transistor M1, so as to initialize the first pole of the driving transistor DTFT, thereby resetting the first pole of the driving transistor DTFT in a different operation state in the previous frame. Wherein the second initialization signal S2 is written into the first pole of the driving transistor DTFT, and the first initialization voltage signal Vref1 is written into the gate of the driving transistor DTFT; the second initialization signal S2 is at a low voltage, preferably a value lower than the first initialization voltage signal Vref1, so as to ensure that the gate-source voltage Vgs of the driving transistor DTFT is greater than or equal to 0, perform reverse bias initialization on the driving transistor DTFT, and facilitate improvement of the image sticking problem.
In the anode initialization period T13, the third initialization control signal S3 is at a low level, and the first initialization control signal S1, the second initialization control signal S2, the data write control signal S4 and the emission control signal EM are all at a high level. The first initialization control signal S1 controls the second transistor M2 to be turned off, the second initialization control signal S2 controls the first transistor M1 to be turned off, the third initialization control signal S3 controls the third transistor M3 to be turned on, the data write control signal S4 controls the sixth transistor M6 and the seventh transistor M7 to be turned off, and the emission control signal EM controls the fourth transistor M4 and the fifth transistor M5 to be turned off. In this way, the second initialization voltage signal Vref2 is transmitted to the anode of the light emitting device OLED through the first and second poles of the third transistor M3, initializing the anode of the light emitting device OLED. The second initialization voltage signal Vref2 is at a low voltage level (e.g., the voltage of the second initialization voltage signal Vref2 is lower than the voltage of the second power signal VSS), so as to realize reverse initialization of the anode of the light emitting device OLED, which is beneficial to improving contrast.
In the data writing phase T2, the data writing control signal S4 is at a low level, and the first initialization control signal S1, the second initialization control signal S2, the third initialization control signal S3 and the emission control signal EM are all at a high level. The first initialization control signal S1 controls the second transistor M2 to be turned off, the second initialization control signal S2 controls the first transistor M1 to be turned off, the third initialization control signal S3 controls the third transistor M3 to be turned off, the data write control signal S4 controls the sixth transistor M6 and the seventh transistor M7 to be turned on, and the emission control signal EM controls the fourth transistor M4 and the fifth transistor M5 to be turned off. Thus, the data signal Vdata is transmitted to the gate electrode of the driving transistor DTFT via the first pole of the sixth transistor M6, the second pole of the sixth transistor M6, the first pole of the driving transistor DTFT, the second pole of the seventh transistor M7, and the first pole of the seventh transistor M7, thereby writing the data signal Vdata into the gate electrode of the driving transistor DTFT until the gate voltage of the driving transistor DTFT reaches Vdata + Vth, and the driving transistor DTFT is turned off; the gate voltage of the driving transistor DTFT is stored by the capacitor Cst.
In the light-emitting period T3, the light-emitting control signal EM is at a low level, and the first initialization control signal S1, the second initialization control signal S2, the third initialization control signal S3 and the data write control signal S4 are all at a high level. The first initialization control signal S1 controls the second transistor M2 to be turned off, the second initialization control signal S2 controls the first transistor M1 to be turned off, the third initialization control signal S3 controls the third transistor M3 to be turned off, the data write control signal S4 controls the sixth transistor M6 and the seventh transistor M7 to be turned off, and the emission control signal EM controls the fourth transistor M4 and the fifth transistor M5 to be turned on. Thus, the turn-on of the light emission control module 140 provides a path between the first power signal VDD, the driving transistor DTFT, and the light emitting device OLED. The first power signal VDD is applied to the first pole of the driving transistor DTFT through the first pole and the second pole of the fourth transistor M4, so that the driving transistor DTFT generates a driving current, and the driving current flows into the anode of the light emitting device OLED through the first pole and the second pole of the fifth transistor M5, so as to drive the light emitting device OLED to emit light.
It should be noted that, the above embodiment exemplarily shows that the first initialization module 110, the second initialization module 120 and the anode initialization module 130 perform initialization at different time periods in the initialization stage T1, but the present invention is not limited thereto. Alternatively, the valid times of the first initialization control signal S1, the second initialization control signal S2, and the third initialization control signal S3 may at least partially overlap.
In one embodiment of the present invention, optionally, the first initialization control signal S1 is multiplexed into the second initialization control signal S2; alternatively, the first initialization control signal S1 is multiplexed into the third initialization control signal S3; alternatively, the second initialization control signal S2 is multiplexed into the third initialization control signal S3; alternatively, the first initialization control signal S1 is multiplexed into the second initialization control signal S2 and the third initialization control signal S3. By the arrangement, the number of control signal lines can be reduced, and the simplification of the wiring of the display panel is facilitated; meanwhile, the design of the scanning driving circuit can be simplified by reducing the number of the control signal lines, and the narrow frame design of the display panel is facilitated. Alternatively, the data write control signal S4 is multiplexed into the third initialization control signal S3, and since the anode initialization module 130 only needs to initialize the anode of the light emitting device OLED before the light emitting period T3, the anode initialization may be performed simultaneously with the data write.
In one embodiment of the present invention, the first initialization voltage signal Vref1 is optionally multiplexed into the second initialization voltage signal Vref 2. With this arrangement, the second initialization voltage signal Vref2 does not need to be additionally provided, which is advantageous for simplifying the wiring of the display panel.
The following describes several configurations of the pixel circuits.
Fig. 5 is a circuit diagram of another pixel circuit according to an embodiment of the invention. Referring to fig. 5, in one embodiment of the present invention, the first initialization control signal S1 is multiplexed into the second initialization control signal S2. Correspondingly, fig. 6 is a schematic diagram of a driving timing sequence of another pixel circuit according to an embodiment of the invention. In the driving process of the pixel circuit, referring to fig. 5 and 6, the first initialization phase T11 and the second initialization phase T12 of the initialization phase T1 are performed simultaneously, and in this phase, the first initialization control signal S1 is at a low level, and the third initialization control signal S3, the data writing control signal S4, and the emission control signal EM are all at a high level. The first initialization control signal S1 controls both the first transistor M1 and the second transistor M2 to be turned on, the third initialization control signal S3 controls the third transistor M3 to be turned off, the data write control signal S4 controls both the sixth transistor M6 and the seventh transistor M7 to be turned off, and the emission control signal EM controls both the fourth transistor M4 and the fifth transistor M5 to be turned off. Thus, the first initialization voltage signal Vref1 is transmitted to the gate of the driving transistor DTFT through the first and second poles of the second transistor M2, initializing the gate of the driving transistor DTFT; meanwhile, the first initialization control signal S1 is transmitted to the first pole of the driving transistor DTFT through the first pole and the second pole of the first transistor M1 while controlling the first transistor M1 to be turned on, so as to initialize the first pole of the driving transistor DTFT, that is, to realize the forced reset of the gate and the first pole of the driving transistor DTFT at the same time.
And, in order to ensure reliable conduction of the second transistor M2, it is necessary to set the voltage of the first initialization voltage signal Vref1 to be greater than or equal to the first initialization control signal S1, and the voltage at which the first pole of the P-type driving transistor DTFT is initialized is lower than the voltage at which the gate thereof is initialized. Therefore, the arrangement of the embodiment of the invention is beneficial to simplifying the wiring of the display panel, and can ensure that the gate-source voltage Vgs of the driving transistor DTFT is more than or equal to 0V, which is equivalent to performing reverse bias initialization on the driving transistor DTFT to release holes trapped on a TFT channel interface when the device is conducted, thereby being beneficial to realizing full reset of the driving transistor DTFT and reducing the hysteresis voltage of the driving transistor DTFT.
With continued reference to fig. 5, in one embodiment of the present invention, the first initialization voltage signal Vref1 is optionally multiplexed into the second initialization voltage signal Vref 2. Illustratively, for the gate of the driving transistor DTFT and the anode of the light emitting device OLED, both of which have a channel type of P-type, the initialization voltage is low, and thus the first initialization voltage signal Vref1 and the second initialization voltage signal Vref2 may be multiplexed. Exemplarily, for the gate of the driving transistor DTFT and the cathode of the light emitting device OLED, both of which have the N-type channel, the initialization voltage is high level, and thus the first initialization voltage signal Vref1 and the second initialization voltage signal Vref2 may be multiplexed; at this time, it is necessary to electrically connect the second electrode of the third transistor M3 with the cathode of the light emitting device OLED.
Fig. 7 is a circuit diagram of another pixel circuit according to an embodiment of the invention. Referring to fig. 7, in an embodiment of the invention, optionally, the first initialization control signal S1 is multiplexed into the third initialization control signal S3, so that a driving timing diagram of the pixel circuit is as shown in fig. 8, and a specific driving process is similar to that of the foregoing embodiment and is not repeated here. While fig. 8 exemplarily shows that the valid time of the first initialization control signal S1 precedes the second initialization control signal S2, in other embodiments, the valid time of the second initialization control signal S2 may be set to precede the first initialization control signal S1; alternatively, the two initialization control signals are set to overlap at least partially in active time.
Fig. 9 is a circuit diagram of another pixel circuit according to an embodiment of the invention. Referring to fig. 9, in one embodiment of the present invention, the first initialization control signal S1 is optionally multiplexed into the second initialization control signal S2 and the third initialization control signal S3. Thus, as shown in fig. 10, the driving timing chart of the pixel circuit is such that all initialization operations are completed at the same time. Therefore, the pixel circuit only needs two scan line controls, the first initialization control signal S1 can be a first scan signal, the data write control signal S4 can be a second scan signal, and the pulse widths of the first scan signal and the second scan signal are the same, the second scan signal of the previous stage can be multiplexed into the first scan signal of the next stage, compared with the existing 7T1C pixel circuit, the embodiment of the invention does not need to add a new signal line, and the practicability is stronger.
Fig. 11 is a circuit diagram of another pixel circuit according to an embodiment of the invention. Referring to fig. 11, unlike fig. 9, the first initialization control signal S1 is multiplexed into the second initialization control signal S2; the data write control signal S4 is multiplexed into the third initialization control signal S3. In this way, as shown in fig. 12, the driving timing chart of the pixel circuit is such that the initialization of the gate and the first electrode of the driving transistor DTFT is completed at the same time; the anode initialization of the light emitting device OLED is completed simultaneously with the data writing of the gate electrode of the driving transistor DTFT.
Fig. 13 is a circuit diagram of another pixel circuit according to an embodiment of the invention. As shown in fig. 13, in one embodiment, the first transistor M1 is an N-type transistor, and the gate of the first transistor M1 is electrically connected to the second pole thereof. The second initialization control signal S2 is low. Unlike the above embodiment, the second initialization control signal S2 is not electrically connected to the gate of the first transistor M1, and the gate of the first transistor M1 is connected to the first pole of the driving transistor DTFT. In order to ensure the conduction of the first transistor M1, the voltage of the second initialization control signal S2 needs to be lower than the first voltage of the driving transistor DTFT, so that the first transistor M1 can be controlled to be conducted, and the effect of initializing the first pole of the driving transistor DTFT can be ensured. It can be understood that the pixel circuit shown in fig. 13 can still be driven by the driving timing shown in fig. 3, and the driving process is similar to the foregoing driving process and is not described herein again.
In the above embodiments, the driving transistor, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, and the seventh transistor M7 are all P-type transistors, but the present invention is not limited thereto, and in other embodiments, some or all of the transistors may be N-type transistors as needed.
The embodiment of the invention also provides a display panel. Fig. 14 is a schematic structural diagram of a display panel according to an embodiment of the present invention. Referring to fig. 14, the display panel includes the pixel circuit 10 provided in any embodiment of the present invention, and the technical principle and the resulting effect are similar and will not be described again.
With continued reference to fig. 14, optionally, the display panel further includes a plurality of first initialization control signal lines 20, a plurality of second initialization control signal lines 30, and a plurality of data lines 40. The first initialization control signal line 20 supplies a first initialization control signal to the pixel circuit 10, the second initialization control signal line 30 supplies a second initialization control signal to the pixel circuit 10, and the data line 40 supplies a data signal to the pixel circuit 10.
With continued reference to fig. 14, optionally, the display panel further comprises a row driver 1, the row driver 1 being located in a non-display area of the display panel. The plurality of first initialization control signal lines 20 and the plurality of second initialization control signal lines 30 are electrically connected to the row driver 1, and the first initialization control signal and the second initialization control signal are both provided by the row driver 1.
It should be noted that, in the above embodiments, the first power signal is exemplarily given as a power signal providing a positive electrode voltage, and is generally referred to as a VDD signal, and in this case, the first electrode of the driving transistor DTFT is generally referred to as a source, but the present invention is not limited thereto. In another embodiment, the first power signal may be a power signal providing a negative voltage, generally referred to as a VSS signal, in which the first pole of the driving transistor DTFT is generally referred to as a drain, and the second initialization module 120 may initialize the drain of the driving transistor DTFT.
The embodiment of the invention also provides a driving method of the pixel circuit, and the driving method is suitable for the pixel circuit provided by any embodiment of the invention. Fig. 15 is a flowchart illustrating a driving method of a pixel circuit according to an embodiment of the invention. Referring to fig. 15, the driving method of the pixel circuit includes the following steps.
S110, the first initialization control signal controls the first initialization module to be turned on, so that the first initialization voltage signal initializes the gate of the driving transistor.
And S120, the second initialization module is controlled to be conducted by the second initialization control signal, so that the first pole of the driving transistor is initialized by the second initialization control signal.
According to the driving method of the pixel circuit provided by the embodiment of the invention, the first initialization module is controlled to be switched on by the first initialization control signal, and the second initialization module is controlled to be switched on by the second initialization control signal, so that the gate and the first pole of the driving transistor can be respectively initialized, the hysteresis voltage of the driving transistor is reduced, the initialization of the driving transistor is completed, the gate and the source of the driving transistor in different working states in the previous frame are forcibly reset, the influence caused by the picture in the previous frame is reduced, and the afterimage is improved. The second initialization module comprises a first transistor, and the grid electrode of the first transistor is electrically connected with the first pole or the second pole of the first transistor, which is equivalent to a diode connection mode. That is, the second initialization control signal directly initializes the first electrode of the driving transistor, which is advantageous for reducing the number of signal lines, simplifying the pixel circuit structure, enhancing the practicability, and facilitating the wiring of the display panel. Therefore, the driving method of the pixel circuit provided by the embodiment of the invention is beneficial to improving the problem of residual images and improving the display effect of the display panel.
Optionally, on the basis of the foregoing embodiments, the first initialization control signal is multiplexed into the second initialization control signal, so that the step (S110) of initializing the gate of the driving transistor and the step (S120) of initializing the first electrode of the driving transistor can be performed simultaneously, and the gate and the source of the driving transistor are reset simultaneously, thereby further improving the initialization effect on the driving transistor and reducing the hysteresis voltage of the driving transistor. By the arrangement, the number of control signal lines can be reduced, and the simplification of the wiring of the display panel is facilitated; meanwhile, the design of the scanning driving circuit can be simplified by reducing the number of the control signal lines, and the narrow frame design of the display panel is facilitated.
In order to ensure reliable conduction of the second transistor, the voltage of the first initialization voltage signal needs to be set to be greater than or equal to the first initialization control signal, and the voltage for initializing the first electrode of the P-type drive transistor is lower than the voltage for initializing the gate electrode of the P-type drive transistor. Therefore, the arrangement of the embodiment of the invention is beneficial to simplifying the wiring of the display panel, and can ensure that the gate-source voltage Vgs of the driving transistor is more than or equal to 0V, which is equivalent to performing reverse bias initialization on the driving transistor to release holes trapped at a channel interface when the device is conducted, thereby being beneficial to realizing sufficient reset of the driving transistor and reducing the hysteresis voltage of the driving transistor.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A pixel circuit, comprising:
the grid electrode of the driving transistor is used for writing a data signal, and the first pole of the driving transistor is connected with a first power supply signal;
the first initialization module comprises a control end, a first end and a second end; a control end of the first initialization module is connected with a first initialization control signal, a first end of the first initialization module is connected with a first initialization voltage signal, and a second end of the first initialization module is electrically connected with a grid electrode of the driving transistor; the first initialization module is used for initializing the grid electrode of the driving transistor;
the second initialization module comprises a first transistor, a first pole of the first transistor is connected to a second initialization control signal, a second pole of the first transistor is electrically connected with the first pole of the driving transistor, and a grid electrode of the first transistor is electrically connected with the first pole or the second pole of the first transistor; the second initialization control signal is used for initializing the first pole of the driving transistor.
2. The pixel circuit according to claim 1, wherein the first initialization control signal is multiplexed into the second initialization control signal.
3. The pixel circuit according to claim 1, wherein the first transistor is a P-type transistor, and a gate of the first transistor is electrically connected to a first pole of the first transistor;
or, the first transistor is an N-type transistor, and a gate of the first transistor is electrically connected to the second pole of the first transistor.
4. The pixel circuit according to claim 1, wherein the first initialization module comprises a second transistor, a gate of the second transistor is connected to the first initialization control signal, a first pole of the second transistor is connected to the first initialization voltage signal, and a second pole of the second transistor is electrically connected to the gate of the driving transistor.
5. The pixel circuit according to claim 1, further comprising: an anode initialization module; the anode initialization module comprises a third transistor, wherein the grid electrode of the third transistor is connected with a third initialization control signal, the first pole of the third transistor is connected with a second initialization voltage signal, and the second pole of the third transistor is electrically connected with the light-emitting device; the anode initialization module is used for initializing the anode of the light-emitting device;
preferably, the first initialization control signal is multiplexed into the third initialization control signal; or, the second initialization control signal is multiplexed into the third initialization control signal.
6. The pixel circuit according to claim 5, wherein the first initialization voltage signal is multiplexed into the second initialization voltage signal.
7. The pixel circuit according to claim 1, further comprising: a light emission control module; the light emitting control module comprises a fourth transistor and a fifth transistor;
a grid electrode of the fourth transistor is connected with a light-emitting control signal, and the fourth transistor is connected between the first power supply signal and the first pole of the driving transistor in series;
the grid electrode of the fifth transistor is connected with the light-emitting control signal, and the fifth transistor is connected between the second pole of the driving transistor and the anode of the light-emitting device in series.
8. The pixel circuit according to claim 1, further comprising: a data writing module; the data writing module comprises a sixth transistor and a seventh transistor;
a gate of the sixth transistor is connected to a data writing control signal, a first pole of the sixth transistor is connected to a data signal, and a second pole of the sixth transistor is electrically connected to the first pole of the driving transistor;
the gate of the seventh transistor is connected to the data write control signal, the first pole of the seventh transistor is electrically connected to the gate of the driving transistor, and the second pole of the seventh transistor is electrically connected to the second pole of the driving transistor.
9. A display panel comprising the pixel circuit according to any one of claims 1 to 8.
10. A driving method of a pixel circuit, the pixel circuit comprising: the device comprises a driving transistor, a first initialization module and a second initialization module; the second initialization module comprises a first transistor; the grid electrode of the first transistor is electrically connected with the first pole of the first transistor, the first pole of the first transistor is connected with a second initialization control signal, and the second pole of the first transistor is electrically connected with the first pole of the driving transistor;
the driving method of the pixel circuit includes:
the first initialization control signal controls the first initialization module to be conducted so that a first initialization voltage signal initializes the grid electrode of the driving transistor;
the second initialization control signal controls the second initialization module to be conducted, so that the second initialization control signal initializes the first pole of the driving transistor.
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| CN114187871A (en) * | 2021-12-10 | 2022-03-15 | 北京欧铼德微电子技术有限公司 | Voltage adjusting method and device and electronic equipment |
| CN114863875A (en) * | 2022-05-25 | 2022-08-05 | 武汉天马微电子有限公司 | Display panel, driving method thereof and display device |
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