CN117424585A - Gate driving device and electronic equipment - Google Patents
Gate driving device and electronic equipment Download PDFInfo
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- CN117424585A CN117424585A CN202311396145.3A CN202311396145A CN117424585A CN 117424585 A CN117424585 A CN 117424585A CN 202311396145 A CN202311396145 A CN 202311396145A CN 117424585 A CN117424585 A CN 117424585A
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- 239000003990 capacitor Substances 0.000 claims description 14
- 238000010586 diagram Methods 0.000 description 18
- 230000000694 effects Effects 0.000 description 13
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 9
- 229910010271 silicon carbide Inorganic materials 0.000 description 9
- 230000002401 inhibitory effect Effects 0.000 description 3
- 230000005669 field effect Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/168—Modifications for eliminating interference voltages or currents in composite switches
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/567—Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
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Abstract
The present disclosure relates to a gate driving device and an electronic apparatus, the device is used for driving a first transistor, the device includes a gate driving unit, a first resistor, a switching unit, wherein: the drive output end of the grid drive unit is electrically connected with the first end of the first resistor and the first end of the switch unit, the second end of the first resistor is electrically connected with the grid of the first transistor and the second end of the switch unit, the drive output end of the grid drive unit is used for outputting a drive signal to drive the first transistor, when the drive signal is negative voltage, the switch unit is in a conducting state, and the drive signal is transmitted to the grid of the first transistor through the switch unit. The gate driver device provided by the embodiment of the disclosure has the advantages of simple structure, low cost and easy popularization and utilization.
Description
The present application is a divisional application of chinese patent application filed in the chinese patent office at 12 months and 30 days in 2019, with application number 201911394606.7 and application name "gate drive device and electronic device".
Technical Field
The disclosure relates to the technical field of integrated circuits, and in particular relates to a gate driving device and electronic equipment.
Background
The grid driver is a necessary device in power electronic systems such as a power supply, an electric drive and the like, is positioned between a weak electric signal of signal processing and a high-power strong electric signal, and has the function of converting a weaker control signal into a stronger driving signal so as to push the high-power device to complete the function of energy conversion, and meanwhile, a higher-end grid driver has the functions of detection and protection so as to ensure the normal operation of the power electronic system. The power transistors of the high-power supply driven by the gate driver are often IGBTs (insulated gate bipolar transistors) and SiC FETs (silicon carbide field effect transistors). Because SiC has smaller parasitic capacitance and on-resistance, power supplies using SiC can be made more efficient and less bulky. As SiC technology matures and costs decrease, the use of SiC is becoming increasingly popular.
Since Miller Effect (ME) exists, a typical gate driver needs to provide a negative voltage output or Miller clamp function to ensure reliable turn-off, however, since SiC has a faster switching speed, the Miller Effect is more pronounced, and thus how to effectively suppress the Miller Effect is a current problem.
Disclosure of Invention
In view of this, the present disclosure proposes a gate driving device for driving a first transistor, the device comprising a gate driving unit, a first resistor, a switching unit, wherein:
the driving output end of the grid driving unit is electrically connected with the first end of the first resistor and the first end of the switching unit, the second end of the first resistor is electrically connected with the grid of the first transistor and the second end of the switching unit,
the driving output end of the grid driving unit is used for outputting a driving signal to drive the first transistor, when the driving signal is negative voltage, the switching unit is in a conducting state, and the driving signal is transmitted to the grid of the first transistor through the switching unit.
In one possible embodiment, when the driving signal is a positive voltage, the switching unit is in an off state, and the driving signal is transmitted to the gate of the first transistor through the first resistor.
In one possible embodiment, the switching unit comprises a second transistor, a third transistor, wherein:
the drain electrode of the second transistor is electrically connected with the driving output end and the first end of the first resistor, the source electrode of the second transistor is electrically connected with the source electrode of the third transistor, the drain electrode of the third transistor is electrically connected with the grid electrode of the first transistor and the second end of the first resistor, the grid electrodes of the second transistor and the third transistor are grounded or receive a first voltage,
the drain electrode of the second transistor is a first end of the switch unit, and the drain electrode of the third transistor is a second end of the switch unit.
In one possible embodiment, the switching unit includes a fourth transistor, a fifth transistor, wherein:
the source electrode of the fourth transistor is electrically connected with the driving output end and the first end of the first resistor, the drain electrode of the fourth transistor is electrically connected with the drain electrode of the fifth transistor, the source electrode of the fifth transistor is electrically connected with the grid electrode of the first transistor and the second end of the first resistor, the grid electrodes of the fourth transistor and the fifth transistor are grounded or receive a second voltage,
the source of the fourth transistor is the first end of the switch unit, and the source of the fifth transistor is the second end of the switch unit.
In one possible embodiment, the switching unit comprises a sixth transistor, a first diode, wherein:
the drain electrode of the sixth transistor is electrically connected with the driving output end and the first end of the first resistor, the source electrode of the sixth transistor is electrically connected with the cathode electrode of the first diode, the anode electrode of the first diode is electrically connected with the grid electrode of the first transistor and the second end of the first resistor, the grid electrode of the sixth transistor is grounded,
the drain electrode of the sixth transistor is a first end of the switch unit, and the anode electrode of the first diode is a second end of the switch unit.
In one possible embodiment, the switching unit comprises a seventh transistor, a second diode, wherein:
the source electrode of the seventh transistor is electrically connected with the driving output end and the first end of the first resistor, the drain electrode of the seventh transistor is electrically connected with the cathode electrode of the second diode, the anode electrode of the second diode is electrically connected with the grid electrode of the first transistor and the second end of the first resistor, the grid electrode of the seventh transistor is grounded,
the drain electrode of the seventh transistor is a first end of the switch unit, and the anode electrode of the second diode is a second end of the switch unit.
In one possible embodiment, the switching unit comprises an eighth transistor, a third diode, wherein:
the negative electrode of the third diode is electrically connected with the driving output end and the first end of the first resistor, the positive electrode of the third diode is electrically connected with the source electrode of the eighth transistor, the drain electrode of the eighth transistor is electrically connected with the grid electrode of the first transistor and the second end of the first resistor, the grid electrode of the eighth transistor is grounded,
the negative electrode of the third diode is a first end of the switch unit, and the drain electrode of the eighth transistor is a second end of the switch unit.
In one possible embodiment, the switching unit comprises a ninth transistor, a fourth diode, wherein:
the negative electrode of the fourth diode is electrically connected with the driving output end and the first end of the first resistor, the positive electrode of the fourth diode is electrically connected with the drain electrode of the ninth transistor, the source electrode of the ninth transistor is electrically connected with the grid electrode of the first transistor and the second end of the first resistor, the grid electrode of the ninth transistor is grounded,
the negative electrode of the fourth diode is a first end of the switch unit, and the source electrode and the drain electrode of the ninth transistor are a second end of the switch unit.
In a possible embodiment, the device further comprises a first capacitor, a fifth diode, a second resistor, the drive output comprising a first drive output, a second drive output, wherein:
the first driving output end is electrically connected with the first end of the first capacitor, the second driving output end is electrically connected with the second end of the first capacitor, the cathode of the fifth diode, the first end of the first resistor and the first end of the switch unit,
the positive electrode of the fifth diode is electrically connected with the first end of the second resistor, the second end of the second resistor is electrically connected with the second end of the first resistor, the second end of the switch unit and the grid electrode of the first transistor,
the voltage difference between the first driving output end and the second driving output end is a third voltage.
In one possible implementation manner, the driving output terminal includes a pull-up output terminal OUTH and a pull-down output terminal OUTL, where the pull-up output terminal OUTH is configured to output a high-level driving signal, and the pull-down output terminal OUTL is configured to output a low-level driving signal, and the pull-down output terminal OUTL is electrically connected to the first terminal of the first resistor and the first terminal of the switching unit.
According to another aspect of the present disclosure, there is provided an electronic device including:
the grid driving device.
Various aspects of the embodiments of the present disclosure may be connected in parallel with the first resistor by setting the switching unit, when the driving voltage output by the output end of the gate driving unit is a negative voltage, the switching unit may be naturally turned on, and the first resistor is shorted, so that the driving signal directly drives the gate of the first transistor through the switching unit, and thus, the embodiments of the present disclosure may avoid an additional voltage drop caused by the first resistor when the gate driving unit outputs the negative voltage, thereby inhibiting the miller effect, and protecting the circuit. Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments, features and aspects of the present disclosure and together with the description, serve to explain the principles of the disclosure.
Fig. 1 shows a schematic diagram of a gate driving apparatus according to an embodiment of the present disclosure.
Fig. 2 shows a schematic diagram of a gate driving apparatus according to an embodiment of the present disclosure.
Fig. 3 shows a schematic diagram of a gate driving apparatus according to an embodiment of the present disclosure.
Fig. 4 shows a schematic diagram of a gate driving apparatus according to an embodiment of the present disclosure.
Fig. 5 shows a schematic diagram of a gate driving apparatus according to an embodiment of the present disclosure.
Fig. 6 shows a schematic diagram of a gate driving apparatus according to an embodiment of the present disclosure.
Fig. 7 shows a schematic diagram of a gate driving apparatus according to an embodiment of the present disclosure.
Fig. 8 shows a schematic diagram of a gate driving apparatus according to an embodiment of the present disclosure.
Fig. 9 shows a schematic diagram of a gate driving apparatus according to an embodiment of the present disclosure.
Detailed Description
Various exemplary embodiments, features and aspects of the disclosure will be described in detail below with reference to the drawings. In the drawings, like reference numbers indicate identical or functionally similar elements. Although various aspects of the embodiments are illustrated in the accompanying drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
The word "exemplary" is used herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
In addition, numerous specific details are set forth in the following detailed description in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements, and circuits well known to those skilled in the art have not been described in detail in order not to obscure the present disclosure.
Referring to fig. 1, fig. 1 is a schematic diagram illustrating a gate driving device according to an embodiment of the disclosure.
As shown in fig. 1, the apparatus is for driving a first transistor Q1, and includes a gate driving unit 10, a first resistor R1, and a switching unit 20, wherein:
the driving output terminal OUT of the gate driving unit 10 is electrically connected to the first terminal of the first resistor R1 and the first terminal of the switching unit 20, the second terminal of the first resistor R1 is electrically connected to the gate of the first transistor Q1 and the second terminal of the switching unit 20,
the driving output terminal OUT of the gate driving unit 10 is configured to output a driving signal to drive the first transistor Q1, and when the driving signal is a negative voltage, the switching unit 20 is in a conductive state, and the driving signal is transmitted to the gate of the first transistor Q1 through the switching unit 20.
Through the above device, in the embodiment of the disclosure, by setting the switch unit 20 in parallel with the first resistor R1, when the driving signal output by the output terminal OUT of the gate driving unit 10 is a negative voltage, the switch unit 20 can be turned on by the driving signal (natural conduction, no additional control signal is needed), and the first resistor R1 is shorted, so that the driving signal directly drives the gate of the first transistor Q1 through the switch unit 20, and thus, the embodiment of the disclosure can avoid the additional voltage drop caused by the first resistor R1 when the gate driving unit 10 outputs the negative voltage, thereby inhibiting the miller effect, and the protection circuit. For the existing gate driving circuit without the miller clamping function, only one switching unit 20 is needed to be added to realize the miller effect suppression. The switch unit 20 provided in the embodiment of the present disclosure can be naturally turned on when driving and outputting a negative voltage, and no additional control signal is needed, but the related art generally adds a complex miller clamping circuit to the existing gate stage driving circuit, which generally needs to be increased: the comparator, the auxiliary switch and the control unit, and the related technology needs special control signals or control logic to control the miller clamp circuit, and the control mode is complex and the cost is high.
By serially connecting the first resistor R1 between the output terminal OUT of the gate driving unit 10 and the gate of the first transistor Q1, the embodiments of the present disclosure can adjust the on/off speed of the first transistor Q1, so as to avoid the problems of switch ringing, too high stress, large interference, etc. caused by too fast switching speed.
In one example, when the driving signal is a negative voltage, the switching unit 20 is in a conductive state, and may include: the switching unit 20 is turned on by the driving signal, that is, when the driving signal is a negative voltage, the switching unit 20 is turned on by the driving signal. It can be seen that the driving signal output by the gate driving unit 10 can be directly multiplexed as the switch control signal of the switch unit 20, without adding an additional control unit or switch control signal to control the switch unit 20, so that the design can reduce the cost and the complexity of the device.
In one possible embodiment, when the driving signal is a positive voltage, the switching unit 20 is in an off state, and the driving signal is transmitted to the gate of the first transistor Q1 through the first resistor R1.
When the driving signal is positive voltage, the switching unit 20 is designed to be in an off state, so that the switching unit 20 does not affect the driving of the first transistor Q1, and also does not affect the switching speed of the first transistor Q1, and the miller effect can be reduced while maintaining the system performance.
If the gate driving device according to the embodiment of the present disclosure is not adopted, for example, the switching unit 20 is not disposed in parallel with the first resistor R1, the first transistor Q1 may cause transient current due to the miller effect, if the gate driving unit 10 outputs a negative voltage driving signal, the voltage may further decrease after the driving signal passes through the first resistor R1, which may cause a voltage spike to occur at the gate of the first transistor Q1, and when a positive voltage spike occurs at the drain of the first transistor Q1, the voltage spike may cause the first transistor Q1 to be turned on by mistake, thereby damaging the circuit. With the gate driving device in the embodiment of the present disclosure, when the driving signal is negative, the switching unit 20 may be turned on by the negative driving signal, so that the driving signal may be transmitted to the gate of the first transistor Q1 through the switching unit 20, thereby avoiding further reduction of the voltage of the driving signal, and thus, the miller effect may be suppressed, thereby protecting circuits and systems.
It should be noted that the specific embodiment of the gate driving unit 10 is not limited in this disclosure, and a person skilled in the art may select as required, as long as it can output a driving signal to control on and off of the first transistor Q1.
In one example, the first transistor Q1 may be a silicon carbide SiC transistor or an IGBT, and the disclosure is not limited with respect to a specific type of the first transistor Q1 and an operation scenario thereof.
There are a number of possible implementations of the switching unit 20, and the following exemplary description of possible implementations of the switching unit 20 is given.
Referring to fig. 2, fig. 2 is a schematic diagram of a gate driving device according to an embodiment of the disclosure.
In one possible embodiment, as shown in fig. 2, the switching unit 20 may include a second transistor Q2, a third transistor Q3, wherein:
the drain electrode of the second transistor Q2 is electrically connected to the driving output OUT and the first end of the first resistor R1, the source electrode of the second transistor Q2 is electrically connected to the source electrode of the third transistor Q3, the drain electrode of the third transistor Q3 is electrically connected to the gate electrode of the first transistor Q1 and the second end of the first resistor R1, the gate electrodes of the second transistor Q2 and the third transistor Q3 are grounded or receive a first voltage,
the drain electrode of the second transistor Q2 is the first end of the switch unit 20, and the drain electrode of the third transistor Q3 is the second end of the switch unit 20.
When the driving output terminal OUT of the gate driving unit 10 outputs a negative driving signal, since the gate of the second transistor Q2 and the gate of the third transistor Q3 are grounded or connected to the first voltage and the sources thereof are connected, the second transistor Q2 and the third transistor Q3 may be turned on under the negative driving signal, and thus the driving signal may be transmitted to the gate of the first transistor Q1 through the switching unit 20.
In one example, for the gate driving unit 10 having the lowest driving output pull-down voltage of 0V, the gate of the second transistor Q2 and the gate of the third transistor Q3 are higher than the threshold voltages thereof to ensure normal turn-on when the output is low, which plays a role in suppressing the miller effect. For example, for a normally used 1V threshold voltage switching tube, the gate may be fixedly biased at more than 1V, for example 2V, i.e. in this case the first voltage may be more than 1V.
In one example, the second Transistor Q2 and the third Transistor Q3 may be NMOS (N-Metal-Oxide-Semiconductor Field-Effect-Transistor, N-type Metal Oxide semiconductor field Effect Transistor).
As shown in fig. 2, the second transistor Q2 and the third transistor Q3 are connected back-to-back, and the switch unit 20 is realized by back-to-back NMOS transistors, and since the NMOS transistors are turned on when the gate-source voltage is greater than the threshold voltage, the switch unit 20 can be naturally turned on when the gate driving unit 10 outputs the negative voltage, and no additional control signal is needed.
Referring to fig. 3, fig. 3 is a schematic diagram illustrating a gate driving device according to an embodiment of the disclosure.
In one possible implementation, as shown in fig. 3, the switching unit 20 includes a fourth transistor Q4 and a fifth transistor Q5, where:
the source of the fourth transistor Q4 is electrically connected to the driving output OUT and the first end of the first resistor R1, the drain of the fourth transistor Q4 is electrically connected to the drain of the fifth transistor Q5, the source of the fifth transistor Q5 is electrically connected to the gate of the first transistor Q1 and the second end of the first resistor R1, the gates of the fourth transistor Q4 and the fifth transistor Q5 are grounded or receive a second voltage,
the source of the fourth transistor Q4 is the first terminal of the switch unit 20, and the source of the fifth transistor Q5 is the second terminal of the switch unit 20.
When the driving output terminal OUT of the gate driving unit 10 outputs a negative driving signal, the gate of the fourth transistor Q4 and the gate of the fifth transistor Q5 are grounded or connected to the second voltage, and the drains thereof are connected, so that the fourth transistor Q4 and the fifth transistor Q5 may be turned on under the negative driving signal, and thus, the driving signal may be transmitted to the gate of the first transistor Q1 through the switching unit 20.
In one example, for the gate driving unit 10 with the lowest pull-down voltage of 0V, the gate of the fourth transistor Q4 and the gate of the fifth transistor Q5 are higher than the threshold voltages thereof, so as to ensure that the transistor can be normally turned on when the output is low, and thus the transistor has the function of inhibiting the miller effect. For example, for a normally used 1V threshold voltage switching tube, the gate may be fixedly biased at more than 1V, for example 2V, i.e. in this case the second voltage may be more than 1V.
In one example, the fourth transistor Q4 and the fifth transistor Q5 may be NMOS transistors, and the fourth transistor Q4 and the fifth transistor Q5 are connected back-to-back, and the switch unit 20 is implemented by the back-to-back NMOS transistors, and since the NMOS transistors are turned on when the gate-source voltage is greater than the threshold voltage, the switch unit 20 may be naturally turned on when the gate driving unit 10 outputs the negative voltage, without an additional control signal, which is more efficient, simpler, and lower in cost than the related art.
Referring to fig. 4, fig. 4 is a schematic diagram illustrating a gate driving device according to an embodiment of the disclosure.
In one possible embodiment, as shown in fig. 4, the switching unit includes a sixth transistor Q6, a first diode D1, wherein:
the drain electrode of the sixth transistor Q6 is electrically connected to the driving output terminal OUT and the first end of the first resistor R1, the source electrode of the sixth transistor Q6 is electrically connected to the cathode of the first diode D1, the anode of the first diode D1 is electrically connected to the gate electrode of the first transistor Q1 and the second end of the first resistor R1, the gate electrode of the sixth transistor Q6 is grounded,
the drain electrode of the sixth transistor Q6 is a first terminal of the switching unit 20, and the anode electrode of the first diode D1 is a second terminal of the switching unit 20.
When the driving output terminal OUT of the gate driving unit 10 outputs a negative driving signal, since the gate of the sixth transistor Q6 is grounded, the sixth transistor Q6 may be turned on under the negative driving signal, and thus, the driving signal may be transmitted to the gate of the first transistor Q1 through the switching unit 20.
In one example, the sixth transistor Q6 may be an NMOS transistor, and since the NMOS transistor is turned on when the gate-source voltage is greater than the threshold voltage, the switch unit 20 may be naturally turned on when the gate driving unit 10 outputs the negative voltage, no additional control signal is needed, and the first diode D1 is connected to the sixth transistor Q6, so that the current of the first transistor Q1 is prevented from flowing to the gate driving unit 10, and the device is protected.
Referring to fig. 5, fig. 5 shows a schematic diagram of a gate driving device according to an embodiment of the disclosure.
In one possible embodiment, as shown in fig. 5, the switching unit includes a seventh transistor Q7, a second diode D2, wherein:
the source of the seventh transistor Q7 is electrically connected to the driving output terminal OUT and the first end of the first resistor R1, the drain of the seventh transistor Q7 is electrically connected to the cathode of the second diode D2, the anode of the second diode D2 is electrically connected to the gate of the first transistor Q1 and the second end of the first resistor R1, the gate of the seventh transistor Q7 is grounded,
the drain electrode of the seventh transistor Q7 is a first terminal of the switch unit 20, and the anode electrode of the second diode D2 is a second terminal of the switch unit 20.
When the driving output terminal OUT of the gate driving unit 10 outputs a negative driving signal, since the gate of the seventh transistor Q7 is grounded, the seventh transistor Q7 may be turned on under the negative driving signal, and thus, the driving signal may be transmitted to the gate of the first transistor Q1 through the switching unit 20.
In one example, the seventh transistor Q7 may be an NMOS transistor, and since the NMOS transistor is turned on when the gate-source voltage is greater than the threshold voltage, the switch unit 20 may be turned on naturally when the gate driving unit 10 outputs the negative voltage, without an additional control signal, and the second diode D2 is connected to the seventh transistor Q7, so that the current of the first transistor Q1 is prevented from flowing to the gate driving unit 10, which may protect the device, and compared with the related art, the switch unit is more efficient, simpler, and lower in cost.
Referring to fig. 6, fig. 6 is a schematic diagram illustrating a gate driving device according to an embodiment of the disclosure.
In one possible embodiment, as shown in fig. 6, the switching unit includes an eighth transistor Q8, a third diode D3, wherein:
the negative electrode of the third diode D3 is electrically connected to the driving output terminal OUT and the first end of the first resistor R1, the positive electrode of the third diode D3 is electrically connected to the source electrode of the eighth transistor Q8, the drain electrode of the eighth transistor Q8 is electrically connected to the gate electrode of the first transistor Q1 and the second end of the first resistor R1, the gate electrode of the eighth transistor Q8 is grounded,
the negative electrode of the third diode D3 is the first end of the switch unit 20, and the drain electrode of the eighth transistor Q8 is the second end of the switch unit 20.
When the driving output terminal OUT of the gate driving unit 10 outputs a negative driving signal, since the gate of the eighth transistor Q8 is grounded, the eighth transistor Q8 may be turned on under the negative driving signal, and thus, the driving signal may be transmitted to the gate of the first transistor Q1 through the switching unit 20.
In one example, the eighth transistor Q8 may be an NMOS transistor, and since the NMOS transistor is turned on when the gate-source voltage is greater than the threshold voltage, the switch unit 20 may be turned on naturally when the gate driving unit 10 outputs the negative voltage, without an additional control signal, and the third diode D3 is connected to the eighth transistor Q8, so that the current of the first transistor Q1 is prevented from flowing to the gate driving unit 10, which may protect the device, and compared with the related art, the switch unit is more efficient, simpler, and lower in cost.
Referring to fig. 7, fig. 7 is a schematic diagram illustrating a gate driving device according to an embodiment of the disclosure.
In one possible embodiment, as shown in fig. 7, the switching unit includes a ninth transistor Q9, a fourth diode D4, wherein:
the negative electrode of the fourth diode D4 is electrically connected to the driving output terminal OUT and the first end of the first resistor R1, the positive electrode of the fourth diode D4 is electrically connected to the drain electrode of the ninth transistor Q9, the source electrode of the ninth transistor Q9 is electrically connected to the gate electrode of the first transistor and the second end of the first resistor, the gate electrode of the ninth transistor Q9 is grounded,
the negative electrode of the fourth diode D4 is the first end of the switching unit, and the source drain of the ninth transistor Q9 is the second end of the switching unit.
When the driving output terminal OUT of the gate driving unit 10 outputs a negative driving signal, since the gate of the ninth transistor Q9 is grounded, the ninth transistor Q9 may be turned on under the negative driving signal, and thus, the driving signal may be transmitted to the gate of the first transistor Q1 through the switching unit 20.
The foregoing describes possible implementations of the switching unit in the gate driving apparatus, and it should be understood that the above description is exemplary and should not be construed as limiting the present disclosure.
In one example, the ninth transistor Q9 may be an NMOS transistor, and since the NMOS transistor is turned on when the gate-source voltage is greater than the threshold voltage, the switch unit 20 may be turned on naturally when the gate driving unit 10 outputs the negative voltage, without an additional control signal, and the fourth diode D4 is connected to the ninth transistor Q9, so that the current of the first transistor Q1 is prevented from flowing to the gate driving unit 10, which may protect the device, and compared with the related art, the switch unit is more efficient, simpler, and lower in cost.
Referring to fig. 8, fig. 8 is a schematic diagram of a gate driving device according to an embodiment of the disclosure.
In a possible embodiment, as shown in fig. 8, the apparatus may further include a first capacitor C1, a fifth diode D5, and a second resistor R2, and the driving output terminal includes a first driving output terminal OUT1, a second driving output terminal NEG, where:
the first driving output terminal OUT1 is electrically connected to the first terminal of the first capacitor C1, the second driving output terminal NEG is electrically connected to the second terminal of the first capacitor C1, the negative electrode of the fifth diode D5, the first terminal of the first resistor R1 and the first terminal of the switching unit 20,
the positive electrode of the fifth diode D5 is electrically connected to the first end of the second resistor R2, the second end of the second resistor R2 is electrically connected to the second end of the first resistor R1, the second end of the switch unit 20, the gate of the first transistor Q1,
the voltage difference between the first driving output terminal OUT1 and the second driving output terminal NEG is a third voltage.
The second terminal of the first capacitor C1 may be used as the driving output terminal OUT.
According to the embodiment of the disclosure, the fifth diode D5 and the second resistor R2 are added to be connected in parallel with the first resistor R1, so that the on-off state of the first transistor Q1 can be regulated, and the problems of switch ringing, over-high stress, over-high interference and the like caused by high switching speed are avoided.
The specific size of the voltage difference third voltage at two ends of the first capacitor C1 is not limited, and a person skilled in the art can set the voltage difference third voltage according to needs, and the output driving signal can be more stable by setting the first capacitor C1.
Since the voltage difference between the two ends of the first capacitor C1 is stabilized at the third voltage, when the first driving output OUT1 changes, the voltage of the second driving output NEG will follow the change, so as to maintain the voltage difference between the two ends of the first capacitor C1 as the third voltage.
When the voltage output from the second driving output NEG is negative, the switching unit 20 is turned on, thereby shorting the first resistor R1.
Referring to fig. 9, fig. 9 is a schematic diagram of a gate driving device according to an embodiment of the disclosure.
In one possible embodiment, as shown in fig. 9, the driving output terminal OUT may include a pull-up output terminal OUTH for outputting a driving signal of a high level and a pull-down output terminal OUTL for outputting a driving signal of a low level, wherein the pull-down output terminal OUTL is electrically connected to a first terminal of the first resistor R1 and a first terminal of the switching unit 20.
In one example, as shown in fig. 9, the apparatus may further include a fifth resistor R5, a first terminal of the fifth resistor R5 is electrically connected to the driving output terminal OUTH, and a second terminal of the fifth resistor R5 is electrically connected to the second terminal of the first resistor R1, the second terminal of the switching unit 20, and the gate of the first transistor.
The grid driving device provided by the embodiment of the disclosure can eliminate the short circuit risk of the Miller effect, enhance the reliability of the system, reduce the maintenance cost, eliminate the negative pressure stress risk caused by the Miller effect, enhance the reliability of the system, and use the device to use faster switching speed, thereby improving the working efficiency, reducing the volume and increasing the power.
The foregoing description of the embodiments of the present disclosure has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or the improvement of technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (5)
1. A gate driving device for driving a first transistor, the device comprising a gate driving unit, a first resistor, a switching unit, wherein:
the driving output end of the grid driving unit is electrically connected with the first end of the first resistor and the first end of the switching unit, the second end of the first resistor is electrically connected with the grid of the first transistor and the second end of the switching unit,
the driving output end of the grid driving unit is used for outputting a driving signal to drive the first transistor, when the driving signal is negative voltage, the switching unit is in a conducting state, the driving signal is transmitted to the grid of the first transistor through the switching unit,
the switching unit includes a sixth transistor, a first diode, wherein: the drain electrode of the sixth transistor is electrically connected to the driving output end and the first end of the first resistor, the source electrode of the sixth transistor is electrically connected to the negative electrode of the first diode, the positive electrode of the first diode is electrically connected to the grid electrode of the first transistor and the second end of the first resistor, and the grid electrode of the sixth transistor is grounded, wherein the drain electrode of the sixth transistor is the first end of the switch unit, and the positive electrode of the first diode is the second end of the switch unit; or (b)
The switch unit comprises a seventh transistor and a second diode, wherein: the source electrode of the seventh transistor is electrically connected to the driving output end and the first end of the first resistor, the drain electrode of the seventh transistor is electrically connected to the negative electrode of the second diode, the positive electrode of the second diode is electrically connected to the grid electrode of the first transistor and the second end of the first resistor, the grid electrode of the seventh transistor is grounded, wherein the drain electrode of the seventh transistor is the first end of the switch unit, and the positive electrode of the second diode is the second end of the switch unit; or (b)
The switching unit comprises an eighth transistor and a third diode, wherein: the negative electrode of the third diode is electrically connected to the driving output end and the first end of the first resistor, the positive electrode of the third diode is electrically connected to the source electrode of the eighth transistor, the drain electrode of the eighth transistor is electrically connected to the grid electrode of the first transistor and the second end of the first resistor, and the grid electrode of the eighth transistor is grounded, wherein the negative electrode of the third diode is the first end of the switch unit, and the drain electrode of the eighth transistor is the second end of the switch unit; or (b)
The switching unit comprises a ninth transistor and a fourth diode, wherein: the negative electrode of the fourth diode is electrically connected to the driving output end and the first end of the first resistor, the positive electrode of the fourth diode is electrically connected to the drain electrode of the ninth transistor, the source electrode of the ninth transistor is electrically connected to the grid electrode of the first transistor and the second end of the first resistor, and the grid electrode of the ninth transistor is grounded, wherein the negative electrode of the fourth diode is the first end of the switch unit, and the source electrode and the drain electrode of the ninth transistor are the second end of the switch unit.
2. The apparatus of claim 1, wherein the switching unit is in an off state when the driving signal is a positive voltage, the driving signal being transmitted to the gate of the first transistor through the first resistor.
3. The apparatus of claim 1, further comprising a first capacitor, a fifth diode, a second resistor, the drive output comprising a first drive output, a second drive output, wherein:
the first driving output end is electrically connected with the first end of the first capacitor, the second driving output end is electrically connected with the second end of the first capacitor, the cathode of the fifth diode, the first end of the first resistor and the first end of the switch unit,
the positive electrode of the fifth diode is electrically connected with the first end of the second resistor, the second end of the second resistor is electrically connected with the second end of the first resistor, the second end of the switch unit and the grid electrode of the first transistor,
the voltage difference between the first driving output end and the second driving output end is a third voltage.
4. The apparatus of claim 1, wherein the driving output terminal comprises a pull-up output terminal OUTH for outputting a driving signal of a high level and a pull-down output terminal OUTL for outputting a driving signal of a low level, wherein the pull-down output terminal OUTL is electrically connected to the first terminal of the first resistor and the first terminal of the switching unit.
5. An electronic device, the electronic device comprising:
the gate driving device according to any one of claims 1 to 4.
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| CN202311396145.3A CN117424585A (en) | 2019-12-30 | 2019-12-30 | Gate driving device and electronic equipment |
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| CN201911394606.7A CN111082788B (en) | 2019-12-30 | 2019-12-30 | Gate driving device and electronic equipment |
| CN202311396145.3A CN117424585A (en) | 2019-12-30 | 2019-12-30 | Gate driving device and electronic equipment |
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| DE19913140C2 (en) * | 1999-03-23 | 2003-04-03 | St Microelectronics Gmbh | Electrical integrated circuit |
| KR101102128B1 (en) * | 2009-12-15 | 2012-01-02 | 서울대학교산학협력단 | Class e power amplifier |
| KR101297460B1 (en) * | 2012-04-24 | 2013-08-16 | 엘에스산전 주식회사 | Apparatus for driving gate |
| CN103944549A (en) * | 2014-04-03 | 2014-07-23 | 南京航空航天大学 | High-reliability MOSFET drive circuit |
| TWI548187B (en) * | 2015-01-23 | 2016-09-01 | Dynamic drive capability adjustment of the power control device | |
| JP6617571B2 (en) * | 2016-01-14 | 2019-12-11 | 富士電機株式会社 | Semiconductor switching element gate drive circuit |
| US10476496B2 (en) * | 2016-07-04 | 2019-11-12 | Mitsubishi Electric Corporation | Drive circuit and power module including the same |
| CN107342756A (en) * | 2017-08-16 | 2017-11-10 | 重庆大学 | A kind of improvement gate-drive device of suppression SiC MOSFET bridge arm crosstalks |
| CN108649777A (en) * | 2018-04-12 | 2018-10-12 | 南京航空航天大学 | A kind of eGaN HEMT bridge arm clutter reduction driving circuits and its control method |
| CN110190842B (en) * | 2019-07-22 | 2019-10-15 | 上海瞻芯电子科技有限公司 | Driving device and electronic equipment |
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