CN117336848A - Wireless time synchronization method - Google Patents
Wireless time synchronization method Download PDFInfo
- Publication number
- CN117336848A CN117336848A CN202311500804.3A CN202311500804A CN117336848A CN 117336848 A CN117336848 A CN 117336848A CN 202311500804 A CN202311500804 A CN 202311500804A CN 117336848 A CN117336848 A CN 117336848A
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- clock
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- 238000000034 method Methods 0.000 title claims abstract description 30
- 238000005259 measurement Methods 0.000 claims description 10
- 230000002457 bidirectional effect Effects 0.000 claims description 8
- 230000003247 decreasing effect Effects 0.000 claims description 2
- 239000013078 crystal Substances 0.000 abstract description 4
- 238000004891 communication Methods 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 4
- 230000007423 decrease Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W56/00—Synchronisation arrangements
- H04W56/001—Synchronization between nodes
- H04W56/002—Mutual synchronization
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
- H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0676—Mutual
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W56/00—Synchronisation arrangements
- H04W56/0055—Synchronisation arrangements determining timing error of reception due to propagation delay
- H04W56/0065—Synchronisation arrangements determining timing error of reception due to propagation delay using measurement of signal travel time
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Electric Clocks (AREA)
Abstract
The invention provides a wireless time synchronization method, which relates to the technical field of communication and navigation, and obtains clock difference information of integer times and decimal times in a time comparison process by utilizing an interpolation mode; and in the clock calibration process, the local clock is multiplied, clock difference information and the multiplied local clock are input to the pulse control module together to calculate the local clock adjustment quantity, the local clock is adjusted in a timer mode, and finally the calibrated clock is divided to obtain the local input clock. The time synchronization precision is improved; the clock calibration is realized in a timer mode, the crystal oscillator module is not required to be adjusted, and the hardware complexity is reduced.
Description
Technical Field
The invention relates to the technical field of communication and navigation, in particular to a wireless time synchronization method.
Background
In wireless communication and navigation systems, precise time synchronization between devices is often required or high-precision timing in the nanosecond range can be achieved. In addition, in practical system and chip development, there is often a cost problem caused by limitation of hardware modules or excessive components, and time synchronization cannot be realized by directly adjusting the frequency of the crystal oscillator.
Disclosure of Invention
In view of this, the present invention proposes a wireless time synchronization method. The time comparison precision and the clock calibration precision are improved, the clock calibration is realized in a timer mode, the crystal oscillator module is not required to be adjusted, and the hardware complexity is reduced.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:
a wireless time synchronization method, comprising the steps of:
(1) The master clock end and the slave clock end respectively interpolate the related signals by using an interpolation algorithm in the process of measuring the arrival time stamp to acquire time information of integer times and decimal times;
(2) A bidirectional time measurement link is constructed between the master clock end and the slave clock end, the obtained integral multiple and decimal multiple time information is transmitted to the opposite end, and four time stamp information in the bidirectional time measurement process is collected at the slave clock end;
(3) Calculating clock difference according to the four time stamp information by the slave clock end to obtain clock deviation information of combination of integer multiple and decimal multiple;
(4) The slave clock end multiplies the local clock to obtain a clock to be calibrated with the same precision as the clock deviation information, obtains the local clock adjustment quantity required to be calibrated according to the clock deviation information, and adjusts the local clock;
further, the specific process of the step (4) is as follows:
(401) The slave clock end multiplies the local clock to obtain a multiplied clock with the same time resolution as the clock deviation information;
(402) Judging the frequency value of the local frequency multiplication clock frequency leading or lagging standard clock according to the clock deviation information, and calculating a corresponding carry or borrow value;
(403) According to the application scene and the signal protocol, selecting to periodically count, and increasing and decreasing the counting period of the local clock according to the carry or borrow value;
(404) And dividing the calibrated and adjusted local clock to obtain the local required input clock.
Compared with the background technology, the invention has the following advantages:
(1) The invention improves the precision of time synchronization in a mode of combining interpolation and frequency multiplication and frequency division.
(2) The clock calibration method provided by the invention can realize time synchronization without adjusting the crystal oscillator, simplifies the circuit and reduces the hardware complexity.
Drawings
Fig. 1 is a flow chart of a wireless time synchronization method of the present invention.
FIG. 2 is a schematic diagram of a two-way time measurement mechanism in the time alignment process of the present invention.
Fig. 3 is a schematic diagram of the clock calibration process of the present invention.
Detailed Description
The invention is further described below with reference to the drawings and detailed description.
FIG. 1 is a diagram showing a wireless time synchronization method according to the present invention, which can be divided into a time comparison and clock calibration process; the specific implementation process is as follows:
(1) The master clock end and the slave clock end respectively interpolate the related signals by using an interpolation algorithm in the process of measuring the arrival time stamp to acquire time information of integer times and decimal times;
taking a hardware sampling rate of 250MHz as an example, the time resolution is 4ns, the signal after the related time stamp measurement process is reached can obtain an integer time delay value with the resolution of 4ns, and 8 times interpolation is carried out on the signal to obtain a decimal time delay value with the time resolution of 0.5 ns;
(2) A bidirectional time measurement link is constructed between the master clock end and the slave clock end, the obtained integral multiple and decimal multiple time information is transmitted to the opposite end, and four time stamp information in the bidirectional time measurement process is collected at the slave clock end;
FIG. 2 is a diagram of a bidirectional time measurement mechanism in the time comparison process of the present invention, wherein a bidirectional time measurement link is constructed, and four corresponding time stamp information can be collected from a clock end;
(3) Calculating clock difference according to the four time stamp information by the slave clock end to obtain clock deviation information of combination of integer multiple and decimal multiple;
(4) The slave clock end multiplies the local clock to obtain a clock to be calibrated with the same precision as the clock deviation information, obtains the local clock adjustment quantity required to be calibrated according to the clock deviation information, and adjusts the local clock;
FIG. 3 is a flow chart of the clock calibration process of the present invention, which is specifically as follows:
(401) The frequency multiplication module multiplies the local clock from the clock end to obtain a frequency multiplication clock with the same time resolution as the clock deviation information;
taking a slave node local clock of 250MHz as an example, 8 times frequency multiplication is carried out on the local clock so as to obtain a clock to be calibrated with the same time resolution as the clock deviation information;
(402) The pulse control module judges the frequency value of the local frequency multiplication clock frequency leading or lagging standard clock according to the clock deviation information, and calculates a corresponding carry or borrow value;
(403) The local timer module selects to periodically count according to the application scene and the signal protocol, and increases and decreases the counting period of the local clock according to the carry or borrow value;
for example, the local clock counts 10000 cycles, and when the local clock adjustment amount is positive 5, that is, the local clock frequency is slower than the standard clock frequency by 5 clocks, the local timing cycle is adjusted to 10005.
(404) The frequency division module divides the calibrated and adjusted local clock to obtain the local required input clock, thereby completing the single time synchronization process between the master device and the slave device, and the time synchronization precision can reach subnanosecond level by taking the above as an example.
(405) The above process is periodically repeated to ensure that the clock skew is controlled within a reasonable range.
Claims (2)
1. A wireless time synchronization method, comprising the steps of:
(1) The master clock end and the slave clock end respectively interpolate the related signals by using an interpolation algorithm in the process of measuring the arrival time stamp to acquire time information of integer times and decimal times;
(2) A bidirectional time measurement link is constructed between the master clock end and the slave clock end, the obtained integral multiple and decimal multiple time information is transmitted to the opposite end, and four time stamp information in the bidirectional time measurement process is collected at the slave clock end;
(3) Calculating clock difference according to the four time stamp information by the slave clock end to obtain clock deviation information of combination of integer multiple and decimal multiple;
(4) And multiplying the frequency of the local clock by the slave clock end to obtain the clock to be calibrated with the same precision as the clock deviation information, and obtaining the local clock adjustment quantity required to be calibrated according to the clock deviation information to adjust the local clock.
2. The wireless time synchronization method according to claim 1, wherein the specific process of step (4) is:
(401) The slave clock end multiplies the local clock to obtain a multiplied clock with the same time resolution as the clock deviation information;
(402) Judging the frequency value of the local frequency multiplication clock frequency leading or lagging standard clock according to the clock deviation information, and calculating a corresponding carry or borrow value;
(403) According to the application scene and the signal protocol, selecting to periodically count, and increasing and decreasing the counting period of the local clock according to the carry or borrow value;
(404) And dividing the calibrated and adjusted local clock to obtain the local required input clock.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311500804.3A CN117336848A (en) | 2023-11-13 | 2023-11-13 | Wireless time synchronization method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202311500804.3A CN117336848A (en) | 2023-11-13 | 2023-11-13 | Wireless time synchronization method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN117336848A true CN117336848A (en) | 2024-01-02 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202311500804.3A Pending CN117336848A (en) | 2023-11-13 | 2023-11-13 | Wireless time synchronization method |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117783836B (en) * | 2024-02-26 | 2024-06-11 | 成都电科星拓科技有限公司 | PRBS generation and self-detection system and PRBS self-detection method |
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2023
- 2023-11-13 CN CN202311500804.3A patent/CN117336848A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117783836B (en) * | 2024-02-26 | 2024-06-11 | 成都电科星拓科技有限公司 | PRBS generation and self-detection system and PRBS self-detection method |
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