CN117290189B - Monitoring control system for memory chip CP testing machine - Google Patents
Monitoring control system for memory chip CP testing machine Download PDFInfo
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- CN117290189B CN117290189B CN202311584784.2A CN202311584784A CN117290189B CN 117290189 B CN117290189 B CN 117290189B CN 202311584784 A CN202311584784 A CN 202311584784A CN 117290189 B CN117290189 B CN 117290189B
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- 238000012360 testing method Methods 0.000 title claims abstract description 120
- 238000012544 monitoring process Methods 0.000 title claims abstract description 34
- 239000013256 coordination polymer Substances 0.000 title claims description 14
- 239000000523 sample Substances 0.000 claims abstract description 54
- 238000001514 detection method Methods 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 claims abstract description 5
- 239000007788 liquid Substances 0.000 claims description 15
- 238000006243 chemical reaction Methods 0.000 claims description 9
- 238000004891 communication Methods 0.000 claims description 9
- 238000001816 cooling Methods 0.000 claims description 6
- 238000003032 molecular docking Methods 0.000 claims description 4
- 239000000110 cooling liquid Substances 0.000 claims description 3
- 230000017525 heat dissipation Effects 0.000 claims description 3
- 235000012431 wafers Nutrition 0.000 description 13
- 210000004556 brain Anatomy 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 210000001503 joint Anatomy 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012806 monitoring device Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3031—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a motherboard or an expansion card
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3037—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a memory, e.g. virtual memory, cache
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3055—Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
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- Quality & Reliability (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The invention discloses a monitoring control system for a memory chip CP (control processor) tester, which belongs to the technical field of wafer testing, and particularly comprises a power cabinet for providing a basic direct current power supply for the system; a main control board card is integrated in the power cabinet and is used as a system control center; the main control board is connected with the high-density interface board interface of the testing machine head through the power cabinet monitoring board interface; the testing machine head is used for providing digital power supply signals required by testing for the tested wafer, and a functional module in the testing machine head is connected with the high-density interface board card through a cable; the probe station is used for controlling the loading and unloading of the probe card, the taking and delivering of the wafer and the setting of the temperature and the humidity of the test environment; hi-Fix, which is used to connect the test signal inside the test machine head with the probe card, and realize the contact test with the wafer through the probe card; the invention realizes the accurate control and detection of the wafer test process.
Description
Technical Field
The invention relates to the technical field of wafer testing, in particular to a monitoring control system for a memory chip CP testing machine.
Background
With the increasing progress of electronic technology, devices such as computers, intelligent wearable devices, network monitoring devices and the like are increasing, and memory chips are widely existing in various electronic devices, so that testing of the memory chips is particularly important. The current domestic equipment for testing memory chips, especially DRAM test equipment, is basically in a completely blank state.
The wafer test CP (ChipProbing) is to perform needle test on each die after each die circuit on the wafer is etched, mount a probe (probe) made of gold wire into fine hair on the test head, contact with the contact (pad) on the die, test the electrical characteristics of the die, mark the unqualified die, then eliminate the unqualified die marked with the mark when the die is cut into independent dies by the die unit, and do not perform the next process any more, so as to avoid increasing the manufacturing cost.
Usually, the wafer test needs to be performed by the equipment such as a test machine head, a power cabinet, a probe station, a workstation and the like, which are matched with each other to complete the whole wafer test flow. The safety control of the power cabinet, the temperature monitoring control of the testing machine head, the pressure monitoring of the liquid cooling system, the information interaction between the probe station and the testing machine head, various commands and tasks of the probe card such as card loading and card unloading are extremely complex, and a brain is needed to monitor and control the stable operation of the whole system, so that various testing indexes of the chip are met. Based on the above, the invention provides a monitoring control system for a memory chip CP testing machine.
Disclosure of Invention
The invention aims to provide a monitoring control system for a memory chip CP testing machine, which solves the following technical problems:
the safety control of the power cabinet, the temperature monitoring control of the testing machine head, the pressure monitoring of the liquid cooling system, the information interaction between the probe station and the testing machine head, various commands and tasks such as card loading and card unloading of the probe card are extremely complex, and a brain is needed to monitor and control the stable operation of the whole system, so that various testing indexes of the chip are met. Based on the above, the invention provides a monitoring control system for a memory chip CP testing machine.
The aim of the invention can be achieved by the following technical scheme:
a monitor control system for a memory chip CP tester for controlling the tester, a power cabinet and a probe station, comprising:
the power cabinet is used for converting 380V three-phase power into 48V direct current power and providing a basic direct current power supply for the system; a main control board card is integrated in the power cabinet and used as a system control center, and is used for providing 160 paths of input interfaces, 128 paths of output interfaces, 8 paths of PWM waveforms, 8 paths of serial communication and 16 paths of ADCs; the main control board is connected with the high-density interface board interface of the testing machine head through the power cabinet monitoring board interface;
the testing machine head is used for providing digital power supply signals required by testing for the tested wafer, 32 digital board cards and 16 power board cards are placed in the testing machine head, and functional modules in the testing machine head are connected with the high-density interface board cards through cables;
the probe station is used for controlling the loading and unloading of the probe card, the taking and delivering of the wafer and the setting of the temperature and the humidity of the test environment;
Hi-Fix is used as a docking system of the test machine head and the probe station and is used for connecting test signals in the test machine head with the probe card, and the contact test between the test signals and the wafer is realized through the probe card; the Hi-Fix is internally integrated with a central clamp for locking the probe card.
As a further scheme of the invention: in the power cabinet, the main control board card comprises a power module, a CPU, an FPGA, an analog-to-digital conversion module, a serial port communication interface, pulse width modulation and digital signal input/output.
As a further scheme of the invention: the power supply module is used for converting a 48V power supply provided by the power supply cabinet into multiple paths of different voltages to supply power for the whole main control board card;
the CPU is used for configuring an FPGA program after power-on, receiving an upper computer instruction, forwarding the upper computer instruction to the FPGA, and reading the summarized state back to the upper computer, wherein the CPU and the upper computer are communicated through an Ethernet;
the FPGA is used for providing an output and input interface, PWM waveforms and ADC signal acquisition; the FPGA is communicated with the CPU through a PCIe protocol;
the analog-to-digital conversion module is used for acquiring analog signals and performing analog-to-digital conversion;
the pulse width modulation is used for adjusting the rotating speed of a fan of the test machine head;
the serial communication interface comprises a temperature sensor interface, a machine cooling liquid pressure interface and a light liquid detection sensor interface.
As a further scheme of the invention: the power cabinet monitoring board card is used for detecting whether a power supply is normal or not; detecting the state of a power cabinet component, wherein the power cabinet component comprises a power cabinet door, a power cabinet fan, a switch button of a power cabinet and a power cabinet indicator lamp;
the power cabinet monitoring board card is also used for a control interface of the board card cooling module and a signal source interface of the high-density interface board card; the connectivity of the power cabinet monitor card IS ensured by providing 8 sets of CON_IS signal reservations.
As a further scheme of the invention: the probe station is connected to the main control board card through an interlock signal through the power cabinet monitoring board card, so that the connection between the main control board card and the probe station is realized.
As a further scheme of the invention: the test machine head comprises the high-density interface board card which is used for detecting states of Hi-Fix and the probe card; the device IS used for detecting the temperature of the internal environment of the test machine head, and the connectivity of the high-density interface board IS ensured through 3 groups of CON_IS signal reservation.
As a further scheme of the invention: the functional module of the test machine head comprises a WHOI module, a WFAN module and a WHOS module;
the WHII module is used for reading states of a Pusher sensor and a ballplus sensor in the Hi-Fix, and judging whether the central clamp is locked or not by detecting the states of the sensors of the central clamp; there are 1 set of CON_IS signal reservations;
the WFAN module is used for controlling the heat dissipation fan module of the test machine head and reading back the state, and the inner part of the test machine is divided into two groups of fan modules which are respectively used for the front end and the rear end of the test machine; there are 1 set of CON_IS signal reservations;
the WHDS module is used for testing the monitoring of the internal liquid pressure of the machine head and detecting whether the liquid pressure is normal or not; 4 light liquid sensors are arranged in the test machine head; there are 1 set of CON_IS signal reservations.
As a further scheme of the invention: the input signal pull-up power of the system is 24V.
The invention has the beneficial effects that:
(1) The SMB integrated in the power cabinet is used as a main control board card, the monitoring board card interface of the power cabinet is connected with the high-density interface board card interface, and the functional module in the testing machine head is connected with the high-density interface board card through a cable, so that data acquisition and task distribution among the power cabinet, the testing machine head and the probe station are realized, and the wafer testing is completed together in cooperation;
(2) The invention adopts the mode of adding each functional sub-module on the main control board card, increases the convenience of design, has low cost for single sub-module, and simple and convenient function module replacement, and has CON_IS signal reservation between the main control board card and each sub-module, thereby ensuring the connectivity between each module, and the main control board card adopts a CPU and FPGA mode, which can provide up to 160 paths of output, 128 paths of input, 8 groups of serial ports, 8 paths of PWM waveform and 16 paths of ADC input, and can meet the requirement of system monitoring and the requirement of future online upgrade.
Drawings
The invention is further described below with reference to the accompanying drawings.
FIG. 1 is a schematic diagram of the structure of the present invention;
fig. 2 is a schematic structural diagram of a main control board card of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1-2, the present invention is a monitoring control system for a CP tester for a memory chip, for controlling a tester head, a power cabinet and a probe station, comprising:
the power cabinet is used for converting 380V three-phase power into 48V direct current power and providing a basic direct current power supply for the system; a main control board card is integrated in the power cabinet and used as a system control center, and is used for providing 160 paths of input interfaces, 128 paths of output interfaces, 8 paths of PWM waveforms, 8 paths of serial communication and 16 paths of ADCs; the main control board is connected with the high-density interface board interface of the testing machine head through the power cabinet monitoring board interface;
the testing machine head is used for providing digital power supply signals required by testing for the tested wafer, 32 digital board cards and 16 power board cards are placed in the testing machine head, and functional modules in the testing machine head are connected with the high-density interface board cards through cables;
the probe station is used for controlling the loading and unloading of the probe card, the taking and delivering of the wafer and the setting of the temperature and the humidity of the test environment;
Hi-Fix is used as a docking system of the test machine head and the probe station and is used for connecting test signals in the test machine head with the probe card, and the contact test between the test signals and the wafer is realized through the probe card; the Hi-Fix is internally integrated with a central clamp, and the central clamp is used for locking the probe card, so that the probe card is ensured not to deform, and all wafers and the probe card are ensured to be contacted normally.
In a preferred embodiment of the present invention, in the power cabinet, the main control board card includes a power module, a CPU, an FPGA, an analog-to-digital conversion module, a serial communication interface RS232C, pulse width modulation, and digital signal input/output.
In a preferred case of this embodiment, the power module is configured to convert a 48V power provided by the power cabinet to multiple different voltages, and supply power to the entire main control board card;
the CPU is used for configuring an FPGA program after power-on, receiving an upper computer instruction, forwarding the upper computer instruction to the FPGA, and reading the summarized state back to the upper computer, wherein the CPU and the upper computer are communicated through an Ethernet;
the FPGA is used for providing an output and input interface, PWM waveforms and ADC signal acquisition; the FPGA is communicated with the CPU through a PCIe protocol;
the analog-to-digital conversion module is used for acquiring analog signals and performing analog-to-digital conversion;
the pulse width modulation is used for adjusting the rotating speed of a fan of the test machine head;
the serial communication interface comprises a temperature sensor interface, a machine cooling liquid pressure interface and a light liquid detection sensor interface.
In another preferred embodiment of the present invention, the power cabinet monitor board is used for detecting whether the 48V and 24V power supplies are normal; the power cabinet state detection and control comprises whether a cabinet door of the power cabinet is stuck or not; whether the power cabinet fan works normally or not; detecting various switch buttons on the power cabinet; controlling the state of the indicator lamp of the power cabinet;
the power cabinet monitoring board card is also used for a control interface of the board card cooling module and a signal source interface of the high-density interface board card; the connectivity of the power cabinet monitor card IS ensured by providing 8 sets of CON_IS signal reservations.
In a preferred case of this embodiment, the probe station is connected to the main control board card through the power cabinet monitoring board card by an interlock signal, so as to realize connection between the main control board card and the probe station.
In another preferred embodiment of the present invention, the test head includes the high-density interface board for status detection of Hi-Fix and probe cards; the intelligent temperature sensor IS used for detecting the temperature of the internal environment of the test machine head, 4 groups of temperature sensors are arranged at 4 corners in the test machine head, the internal environment temperature of the test machine head IS detected in real time, and connectivity of the high-density interface board card IS ensured through 3 groups of CON_IS signals.
In a preferred case of this embodiment, the functional modules of the test head include a WHFI module, a WFAN module, and a WHDS module;
the WHII module is used for reading states of a Pusher sensor and a ballplus sensor in the Hi-Fix, and judging whether the central clamp is locked or not by detecting the states of the sensors of the central clamp; there are 1 set of CON_IS signal reservations;
the WFAN module is used for controlling the heat dissipation fan module of the test machine head and reading back the state, and the inner part of the test machine head is divided into two groups of fan modules which are respectively used for testing the front end and the rear end of the machine head; there are 1 set of CON_IS signal reservations, a total of 2 WFAN modules, a total of 2 sets of CON_IS signals;
the WHDS module is used for testing the monitoring of the internal liquid pressure of the machine head and detecting whether the liquid pressure is normal or not; 4 light liquid sensors are arranged in the test machine head; there are 1 set of CON_IS signal reservations.
In another preferred embodiment of the invention, the input signal pull-up power of the system is 24V,48V is the input dc power of the system, 24V is the system input signal pull-up power, and here 24V pull-up is used to match the probe station signal voltage.
The working flow of the monitoring control system of the invention is as follows:
1. and (3) power supply of a power cabinet:
a. and when the main circuit breaker of the power cabinet is started and the main control board card is booted for checking, the tower lamp above the power cabinet displays the process from on to off, and the main control board card is successfully started.
b. After the main control board card is electrified, firstly, system self-checking is carried out, each path of IO state is detected, all states are normal, then a safety switch of the power cabinet is closed, after the safety switch is closed, a Reset button is pressed down, and after Reset is completed, an AC button is started to flash.
c. When an AC button is pressed, an AC power supply is started, fan alarm information is detected after the AC power supply is started, the initial state of each sensor is detected, meanwhile, the fan of the test machine head is turned on, and the PWM waveform works at a duty ratio of 20%. And meanwhile, the state of the Chiller is detected, and whether the liquid cooling module works normally is judged. At the same time the DC button starts to flash.
d. After the DC button 2S is pressed, the DC power supply is started, and after the DC power supply is started, whether the direct current power supply of the 48V system is normal or not is detected; judging the position (locking or Open) of the test machine head, simultaneously increasing the PWM duty ratio of the fan control waveform to 40%, detecting CON_IS on each sub-module, and confirming the connection state of each sub-module.
2. The test machine head is in butt joint with the probe station for detection:
the butt joint detection of the test machine head and the probe station is divided into two states, wherein one is the open state of the test machine head (the test machine head is only lifted, and the test machine head is in the open state no matter what the angle is); the other is a test head docking (the test head is in a vertical state, 0 degrees);
test head open:
the main control board card firstly detects the states of 4 pushers (used for pushing the probe card) on HI-FIX and 4 ballplus (used for locking the probe card) on Hi-FIX in the test machine head, judges whether the test machine head is in a free state, and if the test machine head is not in the free state, the main control board card sends an instruction to enable the test machine head to reach the free state so as to ensure that the probe card is not damaged before the next operation.
Test head locking:
firstly, reading size information of a probe card; detecting a Lock sensor of the probe card, and judging whether the probe card is locked or not; detecting a CenterClampLock sensor, and judging whether the Centerlock is locked or not; detecting whether the MotherBoard is locked or not; after all is normal, it indicates that the test head and probe card are ready to complete and the chip test flow can begin.
3. The test starts:
in the testing process of the testing chip, the main control board card can always detect each path of alarm, the sensor state, if a problem occurs, the indicator lamp above the power cabinet can be lightened, and the system alarms.
4. And (3) power failure of the power cabinet:
after the test is finished, the system is powered OFF, the DC power supply is firstly powered OFF, and after the DC OFF button 2S is pressed, the fan can continuously work for 20S, and the DC power supply is turned OFF; pressing the AC OFF button again, turning OFF the AC power supply; and turning off the main circuit breaker, and turning off the Chiller, so that the system is successfully powered off.
The foregoing describes one embodiment of the present invention in detail, but the description is only a preferred embodiment of the present invention and should not be construed as limiting the scope of the invention. All equivalent changes and modifications within the scope of the present invention are intended to be covered by the present invention.
Claims (5)
1. A monitor control system for a memory chip CP tester for controlling a test head, a power cabinet and a probe station, comprising:
the power cabinet is used for converting 380V three-phase power into 48V direct current power and providing a basic direct current power supply for the system; a main control board card is integrated in the power cabinet and used as a system control center, and is used for providing 160 paths of input interfaces, 128 paths of output interfaces, 8 paths of PWM waveforms, 8 paths of serial communication and 16 paths of ADCs; the main control board is connected with the high-density interface board interface of the testing machine head through the power cabinet monitoring board interface;
the testing machine head is used for providing digital power supply signals required by testing for the tested wafer, 32 digital board cards and 16 power board cards are placed in the testing machine head, and functional modules in the testing machine head are connected with the high-density interface board cards through cables;
the probe station is used for controlling the loading and unloading of the probe card, the taking and delivering of the wafer and the setting of the temperature and the humidity of the test environment;
Hi-Fix is used as a docking system of the test machine head and the probe station and is used for connecting test signals in the test machine head with the probe card, and the contact test between the test signals and the wafer is realized through the probe card; the Hi-Fix is internally integrated with a central clamp, and the central clamp is used for locking the probe card;
the power cabinet monitoring board card is used for detecting whether a power supply is normal or not; detecting the state of a power cabinet component, wherein the power cabinet component comprises a power cabinet door, a power cabinet fan, a switch button of a power cabinet and a power cabinet indicator lamp;
the power cabinet monitoring board card is also used for a control interface of the board card cooling module and a signal source interface of the high-density interface board card; ensuring connectivity of the power cabinet monitoring board card by providing 8 sets of CON_IS signal reservations;
the test machine head comprises the high-density interface board card which is used for detecting states of Hi-Fix and the probe card; the method IS used for detecting the temperature of the internal environment of the test machine head, and the connectivity of the high-density interface board IS ensured through 3 groups of CON_IS signal reservation;
the functional module of the test machine head comprises a WHOI module, a WFAN module and a WHOS module;
the WHII module is used for reading states of a Pusher sensor and a ballplus sensor in the Hi-Fix, and judging whether the central clamp is locked or not by detecting the states of the sensors of the central clamp; there are 1 set of CON_IS signal reservations;
the WFAN module is used for controlling the heat dissipation fan module of the test machine head and reading back the state, and the inner part of the test machine head is divided into two groups of fan modules which are respectively used for testing the front end and the rear end of the machine head; there are 1 set of CON_IS signal reservations;
the WHDS module is used for testing the monitoring of the internal liquid pressure of the machine head and detecting whether the liquid pressure is normal or not; 4 light liquid sensors are arranged in the test machine head; there are 1 set of CON_IS signal reservations.
2. The monitoring control system for a memory chip CP tester according to claim 1, wherein the main control board card comprises a power module, a CPU, an FPGA, an analog-to-digital conversion module, a serial communication interface, pulse width modulation, and digital signal input/output in the power cabinet.
3. The monitoring control system for a memory chip CP tester according to claim 2, wherein the power module is configured to convert a 48V power provided by the power cabinet into multiple different voltages, and supply power to the entire main control board card;
the CPU is used for configuring an FPGA program after power-on, receiving an upper computer instruction, forwarding the upper computer instruction to the FPGA, and reading the summarized state back to the upper computer, wherein the CPU and the upper computer are communicated through an Ethernet;
the FPGA is used for providing an output and input interface, PWM waveforms and ADC signal acquisition; the FPGA is communicated with the CPU through a PCIe protocol;
the analog-to-digital conversion module is used for acquiring analog signals and performing analog-to-digital conversion;
the pulse width modulation is used for adjusting the rotating speed of a fan of the test machine head;
the serial communication interface comprises a temperature sensor interface, a machine cooling liquid pressure interface and a light liquid detection sensor interface.
4. The monitoring and control system for a memory chip CP tester according to claim 1, wherein the probe station is connected to the main control board card through an interface signal via the power cabinet monitoring board card, so as to realize connection between the main control board card and the probe station.
5. The monitor and control system for a memory chip CP tester of claim 1, wherein the input signal pull-up power of the system is 24V.
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| CN202311584784.2A CN117290189B (en) | 2023-11-27 | 2023-11-27 | Monitoring control system for memory chip CP testing machine |
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200935533A (en) * | 2008-02-14 | 2009-08-16 | Chipmos Technologies Inc | A wafer testing system integrated with RFID techniques and testing method thereof |
| CN206758407U (en) * | 2017-03-29 | 2017-12-15 | 安徽超元半导体有限公司 | A kind of prober with probe protection device |
| CN208507632U (en) * | 2018-08-10 | 2019-02-15 | 无锡芯启博科技有限公司 | A kind of wafer test yield rate real-time monitoring system |
| CN109726234A (en) * | 2018-09-14 | 2019-05-07 | 上海华岭集成电路技术股份有限公司 | Integrated circuit testing Information Management System based on industry internet |
| CN113589140A (en) * | 2021-07-16 | 2021-11-02 | 苏州芯迈智能科技有限公司 | Wafer test system and method of TOF chip |
| CN113985245A (en) * | 2021-10-13 | 2022-01-28 | 深钛智能科技(苏州)有限公司 | Semiconductor chip test system |
| CN114707413A (en) * | 2022-04-08 | 2022-07-05 | 广东利扬芯片测试股份有限公司 | Wafer test detection method based on long-short term memory network and sliding window |
| CN116773994A (en) * | 2023-08-21 | 2023-09-19 | 珠海格力电子元器件有限公司 | Wafer test control method, control device, storage medium and electronic equipment |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7307433B2 (en) * | 2004-04-21 | 2007-12-11 | Formfactor, Inc. | Intelligent probe card architecture |
| US10228998B2 (en) * | 2016-08-04 | 2019-03-12 | Taiwan Semiconductor Manufacturing Company Limited | Systems and methods for correcting data errors in memory susceptible to data loss when subjected to elevated temperatures |
-
2023
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Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200935533A (en) * | 2008-02-14 | 2009-08-16 | Chipmos Technologies Inc | A wafer testing system integrated with RFID techniques and testing method thereof |
| CN206758407U (en) * | 2017-03-29 | 2017-12-15 | 安徽超元半导体有限公司 | A kind of prober with probe protection device |
| CN208507632U (en) * | 2018-08-10 | 2019-02-15 | 无锡芯启博科技有限公司 | A kind of wafer test yield rate real-time monitoring system |
| CN109726234A (en) * | 2018-09-14 | 2019-05-07 | 上海华岭集成电路技术股份有限公司 | Integrated circuit testing Information Management System based on industry internet |
| CN113589140A (en) * | 2021-07-16 | 2021-11-02 | 苏州芯迈智能科技有限公司 | Wafer test system and method of TOF chip |
| CN113985245A (en) * | 2021-10-13 | 2022-01-28 | 深钛智能科技(苏州)有限公司 | Semiconductor chip test system |
| CN114707413A (en) * | 2022-04-08 | 2022-07-05 | 广东利扬芯片测试股份有限公司 | Wafer test detection method based on long-short term memory network and sliding window |
| CN116773994A (en) * | 2023-08-21 | 2023-09-19 | 珠海格力电子元器件有限公司 | Wafer test control method, control device, storage medium and electronic equipment |
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