CN117276310A - Large-area two-dimensional material and preparation method thereof - Google Patents

Large-area two-dimensional material and preparation method thereof Download PDF

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Publication number
CN117276310A
CN117276310A CN202310450638.4A CN202310450638A CN117276310A CN 117276310 A CN117276310 A CN 117276310A CN 202310450638 A CN202310450638 A CN 202310450638A CN 117276310 A CN117276310 A CN 117276310A
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single crystal
dimensional material
layer
substrate
area
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刘冠宇
狄增峰
刘强
俞文杰
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Shanghai Institute of Microsystem and Information Technology of CAS
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Shanghai Institute of Microsystem and Information Technology of CAS
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02499—Monolayers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02527—Carbon, e.g. diamond-like carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/26—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
    • H01L29/267—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions

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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
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  • Recrystallisation Techniques (AREA)

Abstract

The invention provides a large-area two-dimensional material and a preparation method thereof, wherein the preparation method comprises the following steps: providing a monocrystalline substrate; forming a single crystal thermally conductive layer on the single crystal substrate, the single crystal thermally conductive layer having a thermal conductivity at least greater than that of the sapphire substrate; a two-dimensional material layer is formed on the single crystal thermally conductive layer. According to the invention, materials such as AlN with high thermal conductivity are used as two-dimensional material transistor substrate materials, so that Joule heat generated by the operation of the two-dimensional material transistor can be efficiently conducted, the temperature rise of the device during operation is weakened, the high mobility of a two-dimensional material channel is favorably maintained, higher on-state current is obtained, the gate delay is reduced, and the working speed of a two-dimensional integrated circuit is improved.

Description

Large-area two-dimensional material and preparation method thereof
Technical Field
The invention belongs to the field of semiconductor integrated circuit design and manufacture, and particularly relates to a large-area two-dimensional material and a preparation method thereof.
Background
The two-dimensional material is a two-dimensional atomic crystal material, and is proposed along with graphene (graphene) which is a graphite material with a single atomic layer successfully separated.
Two-dimensional materials are limited in two-dimensional planes by their carrier transport, so that such materials exhibit many unique properties. The band gap adjustable characteristic is widely applied to the fields of field effect transistors, photoelectric devices, thermoelectric devices and the like; different two-dimensional materials have different electrical or optical anisotropies due to special properties of crystal structures, such as Raman spectrum, photoluminescence spectrum, second-order harmonic spectrum, optical absorption spectrum, thermal conductivity, electrical conductivity and other anisotropies, and have great development potential in the fields of polarized photoelectric devices, polarized thermoelectric devices, bionic devices, polarized light detection and the like.
The two-dimensional material can be prepared on sapphire and SiO 2 /Si、Al 2 O 3 /Si、HfO 2 On a substrate of/Si or the like. In order to increase the circuit operation speed and reduce the gate delay, the transistor needs to have on-state current as high as possible when in operation, however, sapphire and SiO 2 、Al 2 O 3 、HfO 2 The low thermal conductivity of the (C) lead the Joule heat generated by the transistor prepared based on the two-dimensional material to be difficult to conduct effectively, so that the temperature rise is serious when the transistor works, the mobility of carriers is reduced, the on-state current is reduced, the performance of the device is degraded, and the requirement of a large-scale integrated circuit cannot be met.
It should be noted that the foregoing description of the background art is only for the purpose of facilitating a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. The above-described solutions are not considered to be known to the person skilled in the art simply because they are set forth in the background section of the present application.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a large-area two-dimensional material and a method for manufacturing the same, which are used for solving the problem that joule heat generated by a transistor manufactured by the two-dimensional material in the prior art is difficult to be effectively conducted.
To achieve the above and other related objects, the present invention provides a method for preparing a large-area two-dimensional material, the method comprising: providing a monocrystalline substrate; forming a single crystal thermally conductive layer on the single crystal substrate, the single crystal thermally conductive layer having a thermal conductivity at least greater than a thermal conductivity of the sapphire substrate; and forming a two-dimensional material layer on the single crystal heat conduction layer.
Optionally, the thermal conductivity of the single crystal thermally conductive layer is more than 10 times that of the sapphire substrate.
Alternatively, the single crystal substrate comprises one of sapphire, silicon carbide, gallium nitride, and diamond, or a single crystal bevel substrate comprising any of the above single crystal substrates.
Optionally, the single crystal substrate is a single crystal beveled C-plane sapphire substrate, and the surface atomic level step direction of the single crystal beveled C-plane sapphire substrate is along the M-axis direction of the crystal, and is the surface atomic level step directionThe direction, and the allowable angle deviation range of the surface atomic level step direction is +/-19.1 degrees.
Optionally, the thickness of the single crystal thermally conductive layer ranges from 500 nanometers to 5 micrometers.
Optionally, the single crystal thermally conductive layer comprises a single crystal AlN layer comprising a beveled single crystal AlN film.
Optionally, the method for forming the single crystal AlN layer includes one of physical vapor deposition process PVD, pulse laser deposition process PLD, molecular beam epitaxy process MBE, metal organic chemical vapor deposition process MOCVD, hydride vapor deposition process HVPE, and physical vapor transport process PVT.
Optionally, after forming a single crystal thermally conductive layer on the single crystal substrate, patterning the single crystal thermally conductive layer to form a plurality of discrete island structures, and forming a two-dimensional material layer on the single crystal thermally conductive layer.
Optionally, the two-dimensional material layer comprises a discrete two-dimensional material layer formed only on the discrete islands or a continuous two-dimensional material layer formed on the discrete islands and the single crystal substrate exposed between the discrete islands.
Optionally, the two-dimensional material layer includes one of a single layer of two-dimensional material and multiple layers of two-dimensional material.
Optionally, the two-dimensional material layer comprises a single crystal two-dimensional material.
Optionally, the forming method of the two-dimensional material layer includes one of a chemical vapor deposition process CVD, a molecular beam epitaxy process MBE, an atomic layer deposition process ALD, a physical vapor transport process PVT, a mechanical lift-off process, a wet transfer process, and a dry transfer process.
The invention also provides a two-dimensional material prepared by the preparation method of the large-area two-dimensional material according to any scheme, which comprises the following steps: a single crystal substrate; a single crystal thermally conductive layer formed on the single crystal substrate, the single crystal thermally conductive layer having a thermal conductivity at least greater than a thermal conductivity of the sapphire substrate; and the two-dimensional material layer is formed on the single crystal heat conduction layer.
As described above, the large-area two-dimensional material and the preparation method thereof have the following beneficial effects:
according to the invention, materials such as AlN with high thermal conductivity are used as two-dimensional material transistor substrate materials, so that Joule heat generated by the operation of the two-dimensional material transistor can be efficiently conducted, the temperature rise of the device during operation is weakened, the high mobility of a two-dimensional material channel is favorably maintained, higher on-state current is obtained, the gate delay is reduced, and the working speed of a two-dimensional integrated circuit is improved.
The lattice constants of the monocrystalline sapphire and the monocrystalline AlN layer are similar, the beveled monocrystalline AlN layer can be epitaxially grown on the beveled monocrystalline sapphire, a large-area high-quality monocrystalline two-dimensional material can be grown on the beveled monocrystalline AlN layer, and the high-quality monocrystalline two-dimensional material is beneficial to obtaining high on-state current and better device performance consistency in a two-dimensional transistor device.
The two-dimensional material prepared on the monocrystalline AlN layer can be directly used for preparing devices such as two-dimensional material transistors, a transfer process is not needed, and adverse effects such as defects, residual glue and doping generated in the transfer process of the two-dimensional material are avoided.
The invention can pattern single crystal AlN and then regrow two-dimensional material, the AlN layer with a discrete island structure can more effectively reduce stress caused by thermal mismatch between the AlN layer and the substrate in the growth process, and the bearable growth temperature is improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is apparent that the drawings in the following description are only some of the embodiments of the present application.
Fig. 1 to 3 are schematic structural views showing steps of a method for preparing a large-area two-dimensional material according to embodiment 1 of the present invention.
Fig. 4 to 6 show schematic structural views of the steps of the preparation method of the large-area two-dimensional material according to example 2.
Description of element reference numerals
101. Monocrystalline substrate
102. Single crystal thermally conductive layer
1021. Discrete island structure
103. Two-dimensional material layer
104. Discrete two-dimensional material layer
105. Continuous two-dimensional material layer
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
It should be emphasized that the term "comprises/comprising" when used herein is taken to specify the presence of stated features, integers, steps or components but does not preclude the presence or addition of one or more other features, integers, steps or components.
Features that are described and/or illustrated with respect to one embodiment may be used in the same way or in a similar way in one or more other embodiments in combination with or instead of the features of the other embodiments.
As described in detail in the embodiments of the present invention, the cross-sectional view of the device structure is not partially enlarged to a general scale for convenience of explanation, and the schematic drawings are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in actual fabrication.
For ease of description, spatially relative terms such as "under", "below", "beneath", "above", "upper" and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Furthermore, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or one or more intervening layers may also be present.
In the context of this application, a structure described as a first feature being "on" a second feature may include embodiments where the first and second features are formed in direct contact, as well as embodiments where additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings rather than the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
Example 1
As shown in fig. 1 to 3, the present embodiment provides a method for preparing a large-area two-dimensional material, the method comprising the steps of:
as shown in FIG. 1, step 1) is preferably performed to provide a single crystal substrate 101.
In one embodiment, the single crystal substrate 101 may be one of a sapphire substrate, a silicon carbide substrate, a gallium nitride substrate, and a diamond substrate, and may be one of a single crystal beveled sapphire substrate, a single crystal beveled silicon carbide substrate, a single crystal beveled gallium nitride substrate, and a single crystal beveled diamond substrate.
In one embodiment, the single crystal substrate 101 is a single crystal beveled C-plane sapphire substrate, and the surface atomic level step direction of the single crystal beveled C-plane sapphire substrate is along the M-axis direction of the crystal, and the surface atomic level step direction isThe direction, and the allowable angle deviation range of the surface atomic level step direction is +/-19.1 degrees.
As shown in fig. 2, step 2) is then performed to form a single crystal thermally conductive layer 102 on the single crystal substrate 101, wherein the single crystal thermally conductive layer 102 has a thermal conductivity at least greater than that of the sapphire substrate 101, and particularly when the single crystal substrate 101 is selected as a single crystal sapphire substrate, the single crystal thermally conductive layer 102 has a thermal conductivity greater than that of the single crystal sapphire substrate.
In one embodiment, the thickness of the single crystal thermally conductive layer 102 may be between 500 nanometers and 5 microns. On the one hand, too thick a single crystal thermally conductive layer 102 may have a large stress, which may easily cause crystal defects, while too thin a single crystal thermally conductive layer 102 may have an insufficient heat conduction capability, which may cause insufficient heat dissipation performance. Therefore, in this embodiment, the thickness of the single crystal thermally conductive layer 102 is set to be between 500 nm and 5 microns, preferably between 1 micron and 3 microns, so that on one hand, the growth quality of the single crystal thermally conductive layer 102 can be ensured, and on the other hand, the heat dissipation efficiency of the single crystal thermally conductive layer 102 can be ensured.
In one embodiment, the single crystal thermally conductive layer 102 has a thermal conductivity that is more than 10 times that of the sapphire substrate. For example, the single crystal substrate 101 is a single crystal sapphire substrate, the thermal conductivity of the single crystal sapphire substrate is about 25W/m/k, and the single crystal thermally conductive layer 102 is a single crystal AlN layer, and the thermal conductivity of the single crystal AlN layer is about 319W/m/k, so that the single crystal AlN layer can rapidly and effectively conduct and dissipate heat of the two-dimensional material transistor, and the heat dissipation performance of the two-dimensional material transistor is greatly improved.
In one embodiment, the single crystal thermally conductive layer 102 comprises a single crystal AlN layer (aluminum nitride layer) comprising a beveled single crystal AlN film.
According to the invention, the lattice constants of the monocrystalline sapphire substrate and the monocrystalline AlN layer are similar, the beveled monocrystalline AlN layer can be epitaxially grown on the beveled monocrystalline sapphire substrate, a large-area high-quality monocrystalline two-dimensional material can be grown on the beveled monocrystalline AlN layer, and the high-quality monocrystalline two-dimensional material is beneficial to obtaining high on-state current and better device performance consistency in a two-dimensional transistor device.
In one embodiment, the method for forming the single crystal AlN layer includes one of physical vapor deposition process PVD, pulsed laser deposition process PLD, molecular beam epitaxy process MBE, metal organic chemical vapor deposition process MOCVD, hydride vapor deposition process HVPE, and physical vapor transport process PVT.
It should be noted that, when the single crystal substrate is selected to be diamond, the diamond has a relatively high thermal conductivity, but is not suitable for growth of two-dimensional materials, by preparing the single crystal thermally conductive layer 102 on the diamond, the two-dimensional materials with relatively high quality on the diamond can be obtained by growing the two-dimensional material layer, and meanwhile, the single crystal thermally conductive layer 102 and the diamond cooperate to more effectively improve the heat dissipation effect of the two-dimensional materials.
As shown in fig. 3, step 3) is finally performed to form a two-dimensional material layer 103 on the single crystal thermally conductive layer 102.
In one embodiment, the two-dimensional material layer 103 comprises one of a single layer of two-dimensional material and multiple layers of two-dimensional material.
In one embodiment, the two-dimensional material layer 103 comprises a single crystal two-dimensional material.
In one embodiment, the method for forming the two-dimensional material layer 103 includes one of a chemical vapor deposition process CVD, a molecular beam epitaxy process MBE, an atomic layer deposition process ALD, a physical vapor transport process PVT, a mechanical lift-off process, a wet transfer process, and a dry transfer process.
In one embodiment, the two-dimensional material layer 103 may be graphene (graphene), boron Nitride (BN), molybdenum disulfide (MoS) 2 ) Tungsten disulfide (WS) 2 ) Or Mxene material, etc.
In one embodiment, the step of fabricating the transistor directly on the two-dimensional material layer 103 is also included. The two-dimensional material prepared on the monocrystalline AlN layer can be directly used for preparing devices such as two-dimensional material transistors, a transfer process is not needed, and adverse effects such as defects, residual glue and doping generated in the transfer process of the two-dimensional material are avoided.
The embodiment also provides a two-dimensional material prepared by the method for preparing a large-area two-dimensional material according to the above embodiment, including: a single crystal substrate 101; a single crystal thermally conductive layer 102 formed on the single crystal substrate 101, the single crystal thermally conductive layer 102 having a thermal conductivity at least greater than that of the sapphire substrate 101; a two-dimensional material layer 103 is formed on the single crystal thermally conductive layer 102.
The lattice constants of the monocrystalline sapphire and the monocrystalline AlN layer are similar, the beveled monocrystalline AlN layer can be epitaxially grown on the beveled monocrystalline sapphire, a large-area high-quality monocrystalline two-dimensional material can be grown on the beveled monocrystalline AlN layer, and the high-quality monocrystalline two-dimensional material is beneficial to obtaining high on-state current and better device performance consistency in a two-dimensional transistor device.
Example 2
As shown in fig. 1 to 2 and fig. 4 to 6, the present embodiment provides a method for preparing a large-area two-dimensional material, and the basic steps of the preparation method can be referred to as embodiment 1, wherein the difference from embodiment 1 is that: as shown in fig. 4, after forming the single crystal thermally conductive layer 102 on the single crystal substrate 101, the single crystal thermally conductive layer 102 is patterned to form a plurality of discrete island structures 1021, and then a two-dimensional material layer is formed on the single crystal thermally conductive layer 102.
In one embodiment, the shape of the discrete island 1021 may be rectangular, rounded rectangular, triangular, circular, elliptical, regular hexagonal, etc., and may be adjusted according to actual production needs, and is not limited to the examples listed herein.
In one embodiment, as shown in FIG. 5, the two-dimensional material layer includes a discrete two-dimensional material layer 104 formed only on the discrete island 1021.
In another embodiment, as shown in FIG. 6, the two-dimensional material layer comprises a continuous two-dimensional material layer 105 formed on the discrete island structures 1021 and the single crystal substrate 101 exposed between the discrete island structures 1021.
The invention can pattern single crystal AlN and then regrow two-dimensional material, the AlN layer of the discrete island structure 1021 can more effectively reduce the stress caused by thermal mismatch between the AlN layer and the substrate in the growth process, and the bearable growth temperature is improved. Meanwhile, by forming the two-dimensional material layer only on the discrete island-shaped structures 1021, the patterned two-dimensional material layer can be directly formed, and discrete transistors can be directly prepared on the patterned two-dimensional material layer, so that the two-dimensional material layer does not need to be etched additionally, and the process cost is effectively saved. When a continuous two-dimensional material layer is needed, the two-dimensional material layer can be formed between the discrete island 1021 and the discrete island 1021 simultaneously by controlling the process conditions, and the patterned single crystal heat conduction layer 102 is used for heat dissipation, so that different production requirements are met.
As described above, the large-area two-dimensional material and the preparation method thereof have the following beneficial effects:
according to the invention, materials such as AlN with high thermal conductivity are used as two-dimensional material transistor substrate materials, so that Joule heat generated by the operation of the two-dimensional material transistor can be efficiently conducted, the temperature rise of the device during operation is weakened, the high mobility of a two-dimensional material channel is favorably maintained, higher on-state current is obtained, the gate delay is reduced, and the working speed of a two-dimensional integrated circuit is improved.
The lattice constants of the monocrystalline sapphire and the monocrystalline AlN layer are similar, the beveled monocrystalline AlN layer can be epitaxially grown on the beveled monocrystalline sapphire, a large-area high-quality monocrystalline two-dimensional material can be grown on the beveled monocrystalline AlN layer, and the high-quality monocrystalline two-dimensional material is beneficial to obtaining high on-state current and better device performance consistency in a two-dimensional transistor device.
The two-dimensional material prepared on the monocrystalline AlN layer can be directly used for preparing devices such as two-dimensional material transistors, a transfer process is not needed, and adverse effects such as defects, residual glue and doping generated in the transfer process of the two-dimensional material are avoided.
The invention can pattern single crystal AlN and then regrow two-dimensional material, the AlN layer of the discrete island structure 1021 can more effectively reduce the stress caused by thermal mismatch between the AlN layer and the substrate in the growth process, and the bearable growth temperature is improved.
Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.

Claims (13)

1. A method for preparing a large-area two-dimensional material, the method comprising:
providing a monocrystalline substrate;
forming a single crystal thermally conductive layer on the single crystal substrate, the single crystal thermally conductive layer having a thermal conductivity at least greater than a thermal conductivity of the sapphire substrate;
and forming a two-dimensional material layer on the single crystal heat conduction layer.
2. The method for preparing a large-area two-dimensional material according to claim 1, wherein: the single crystal thermally conductive layer has a thermal conductivity of 10 times or more that of the sapphire substrate.
3. The method for preparing a large-area two-dimensional material according to claim 1, wherein: the single crystal substrate comprises one of sapphire, silicon carbide, gallium nitride and diamond, or a single crystal bevel cut substrate comprising any of the above single crystal substrates.
4. A method of producing a large area two-dimensional material according to claim 3, wherein: the single crystal substrate is a single crystal beveled C-plane sapphire substrate, the surface atomic level step direction of the single crystal beveled C-plane sapphire substrate is along the M-axis direction of the crystal, and the surface atomic level step direction isThe direction, and the allowable angle deviation range of the surface atomic level step direction is +/-19.1 degrees.
5. The method for preparing a large-area two-dimensional material according to claim 1, wherein: the thickness of the single crystal heat conduction layer ranges from 500 nanometers to 5 micrometers.
6. The method for producing a large-area two-dimensional material according to any one of claims 1 to 5, characterized in that: the single crystal thermally conductive layer includes a single crystal AlN layer including a beveled single crystal AlN film.
7. The method for preparing a large-area two-dimensional material according to claim 6, wherein: the method for forming the monocrystalline AlN layer comprises one of physical vapor deposition technology PVD, pulse laser deposition technology PLD, molecular beam epitaxy technology MBE, metal organic chemical vapor deposition technology MOCVD, hydride vapor deposition technology HVPE and physical vapor transport technology PVT.
8. The method for preparing a large-area two-dimensional material according to claim 1, wherein: after forming a single crystal heat conduction layer on the single crystal substrate, patterning the single crystal heat conduction layer to form a plurality of discrete island structures, and forming a two-dimensional material layer on the single crystal heat conduction layer.
9. The method for preparing a large-area two-dimensional material according to claim 8, wherein: the two-dimensional material layer comprises a discrete two-dimensional material layer formed only on the discrete island structures or a continuous two-dimensional material layer formed on the discrete island structures and the single crystal substrate exposed between the discrete island structures.
10. The method for preparing a large-area two-dimensional material according to claim 1, wherein: the two-dimensional material layer comprises one of a single layer of two-dimensional material and multiple layers of two-dimensional material.
11. The method for preparing a large-area two-dimensional material according to claim 1, wherein: the two-dimensional material layer comprises a single crystal two-dimensional material.
12. The method for preparing a large-area two-dimensional material according to claim 1, wherein: the two-dimensional material layer forming method comprises one of Chemical Vapor Deposition (CVD), molecular Beam Epitaxy (MBE), atomic Layer Deposition (ALD), physical Vapor Transport (PVT), mechanical stripping, wet transfer and dry transfer.
13. A two-dimensional material prepared by the method for preparing a large-area two-dimensional material according to any one of claims 1 to 12, comprising:
a single crystal substrate;
a single crystal thermally conductive layer formed on the single crystal substrate, the single crystal thermally conductive layer having a thermal conductivity at least greater than a thermal conductivity of the sapphire substrate;
and the two-dimensional material layer is formed on the single crystal heat conduction layer.
CN202310450638.4A 2023-04-24 2023-04-24 Large-area two-dimensional material and preparation method thereof Pending CN117276310A (en)

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