CN117215619B - Online upgrading method of application program, chip and intelligent device - Google Patents
Online upgrading method of application program, chip and intelligent device Download PDFInfo
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Abstract
The application provides an online upgrading method of an application program, a chip and intelligent equipment, and relates to the technical field of chips. Each of the first FLASH and the second FLASH of the chip includes a code partition for storing an application program and a data partition for storing application data of the application program. Thus, each FLASH can write in application programs and application data. Therefore, after receiving the upgrade instruction for the application program, if the control circuit of the chip determines that the application program is stored in the code partition of one FLASH in the first FLASH and the second FLASH, the upgrade program of the application program can be directly written into the code partition of the other FLASH, and the upgrade program is operated based on the application data of the application program to upgrade the application program. Because a FLASH is not required to be additionally added, the hardware cost for online upgrading the application program is reduced.
Description
Technical Field
The present disclosure relates to the field of chip technologies, and in particular, to an online upgrade method for an application program, a chip, and an intelligent device.
Background
With the use of the smart device, online upgrades are generally required to be performed on the application programs installed in the smart device, so as to improve the use convenience of the smart device. The application program is generally stored in a first FLASH memory (FLASH memory) of the intelligent device, and the intelligent device generally further includes a second FLASH for storing application data generated by the application program in the first FLASH during the running process.
Because the FLASH memory cannot be erased in the reading process, in order to realize online upgrade of the application program, in the related art, a third FLASH may be additionally added in the intelligent device to write the upgrade program of the application program.
Therefore, in the related art, the hardware cost for online upgrading the application program is high.
Disclosure of Invention
The application program online upgrading method, the chip and the intelligent device can solve the problem that the hardware cost for remotely upgrading the application program is high at present. The technical scheme is as follows:
in one aspect, a chip is provided, the chip comprising: the device comprises a first FLASH, a second FLASH and a control circuit, wherein each FLASH in the first FLASH and the second FLASH is provided with a code partition for storing application programs and a data partition for storing application data of the application programs, and the FLASH where the application programs are located is different from the FLASH where the application data of the application programs are located; the control circuit is used for:
responding to an upgrade command for the application program, and if the application program is determined to be positioned in a code partition of one FLASH in the first FLASH and the second FLASH, writing the upgrade program of the application program into the code partition of the other FLASH in the first FLASH and the second FLASH;
and running the upgrade program based on the application data of the application program.
Optionally, the control circuit is further configured to:
and writing the application data of the application program stored in the data partition of the other FLASH into the data partition of the one FLASH.
Optionally, the chip further includes: the read-write circuit of the first FLASH and the read-write circuit of the second FLASH; the control circuit is used for:
reading the application data from the data partition of the other FLASH through the read-write circuit of the other FLASH;
and writing the application data into the data partition of the FLASH through the read-write circuit of the FLASH.
Optionally, the control circuit is configured to:
sending an erasing instruction and the upgrading program to a read-write circuit of the other FLASH so that the read-write circuit of the other FLASH responds to the erasing instruction and writes the upgrading program into a code partition of the other FLASH;
the control circuit is further configured to:
and in the process of writing the upgrade program of the application program into the code partition of the other FLASH, if a read-write instruction aiming at the other FLASH is obtained and the execution priority of the read-write instruction is higher than that of the erasing instruction, controlling a read-write circuit of the other FLASH to stop writing the upgrade program and controlling a read-write circuit of the other FLASH to respond to the read-write instruction.
Optionally, the control circuit is further configured to:
and if the read-write instruction is an instruction aiming at the data partition of the other FLASH, determining that the execution priority of the read-write instruction is higher than that of the erasing instruction.
On the other hand, an online upgrading method of an application program is provided, and the online upgrading method is applied to a chip, wherein the chip comprises the following components: each FLASH in the first FLASH and the second FLASH is provided with a code partition for storing application programs and a data partition for storing application data of the application programs, and the FLASH where the application programs are located is different from the FLASH where the application data of the application programs are located; the method comprises the following steps:
responding to an upgrade command for the application program, and if the application program is determined to be positioned in a code partition of one FLASH in the first FLASH and the second FLASH, writing the upgrade program of the application program into the code partition of the other FLASH in the first FLASH and the second FLASH;
and running the upgrade program based on the application data of the application program.
Optionally, before the running the upgrade program based on the running data of the application program, the method further includes:
and writing the application data of the application program stored in the data partition of the other FLASH into the data partition of the one FLASH.
Optionally, the chip further includes: the read-write circuit of the first FLASH and the read-write circuit of the second FLASH; writing the application data of the application program stored in the data partition of the other FLASH into the data partition of the one FLASH, wherein the writing comprises the following steps:
reading the application data from the data partition of the other FLASH through the read-write circuit of the other FLASH;
and writing the application data into the data partition of the FLASH through the read-write circuit of the FLASH.
In yet another aspect, a computer readable storage medium is provided, on which a computer program is stored, which when executed by a processor, implements an online upgrade method for an application program as described in the above aspect.
In yet another aspect, there is provided a smart device comprising: a chip as described in the above aspect.
The beneficial effects that this application provided technical scheme brought include at least:
the application provides an online upgrading method of an application program, a chip and intelligent equipment, wherein each FLASH in a first FLASH and a second FLASH of the chip comprises a code partition for storing the application program and a data partition for storing application data of the application program. Therefore, each FLASH can be used for writing application programs and application data, and the FLASH where each application program is different from the FLASH where the application data of the application program are located. Therefore, after receiving the upgrade instruction for the application program, if the control circuit of the chip determines that the application program is stored in the code partition of one FLASH in the first FLASH and the second FLASH, the upgrade program of the application program can be directly written into the code partition of the other FLASH, and the upgrade program is operated based on the application data of the application program so as to realize the upgrade of the application program. Because a FLASH is not required to be additionally added to store the upgrading program of the application program, the hardware cost for upgrading the application program by adopting the chip provided by the application is lower.
Additional aspects and advantages of the application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the application.
Drawings
Fig. 1 is a schematic structural diagram of a chip according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of a chip according to an embodiment of the present application;
FIG. 3 is a flowchart of an online upgrade method for an application program according to an embodiment of the present application;
fig. 4 is a flowchart of another online upgrade method of an application program according to an embodiment of the present application.
Detailed Description
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary and intended for the purpose of explaining the present application and are not to be construed as limiting the present application.
The embodiment of the application provides a chip, which can be a micro control unit (micro controller unit, MCU) alternatively. Referring to fig. 1, the chip includes: a first FLASH01, a second FLASH02 and a control circuit 03. The control circuit 03 is connected to the first FLASH01 and the second FLASH02, respectively.
As can be seen from fig. 1, each of the first FLASH01 and the second FLASH02 has a code partition and a data (data) partition. The code partition of each FLASH is used for storing an application program installed in a chip, and the data partition of each FLASH is used for storing application data generated in the running process of the application program. The application data may be non-volatile data.
Wherein the code partition may also be referred to as a program partition. The ratio of the size of the memory space of each FLASH code partition to the size of the memory space of the data partition may be a target ratio, which may be 8:1 or 16:1.
It can be understood that, because FLASH cannot be erased in the reading process, that is, the code partition of each FLASH cannot operate together with the data partition of the FLASH, but can operate together with the data partition of another FLASH, the FLASH where the application program is located is different from the FLASH where the application data of the application program is located. If the application is located in the code partition of the first FLASH01, the application data of the application may be located in the data partition of the second FLASH02. If the application is located in the code partition of the second FLASH02, the application data of the application may be located in the data partition of the first FLASH01. I.e. the first FLASH01 and the second FLASH02 are used crosswise.
In this embodiment of the present application, in response to an upgrade command for an application, if it is determined that the application is located in a code partition of one of the first FLASH01 and the second FLASH02, the control circuit 03 can write the upgrade program of the application into the code partition of the other of the first FLASH01 and the second FLASH02. Then, the control circuit 03 can run an upgrade program of the application program based on the application data of the application program to upgrade the application program.
Wherein the application may be any one of a plurality of applications installed in a chip. The upgrade command may be a remote online upgrade command. The upgrade procedure may be obtained by the control circuitry via Over The Air (OTA) technology.
In summary, the embodiments of the present application provide a chip, where each of a first FLASH and a second FLASH of the chip includes a code partition for storing an application program and a data partition for storing application data of the application program. Therefore, each FLASH can be used for writing application programs and application data, and the FLASH where each application program is different from the FLASH where the application data of the application program are located. Therefore, after receiving the upgrade instruction for the application program, if the control circuit of the chip determines that the application program is stored in the code partition of one FLASH in the first FLASH and the second FLASH, the upgrade program of the application program can be directly written into the code partition of the other FLASH, and the upgrade program is operated based on the application data of the application program to upgrade the application program. Because a FLASH is not required to be additionally added to store the upgrading program of the application program, the hardware cost for online upgrading the application program by adopting the chip provided by the embodiment of the application is lower, and the convenience for online upgrading of the application program can be improved.
It is understood that the upgrade program may be a full upgrade program for the application program. That is, after the control circuit runs the upgrade program, the current version of the application program can be covered.
In this embodiment of the present application, after receiving an upgrade command for an application program, the control circuit 03 of the chip may determine a location (i.e., the first FLASH01 or the second FLASH 02) where the application program is stored in response to the upgrade command. It will be appreciated that each time an application is downloaded by the control circuit 03, the location where the application is stored may be recorded in the installation record. After receiving the upgrade command for the application program, the control circuit 03 may read the installation record to obtain the location where the application program is written and stored.
Referring to fig. 2, the chip may further include: a read/write circuit 04 of the first FLASH01 (hereinafter, simply referred to as a first read/write circuit 04) and a read/write circuit 05 of the second FLASH02 (hereinafter, simply referred to as a second read/write circuit 05). Each of the first read-write circuit 04 and the second read-write circuit 05 may be connected to the corresponding FLASH and control circuit 03, so that the control circuit 03 performs read-write operations on the corresponding FLASH through each read-write circuit.
For example, as shown in fig. 2, each read-write circuit may be connected to a corresponding FLASH through an address line, a control line, and a data line.
Based on this, the control circuit 03 may erase and write the code partition of the other FLASH through the read/write circuit of the other FLASH in the first FLASH01 and the second FLASH02, so as to write the upgrade program of the application program into the code partition of the other FLASH.
For example, if the application is located in the code partition of the first FLASH01, the control circuit 03 may determine that the other FLASH is the second FLASH02. Then, the control circuit 03 may send an erasing instruction to the second read/write circuit 05 of the second FLASH02. The second read/write circuit 05 may erase the code partition of the second FLASH02 in response to the erase command, so as to write the upgrade program of the application program.
If the application is located in the code partition of the second FLASH02, the control circuit 03 may determine that the other FLASH is the first FLASH01. Then, the control circuit 03 may send an erasing instruction to the first read-write circuit 04 of the first FLASH01. The first read/write circuit 04 may erase the code partition of the first FLASH01 in response to the erase command, so as to write the upgrade program of the application program.
In this embodiment of the present application, in a process that a read-write circuit of another FLASH writes an upgrade program of an application program into a code partition of another FLASH in response to an erasing instruction, if the control circuit 03 obtains a read-write instruction for the other FLASH and determines that an execution priority of the read-write instruction is higher than an execution priority of the erasing instruction, the read-write circuit of the other FLASH may be controlled to stop writing the upgrade program, and the read-write circuit is controlled to respond to the read-write instruction. The read-write instruction may be: a read instruction or an erase instruction.
It can be understood that, after the control circuit 03 obtains the read-write instruction for another FLASH, if it is determined that the read-write instruction is an instruction for a data partition of the other FLASH, the execution priority of the read-write instruction may be determined to be higher than the execution priority of the erase-write instruction for instructing the read-write circuit of the other FLASH to write the upgrade program.
Therefore, in the process of writing the upgrade program into the code partition of the FLASH, the execution priority of the erasing instruction of the data partition of the FLASH is higher than that of the erasing instruction of the code partition of the FLASH. Thus, the downloading of the upgrade program of the application program can be reduced, and the influence on the use of the data partition of the FLASH can be reduced.
In the embodiment of the present application, please continue to refer to fig. 2, the control circuit 03 may include: a first control circuit 031 and a second control circuit 032, the first control circuit 031 being connected to the second control circuit 032. The first control circuit 031 may perform operations of determining the FLASH in which the application is located, and writing the upgrade program of the application into another FLASH. The second control circuit 032 may be configured to obtain a plurality of instructions (such as a read instruction or an erase instruction) for each FLASH, determine execution priorities of the respective instructions, and send the instruction priority determination result to the first control circuit 031. The first control circuit 03 can control the read-write circuit of the FLASH to sequentially respond to a plurality of instructions according to the priority judging result from high to low, so as to ensure that the execution priority of the erasing command of the data partition of each FLASH is higher than the execution priority of the code partition of the FLASH.
It is understood that the second control circuit 032 may include: the system comprises a cache register and a control module connected with the cache register. The cache register may be used to cache instructions for each FLASH. The control module can judge the execution priority of a plurality of instructions aiming at the same FLASH and cached in the cache register so as to obtain a priority judgment result. The priority determination result may indicate a level of execution priority of the instruction.
After the upgrade program of the application program is downloaded, the control circuit 03 (e.g., the first control circuit 031) may write the application data of the application program stored in the data partition of another FLASH into the data partition of one FLASH. Then, the control circuit 03 can run the upgrade program based on the application data of the application program to upgrade the application program.
Because the FLASH cannot be erased and written in the process of reading, application data generated in the running process of an application program of one FLASH in the first FLASH and the second FLASH is usually stored in a data partition of the other FLASH in the first FLASH and the second FLASH. Therefore, after the upgrade program of the application program is downloaded, the control circuit 03 can write the application data of the application program stored in the data partition of the other FLASH into the data partition of one FLASH to ensure the operation of the upgrade program.
It can be understood that the control circuit 03 can be reset to control the restart of the chip after the upgrade program of the application program is downloaded. After the chip is restarted, the control circuit 03 can write the application data of the application program stored in the data partition of the other FLASH into the data partition of one FLASH.
It can be further understood that, after the upgrade program is downloaded, the control circuit 03 may write the application data of the application program stored in the data partition of another FLASH into the data partition of one FLASH before the upgrade program is first run.
In this embodiment of the present application, the control circuit 03 may read application data of the application program from the data partition of the other FLASH through the read-write circuit of the other FLASH in the first FLASH and the second FLASH. Then, the control circuit can write the application data into the data partition of one FLASH through the read-write circuit of the FLASH in the first FLASH and the second FLASH.
For example, it is assumed that an application program is stored in a code partition of the first FLASH01, and correspondingly, application data of the application program is stored in a data partition of the second FLASH02. Then, the control circuit 03 may first control the second read/write circuit 05 of the second FLASH02 to read the application data from the data partition of the second FLASH02. Then, the control circuit 03 may control the first read-write circuit 04 of the first FLASH01 to write the application data into the data partition of the first FLASH01. In this way, the control circuit 03 can write the application data from the data partition of the second FLASH02 into the data partition of the first FLASH01.
In this embodiment of the present application, after the control circuit 03 runs the upgrade program of the application, if it is determined that the upgrade program fails to run, the application may be run to automatically rollback the application to the version before the upgrade. In this way, it can be ensured that the use of the chip is not affected by upgrade failure.
In summary, the embodiments of the present application provide a chip, where each of a first FLASH and a second FLASH of the chip includes a code partition for storing an application program and a data partition for storing application data of the application program. Therefore, each FLASH can be used for writing application programs and application data, and the FLASH where each application program is different from the FLASH where the application data of the application program are located. Therefore, after receiving the upgrade instruction for the application program, if the control circuit of the chip determines that the application program is stored in the code partition of one FLASH in the first FLASH and the second FLASH, the upgrade program of the application program can be directly written into the code partition of the other FLASH, and the upgrade program is operated based on the application data of the application program so as to realize the upgrade of the application program. Because a FLASH is not required to be additionally added to store the upgrading program of the application program, the hardware cost for online upgrading the application program by adopting the chip provided by the embodiment of the application is lower, and the convenience for online upgrading of the application program can be improved.
The embodiment of the application provides an online upgrading method of an application program, which is applied to a chip, such as a control circuit in the chip shown in fig. 1 or fig. 2. Referring to fig. 3, the method includes:
and step 101, responding to an upgrade command for the application program, and if the application program is determined to be positioned in the code partition of one FLASH in the first FLASH and the second FLASH, writing the upgrade program of the application program into the code partition of the other FLASH in the first FLASH and the second FLASH.
Wherein the application may be any one of a plurality of applications installed in a chip. The upgrade command may be a remote online upgrade command. The upgrade procedure may be obtained by the control circuit via OTA techniques.
In the embodiment of the application, after receiving the upgrade command for the application program, the control circuit of the chip may determine the location where the application program is stored in response to the upgrade command. If the control circuit determines that the application program is located in the code partition of one FLASH in the first FLASH and the second FLASH, the upgrade program of the application program can be written into the code partition of the other FLASH.
Step 102, running an upgrade program of the application program based on the application data of the application program.
After the upgrade program of the application program is downloaded, the control circuit can run the upgrade program of the application program based on the application data of the application program so as to upgrade the application program. Wherein, the application data of the application program refers to: non-volatile data generated by an application during operation.
In summary, the embodiment of the application provides an online upgrade method for an application program, where each of a first FLASH and a second FLASH of a chip includes a code partition for storing the application program and a data partition for storing application data of the application program. Therefore, each FLASH can be used for writing application programs and application data, and the FLASH where each application program is different from the FLASH where the application data of the application program are located. Therefore, after receiving the upgrade instruction for the application program, if the control circuit of the chip determines that the application program is stored in the code partition of one FLASH in the first FLASH and the second FLASH, the upgrade program of the application program can be directly written into the code partition of the other FLASH, and the upgrade program is operated based on the application data of the application program so as to realize the upgrade of the application program. Because a FLASH is not required to be additionally added to store the upgrading program of the application program, the hardware cost for online upgrading the application program by adopting the method provided by the embodiment of the application is lower, and the convenience for online upgrading of the application program can be improved.
Fig. 4 is a flowchart of another online upgrade method of an application program, which is provided in an embodiment of the present application, and the method is applied to a chip. Referring to fig. 4, the method may include:
step 201, responding to an upgrade command for an application program, and if the application program is determined to be located in a code partition of one FLASH in the first FLASH and the second FLASH, writing the upgrade program of the application program into the code partition of the other FLASH in the first FLASH and the second FLASH.
Wherein the application may be any one of a plurality of applications installed in a chip. The upgrade command may be a remote upgrade command. The upgrade procedure may be obtained by the control circuit via OTA techniques.
In the embodiment of the application, after receiving the upgrade command for the application program, the control circuit of the chip may determine the location (i.e. the first FLASH or the second FLASH) where the application program is stored in response to the upgrade command. If the control circuit determines that the application program is located in the code partition of one FLASH in the first FLASH and the second FLASH, the upgrade program of the application program can be written into the code partition of the other FLASH.
It will be appreciated that each time an application is downloaded by the control circuit, the location where the application is stored may be recorded in the installation record. After receiving the upgrade command for the application program, the control circuit can read the installation record to obtain the position stored by the application program.
In an embodiment of the present application, referring to fig. 2, the chip may further include: a first read-write circuit 04 of the first FLASH and a second read-write circuit 05 of the second FLASH. Each of the first read-write circuit 04 and the second read-write circuit 05 may be connected to the corresponding FLASH and control circuit 03, so that the control circuit 03 performs read-write operation on the corresponding FLASH through each read-write circuit.
Based on this, the process of the control circuit writing the upgrade program of the application program to the code partition of another FLASH may include: the control circuit erases the code partition of the other FLASH through the read-write circuit of the other FLASH in the first FLASH and the second FLASH so as to write the upgrade program of the application program into the code partition of the other FLASH.
For example, if the application is located in a code partition of the first FLASH, the control circuit may determine that the other FLASH is the second FLASH. Then, the control circuit may send an erasing instruction to the second read-write circuit of the second FLASH. The second read-write circuit responds to the erasing instruction and can erase and write the code partition of the second FLASH to write the upgrading program of the application program.
If the application is located in the code partition of the second FLASH, the control circuit may determine that the other FLASH is the first FLASH. Then, the operation performed by the control circuit on the first FLASH may refer to the operation performed on the second FLASH described above, which is not described herein.
In this embodiment of the present application, in a process that a read-write circuit of another FLASH writes an upgrade program of an application program into a code partition of another FLASH in response to an erasing instruction, if a control circuit obtains a read-write instruction for the other FLASH and determines that an execution priority of the read-write instruction is higher than an execution priority of the erasing instruction, the read-write circuit of the other FLASH may be controlled to stop writing the upgrade program, and the read-write circuit is controlled to respond to the read-write instruction.
It can be understood that after the control circuit obtains the read-write instruction for another FLASH, if it is determined that the read-write instruction is an instruction for a data partition of the other FLASH, the execution priority of the read-write instruction may be determined to be higher than the execution priority of the erase instruction for instructing the read-write circuit of the other FLASH to write the upgrade program.
That is, in the process of writing the upgrade program of the application program into the code partition of the other FLASH, if the control circuit receives a read-write instruction for the data partition of the other FLASH, the read-write circuit of the other FLASH is controlled to stop writing the upgrade program, and the read-write circuit is controlled to respond to the read-write instruction.
Therefore, in the process of writing the upgrade program into the code partition of the FLASH, the execution priority of the erasing instruction of the data partition of the FLASH is higher than that of the erasing instruction of the code partition of the FLASH. Thus, the influence of the downloading of the upgrading program of the application program on the use of the data partition of the FLASH can be reduced.
Step 202, writing application data of an application program stored in another FLASH data partition into the data partition of one FLASH.
Because the FLASH cannot be erased and written in the process of reading, application data generated in the running process of an application program of one FLASH in the first FLASH and the second FLASH is usually stored in a data partition of the other FLASH in the first FLASH and the second FLASH. Therefore, after the control circuit determines that the upgrade program of the application program is downloaded, the application data of the application program stored in the data partition of the other FLASH can be written into the data partition of one FLASH to ensure the operation of the upgrade program.
It can be appreciated that the control circuit can be reset to control the restart of the chip after the upgrade program of the application program is downloaded. After the chip is restarted, the control circuit can write the application data of the application program stored in the data partition of the other FLASH into the data partition of one FLASH.
In this embodiment of the present application, the control circuit may read application data of the application program from the data partition of the other FLASH through a read-write circuit of the other FLASH in the first FLASH and the second FLASH. Then, the control circuit can write the application data into the data partition of one FLASH through the read-write circuit of the FLASH in the first FLASH and the second FLASH.
Step 203, running an upgrade program of the application program based on the application data of the application program.
After the application data of the application program is downloaded, the control circuit runs the upgrading program of the application program in the code partition of the other FLASH based on the application data of the application program in the data partition of the one FLASH to realize the upgrading of the application program.
In addition, in the process of running the upgrade program of the application program, the control circuit can also write the application data generated by the application program into a data partition of FLASH.
It can be understood that the sequence of the steps of the online upgrade method of the application program provided in the embodiment of the present application may be appropriately adjusted, and the steps may also be increased or decreased accordingly according to the situation. Any method that can be easily conceived by those skilled in the art within the technical scope of the present disclosure should be covered in the protection scope of the present application, and thus will not be repeated.
In summary, the embodiment of the application provides an online upgrade method for an application program, where each of a first FLASH and a second FLASH of a chip includes a code partition for storing the application program and a data partition for storing application data of the application program. Therefore, each FLASH can be used for writing application programs and application data, and the FLASH where each application program is different from the FLASH where the application data of the application program are located. Therefore, after receiving the upgrade instruction for the application program, if the control circuit of the chip determines that the application program is stored in the code partition of one FLASH in the first FLASH and the second FLASH, the upgrade program of the application program can be directly written into the code partition of the other FLASH, and the upgrade program is operated based on the application data of the application program so as to realize the upgrade of the application program. Because a FLASH is not required to be additionally added to store the upgrading program of the application program, the hardware cost for online upgrading the application program by adopting the method provided by the embodiment of the application is lower, and the convenience for online upgrading of the application program can be improved.
The embodiment of the application provides a computer storage medium, on which a computer program is stored, which when executed by a processor, implements an online upgrade method of an application program, such as the method shown in fig. 3 or fig. 4, provided in the above method embodiment.
The embodiment of the application provides intelligent equipment, which comprises a chip provided by the embodiment of the device. For example, the smart device may be a mobile terminal, a power device, or an in-vehicle device, among others.
It should be noted that the logic and/or steps represented in the flowcharts or otherwise described herein, for example, may be considered as a ordered listing of executable instructions for implementing logical functions, and may be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). In addition, the computer readable medium may even be paper or other suitable medium on which the program is printed, as the program may be electronically captured, via, for instance, optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner, if necessary, and then stored in a computer memory.
It is to be understood that portions of the present application may be implemented in hardware, software, firmware, or a combination thereof. In the above-described embodiments, the various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, may be implemented using any one or combination of the following techniques, as is well known in the art: discrete logic circuits having logic gates for implementing logic functions on data signals, application specific integrated circuits having suitable combinational logic gates, programmable Gate Arrays (PGAs), field Programmable Gate Arrays (FPGAs), and the like.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "plurality" is at least two, such as two, three, etc., unless explicitly defined otherwise.
In this application, unless specifically stated and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; either directly or indirectly, through intermediaries, or both, may be in communication with each other or in interaction with each other, unless expressly defined otherwise. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art as the case may be.
Although embodiments of the present application have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the application, and that variations, modifications, alternatives, and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the application.
Claims (7)
1. A chip, the chip comprising: the device comprises a first FLASH, a second FLASH and a control circuit, wherein each FLASH in the first FLASH and the second FLASH is provided with a code partition for storing application programs and a data partition for storing application data of the application programs, and the FLASH where the application programs are located is different from the FLASH where the application data of the application programs are located; the control circuit is used for:
responding to an upgrade command for the application program, if the application program is determined to be positioned in a code partition of one FLASH in the first FLASH and the second FLASH, sending an erasing command and an upgrade program of the application program to a read-write circuit of the other FLASH in the first FLASH and the second FLASH, so that the read-write circuit of the other FLASH responds to the erasing command, and writing the upgrade program into the code partition of the other FLASH;
writing application data of the application program stored in the data partition of the other FLASH into the data partition of the one FLASH;
running the upgrade program based on the application data of the application program;
the control circuit is further configured to: and in the process of writing the upgrade program of the application program into the code partition of the other FLASH, if a read-write instruction aiming at the other FLASH is obtained and the execution priority of the read-write instruction is higher than that of the erasing instruction, controlling a read-write circuit of the other FLASH to stop writing the upgrade program and controlling a read-write circuit of the other FLASH to respond to the read-write instruction.
2. The chip of claim 1, wherein the control circuit is configured to:
reading the application data from the data partition of the other FLASH through the read-write circuit of the other FLASH;
and writing the application data into the data partition of the FLASH through the read-write circuit of the FLASH.
3. The chip of claim 1 or 2, wherein the control circuit is further configured to:
and if the read-write instruction is an instruction aiming at the data partition of the other FLASH, determining that the execution priority of the read-write instruction is higher than that of the erasing instruction.
4. An online upgrade method of an application program is characterized by being applied to a chip, wherein the chip comprises: each FLASH in the first FLASH and the second FLASH is provided with a code partition for storing application programs and a data partition for storing application data of the application programs, and the FLASH where the application programs are located is different from the FLASH where the application data of the application programs are located; the method comprises the following steps:
responding to an upgrade command for the application program, if the application program is determined to be positioned in a code partition of one FLASH in the first FLASH and the second FLASH, sending an erasing command and an upgrade program of the application program to a read-write circuit of the other FLASH in the first FLASH and the second FLASH, so that the read-write circuit of the other FLASH responds to the erasing command, and writing the upgrade program into the code partition of the other FLASH;
writing application data of the application program stored in the data partition of the other FLASH into the data partition of the one FLASH;
running the upgrade program based on the application data of the application program;
and if the read-write instruction aiming at the other FLASH is obtained and the execution priority of the read-write instruction is higher than that of the erasing instruction in the process of writing the upgrading program of the application program into the code partition of the other FLASH, controlling the read-write circuit of the other FLASH to stop writing the upgrading program and controlling the read-write circuit of the other FLASH to respond to the read-write instruction.
5. The method according to claim 4, wherein writing the application data of the application program stored in the data partition of the other FLASH into the data partition of the one FLASH comprises:
reading the application data from the data partition of the other FLASH through the read-write circuit of the other FLASH;
and writing the application data into the data partition of the FLASH through the read-write circuit of the FLASH.
6. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements an online upgrade method of an application program according to claim 4 or 5.
7. An intelligent device, the intelligent device comprising: a chip as claimed in any one of claims 1 to 3.
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Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104810055A (en) * | 2015-05-08 | 2015-07-29 | 京东方科技集团股份有限公司 | Read-write control circuit and method for Flash chip and AMOLED (Active Matrix/Organic Light Emitting Diode) application circuit |
CN109002310A (en) * | 2018-08-07 | 2018-12-14 | 北京云迹科技有限公司 | firmware upgrade method |
CN111240720A (en) * | 2020-03-27 | 2020-06-05 | 武汉光谷信息光电子创新中心有限公司 | Boot program upgrading method and device and storage medium |
CN217113266U (en) * | 2022-04-08 | 2022-08-02 | 北斗星通智联科技有限责任公司 | FPGA chip upgrading circuit, control circuit and electronic equipment |
CN115098123A (en) * | 2022-05-05 | 2022-09-23 | 深圳市飞思通信技术有限公司 | Millimeter wave terminal equipment, single board thereof and operation method |
CN116302005A (en) * | 2023-05-11 | 2023-06-23 | 合肥智芯半导体有限公司 | Chip, chip upgrading method and device, electronic equipment and readable storage medium |
-
2023
- 2023-11-09 CN CN202311487796.3A patent/CN117215619B/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104810055A (en) * | 2015-05-08 | 2015-07-29 | 京东方科技集团股份有限公司 | Read-write control circuit and method for Flash chip and AMOLED (Active Matrix/Organic Light Emitting Diode) application circuit |
CN109002310A (en) * | 2018-08-07 | 2018-12-14 | 北京云迹科技有限公司 | firmware upgrade method |
CN111240720A (en) * | 2020-03-27 | 2020-06-05 | 武汉光谷信息光电子创新中心有限公司 | Boot program upgrading method and device and storage medium |
CN217113266U (en) * | 2022-04-08 | 2022-08-02 | 北斗星通智联科技有限责任公司 | FPGA chip upgrading circuit, control circuit and electronic equipment |
CN115098123A (en) * | 2022-05-05 | 2022-09-23 | 深圳市飞思通信技术有限公司 | Millimeter wave terminal equipment, single board thereof and operation method |
CN116302005A (en) * | 2023-05-11 | 2023-06-23 | 合肥智芯半导体有限公司 | Chip, chip upgrading method and device, electronic equipment and readable storage medium |
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