CN117200705A - Broadband high conversion gain frequency multiplier circuit - Google Patents
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- CN117200705A CN117200705A CN202310925893.XA CN202310925893A CN117200705A CN 117200705 A CN117200705 A CN 117200705A CN 202310925893 A CN202310925893 A CN 202310925893A CN 117200705 A CN117200705 A CN 117200705A
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Abstract
The invention discloses a broadband high-conversion gain frequency multiplier circuit, which comprises a frequency multiplication module, a frequency selection module and a negative resistance module, wherein the input end of the frequency multiplication module is connected with input signals INP and INN, the output end of the frequency multiplication module is connected with the input ends of the frequency selection module and the negative resistance module, and the frequency selection module and the negative resistance module perform injection oscillation on the input signals and then output signals OUTN and OUTP with opposite phases. The frequency doubling module carries out frequency doubling on the input signals INP and INN, the output signals enter the frequency selecting module and the negative resistance module to carry out injection oscillation, the signals are finally converted into two paths of signals OUTN and OUTP with opposite phases to be output, and high output power and conversion gain are realized on the premise of ensuring low power consumption and small area of the circuit.
Description
Technical Field
The invention belongs to the technical field of millimeter wave signal sources, and relates to a broadband high-conversion gain frequency multiplier circuit.
Background
With the continuous development of wireless communication technology, the requirements of the wireless communication technology on spectrum resources are continuously improved, and millimeter waves have wide application in radar, communication, imaging and medical treatment due to the advantages of short wavelength, wide frequency band, strong penetrating power, high transmission rate and the like.
In the millimeter wave field, a local oscillator frequency source plays an important role as an indispensable part in a transceiver. In the past, the communication technology has low quality requirement on the local oscillation frequency, and the local oscillation frequency can be obtained directly through a ring oscillator or an LC oscillator. However, with the development of technology, the requirements of the communication system on the frequency, phase noise and bandwidth of the local oscillator are increasingly increased, and these requirements cannot be met by using only an oscillator, and a common solution is to obtain a base frequency through the oscillator, and then frequency multiply the base frequency through a frequency multiplier to obtain the frequency source wanted by us.
The existing frequency multiplier mostly adopts a push-push structure, and the drain electrodes of the two NMOS tubes are connected together, so that the output odd harmonic signals can be effectively reduced. Patent document CN113965166a discloses a miniaturized broadband frequency doubler, which adopts differential mode coupling inductance to replace the series inductance commonly used in input matching of the traditional frequency doubler, so as to reduce the inductance value of the required matching inductance, thereby reducing the chip area, reducing the manufacturing cost, improving the self-resonance frequency of the input matching network, and expanding the working bandwidth of the frequency doubler. However, the design uses multistage inductance and balun for coupling, so that the output second harmonic power is reduced, and the conversion gain is reduced.
Patent CN114759879a discloses a push-push based double frequency multiplier, which provides a push-push based circuit, wherein a neutralization capacitor is added in a frequency multiplication NMOS tube, so that the conversion gain of the frequency multiplier is improved, a transformer is used for distinguishing and extracting secondary signals and tertiary signals, and meanwhile, the secondary signals and the tertiary signals are output, and the output bandwidth of the circuit is improved. The frequency output range with larger bandwidth is realized by using the frequency doubler and the frequency tripler realized by the frequency mixing module, but the power consumption of the circuit and the area of the layout are increased by adding the frequency mixing module.
Disclosure of Invention
In order to solve the above problems in the prior art, the present invention provides a wideband high conversion gain frequency multiplier circuit. The technical problems to be solved by the invention are realized by the following technical scheme:
the invention provides a broadband high conversion gain frequency multiplier circuit, which comprises: the frequency-doubling module is connected with the input ends of the input signals INP and INN, the output end of the frequency-doubling module is connected with the input ends of the frequency-selecting module and the negative resistance module, and the frequency-selecting module and the negative resistance module perform injection oscillation on the input signals and then output signals OUTN and OUTP with opposite phases.
In one embodiment of the present invention, the frequency doubling module includes an NMOS tube NM1, an NMOS tube NM2, a resistor R1, and a resistor R2;
the source stages of the NMOS tube NM1 and the NMOS tube NM2 are grounded, the grid electrode of the NMOS tube NM1 is connected with the input signal INP and one end of a resistor R1, the grid electrode of the NMOS tube NM2 is connected with the input signal INN and one end of a resistor R2, the other ends of the resistor R1 and the resistor R2 are connected with each other and connected with a bias VB, and the drain stages of the NMOS tube NM1 and the NMOS tube NM2 are connected with each other and connected with an output signal OUTN.
In one embodiment of the present invention, the frequency selection module includes an inductor L1, an inductor L2, and a capacitor C1;
one end of the capacitor C1 is connected with one end of the inductor L1 and is connected with the output signal OUTN, the other end of the capacitor C1 is connected with one end of the inductor L2 and is connected with the output signal OUTP, and the other ends of the inductor L1 and the inductor L2 are connected with the power supply VCC in parallel.
In one embodiment of the present invention, the negative resistance module includes an NMOS transistor NM3 and an NMOS transistor NM4;
the source stages of the NMOS tube NM3 and the NMOS tube NM4 are connected and grounded, the grid electrode of the NMOS tube NM3 is connected with the drain stage of the NMOS tube NM4 in parallel connection with the output signal OUTP and is connected with one end of the inductor L2, and the grid electrode of the NMOS tube NM4 is connected with the drain stage of the NMOS tube NM3 in parallel connection with the output signal OUTN and is connected with one end of the inductor L1.
In one embodiment of the present invention, the input signal INP and the input signal INN are differential signals with opposite phases.
In one embodiment of the present invention, the frequency multiplication module is a push-push structure.
In one embodiment of the present invention, the frequency selection module is a capacitive-inductive resonant tank.
The invention has the beneficial effects that:
1. the broadband high conversion gain frequency multiplier circuit comprises a frequency multiplication module, a frequency selection module and a negative resistance module, wherein the frequency multiplication module multiplies input signals INP and INN, output signals enter the frequency selection module and the negative resistance module to perform injection oscillation, the frequency selection module performs frequency selection through resonance, the negative resistance module performs amplification on the signals and improves conversion gain under the condition of maintaining the oscillation of the circuit, and finally the signals are converted into two paths of signals OUTN and OUTP with opposite phases to be output, so that high output power and conversion gain are realized on the premise of ensuring low power consumption and small area of the circuit.
2. According to the invention, a push-push structure is adopted for frequency multiplication, so that the odd harmonic suppression degree of an output signal is increased; the frequency selection design is reasonable through a capacitance inductance resonant circuit (LCtank), so that the bandwidth of output frequency is increased; and a negative resistance module is adopted, and the conversion gain of an output signal is improved in an injection oscillation mode.
Drawings
FIG. 1 is a schematic diagram of a wideband high conversion gain frequency multiplier according to an embodiment of the present invention;
FIG. 2 is a block diagram of a wideband high conversion gain frequency multiplier according to an embodiment of the present invention;
FIG. 3 is a conversion gain diagram of a wideband high conversion gain frequency multiplier circuit according to an embodiment of the present invention;
FIG. 4 is a diagram of output power of a wideband high conversion gain frequency multiplier circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a wideband high conversion gain frequency multiplier circuit fundamental suppression diagram according to an embodiment of the present invention;
fig. 6 is a third harmonic suppression chart of a wideband high conversion gain frequency multiplier circuit according to an embodiment of the present invention.
Detailed Description
The present invention will be described in detail below with reference to the drawings and the detailed description, but the embodiments of the present invention are not limited thereto.
The invention aims to provide a broadband high-conversion gain frequency multiplier circuit which realizes high output power and conversion gain on the premise of ensuring low power consumption and small area of the circuit. Referring to fig. 1, the wideband high conversion gain frequency multiplier circuit of the present invention comprises: the frequency-doubling module, the frequency-selecting module and the negative resistance module, the input end of the frequency-doubling module is connected with the input signals INP and INN, the output end of the frequency-doubling module is connected with the input ends of the frequency-selecting module and the negative resistance module, and the frequency-selecting module and the negative resistance module perform injection oscillation on the input signals and then output signals OUTN and OUTP with opposite phases.
In the embodiment of the invention, the frequency doubling module comprises an NMOS tube NM1, an NMOS tube NM2, a resistor R1 and a resistor R2. The source stages of the NMOS tube NM1 and the NMOS tube NM2 are grounded, the grid electrode of the NMOS tube NM1 is connected with an input signal INP and one end of a resistor R1, the grid electrode of the NMOS tube NM2 is connected with an input signal INN and one end of a resistor R2, the other ends of the resistor R1 and the resistor R2 are connected with each other in parallel and offset VB, and the drain stages of the NMOS tube NM1 and the NMOS tube NM2 are connected with each other in parallel and output a signal OUTN.
In this embodiment, the input signal INP and the input signal INN are differential signals with opposite phases, and the maximum cancellation fundamental wave can be obtained after entering the frequency doubling module. In order to obtain a better fundamental wave suppression degree, preferably, the frequency doubling module adopts a push-push structure.
In the embodiment of the invention, the frequency selecting module comprises an inductor L1, an inductor L2 and a capacitor C1. One end of the capacitor C1 is connected to one end of the inductor L1 and connected to the output signal OUTN, the other end of the capacitor C1 is connected to one end of the inductor L2 and connected to the output signal OUTP, and the other ends of the inductor L1 and the inductor L2 are connected to the power supply VCC. The frequency selecting module has the function of selecting frequencies of the two output signals, and compared with the signal without frequency selecting, the signal after frequency selecting is output, the harmonic suppression degree is improved, and meanwhile, the conversion gain is also improved.
The frequency selecting module of the embodiment is a capacitance inductance resonant circuit, the resistance of the frequency selecting module at the resonant frequency point can be regarded as infinity, and the output second harmonic current can be increased, so that the final conversion gain is improved.
In the embodiment of the invention, the negative resistance module comprises an NMOS tube NM3 and an NMOS tube NM4. The source stages of the NMOS tube NM3 and the NMOS tube NM4 are connected and grounded, the gate of the NMOS tube NM3 is connected to the drain stage of the NMOS tube NM4 in parallel and connected to the output signal OUTP, and is connected to one end of the inductor L2, and the gate of the NMOS tube NM4 is connected to the drain stage of the NMOS tube NM3 and connected to the output signal OUTN, and is connected to one end of the inductor L1.
Referring to fig. 2, in the wideband high conversion gain frequency multiplier circuit according to the embodiment of the present invention, the gate of the NM1 tube is connected to one end of the resistor R1 and to INP, the other end of the resistor R1 is connected to one end of the resistor R2 in parallel with VB, and the other end of the resistor R2 is connected to the gate of the NM2 tube in parallel with INN. The NM1 pipe is connected with the source stage of the NM2 pipe, the drain stage of the NM3 pipe is connected with the drain stage of the NM2 pipe in parallel, the grid electrode of the NM4 pipe, one end of the inductor L1, one end of the capacitor C1 and the OUTN are connected with each other in parallel. The other end of the inductor L1 is connected with the VCC and one end of the inductor L2, the other end of the inductor L2 is connected with the other end of the capacitor C1, the drain of the NM4 tube and the grid of the NM3 tube in parallel. The source stages of the NM3 and NM4 pipes are connected to ground.
The working principle of the embodiment of the invention is as follows:
after the circuit is started, the grid electrodes of the NM1 pipe and the NM2 pipe respectively input differential signals with opposite phases, the phases of the two paths of signals are different by 180 degrees, and the currents generated at the drain electrodes of the NM1 pipe and the NM2 pipe are respectively i 1 And i 2 The current after superposition of the two is i 0 Ignoring the fourth term and higher will i 1 And i 2 Respectively carrying out Taylor expansion to obtain:
therefore, there are
Wherein alpha is 0 The term is the DC component, alpha, of the current 2 The term is the signal amplitude component, and it can be seen that the odd harmonic signals in the current have equal amplitudes but opposite phases, can be mutually offset, and finally i 1 And i 2 As can be seen from the Taylor expansion, the higher the frequency is, the less the components of the signal are, and after reasonably neglecting the four and higher harmonics, the output AC component isThe signal is subjected to frequency selection through L1, L2 and C1, is subjected to injection oscillation and amplification through an NM3 pipe and an NM4 pipe, and is output, wherein the NM3 pipe and the NM4 pipe provide oscillation of a negative resistance maintenance circuit, and the equivalent transconductance value is-2/g m Because of the parasitic capacitance of the grid source and the parasitic capacitance of the NM3 tube and the NM4 tube, the phase of the output signals OUTP and OUTN are strictly opposite, namely 180 degrees different, and meanwhile, the gain provided by the NM3 tube and the NM4 tube is larger than one, so that the Barkhausen condition is met, the circuit can successfully start vibration, and finally output from the OUTN and OUTP ends.
The effects of the present invention are further described below in connection with simulation experiments:
simulation experiment conditions:
the simulation experiment element adopts an SMIC 40nm1p8m process, and the simulation circuit is built on the basis of a Cadence IC617 simulation experiment platform.
The simulation of the invention adopts a SpectreRF simulation tool to simulate the circuit of the invention, the given power supply voltage VCC is 1.1V, the working temperature is 25 ℃, and the bias voltage VB is 0.4V.
Simulation content and result analysis:
under the working condition, a spectreRF simulation tool is adopted, input ports INP and INN and output ports OUTP and OUTN of a frequency multiplication module are respectively added with input ports and output ports, pss simulation is carried out on the embodiment of the invention, the conversion gain of a plot frequency multiplier is shown as figure 3, the abscissa in figure 3 is input frequency, the unit is GHz, the ordinate is the ratio of output second harmonic power to input fundamental wave power, namely conversion gain, the unit is dB, the highest conversion gain of frequency doubling is 2.98dB, the output frequency range covered by 3dB bandwidth is 23.50G-64.92G, the corresponding input frequency is 11.75G-32.46G, and the relative bandwidth is 93.7%.
The second harmonic power at the plot output port is shown in fig. 4, the abscissa in fig. 4 is input frequency, the unit is GHz, the ordinate is output second harmonic power, the unit is dBm, as can be seen from fig. 4, the maximum output power of frequency doubling is-6.10 dBm, the output frequency range covered by 3dB bandwidth is 26.24G-68.08G, the corresponding input frequency is 13.12G-34.04G, and the relative bandwidth is 88.7%. When the conversion gain and the output power meet the conditions within the 3dB bandwidth, the output frequency range is 26.24G-64.92G, the corresponding input frequency is 13.12G-32.46G, and the relative bandwidth is 84.9%;
the fundamental wave and the third harmonic power at the plot output port are subjected to difference by using the second harmonic power and the third harmonic power, so that the inhibition of the fundamental wave and the third harmonic of the frequency multiplier is obtained, for example, in the drawing 5 and the drawing 6, the abscissa in the drawing 5 and the drawing 6 is input frequency, the unit is GHz, the ordinate is harmonic inhibition ratio, the unit is dBc, the inhibition ratio of the frequency multiplier to the fundamental wave is more than 218dBc, and the inhibition ratio to the third harmonic is more than 227dBc as can be seen from the drawing 5 and the drawing 6.
The theoretical analysis and simulation results above show that: the broadband high-conversion gain frequency multiplier circuit has higher conversion gain and odd harmonic suppression degree under the condition of realizing 2 octaves broadband frequency multiplication, and can be applied to an ultra-wideband wireless communication local vibration source system.
The foregoing description is only of the preferred embodiments of the present invention, and is not intended to limit the invention, but rather should be construed in scope without departing from the technical scope of the invention.
Claims (7)
1. A wideband high conversion gain frequency multiplier circuit, comprising: the frequency-doubling module is connected with the input ends of the input signals INP and INN, the output end of the frequency-doubling module is connected with the input ends of the frequency-selecting module and the negative resistance module, and the frequency-selecting module and the negative resistance module perform injection oscillation on the input signals and then output signals OUTN and OUTP with opposite phases.
2. The wideband high conversion gain frequency multiplier circuit of claim 1, wherein the frequency multiplier module comprises an NMOS tube NM1, an NMOS tube NM2, a resistor R1, and a resistor R2;
the source stages of the NMOS tube NM1 and the NMOS tube NM2 are grounded, the grid electrode of the NMOS tube NM1 is connected with the input signal INP and one end of a resistor R1, the grid electrode of the NMOS tube NM2 is connected with the input signal INN and one end of a resistor R2, the other ends of the resistor R1 and the resistor R2 are connected with each other and connected with a bias VB, and the drain stages of the NMOS tube NM1 and the NMOS tube NM2 are connected with each other and connected with an output signal OUTN.
3. The wideband high conversion gain frequency multiplier circuit of claim 2, wherein the frequency selection module comprises an inductance L1, an inductance L2, and a capacitance C1;
one end of the capacitor C1 is connected with one end of the inductor L1 and is connected with the output signal OUTN, the other end of the capacitor C1 is connected with one end of the inductor L2 and is connected with the output signal OUTP, and the other ends of the inductor L1 and the inductor L2 are connected with the power supply VCC in parallel.
4. The wideband high conversion gain frequency multiplier circuit of claim 3, wherein the negative resistance module comprises an NMOS transistor NM3, an NMOS transistor NM4;
the source stages of the NMOS tube NM3 and the NMOS tube NM4 are connected and grounded, the grid electrode of the NMOS tube NM3 is connected with the drain stage of the NMOS tube NM4 in parallel connection with the output signal OUTP and is connected with one end of the inductor L2, and the grid electrode of the NMOS tube NM4 is connected with the drain stage of the NMOS tube NM3 in parallel connection with the output signal OUTN and is connected with one end of the inductor L1.
5. The wideband high conversion gain frequency multiplier circuit of any of claims 1-4, wherein the input signal INP and the input signal INN are differential signals of opposite phases.
6. The wideband high conversion gain frequency multiplier circuit of claim 5, wherein the frequency multiplication module is a push-push structure.
7. The wideband high conversion gain frequency multiplier circuit of claim 6, wherein the frequency selection module is a capacitive-inductive resonant tank.
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| CN202310925893.XA CN117200705A (en) | 2023-07-26 | 2023-07-26 | Broadband high conversion gain frequency multiplier circuit |
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| CN202310925893.XA CN117200705A (en) | 2023-07-26 | 2023-07-26 | Broadband high conversion gain frequency multiplier circuit |
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