CN117148298B - Receiving and transmitting channel multi-state amplitude-phase characteristic rapid test system - Google Patents
Receiving and transmitting channel multi-state amplitude-phase characteristic rapid test system Download PDFInfo
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- CN117148298B CN117148298B CN202311413741.8A CN202311413741A CN117148298B CN 117148298 B CN117148298 B CN 117148298B CN 202311413741 A CN202311413741 A CN 202311413741A CN 117148298 B CN117148298 B CN 117148298B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/40—Means for monitoring or calibrating
- G01S7/4004—Means for monitoring or calibrating of parts of a radar system
- G01S7/4008—Means for monitoring or calibrating of parts of a radar system of transmitters
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/40—Means for monitoring or calibrating
- G01S7/4004—Means for monitoring or calibrating of parts of a radar system
- G01S7/4021—Means for monitoring or calibrating of parts of a radar system of receivers
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Abstract
The invention discloses a receiving and transmitting channel multi-state amplitude-phase characteristic rapid test system. The system comprises a main control computer, a state setting and testing synchronization device, a network router, a vector network analyzer and a testing cable, wherein the testing cable comprises a vector network analyzer testing cable, a state data cable, a state setting pulse cable and a testing synchronization pulse cable. The system of the invention can save a great amount of handshake waiting time, data storage and processing time and improve test efficiency.
Description
Technical Field
The invention belongs to the technical field of radar system testing, and particularly relates to a system for rapidly testing multi-state amplitude-phase characteristics of T/R receiving and transmitting channels of a phased array antenna, a receiving and transmitting feed network and a calibration channel.
Background
Phased array antennas are the primary antenna system for many radar and satellite applications today. Phased array antennas are composed of a number of fixed antenna elements fed coherently by these elements and scanned at each element with variable phase and delay control beams over a given angle in space; and amplitude control is needed to shape the pattern. The phase shifting, time delay and amplitude control are realized by controlling a numerical control phase shifter, a numerical control delay line and a numerical control attenuator in the T/R component. After the T/R component is produced, the amplitude-phase characteristics of all control states of the T/R component in the transmitting and receiving states or the amplitude-phase characteristics of all control states of the transmitting and receiving channels of the feeding network are required to be tested after the T/R component is formed into the feeding network, so that the amplitude-phase ground state performance and all combined state performance of the T/R component, the antenna feeding network receiving and transmitting channel and the scaling channel thereof are obtained, and the antenna designer can conveniently conduct the directional diagram synthesis.
Usually, a vector network analyzer is used for testing the amplitude-phase characteristics of a channel, firstly, calibration of the test channel is carried out and calibration data are stored before formal test, setting of exciting signal power, frequency, test point number, triggering mode and the like of the vector network analyzer is completed, special test auxiliary equipment controls the power-on operation of a tested T/R channel and sets T/R states, the special test auxiliary equipment comprises a transmitting/receiving control code and a phase shifting/attenuation/time delay control code, the vector network analyzer is used for testing the amplitude-phase characteristics of the channel, test data are stored, the T/R states are sequentially changed, and channel amplitude-phase characteristic test of all the states is completed. In order to improve the test efficiency, generally, a computer program control automatic test is adopted, a control computer communicates with a vector network analyzer and test auxiliary equipment through a local area network or other instrument buses, the control computer sends a state setting instruction to the test auxiliary equipment, the test auxiliary equipment sets the working state of a tested channel and replies ready messages, the control computer controls the vector network analyzer to complete one-time test, test data are stored, and amplitude-phase characteristics of different states are tested sequentially. The time required to complete the phase shift/decay/delay combined state amplitude-phase characteristic test for all of the T/R channels is primarily dependent upon the total number of states that need to be tested.
The problem of low efficiency when the conventional test method and device are used for testing the amplitude-phase characteristics of a receiving channel with a small number of states is not very remarkable, as the application of the test method and device brings higher precision technical requirements to the directivity, the pointing precision, the pattern shape and the like of an antenna, the control bits of a phase shifter, a time delay and an attenuator are correspondingly increased, the number of states is increased by the power exponent of 2, when the phase shifter and the attenuator are controlled by 6bits, and when the time delay is controlled by 3bits, the receiving channel has 15bits of control bits in total and 32768 states; the transmitting channel does not attenuate amplitude, and has 9bits of control bits and 512 states. Estimated as 0.5 seconds required to complete 1 state test, 4-5 hours are required for 32768 state tests on the receive channel, and 5 minutes are required for transmitting 512 state tests. Therefore, if the number of the test channels is considered, the efficiency of each receiving channel test of the existing test method for a few hours cannot be applied to the actual engineering project.
Analyzing the existing test method, the reason for the low test efficiency is determined by the following two points:
the synchronization efficiency is low: the state setting of the T/R receiving and transmitting channel to be tested and the measurement of the starting vector network analyzer realize synchronization through network communication handshake, and the network communication overhead causes low test synchronization efficiency along with the increase of the number of required test states.
The data storage efficiency is low: after the instrument finishes one-time test, the test data are calibrated and stored in a disk file, the calibration process needs to consume time, the file storage needs to be additionally interacted with an operating system, when the number of test states is large, the time spent on data calibration process and data storage after each test is greatly increased after accumulation, and the test efficiency is reduced.
Disclosure of Invention
Accordingly, the present invention is improved in the following three aspects in view of the above drawbacks.
The setting of the test parameters of the instrument is optimized, including the number of test points, the bandwidth of a measuring receiver and the like, the time required by single test is shortened on the premise of ensuring the test precision, and the shortest time measured is used as the minimum time interval for generating the synchronous pulse in the state setting and test synchronous device.
The state setting and testing synchronization device synchronously generates a pulse to trigger the vector network analyzer to perform one-time test while controlling the tested piece to change state by utilizing the external triggering synchronization and Groups triggering functions of the vector network analyzer, meanwhile, the vector network analyzer Counts the number of times of test triggering, and when the count is full of the set Groups Counts, namely the state number, the state enters a Sweep Hold state, so that the quick scanning is realized. The main control computer finishes the test task by inquiring that the Sweep state is Hold, and frequent hand holding and inquiry between the main control device and the synchronous device are not needed in the process, so that the test efficiency is improved.
And (3) performing off-line data calibration, namely storing the collected original data into the FIFO by the vector network analyzer at a high speed in the test process, storing the data in the FIFO into a disk file after all state tests are completed, and uniformly completing channel calibration on all channel original test data by post-processing software. The time-consuming disk access times in the test process are reduced to 1, and the test efficiency is greatly improved.
The invention solves the problems of low synchronization efficiency and low efficiency of storing test data, the time for completing one 201 frequency point test is 15ms, the 16384 state test of one receiving channel is completed, the time is shortened to 4-5 minutes, and the engineering application requirement is met.
Therefore, the invention provides a rapid test system for multi-state amplitude-phase characteristics of a receiving and transmitting channel, which comprises a main control computer, a state setting and testing synchronization device, a network router, a vector network analyzer and a test cable, wherein the test cable comprises a vector network test cable, a state data setting cable, a state setting pulse cable and a test synchronization pulse cable.
In the technical scheme of the invention, a state setting and testing synchronization device generates a state control signal and synchronous test pulse of a tested piece, and the state setting and the measurement are synchronized through the synchronous test pulse during a plurality of state tests, a vector network analyzer is set to be triggered outside in a measurement triggering mode, the measurement scanning is in a Groups mode, the number of Groups is the number of the tested states, and when the test count is full, the test is stopped, so that a plurality of state tests of one channel are completed; 2. optimizing instrument setting, and measuring the shortest time required for completing one-time state test as the synchronous period of the test synchronous pulse, wherein each state test in the embodiment is completed by 15 ms; 3. the method comprises the steps of storing high-speed data, directly storing original test data into a FIFO after a vector network analyzer completes one-time test, and storing the original test data in the FIFO into a disk file after all state tests are completed; 4. and performing off-line calibration, compiling calibration processing analysis software to perform calibration processing and other analysis on the multi-state test data, and obtaining the base state amplitude-phase characteristic data and the combined state amplitude-phase characteristic data of the receiving and transmitting channels.
The invention has the following beneficial technical effects:
1. the hardware generates synchronous pulse with higher synchronous efficiency than handshake by network communication, and completes 1 test about 15ms, thus saving a great deal of handshake waiting time;
2. the FIFO is used for storing the test original data, and the data is stored in the disk file after all the state tests are completed, so that a great amount of time expenditure required by calibration processing and disk storage is saved compared with the data stored in the disk each time;
3. and the calibration is finished offline, so that the time required for carrying out data calibration processing in each test is saved, and the test efficiency of the vector network analyzer is improved.
Drawings
FIG. 1 is a block diagram of a system for rapidly testing the multi-state amplitude-phase characteristics of a receiving and transmitting channel;
FIG. 2 is a flow chart of a master control test;
FIG. 3 is a state set-up and test synchronization device workflow diagram;
fig. 4 is a timing diagram for testing.
Detailed Description
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
The receiving and transmitting channel multi-state amplitude-phase characteristic rapid test system of the invention comprises: the state setting and testing synchronization device is utilized to synchronously send out testing synchronization pulses when the working state of the tested receiving and transmitting channel is set, the testing synchronization pulses are input into an external triggering input port of the vector network analyzer, and the vector network analyzer is started to start testing; the period of the test synchronization pulse is set by optimizing the shortest test time of a single test state obtained by the parameters of the vector network analyzer; after the test is started, the state setting and testing synchronization device sequentially changes the working state of the tested receiving and transmitting channel, sends out a testing synchronization signal to trigger the test, and stores the data of each test into the high-speed FIFO; setting the group Counts of the vector network analyzer as the total number of states, and stopping the test when the total number of states counter is full of the total number of states required to be tested, wherein the Sweep state of the vector network analyzer is changed into Hold; when the main control program of the main control computer inquires that the vector network analyzer is in the Hold state, the data in the FIFO is stored in the disk file, and the test task is finished. The data calibration software performs channel calibration and analysis on the raw test data.
As shown in fig. 1, the system for rapidly testing the multi-state amplitude-phase characteristics of the receiving and transmitting channels comprises a main control computer, a state setting and testing synchronization device, a network router, a vector network analyzer and a test cable, wherein the test cable comprises a vector network test cable 1, a vector network test cable 2, a state data setting cable, a state setting pulse cable and a test synchronization pulse cable. The main control computer, the state setting and testing synchronization device and the vector network analyzer form a local area network, and the main control computer is responsible for setting testing parameters of the vector network analyzer, wherein main parameters set by the vector network analyzer comprise: the trigger mode is external trigger, the Groups mode, the Groups counts are the total number of tests, the IF bandwidth is 30kHz, and the number of test points is 201 points (the number of test points can be set according to the requirement of test frequency point interval in application). Executing a test flow, and starting a state setting and test synchronization device to start working; when the state total counter is full, the vector network analyzer enters a Hold state, and the main control computer reads the FIFO data and stores the FIFO data on a disk. The calibration software can be installed on any computer, and the original test data is read in, and the amplitude-phase characteristic data of the calibrated receiving channel is obtained after the amplitude-phase calibration.
The main control test flow is shown in fig. 2, and the flow chart comprises two branches of a receiving channel test and a transmitting channel test. The method and the system for quick test of the invention comprise the following steps:
step 1: initializing a vector network analyzer;
step 2: setting parameters such as excitation power, frequency, point number and the like by a vector network analyzer, calibrating a receiving/transmitting channel, and storing calibration data;
step 3: receiving a channel state test branch, wherein the vector network analyzer is configured into a FIFO (first in first out) mode and a Groups mode; transmitting a channel state test branch, wherein the vector network analyzer is configured into a pulse test mode;
step 4: the receiving and transmitting channel state test vector network analyzer is configured to be in an external trigger mode;
step 5: the main control computer handshakes with the state setting and testing synchronization device, and after success, the main control computer sends the number of testing states to the state setting and testing synchronization device;
step 6: receiving channel state test branches, setting a group count of a vector network analyzer as a state number to be tested, waiting for a state setting and test synchronization device to send and receive a test synchronization pulse to start the test of the vector network analyzer, writing test data into a FIFO of the vector network analyzer after the test of one state is completed, and controlling the test process by the state setting and test synchronization device until all state tests are completed; the state setting and testing synchronization device sends a test state number and a transmission test synchronization pulse, after the vector network analyzer receives the transmission test synchronization pulse, test data are stored in a memory of the vector network analyzer after one-time state test is completed, the main control computer sends a state test completion message to the state setting and testing synchronization device, the state setting and testing synchronization device judges whether all transmission state tests are completed after receiving the test completion message, and if not, the state setting and testing synchronization device sets the next state and sends the transmission test synchronization pulse until all the state tests are completed;
step 7: in the receiving channel state test branch, the main control program inquires a Sweep mode of the vector network analyzer, and when the mode is Hold, the test is finished; transmitting a channel state test branch, and transmitting a test ending message after the state setting and testing synchronization device completes all state tests;
step 8: in a receiving channel state test branch, reading FIFO data of a vector network analyzer and storing files to a disk; transmitting a channel state test branch, and storing memory data to a disk file;
step 9: in the receiving channel state test branch, channel amplitude and phase calibration is carried out on the original data by using the calibration data obtained in the step 2; in the transmitting channel state test branch, the calibration is completed when the vector network analyzer tests;
step 10: and resetting the vector network analyzer, and ending the test.
Fig. 3 is a flow chart of a state setting and testing synchronization device, the flow chart is divided into a receiving channel testing flow and a receiving channel testing flow, and the method of the invention is used for sending out a testing synchronization pulse and starting a vector network analyzer to test while setting the working state of a tested piece.
Step 1: initializing a state setting and testing synchronization device;
step 2: waiting for handshake with a main control computer and receiving a test state number;
step 3: receiving a channel state test branch, generating a state setting pulse, transmitting state control data in a buffer memory to a tested receiving channel, and synchronously generating a test synchronous pulse to a vector network analyzer; a transmitting channel state test branch, setting a transmitting test state, outputting a transmitting test synchronous pulse at the same time, and informing a main control computer to start testing;
step 4: receiving a channel state test branch, judging whether the test count is full of the test state number, and ending sending the pulse if the test count is full; transmitting a channel state test branch, judging whether the test count is full of the test state number, and ending transmitting the pulse if the test count is full;
step 5: if the channel state test branch is not fully counted, a pulse and a test synchronization pulse delay are set for the test state according to the optimal test time of the vector network analyzer for one time, a next state is set, and a next test synchronization pulse is sent until the test is finished; transmitting a channel state test branch, inquiring the main control computer to send a test completion message, and setting a next transmission test state until the test is finished;
step 6: and (5) ending the test, setting the state and resetting the test synchronization device.
FIG. 4 is a timing diagram of a test, wherein the state transfer clock, state data, state transfer enable, state set pulse, receive control level, and transmit control pulse are the interface timings of the state set and test synchronization device and the tested piece, for setting the working state of the tested piece, and when the receive control level is high, controlling the tested channel to be in the receive state; receiving a test synchronization pulse, and completely synchronizing with the state setting pulse, so as to trigger the vector network analyzer to complete the test of the once receiving state; the shortest period for receiving the test synchronization pulse and the state setting pulse is the shortest time required by the vector network analyzer to complete the single state amplitude-phase test. Transmitting control pulse to control the receiving-transmitting conversion of the detected channel, wherein the low level is in a transmitting state; the transmission test synchronization pulse is synchronous with the transmission control pulse and is used for triggering the vector network analyzer to complete the test of one-time transmission state.
The state setting and testing synchronization device provided by the invention can be an independent ground detection device, or a board card is inserted into a main control computer; the automatic test system can be formed with the main control computer and the vector network analyzer, the main control computer can complete the test, or the device can be started after the setting of the vector network analyzer is manually completed, and the synchronous pulse triggers the vector network analyzer to complete the test of a plurality of states.
The method and the device provided by the invention can be used for any situation requiring high-efficiency testing of multiple states, such as testing the gains of different MGCs of a receiving channel, testing the performance of products on a T/R production line, and the like, and especially, testing related indexes during a temperature test.
It will be readily appreciated by those skilled in the art that the foregoing description is merely a preferred embodiment of the invention and is not intended to limit the invention, but any modifications, equivalents, improvements or alternatives falling within the spirit and principles of the invention are intended to be included within the scope of the invention.
Claims (4)
1. The system is characterized by comprising a main control computer, a state setting and testing synchronization device, a network router, a vector network analyzer and a testing cable, wherein the testing cable comprises a vector network testing cable, a state data setting cable, a state setting pulse cable and a testing synchronization pulse cable; the state setting and testing synchronization device generates a state control signal and a synchronous test pulse of a tested piece, the state setting and the measurement are synchronized through the synchronous test pulse during a plurality of state tests, a vector network analyzer is set to be triggered outside in a measurement triggering mode, the measurement scanning is in a Groups mode, the number of Groups is the number of the tested states, and when the test count is full of the number of the states, the test is stopped, so that a plurality of state tests of one channel are completed; measuring the shortest time required for completing one-time state test as the synchronization period of the test synchronization pulse; the method comprises the steps of storing high-speed data, directly storing original test data into a FIFO after a vector network analyzer completes one-time test, and storing the original test data in the FIFO into a disk file after all state tests are completed; calibration processing analysis software is compiled to perform calibration processing and other analysis on the multi-state test data, so as to obtain the base state amplitude-phase characteristic data and the combined state amplitude-phase characteristic data of the receiving and transmitting channels;
the system for rapidly testing the multi-state amplitude-phase characteristics of the receiving and transmitting channels adopts a testing method which comprises the following steps:
step 1: initializing a vector network analyzer;
step 2: setting excitation power, frequency and point parameters by a vector network analyzer, calibrating a receiving/transmitting channel, and storing calibration data;
step 3: receiving a channel state test branch, wherein the vector network analyzer is configured into a FIFO (first in first out) mode and a Groups mode; transmitting a channel state test branch, wherein the vector network analyzer is configured into a pulse test mode;
step 4: the receiving and transmitting channel state test vector network analyzer is configured to be in an external trigger mode;
step 5: the main control computer handshakes with the state setting and testing synchronization device, and after success, the main control computer sends the number of testing states to the state setting and testing synchronization device;
step 6: receiving channel state test branches, setting a group count of a vector network analyzer as a state number to be tested, waiting for a state setting and test synchronization device to send and receive a test synchronization pulse to start the test of the vector network analyzer, writing test data into a FIFO of the vector network analyzer after the test of one state is completed, and controlling the test process by the state setting and test synchronization device until all state tests are completed; the state setting and testing synchronization device sends a test state number and a transmission test synchronization pulse, after the vector network analyzer receives the transmission test synchronization pulse, test data are stored in a memory of the vector network analyzer after one-time state test is completed, the main control computer sends a state test completion message to the state setting and testing synchronization device, the state setting and testing synchronization device judges whether all transmission state tests are completed after receiving the test completion message, and if not, the state setting and testing synchronization device sets the next state and sends the transmission test synchronization pulse until all the state tests are completed;
step 7: in the receiving channel state test branch, the main control program inquires a Sweep mode of the vector network analyzer, and when the mode is Hold, the test is finished; transmitting a channel state test branch, and transmitting a test ending message after the state setting and testing synchronization device completes all state tests;
step 8: in a receiving channel state test branch, reading FIFO data of a vector network analyzer and storing files to a disk; transmitting a channel state test branch, and storing memory data to a disk file;
step 9: in the receiving channel state test branch, channel amplitude and phase calibration is carried out on the original data by using the calibration data obtained in the step 2; in the transmitting channel state test branch, the calibration is completed when the vector network analyzer tests;
step 10: and resetting the vector network analyzer, and ending the test.
2. The system of claim 1, wherein the host computer, the state setting and testing synchronization device and the vector network analyzer form a local area network, and the host computer is responsible for setting the test parameters of the vector network analyzer.
3. The system of claim 1, wherein the parameters of the vector network analyzer comprise: the triggering mode is external triggering, the mode is a Groups mode, the Groups counts are the total number of tests, the IF bandwidth is 30kHz, and the number of test points is set according to the test frequency point requirement.
4. The system of claim 1, wherein the status setting and testing synchronization device is a stand alone device or a board card is plugged into the host computer.
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