CN1170165C - Detection method and its detection structure for array electronic contact reliability - Google Patents

Detection method and its detection structure for array electronic contact reliability Download PDF

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Publication number
CN1170165C
CN1170165C CNB011417986A CN01141798A CN1170165C CN 1170165 C CN1170165 C CN 1170165C CN B011417986 A CNB011417986 A CN B011417986A CN 01141798 A CN01141798 A CN 01141798A CN 1170165 C CN1170165 C CN 1170165C
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contact
testing
contact group
group
conductive junction
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CN1409123A (en
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陈振贤
章厚昆
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NEW LIGHT SOURCE TECHNOLOGY Co Ltd
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Individual
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Abstract

The present invention provides a detection method and a detection structure for detecting the reliability of array electronic contacts. Two adjoining contacts form a short circuit by a helical mode or a regular continuous loop design in first contact groups at the bottom of an electronic element base plate to be detected; second contact groups are divided to form a short circuit between the two adjoining contacts by a helical mode or a regular reverse continuous loop design in the second contact groups on the surface of a corresponding detection circuit base plate, and the short circuit corresponding to the second contact groups of the electronic element to be detected is an open loop. The first contact groups and the second contact groups are conducted by a plurality of conducting contacts, and even number of conducting contacts are connected to form a monitoring loop in series according to the grouping routes of the detection circuit plate. The resistance variation and the abnormal events of each monitoring loop are detected continuously to judge and read the conducting contacts of a specific monitoring loop, and the efficiency that the conducting contacts are multipoint, and the monitoring and detection are continuous, instant and reliable are realized.

Description

The method of testing of array electronic contact reliability and test structure thereof
Technical field
The present invention relates to a kind of array package, as BGA Package (Ball Grid Array, BGA) measuring technology, particularly about a kind of measured electronic elements of the array encapsulation with high number of contacts behind surface mount technology (SMT) fluid welding with electronic contact reliability (SolderJoint Reliability) method of testing and the test structure thereof of testing circuit board pad.
Background technology
In the process that the manufacture of semiconductor technology is constantly weeded out the old and bring forth the new, the progress of granular processing procedure makes semiconductor wafer sizes that breakthrough development all be arranged always, not only significantly dwindles wafer size, also makes also relative the increasing of pin number and density.BGA Package provides the solution of high pin number, and it is under identical assembling area, and the BGA encapsulation can provide more welding to count; Utilize the BGA technology or cover the technology of crystalline substance (flip-chip), it provides many advantages that are better than on the conventional package, for example I/O is directly binded to reduce the distance in order to the signal high-speed transfer.
Because BGA pad array density is too high, the effective bonding area of tin ball (EffectiveContacting Pads) also reduces relatively, makes its Joint Strength also weaken relatively.Electronic Packaging product as the key part and component of circuit board is mostly directly or indirectly done the SMT welding with the BGA kenel, make that in fluid welding (Reflow) processing procedure of SMT control multiple spot ball grid array solder technology has become the key factor that influences entire circuit plate SMT production quality; And how to control important spare part behind fluid welding, still have good pad fiduciary level and will become an important problem.
Cause the pad failure reasons a lot, including pressure causes the crack to grow up to (Stress-induced crack growth), microseismic activity (Micro-motion), thermal effect (Thermaleffects), metallurgical reaction (Metallurgical reaction), chemical effect (ChemicalReaction) and corrosion penetration phenomenon factors such as (Fretting corrosion phenomena), and these effects often depend on the quality of SMT process conditions and environment, and are representing after the production of electronic components or under through the long-term work environment.The inefficacy of pad presents with contact crack or fracture usually, if in the past the large contact surface contact that product had, is easy to by visual or detect with ICT; And for the difficult pad that detects, the known modes such as optics (Optical) or X-light of then using detect, but under high pad density situation, but can't accurately effectively judge the quality of solder joint, crannied pad also is difficult for detecting out with known method of testing, even is perfect with X-ray or optical detection outwardly at pad, but still can't confirm bump the integrity problem that may hide.
Summary of the invention
Based on the consideration of above all technological layers, must possess certain quality of electronic product and processing procedure reliability again, so for the test of the pad reliability after the assembling of electronic component and circuit board and relative raising of importance of affirmation.Therefore, the present invention is promptly proposing a kind of monitoring technology with pad reliability of multiloop (Multi-channels), continuity (Continuity) and instant (Real time), effectively to overcome known disappearance.
Fundamental purpose of the present invention is at method of testing that a kind of array electronic contact reliability is provided and test structure thereof, and it has the solder joint loop design of measured electronic elements easily, has the characteristics of multipoint mode loop, continuity and at-once monitor simultaneously.
Another object of the present invention is on the SMT production line, sets up a cover conductive junction point monitoring reliability mechanism, to confirm SMT fluid welding (Reflow) processing procedure optimization and to guarantee the reliability engineering of electronic product quality.
For reaching above-mentioned purpose, the method of testing of array electronic contact reliability of the present invention is in the first contact group of a measured electronic elements B.B.P, makes per two contacts that adjoin form short circuit, open phase arrangement at interval with clockwise or counter-clockwise spiral fashion mode or continous way loop design clocklike; And simultaneously in the second contact group of a relative testing circuit board substrate surface, design its grouping formation array route (Channels) with counter-clockwise or clockwise antispin shape mode or clocklike reverse continous way loop, two tip nodes of each group are respectively current input terminal and earth terminal, and make per two contacts formation short circuit, the open phase arrangements at interval of adjoining in each group; And it is circuit-opening contacts corresponding to the shunt contact among the first contact group; Utilize a plurality of conductive junction points that this electronic component is welded on the testing circuit board again, to borrow the conductive junction point conducting first contact group and the second contact group, and then a plurality of conductive junction points series connection are formed monitoring circuits according to the route of this testing circuit board, according to above-mentioned grouping route as can be known, one end of each monitoring circuit is a current input terminal, and the other end then is an earth terminal; Electronic component after the order welding and testing circuit board through a SMT fluid welding process after, utilize a case detecting device (Event Detector) simultaneously a plurality of monitoring circuits to be tested at last again, and continuous monitoring writes down the series impedance of each monitoring circuit and the anomalous event of generation thereof, learns that with this anomalous event of interpretation in view of the above the conductive junction point of a certain specific monitoring circuit lost efficacy.
And the test structure of array electronic contact reliability of the present invention, then comprise: a measured electronic elements, in the first contact group of its B.B.P, make per two contacts that adjoin form short circuit, open phase arrangement at interval with spiral fashion mode or continous way loop design clocklike; One testing circuit board, substrate surface in this testing circuit board is provided with the second contact group, and with antispin shape mode or clocklike oppositely the design of continous way loop with its grouping, two tip nodes of each group are respectively current input terminal and earth terminal, and make per two contacts formation short circuit, the open phase arrangements at interval of adjoining in each group, and its shunt contact corresponding to this measured electronic elements first contact group then is circuit-opening contacts; And a plurality of conductive junction points, it links together this measured electronic elements and this testing circuit board, and make each conductive junction point between the first contact group's the contact contact corresponding with the second contact group, and borrow this first contact group of this conductive junction point conducting and the second contact group, and then several conductive junction points are connected into a loop to form a plurality of monitoring circuits according to the grouping of this testing circuit board.
Description of drawings
Fig. 1 is a test structure cut-open view of the present invention;
Fig. 2 is the first contact group loop synoptic diagram of measured electronic elements of the present invention;
Fig. 3 is the second contact group loop synoptic diagram of testing circuit board of the present invention;
Fig. 4 is another embodiment of the testing circuit board second contact group loop of the present invention.
The figure number explanation:
10 measured electronic elements, 12 substrates
14 first contact groups
20 testing circuit boards, 22 second contact groups
24 routes, 26 current input terminals
28 earth terminals, 30 conductive junction points, 32 monitoring circuits
Embodiment
Because small variation or inefficacy have taken place the conductive junction point between electronic component and the circuit board, no matter its inefficacy factor why, finally all can characterize with the resistance change of contact; Therefore, the present invention measures the resistance change of conductive junction point in specific environment changes, and will become practice of monitoring conductive junction point reliability and effective method.
Fig. 1 is a test structure cut-open view of the present invention, and as shown in the figure, the test structure of this kind array electronic contact reliability is installed in a testing circuit board 20 by a measured electronic elements 10 and is formed.Substrate 12 bottoms at this measured electronic elements 10 are provided with the first contact group 14, its loop design please also refer to shown in Figure 2, in the first contact group 14 in a clockwise direction, spiral fashion mode by the past inner ring in outer ring will make per two contacts that adjoin 14 form the formed loop design of short circuit open circuit mode respectively, i.e. the 1st and 2 contact short circuits of meaning, the 2nd and 3 contacts open circuit, the 3rd and 4 contact short circuits again, the 4th and 5 contacts open circuit ... by parity of reasoning, up to the heart last point, and being designed to of this first contact group 14 is changeless, makes its comparatively simplification and standardization.
In addition, be provided with the first contact group, 14 corresponding second contact groups 22 with measured electronic elements 10 at the substrate surface of this testing circuit board 20, its loop design please also refer to shown in Figure 3, opposite with the first contact group's 14 of measured electronic elements 10 loop direction, in the second contact group 22 with counterclockwise, antispin shape mode by the past inner ring in outer ring forms array route (Channels) 24 with its grouping earlier, and make per two contacts that adjoin 22 with the formed loop design of short circuit open circuit mode, and the contact two ends of each group are respectively a current input terminal 26 and an earth terminal 28; Meaning promptly the 1st contact of first group of route 24 be power input the 26, the 2nd and 3 contacts be short circuit, the 3rd and 4 contacts for open circuit, the 4th and 5 contact short circuits again, the 5th and 6 contacts open circuit ... by parity of reasoning then is earth terminal 28 up to the last point that sets number of contacts.And the second contact group 22 on this testing circuit board 20 has the design of many kinds, it is one group or four contacts, six contacts that two point can be arranged ... promptly be divided into one group etc. any even number contact, and can different loop designs be arranged for the precision requirement of test route (Channel) according to carrying out this test manufacturer, have very much elasticity in the use.
In addition by plural conductive contact 30, with measured electronic elements 10 welded and installed on testing circuit board 20, to borrow this conductive junction point this first contact group 14 of conducting and second contact group 22 about in the of 30, and then comply with the grouping route 24 of this testing circuit board 20 and cooperate the first contact group 14 simultaneously and the design of the second contact group, 22 short circuits open circuit, and even number conductive junction point 30 is connected into a loop to form a plurality of monitoring circuits 32, and current return design because of each route 24 two ends on the testing circuit board 20, make that an end of each this monitoring circuit 32 is a current input terminal 26, the other end then is an earth terminal 28.
Wherein, no matter be first contact group 14 of measured electronic elements 10 or the second contact group 22 of testing circuit board 20, no matter the arrangement mode of its array contact is hollow, solid, concentric ring, symmetry or asymmetric etc., no matter all can use the test contacts loop design of said spiral formula or regular continous way for Any shape; When the first contact group 14 designs loop by the outer ring toward the spiral fashion mode of inner ring for clockwise direction, then 22 of the second contact groups are for counterclockwise designing the loop by the outer ring toward the spiral fashion mode of inner ring, if the first contact group 14 be counterclockwise spiral fashion mode or continous way loop design clocklike, what then 22 of the second contact groups were relative be that clockwise spiral fashion mode or clocklike reverse continous way loop are designed.Simultaneously because of testing the needs of manufacturer, loop design with the first contact group 14 of identical standard, manufacturer can be to select local consecutive contact group on testing circuit board 20 second contact groups 22, and the corresponding first contact group 14 designs for the loop and also can, as shown in Figure 4, the two ends of this minor loop route are respectively power input 26 and earth terminal 28, the contact that middle contact group then per two adjoins is short circuit, by parity of reasoning up to last group that sets number of contacts, local successive loops that promptly can this testing circuit board 20 is corresponding and be electrically connected on the first contact group 14 of measured electronic elements 10, for testing.And the kenel of this conductive junction point 30 can be stitch, soldered ball, solder projection and projection one of them.In addition, above-mentioned measured electronic elements 10 can be the electronic packaging product of wafer, so that directly detect the reliability of the conductive junction point between wafer and testing circuit board; And this measured electronic elements 10 also can be an element pedestal, the BGA socket (Socket) of CPU for example, so that this element base directly is installed on this testing circuit board, be conductively connected a little reliability testing, this element base are used to provide an electronic packaging element to be directly installed on effect on this element base.
Now method for testing reliability of the present invention is described with regard to above-mentioned structure, please cooperate shown in Figure 1 simultaneously, this method of testing comprises the following steps: to provide earlier a measured electronic elements 10 and with first contact group 14 to have the second contact group's 22 testing circuit board 20, two structural design is as described above, so repeat no more in this; Utilize complex conduction contact 30 that this measured electronic elements 10 is welded on this testing circuit board 20 again, and by this first contact group 14 of these conductive junction point 30 conductings and the second contact group 22, and then the conductive junction point 30 of 2 or its multiple is connected into a loop to form a plurality of monitoring circuits 32, this embodiment is that 6 conductive junction points 30 are a monitoring circuit 32, and an end of each this monitoring circuit 32 is a current input terminal 26, the other end is an earth terminal 28 then, makes this monitoring circuit 32 form a current return for test; Measured electronic elements 10 after will welding then and testing circuit board 20 through SMT fluid welding (Reflow) processing procedure after, 30 the reliability monitoring that is conductively connected again a little is tested.
Then, (Event Detector) tests a plurality of monitoring circuits 32 simultaneously with a case detecting device, test the resistance variations of each this monitoring circuit 32, and the series impedance of each monitoring circuit 32 and the anomalous event of generation thereof are write down in continuous monitoring simultaneously, wherein,, the series impedance of this monitoring circuit 32 promptly is considered as an anomalous event when surpassing this critical resistance value in the sensitive time because each monitoring circuit 32 all is set with a critical resistance value (Threshold Resistance) and sensitive time (Duration Time); At last, according to these continuous recording data, this anomalous event of interpretation and learn that the conductive junction point 30 of a certain specific monitoring circuit 32 lost efficacy.
Therefore, the method of testing of array electronic contact reliability proposed by the invention and test structure thereof, it has the characteristics of multipoint mode loop, continuity and at-once monitor simultaneously, make it can be really on the SMT production line, set up a cover conductive junction point monitoring reliability mechanism, to confirm SMT fluid welding (Reflow) processing procedure optimization and to guarantee the reliability engineering of electronic product quality.
Above-described embodiment only is explanation technological thought of the present invention and characteristics, its purpose makes the personage who has the knack of this skill can understand content of the present invention and is implementing according to this, when can not with qualification claim of the present invention, promptly the equalization of doing according to disclosed spirit generally changes or modifies, and must be encompassed in the claim of the present invention.

Claims (9)

1. the method for testing of an array electronic contact reliability is characterized in that: comprise the following steps:
(a) provide a measured electronic elements, in the first contact group of this measured electronic elements B.B.P, make per two contacts that adjoin form the ordered structure design of a simple and standard with short circuit, open phase mode at interval with spiral fashion mode or continous way loop design clocklike;
(b) provide a relative testing circuit board, substrate surface in this testing circuit board is provided with the second contact group, and with antispin shape mode or clocklike oppositely the design of continous way loop with its grouping, two tip nodes of each group are respectively current input terminal and earth terminal, and make per two contacts formation short circuit, the open phase arrangements at interval of adjoining in each group, and its shunt contact corresponding to this measured electronic elements first contact group then is circuit-opening contacts;
(c) utilize a plurality of conductive junction points that this measured electronic elements is installed on this testing circuit board, make each conductive junction point between the first contact group's a contact and the corresponding contact of the second contact group, by this first contact group of this conductive junction point conducting and the second contact group, and then a plurality of conductive junction points are connected into a loop to form most monitoring circuits according to the grouping of this testing circuit board; And
(d) test the resistance variations of each this monitoring circuit.
2. method of testing as claimed in claim 1 is characterized in that: wherein more comprise the following steps: afterwards in step (d)
(e) series impedance of each this monitoring circuit and the anomalous event of generation thereof are write down in continuous monitoring; And
(f) this anomalous event of interpretation and learn that the conductive junction point of a certain specific monitoring circuit lost efficacy.
3. method of testing as claimed in claim 1 is characterized in that: wherein more comprise afterwards earlier through a fluid welding processing procedure in step (c).
4. method of testing as claimed in claim 1 is characterized in that: wherein the kenel of this conductive junction point is selected from the group that stitch, soldered ball, solder projection and projection are formed.
5. method of testing as claimed in claim 1 is characterized in that: it is connected into a monitoring circuit with the even number conductive junction point.
6. method of testing as claimed in claim 1 is characterized in that: wherein in step (d), the resistance variations of described each this monitoring circuit of test is to test with a case detecting device.
7. method of testing as claimed in claim 1, it is characterized in that: wherein this first contact group is clockwise or counter clockwise direction ecto-entad or spiral fashion mode from inside to outside, and this second contact group then is counterclockwise or clockwise direction ecto-entad or antispin shape mode from inside to outside.
8. method of testing as claimed in claim 1 is characterized in that: wherein this monitoring circuit is provided with a critical resistance value and the sensitive time, promptly is considered as an anomalous event when the series impedance of this monitoring circuit surpasses this critical resistance value.
9. the test structure of an array electronic contact reliability, it is characterized in that: it comprises:
One measured electronic elements in the first contact group of its B.B.P, makes per two contacts that adjoin form short circuit, open phase arrangement at interval with spiral fashion mode or continous way loop design clocklike;
One testing circuit board, substrate surface in this testing circuit board is provided with the second contact group, and with antispin shape mode or clocklike oppositely the design of continous way loop with its grouping, two tip nodes of each group are respectively current input terminal and earth terminal, and make per two contacts formation short circuit, the open phase arrangements at interval of adjoining in each group, and its shunt contact corresponding to the first contact group then is circuit-opening contacts; And
A plurality of conductive junction points, it links together this measured electronic elements and this testing circuit board, and make each conductive junction point between the first contact group's a contact and the corresponding contact of the second contact group, and borrow this first contact group of this conductive junction point conducting and the second contact group, and then several conductive junction points are connected into a loop to form most monitoring circuits according to the grouping of this testing circuit board.
CNB011417986A 2001-09-19 2001-09-19 Detection method and its detection structure for array electronic contact reliability Expired - Fee Related CN1170165C (en)

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Application Number Priority Date Filing Date Title
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CN1170165C true CN1170165C (en) 2004-10-06

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Publication number Priority date Publication date Assignee Title
CN101515018B (en) * 2008-02-22 2011-09-21 纬创资通股份有限公司 Circuit detection loop and methods for manufacturing and using same
CN103454570B (en) * 2012-05-29 2016-05-18 纬创资通股份有限公司 The method for detecting short circuit of circuit layout and the short-circuit detecting device of circuit layout
CN103675575B (en) * 2012-09-18 2016-07-20 英业达科技有限公司 Single short dot group is used to test system and the method thereof of tested board
US8810269B2 (en) * 2012-09-28 2014-08-19 Xilinx, Inc. Method of testing a semiconductor structure
DE102013102155B4 (en) * 2013-03-05 2015-04-09 Friedrich-Alexander-Universität Erlangen-Nürnberg METHOD FOR TESTING COMPONENTS AND MEASURING ARRANGEMENT
CN103822869B (en) * 2014-02-28 2016-03-23 工业和信息化部电子第五研究所 The reliability checking method of power supply bonding lead solder-joint
CN106226637A (en) * 2016-08-04 2016-12-14 深圳市燕麦科技股份有限公司 A kind of Short method of testing
CN108225963B (en) * 2017-12-30 2020-11-13 广州兴森快捷电路科技有限公司 PCB design method based on BGA solder joint reliability test
CN113900008A (en) * 2021-09-15 2022-01-07 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) Test structure and test method

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