CN117013962A - Orthogonal RFDAC power amplifier based on Doherty matching network - Google Patents

Orthogonal RFDAC power amplifier based on Doherty matching network Download PDF

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Publication number
CN117013962A
CN117013962A CN202310672517.4A CN202310672517A CN117013962A CN 117013962 A CN117013962 A CN 117013962A CN 202310672517 A CN202310672517 A CN 202310672517A CN 117013962 A CN117013962 A CN 117013962A
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rfdac
doherty
matching network
power
circuit
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施凌云
王涛
洪志良
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Fudan University
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Fudan University
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0288—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/213—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Amplifiers (AREA)

Abstract

The invention belongs to the field of integrated circuit design, and particularly relates to a quadrature RFDAC power amplifier based on a Doherty matching network. The invention is composed of four parts: the device comprises a threshold detection and encoding module, a digital mixer, a power tube part and a Doherty matching network; the threshold detection and encoding module judges the threshold of the input digital signal and recodes the input digital signal; the digital mixer mixes the coded signal with a clock and is used for controlling the power tube part; the power tube part is a series of RFDAC current source arrays, plays a role in power output, and the output power is adjusted by changing the number of the gated current sources; the matching network realizes impedance transformation and frequency selection; the matching network employs two completely symmetrical transformers. According to the invention, threshold detection is respectively carried out on the input I, Q signals, a plurality of efficiency peaks on the two-dimensional IQ plane are realized under the condition that the layout is symmetrical, the rollback efficiency is improved, and the size of the rollback peak is similar to that of the highest peak.

Description

Orthogonal RFDAC power amplifier based on Doherty matching network
Technical Field
The invention belongs to the technical field of integrated circuit design, and particularly relates to a quadrature RFDAC power amplifier based on a Doherty matching network.
Background
The wireless communication technology has been developed for over 100 years, which is greatly convenient for people to produce and live. The communications industry is also an important part of the economic development. As communication technology further advances, the interconnection of everything may not be far away. The implementation of wireless communication must have physical implementation means, and at the present stage, mainly depends on an integrated circuit. However, the communication protocols with ever increasing transmission rates are becoming more complex, and demands for high linearity, high efficiency and high power are being placed on integrated circuits. And because the mainstream WLAN and LTE protocols also have a large peak-to-average power ratio PAPR, so that the circuit works in a lower power output state most of the time, for a traditional power amplifier, the efficiency is monotonically reduced along with the reduction of the output power, and thus, how to improve the back-off efficiency becomes a big problem. Therefore, the current radio frequency power amplifier needs to be capable of outputting high power, and has the characteristics of high linearity and high efficiency, in particular to the rollback efficiency.
In addition, along with the development of integrated circuits, the trend of miniaturization is more and more obvious, the cost of a single transistor can be reduced by a chip with higher integration level, and meanwhile, a tiny chip can be integrated into a computer or a mobile phone more easily, so that the integrated circuit is convenient for people to carry. However, the conventional commercial power amplifier mainly uses GaAs technology, and the CPU generally uses advanced CMOS technology, which makes the radio frequency circuit impossible to be fully integrated. In order to solve this problem, a digital power amplifier based on a switched capacitor has been proposed, and although there is a further progress in the aspect of full integration, this type of power amplifier has a problem of poor linearity, which is a distance from full commercialization. It is a challenge how to enable a chip to meet high integration while having high performance of conventional power amplifiers.
The rollback efficiency improving technology has been developed for a long time, and the board-level Doherty power amplifier depends on a quarter-wavelength transmission line, but the component cannot be integrated into a CMOS circuit. Some work has been done with transformers, but their transformers are asymmetric, which presents a problem for layout, and we prefer to use exactly the same transformers to achieve the same function.
The invention aims at an orthogonal RFDAC (radio frequency digital-to-analog converter) power amplifier based on a symmetrical transformer voltage power synthesis Doherty matching network, and carries out threshold detection on an input I, Q signal, namely, carries out working area division on the I, Q signal, and simultaneously realizes a plurality of rollback efficiency peaks under the condition of symmetrical layout by matching with the Doherty matching network, thereby improving the average efficiency of the system.
Disclosure of Invention
The invention aims to provide a quadrature RFDAC power amplifier based on a Doherty matching network, which realizes a plurality of rollback efficiency peaks under the condition of symmetrical layout, and improves the average efficiency of a system.
The quadrature RFDAC power amplifier provided by the invention consists of four parts, namely a threshold detection and coding module, a digital mixer module, a power tube module and a Doherty matching network module; see fig. 1, wherein:
the threshold detection and encoding module is used for respectively judging the threshold of I, Q signals input by the system, recoding the signals, and the total input signals are 13 bits; wherein the most significant bit 1bit is a sign bit, the last 12 bits are data bits, and the I, Q data signal is divided into two sections: [ 0-2048) [ 2049-4096); the coding part adopts a mixed coding mode of thermometer codes and binary codes, wherein the upper 6 bits are thermometer codes, and the lower 6 bits are binary codes.
The digital mixer module is characterized in that the circuit of the digital mixer module is divided into a logic circuit part and an inverter chain driving stage, wherein the logic circuit part completes the mixing function and is then connected with a group of inverter chains so as to improve the driving capability. The digital mixer for realizing the Doherty function is divided into a main circuit and an auxiliary circuit in a framework; four-phase clocks are needed for input, the input clocks of the main circuit are 0 degrees and 180 degrees, and the input clocks of the auxiliary circuit are 90 degrees and 270 degrees.
The power tube module is an array of a series of RFDAC current source units, plays a role in power output, and the output power is adjusted by changing the number of the gated current sources; specifically, the power tube module consists of 2 identical PAs based on RFDAC, one thermometer code unit of the PA, the number of the thermometer code units is 63, and the other thermometer code unit is a binary unit with 6 bits; the architecture of all RFDAC cells is exactly the same, but the bin sizes drop in binary form.
Each RFDAC unit circuit has a structure shown in figure 2, and a tail current source (M1), a pair of switching tubes (M2, M3) and a pair of output thick grid tubes (M4, M5), wherein the tail current source and the switching tubes are thin grid tubes shown in figure 2; wherein the tail current source provides the most dominant cell current; the gate of the switching tube is connected with and controlled by the output of the digital mixer, when the unit is selected, the output of the digital mixer is square wave, and when the unit is not selected, the gate voltage is 0, and the unit does not provide current. The thick grid tube utilizes the high withstand voltage of the thick grid tube, can raise the integral power supply voltage of the power amplifier, and is convenient for outputting larger power.
The RFDAC is divided into a main path and an auxiliary path, the main path RFDAC is represented by PA1, and input signals of the main path RFDAC are represented by IMainP (QMainP) and IMainN (QMainN) respectively; the auxiliary circuit RFDAC is represented by PA2, and the input signals of the auxiliary circuit RFDAC are represented by IAuxP (QAuxP) and IAuxN (QAuxN) respectively; for the first interval: IMainP (QMainP) =i (Q), IMainN (QMainN) =i (Q), IAuxP (QAuxP) =0, iauxn (QAuxN) =0; for the second interval: IMainP (QMainP) =i (Q), IMainN (QMainN) =i (Q), IAuxP (QAuxP) =2i (Q) -2048, iauxn (QAuxN) =2i (Q) -2048. The contents in brackets herein denote juxtaposition, and the contents in brackets on both sides of the equation correspond to each other, for example: IMainP (QMainP) =i (Q), meaning imianp=i, qmainp=q.
The Doherty matching network has a structure shown in fig. 3, and comprises primary capacitors (C P1 ，C P2 ) Two completely symmetrical transformers (L P2 ,L P2 ) Secondary side capacitance (C) L2 ) The device is used for realizing the functions of impedance transformation and frequency selection; the secondary side of the main transformer is not provided with a capacitor; the transformer adopts four-way synthesis, and four input ports on the primary side are respectively connected with a differential positive end and a differential negative end of a main way and a differential positive end and a differential negative end of an auxiliary wayThe ends are connected to realize voltage and power synthesis, the primary side capacitor Cp1 is connected with the primary side of the main circuit transformer in parallel, the primary side capacitor Cp2 is connected with the primary side of the auxiliary circuit transformer in parallel, and the secondary side capacitor (C L2 ) And is connected with the secondary side of the auxiliary transformer in parallel.
In the invention, the RFDAC is combined with the Doherty matching network based on symmetrical transformer voltage power synthesis, and the Doherty function is realized together with threshold detection; the four phase clocks of the power amplifier are all square waves with 25% duty cycle.
In the invention, the input I, Q signal is subjected to threshold detection, namely I, Q signal is subjected to working area division, and a plurality of rollback efficiency peaks are realized by matching with the Doherty matching network, so that the average efficiency of the system is improved; the invention realizes a plurality of efficiency peaks on the two-dimensional IQ plane by using the identical transformers under the condition of symmetrical layout, improves the rollback efficiency, and ensures that the size of the rollback peak is similar to the maximum peak.
Drawings
Fig. 1 is a system architecture diagram of a quadrature RFDAC power amplifier based on a symmetrical transformer voltage power combining Doherty matching network.
Fig. 2 is an RFDAC cell circuit.
Fig. 3 is a Doherty matching network.
Fig. 4 is a threshold detection and encoding rule of the present invention.
Fig. 5 is an operational state of the power amplifier with different input signals.
Fig. 6 is a simulation result of drain efficiency over the entire input signal plane.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. These figures and examples are non-limiting and non-exhaustive.
The typical structure of the circuit of the quadrature RFDAC power amplifier based on the Doherty matching network is shown in figure 1. The method comprises the following four parts, namely a threshold detection and coding part, a digital mixer and driving part, a power tube part and a symmetrical transformer-based voltage and power synthesis Doherty matching network; the threshold detection and encoding part is used for respectively carrying out threshold judgment on the size of I, Q signals input by the system, and recoding, wherein the total input signals are 13 bits, the most significant bit 1bit is a sign bit, the last 12 bits are data bits, and the I, Q data signals are divided into two sections: [ 0-2048) ], [2049-4096 ], the coding part adopts a mixed coding mode of thermometer codes and binary codes, wherein the upper 6 bits are thermometer codes, and the lower 6 bits are binary codes; the digital mixer is divided into a logic circuit part and an inverter chain driving stage on a circuit module, a logic gate completes the mixing function, and then a group of inverter chains are connected to improve the driving capability. The digital mixer for realizing the Doherty function is structurally divided into a main circuit and an auxiliary circuit, four-phase clocks are needed for input, the input clocks of the main circuit are 0-degree and 180-degree, and the input clocks of the auxiliary circuit are 90-degree and 270-degree. The RFDAC is divided into a main path and an auxiliary path, the main path RFDAC is represented by PA1, and input signals of the main path RFDAC are represented by IMainP (QMainP) and IMainN (QMainN) respectively; the auxiliary circuit RFDAC is represented by PA2, and the input signals of the auxiliary circuit RFDAC are represented by IAuxP (QAuxP) and IAuxN (QAuxN) respectively; for the first interval: IMainP (QMainP) =i (Q), IMainN (QMainN) =i (Q), IAuxP (QAuxP) =0, iauxn (QAuxN) =0; for the second interval: IMainP (QMainP) =i (Q), IMainN (QMainN) =i (Q), IAuxP (QAuxP) =2i (Q) -2048, iauxn (QAuxN) =2i (Q) -2048.
The power amplifier body includes a power tube portion and a Doherty matching network based on symmetrical transformer voltage power synthesis. An RFDAC cell of the power tube section includes a tail current source, a pair of switching tubes and a pair of output thick gate tubes. The Doherty matching network based on the symmetrical transformer voltage and power synthesis comprises a primary side capacitor of a main circuit and an auxiliary circuit, two transformers which are completely symmetrical and a secondary side capacitor of the auxiliary circuit transformer, wherein the primary side capacitor and the secondary side capacitor of the main circuit transformer are used for realizing impedance transformation and frequency selection functions; the transformer adopts four-way synthesis, and four input ports on the primary side are respectively connected with a differential positive end and a differential negative end of the main circuit and a differential positive end and a differential negative end of the auxiliary circuit. The RFDAC is combined with a Doherty matching network based on symmetrical transformer voltage power synthesis, and cooperates with threshold detection to realize the Doherty function; the four phase clocks of the power amplifier are all square waves with 25% duty cycle.
Fig. 4 is a threshold detection and encoding rule. The threshold detection and encoding part is used for respectively carrying out threshold judgment on the size of I, Q signals input by the system, and recoding, wherein the total input signals are 13 bits, the most significant bit 1bit is a sign bit, the last 12 bits are data bits, and the I, Q data signals are divided into two sections: [ 0-2048) ], [2049-4096 ], the coding part adopts a mixed coding mode of thermometer codes and binary codes, wherein the upper 6 bits are thermometer codes, and the lower 6 bits are binary codes; the RFDAC is divided into a main path and an auxiliary path, the main path RFDAC is represented by PA1, and input signals of the main path RFDAC are represented by IMainP (QMainP) and IMainN (QMainN) respectively; the auxiliary circuit RFDAC is represented by PA2, and the input signals of the auxiliary circuit RFDAC are represented by IAuxP (QAuxP) and IAuxN (QAuxN) respectively; for the first interval: IMainP (QMainP) =i (Q), IMainN (QMainN) =i (Q), IAuxP (QAuxP) =0, iauxn (QAuxN) =0; for the second interval: IMainP (QMainP) =i (Q), IMainN (QMainN) =i (Q), IAuxP (QAuxP) =2i (Q) -2048, iauxn (QAuxN) =2i (Q) -2048.
Fig. 5 is a schematic diagram of the efficiency backoff when the input signal i=q. (1) When all input signals are maximum, all the two power amplifiers work to realize peak output power, and a first efficiency peak point appears; (2) When IMainP (QMainP) =4096
(0) IMainN (QMainN) =4096 (0), IAuxP (QAuxP) =4096 (0), IAuxN (QAuxN) =4096 (0), a second peak occurs at the 3dB back off; (3) IMainP (QMainP) = IMainN (QMainN) =2048, iauxp (QAuxP) =iauxn (QAuxN) =0, a third peak occurs at a back-off of 6 dB; (4) The fourth peak occurs at 9dB back-off when imain=imain=2048 and the remaining input signals are all 0. The simulation results are shown in fig. 4.
Fig. 6 is a four-quadrant input signal efficiency simulation curve, DE being drain efficiency. As can be seen, the efficiency peaks appear at 0dB, 3dB, 6dB and 9dB rollbacks at i=q, consistent with the theoretical analysis in fig. 3. The total of 4×4+4×2=24 efficiency peaks (four quadrants) appear in the whole IQ plane, and the shape analysis of the efficiency peaks comprises 8 full peaks and 16 half peaks, so that the back-off depth and the number of back-off points are increased, the efficiency of different back-off depths is improved, and the overall efficiency of the power amplifier is further improved. Therefore, the quadrature RFDAC power amplifier based on the symmetrical transformer voltage power synthesis Doherty matching network is realized.

Claims (4)

1. The quadrature RFDAC power amplifier based on the Doherty matching network is characterized by comprising the following four parts: the device comprises a threshold detection and encoding module, a digital mixer module, a power tube module and a Doherty matching network module; wherein:
the threshold detection and encoding module is used for respectively judging the threshold of I, Q signals input by the system and recoding the signals, and the encoding part adopts a mixed encoding mode of thermometer codes and binary codes, wherein the upper 6 bits are thermometer codes, and the lower 6 bits are binary codes;
the digital mixer module is characterized in that a circuit of the digital mixer module is divided into a logic circuit part and an inverter chain driving stage, wherein the logic circuit part completes a mixing function and is then connected with a group of inverter chains so as to improve driving capability; the digital mixer for realizing the Doherty function is divided into a main circuit and an auxiliary circuit in a framework; four-phase clocks are input, the input clocks of the main circuit are 0 degree and 180 degrees, and the input clocks of the auxiliary circuit are 90 degrees and 270 degrees;
the power tube module is an array of a series of RFDAC current source units, plays a role in power output, and the output power is adjusted by changing the number of the gated current sources; the system specifically comprises 2 identical PAs based on RFDAC, wherein one thermometer code unit of the PA has the number of 63, and the other binary system unit has the number of 6 bits, the architectures of all the units are identical, but the pipe sizes of the binary system code units are reduced in a binary system form; each RFDAC unit circuit comprises a tail current source, a pair of switching tubes and a pair of output thick grid tubes, wherein the tail current source and the switching tubes are thin grid tubes; wherein the tail current source provides the most dominant cell current; the grid electrode of the switching tube is connected with and controlled by the output of the digital mixer, when the unit is selected, the output of the digital mixer is square wave, and when the unit is not selected, the grid voltage is 0, and the unit does not provide current; the thick grid tube utilizes the high withstand voltage to raise the power voltage of the whole power amplifier, so that the thicker grid tube is convenient for outputting larger power;
the Doherty matching network comprises primary side capacitors of a main circuit and an auxiliary circuit, two completely symmetrical transformers and secondary side capacitors of the auxiliary circuit transformers, and is used for realizing impedance transformation and frequency selection functions; the transformer adopts four-way synthesis, and four input ports of primary side are connected with difference positive end, difference negative end of main road and difference positive end, the difference negative end of auxiliary road respectively, realize voltage power synthesis, and a primary side electric capacity is parallelly connected with the primary side of main road transformer, and another primary side electric capacity is parallelly connected with auxiliary road transformer primary side, and vice side electric capacity is parallelly connected with auxiliary road transformer secondary side.
2. The Doherty matching network based quadrature RFDAC power amplifier of claim 1, wherein in the threshold detection and encoding module, the input signal is 13 bits in total; wherein the most significant bit 1bit is a sign bit, the last 12 bits are data bits, and the I, Q data signal is divided into two sections: [0-2048),[2049-4096).
3. The Doherty matching network based quadrature RFDAC power amplifier of claim 2, wherein the RFDAC is divided into a main path and an auxiliary path, the main path RFDAC is denoted by PA1, and input signals thereof are denoted by IMainP (QMainP) and IMainN (QMainN), respectively; the auxiliary circuit RFDAC is represented by PA2, and the input signals of the auxiliary circuit RFDAC are represented by IAuxP (QAuxP) and IAuxN (QAuxN) respectively; for the first interval: IMainP (QMainP) =i (Q), IMainN (QMainN) =i (Q), IAuxP (QAuxP) =0, iauxn (QAuxN) =0; for the second interval: IMainP (QMainP) =i (Q), IMainN (QMainN) =i (Q), IAuxP (QAuxP) =2i (Q) -2048, iauxn (QAuxN) =2i (Q) -2048; the contents in brackets herein represent juxtaposition, and the contents in brackets on both sides of the equation correspond to each other.
4. The Doherty matching network-based quadrature RFDAC power amplifier of claim 3, wherein the RFDAC is combined with a Doherty matching network based on symmetrical transformer voltage power synthesis and cooperates with threshold detection to realize the Doherty function; the four phase clocks of the power amplifier are all square waves with 25% duty cycle.
CN202310672517.4A 2023-06-07 2023-06-07 Orthogonal RFDAC power amplifier based on Doherty matching network Pending CN117013962A (en)

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CN202310672517.4A CN117013962A (en) 2023-06-07 2023-06-07 Orthogonal RFDAC power amplifier based on Doherty matching network

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CN202310672517.4A CN117013962A (en) 2023-06-07 2023-06-07 Orthogonal RFDAC power amplifier based on Doherty matching network

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