CN117007892B - Detection circuit, power management chip and electronic equipment - Google Patents

Detection circuit, power management chip and electronic equipment Download PDF

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Publication number
CN117007892B
CN117007892B CN202311248063.4A CN202311248063A CN117007892B CN 117007892 B CN117007892 B CN 117007892B CN 202311248063 A CN202311248063 A CN 202311248063A CN 117007892 B CN117007892 B CN 117007892B
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reference voltage
switching tube
current
source
resistor
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CN117007892A (en
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林奕涵
李经珊
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Shenzhen Siyuan Semiconductor Co ltd
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Shenzhen Siyuan Semiconductor Co ltd
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/561—Voltage to current converters
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/0038—Circuits for comparing several input signals and for indicating the result of this comparison, e.g. equal, different, greater, smaller (comparing pulses or pulse trains according to amplitude)
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

The invention discloses a detection circuit, a power management chip and electronic equipment. The detection circuit is used for detecting whether the target reference voltage is stably established. The detection circuit comprises a first switch tube, a first resistor, a first constant current source and a signal output end. The gate of the first switching tube is connected with a band gap reference voltage source. The source electrode of the first switching tube is connected with a system power supply of the band-gap reference voltage source through a first resistor. The drain electrode of the first switch tube is grounded through the first constant current source. The signal output end is connected with the drain electrode of the first switching tube. The sum of the bandgap reference voltage provided by the bandgap reference voltage source, the threshold voltage of the first switching tube and the voltage generated by the first current generated by the first constant current source on the first resistor is larger than the target reference voltage. Under the condition that the power supply voltage of the system power supply is stably larger than the target reference voltage, the first switch tube is conducted, a sign signal is output to indicate that the target reference voltage is stably established, and the detection result of the detection circuit is accurate.

Description

Detection circuit, power management chip and electronic equipment
Technical Field
The present invention relates to the field of power supply circuits, and more particularly, to a detection circuit, a power management chip, and an electronic device.
Background
Inside the chip, a reference voltage generating circuit is used for generating a target reference voltage to be supplied to a subsequent circuit as an operating voltage. Specifically, the bandgap reference voltage generating circuit may generate a bandgap reference voltage of 1.2V, and then, different reference voltage generating circuits may generate target reference voltages of different magnitudes according to the bandgap reference voltage. When the target reference voltage of the reference voltage generating circuit is stably established, an accurate flag signal needs to be provided to the subsequent circuit to indicate that the target reference voltage has been stably established.
When a target reference voltage higher than the bandgap reference voltage is generated using the bandgap reference voltage source, the target reference voltage may be generated using a reference current generated by the bandgap reference voltage source. The related art detection circuit judges whether the target reference voltage is stably established by detecting whether the reference current is stably established. However, under the condition that the power supply voltage of the system power supply slowly rises and is built, the reference current is built after the band gap reference voltage is built, and the detection circuit can output a sign signal to indicate that the reference voltage is built stably, but the power supply voltage of the system power supply is not built stably at the moment and is not larger than the target reference voltage. Therefore, the detection circuit actually outputs the flag signal before the target reference voltage is stably established, so that the detection result is inaccurate, and the operation of the later-stage circuit can be influenced, and even the later-stage circuit is damaged.
Disclosure of Invention
The embodiment of the invention provides a detection circuit, a power management chip and electronic equipment.
The detection circuit provided by the embodiment of the invention is used for detecting whether the target reference voltage is stably established. The detection circuit comprises a first switch tube, a first resistor, a first constant current source and a signal output end. The gate of the first switching tube is connected with a band gap reference voltage source. The source electrode of the first switching tube is connected with a system power supply of the band-gap reference voltage source through a first resistor. The drain electrode of the first switch tube is grounded through the first constant current source. The signal output end is connected with the drain electrode of the first switching tube. The sum of the bandgap reference voltage provided by the bandgap reference voltage source, the threshold voltage of the first switching tube and the voltage generated by the first current generated by the first constant current source on the first resistor is larger than the target reference voltage, so that the first switching tube is conducted under the condition that the power supply voltage of the system power supply rises to be larger than the target reference voltage, and the signal output end outputs a marking signal.
When the power supply voltage rises to be greater than the target reference voltage, the sum of the power supply voltage minus the threshold voltage of the first switching tube and the voltage on the first resistor is greater than the band-gap reference voltage, namely the source voltage of the first switching tube is greater than the sum of the band-gap reference voltage and the threshold voltage of the first switching tube, and the first switching tube is conducted. The drain of the first switching tube outputs a high level. That is, the output terminal is connected to the system power supply through the first switching tube, and outputs a high level as a flag signal to indicate that the target reference voltage has been stably established.
In certain embodiments, the first current is less than 100nA.
The system power supply is grounded through the first resistor, the first switch tube and the first constant current source, and the power consumption of the detection circuit is mainly the loss generated by the fact that the first current flows through the first resistor and is in direct proportion to the square of the first current. Therefore, the first current is set small, which is advantageous in reducing the power consumption of the detection circuit.
In some embodiments, the detection circuit further includes a first schmitt trigger, and a drain electrode of the first switching tube is connected to the signal output terminal through the first schmitt trigger.
The first schmitt trigger can be used for signal shaping, so that the first schmitt trigger outputs a high level and a low level more regularly, and therefore the sign signal output by the output terminal is less noisy.
In some embodiments, the target reference voltage is generated by a reference voltage generating circuit comprising a resistor group to which the target reference voltage is applied to generate the reference current. The detection circuit further comprises a current mirror circuit, a second constant current source and an AND gate. The current mirror circuit comprises a first output end, and is used for copying the reference current into a second current and outputting the second current through the first output end. The first output end is grounded through a second constant current source, the second constant current source is used for generating third current, and the first output end outputs high level under the condition that the second current is larger than the third current. The input end of the AND gate is respectively connected with the drain electrode and the first output end of the first switching tube, the output end of the AND gate is connected with the signal output end, and the output end of the AND gate outputs high level under the condition that the drain electrode and the first output end of the first switching tube output high level.
In the case of a rapid rise in the supply voltage, both the first output terminal and the drain of the first switching tube rapidly output a high level, indicating that the target reference voltage has been stably established. Under the condition that the power supply voltage slowly rises, the first output end outputs a high level when the power supply voltage is higher than the band gap reference voltage, and at the moment, the drain electrode of the first switching tube outputs a low level because the power supply voltage is lower than the target reference voltage, so that the target reference voltage is not stably established.
In some embodiments, the bandgap reference voltage is generated by a bandgap reference voltage generating circuit. The bandgap reference voltage generating circuit includes a bandgap reference voltage source and outputs a bandgap reference voltage through the bandgap reference voltage source, and the reference voltage generating circuit includes a target reference voltage source. The resistor group comprises a second resistor and a third resistor, and the band-gap reference voltage source is grounded through the second resistor. The target reference voltage source is connected with the second resistor through the third resistor and is used for outputting target reference voltage.
The voltage of the bandgap reference voltage source is divided by the second resistor R2 to obtain the reference current Iref. The reference current Iref flows through the second resistor R2 and the third resistor R3 to obtain the target reference voltage Vref.
In some embodiments, the third resistor is an adjustable resistor.
The third resistor R3 is an adjustable resistor, and different target reference voltages Vref can be obtained by changing the resistance value of the third resistor R3.
In some embodiments, the reference voltage generating circuit further includes an operational amplifier, an input end of the operational amplifier is connected to the bandgap reference voltage source and grounded through a second resistor, and an output end of the operational amplifier is connected to the target reference voltage source.
Because the operational amplifier is virtually short, the voltages of the two input ends of the operational amplifier are the same and are the voltages of the band-gap reference voltage source, and the voltage of the band-gap reference voltage source is divided by the second resistor R2 to obtain the reference current Iref.
In some embodiments, the current mirror circuit includes a second switching tube and a third switching tube. The grid electrode of the second switching tube is connected with the output end of the operational amplifier, the source electrode of the second switching tube is connected with the system power supply, and the drain electrode of the second switching tube is connected with the target reference voltage source. The grid electrode of the third switching tube is connected with the grid electrode of the second switching tube. The source electrode of the third switching tube is connected with the source electrode of the second switching tube, and the drain electrode of the third switching tube is connected with the first output end.
The second switching tube and the third switching tube form a current mirror structure, and the current flowing through the third switching tube can replicate the reference current flowing through the second switching tube.
In some embodiments, the second current is 2-10 times the reference current.
The reference current flowing through the second switch is Iref, and the current flowing through the third switch tube is I2. The size of I2 is N times that of Iref, N being related to the ratio of the aspect ratio of the third switching tube to the second switching tube in the current mirror structure. The size of I2 can be N times of Iref, and the value of N can be set to be 2-10 times. In case the reference current Iref is established stable, it is ensured that I2 is larger than I3 and the first output outputs a flag signal to indicate that the reference current is established stable.
In some embodiments, the detection circuit further comprises a capacitor, and the first output terminal is grounded through the capacitor.
In the case that the reference current has not established stability, the third current I3 of the second constant current source discharges the capacitor C1, pulling the level of the first output low. Under the condition that the reference current is established stably, the second current I2 output by the current mirror circuit charges the capacitor C1, and the level of the first output end is pulled up.
In certain embodiments, the second constant current source produces a third current of less than 100nA.
The first output end is grounded through a second constant current source, and the power consumption of the second constant current source is mainly the loss generated by the third current and is in direct proportion to the square of the third current. Therefore, the third current is set small, which is advantageous in reducing the power consumption of the second constant current source.
In some embodiments, the detection circuit further comprises a second schmitt trigger, and the first output terminal is connected to the input terminal of the and gate through the second schmitt trigger.
The second schmitt trigger can be used for signal shaping, so that the output of the second schmitt trigger is more regular in high level and low level, and therefore, the signal noise accessed by the input end of the AND gate is smaller. The second schmitt trigger may be a forward or reverse schmitt trigger, and the number of the second schmitt triggers is a multiple of 2 in case the second schmitt trigger is a reverse schmitt trigger.
The embodiment of the invention provides a power management chip, which comprises the detection circuit of any one of the embodiments.
The embodiment of the invention provides electronic equipment, which comprises the power management chip of any one of the embodiments.
The invention provides a detection circuit, a power management chip and electronic equipment. The detection circuit is used for detecting whether the target reference voltage is stably established. The detection circuit comprises a first switch tube, a first resistor, a first constant current source and a signal output end. The gate of the first switching tube is connected with a band gap reference voltage source. The source electrode of the first switching tube is connected with a system power supply of the band-gap reference voltage source through a first resistor. The drain electrode of the first switch tube is grounded through the first constant current source. The signal output end is connected with the drain electrode of the first switching tube. The sum of the bandgap reference voltage provided by the bandgap reference voltage source, the threshold voltage of the first switching tube and the voltage generated by the first current generated by the first constant current source on the first resistor is larger than the target reference voltage. When the power supply voltage of the system power supply rises to be greater than the target reference voltage, the sum of the threshold voltage of the first switching tube subtracted by the system power supply voltage and the voltage on the first resistor is greater than the band gap reference voltage, namely the source voltage of the first switching tube is greater than the sum of the band gap reference voltage and the threshold voltage of the first switching tube, and the first switching tube is conducted. The drain of the first switching tube outputs a high level. That is, the output terminal is connected to the system power supply through the first switching tube, and outputs a high level as a flag signal to indicate that the target reference voltage has been stably established. The detection circuit does not immediately output a flag signal to indicate stable establishment of the target reference voltage even if the band gap reference voltage is stably established, but outputs the flag signal to indicate stable establishment of the target reference voltage only if the power supply voltage is stably greater than the target reference voltage, and the detection result is accurate.
Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The foregoing and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings, in which:
fig. 1 is a circuit schematic of a detection circuit according to a first embodiment of the present invention;
FIG. 2 is a schematic diagram of a power management chip and an electronic device of the present invention;
FIG. 3 is a schematic diagram of the variation of the reference voltage and the supply voltage of the present invention;
FIG. 4 is a circuit schematic of a detection circuit according to a second embodiment of the present invention;
fig. 5 is a circuit schematic of a detection circuit according to a third embodiment of the present invention;
FIG. 6 is a schematic circuit diagram of a detection circuit according to a third embodiment of the present invention;
fig. 7 is another circuit schematic of a detection circuit according to a third embodiment of the present invention.
Detailed Description
Embodiments of the present invention are described in detail below, which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for explaining the present invention and are not to be construed as limiting the present invention.
Inside the chip, a reference voltage generating circuit is used for generating a target reference voltage to be supplied to a subsequent circuit as an operating voltage. Specifically, the bandgap reference voltage generating circuit may generate a bandgap reference voltage of 1.2V, and then, different reference voltage generating circuits may generate target reference voltages of different magnitudes according to the bandgap reference voltage. When the target reference voltage of the reference voltage generating circuit is stably established, an accurate flag signal needs to be provided to the subsequent circuit to indicate that the target reference voltage has been stably established.
When a target reference voltage higher than the bandgap reference voltage is generated using the bandgap reference voltage source, the target reference voltage may be generated using a reference current generated by the bandgap reference voltage source. The related art detection circuit judges whether the target reference voltage is stably established by detecting whether the reference current is stably established. However, under the condition that the power supply voltage of the system power supply slowly rises and is built, the reference current is built after the band gap reference voltage is built, and the detection circuit can output a sign signal to indicate that the reference voltage is built stably, but the power supply voltage of the system power supply is not built stably at the moment and is not larger than the target reference voltage. Therefore, the detection circuit actually outputs the flag signal before the target reference voltage is stably established, so that the detection result is inaccurate, and the operation of the later-stage circuit can be influenced, and even the later-stage circuit is damaged.
Referring to fig. 1, an embodiment of the present invention provides a detection circuit 100, where the detection circuit 100 is configured to detect whether a target reference voltage is stably established. The detection circuit 100 includes a first switching tube 110, a first resistor 120, a first constant current source 130, and a signal output terminal 140. The gate of the first switching tube 110 is connected to a bandgap reference voltage source 210. The source of the first switching tube 110 is connected to the system power supply 300 of the bandgap reference voltage source 210 through the first resistor 120. The drain of the first switching tube 110 is grounded through a first constant current source 130. The signal output 140 is connected to the drain of the first switching tube 110. The sum of the bandgap reference voltage provided by the bandgap reference voltage source 210, the threshold voltage of the first switching tube 110, and the voltage generated by the first current generated by the first constant current source 130 at the first resistor 120 is greater than the target reference voltage, so that the first switching tube 110 is turned on and the signal output terminal 140 outputs the flag signal when the power supply voltage of the system power supply 300 rises to be greater than the target reference voltage.
Referring to fig. 2, an embodiment of the present invention provides a power management chip 1000, where the power management chip 1000 includes a detection circuit 100.
The embodiment of the invention provides an electronic device 10000, which comprises a power management chip 1000.
In the case where the voltage of the system power supply 300 rises above the bandgap reference voltage, the bandgap reference voltage is stably established, and the gate voltage of the first switching transistor 110 is the bandgap reference voltage.
In the case where the voltage of the system power supply 300 has not risen above the target reference voltage, the sum of the power supply voltage minus the threshold voltage of the first switching tube 110 and the voltage across the first resistor 120 is smaller than the bandgap reference voltage, that is, the source voltage of the first switching tube 110 is smaller than the sum of the bandgap reference voltage and the threshold voltage of the first switching tube 110, and the first switching tube 110 is turned off. The drain of the first switching transistor 110 is grounded through the first constant current source 130, and outputs a low level. I.e. the output outputs a low level, indicating that the target reference voltage is not steadily established.
In the case that the power supply voltage rises to be greater than the target reference voltage, the sum of the power supply voltage minus the threshold voltage of the first switching tube 110 and the voltage across the first resistor 120 is greater than the bandgap reference voltage, that is, the source voltage of the first switching tube 110 is greater than the sum of the bandgap reference voltage and the threshold voltage of the first switching tube 110, and the first switching tube 110 is turned on. The drain of the first switching tube 110 outputs a high level. That is, the output terminal is connected to the system power supply 300 through the first switching tube 110, and outputs a high level as a flag signal indicating that the target reference voltage has been stably established.
In summary, the detection circuit 100 does not immediately output a flag signal to indicate that the target reference voltage is stably established even if the bandgap reference voltage is stably established, but outputs a flag signal to indicate that the target reference voltage is stably established if the power supply voltage is stably greater than the target reference voltage, and the detection result is accurate.
The detection circuit 100 outputs a sign signal accurately and timely, can be suitable for scenes of power supply voltage in a wide range and power-on speeds of different power supply voltages, has lower power consumption and cost, does not influence the overall accuracy of the system, and can be effectively applied to various reference voltage generating circuits.
Specifically, vdd is the voltage of the system power supply 300 of the bandgap reference voltage source 210. VBG is the bandgap reference voltage and Vref is the target reference voltage. The voltage Vdd of the system power supply 300 is used to generate the bandgap reference voltage VBG and the target reference voltage Vref. Thus, in the case of a stable establishment of the bandgap reference voltage VBG, the value of Vdd must be greater than VBG. In the case where the target reference voltage Vref is stably established, the value of Vdd must be greater than Vref.
Referring to fig. 3, during the power-up of the system power supply 300, the voltage Vdd of the system power supply 300 is gradually increased in magnitude. At time t1, the voltage Vdd of the system power supply 300 rises to the bandgap reference voltage VBG. At time t2, the voltage Vdd of the system power supply 300 rises to the target reference voltage Vref.
Since the target reference voltage Vref is greater than the bandgap reference voltage VBG, the time t2 is after the time t 1. Before time t1, neither the bandgap reference voltage VBG nor the target reference voltage Vref is established steadily. At time t1 to time t2, the bandgap reference voltage VBG is stably established, while the target reference voltage Vref is not stably established. After time t2, both the bandgap reference voltage VBG and the target reference voltage Vref are established steadily.
The first switching tube 110 is a switching tube M3 in fig. 1. The gate voltage of the first switch tube 110 is VG1, the source voltage of the first switch tube 110 is VS1, the threshold voltage of the first switch tube 110 is VTH1, and the on condition of the first switch tube 110 is VG1-VS1> VTH1. The resistance value of the first resistor 120 is R3, the current generated by the first constant current source 130 is I3, and the condition that the first switching tube 110 is turned on is VG 1-vs1=vdd-i3×r3-VBG > VTH1, that is, vdd > VTH1+i3×r3+vbg.
The sum of the bandgap reference voltage provided by the bandgap reference voltage source 210, the threshold voltage of the first switching tube 110, and the voltage generated by the first current generated by the first constant current source 130 at the first resistor 120 is greater than the target reference voltage, i.e., VTH1+i3×r3+vbg > Vref. The condition that the first switch 110 is turned on is Vdd > VTH1+i3×r3+vbg, and therefore, when the first switch 110 is turned on, vdd > VTH1+i3×r3+vbg > Vref. With the first switching tube 110 turned on, vdd > Vref can be considered, at which time the bandgap reference voltage VBG and the target reference voltage Vref are both established steadily.
The signal output 140 is connected to the drain of the first switching tube 110. Before time t2, vdd is less than Vref, vdd < VTH1+i3×r3+vbg, the first switching transistor 110 is turned off, the drain of the first switching transistor 110 is grounded through the first constant current source 130, and the drain of the first switching transistor 110 outputs a low level. After time t2, and Vdd > VTH1+i3×r3+vbg, the first switching transistor 110 is turned on, vdd is connected to the signal output terminal 140 through the first switching transistor 110, and the signal output terminal 140 outputs a high level as a flag signal, which indicates that Vdd > VTH1+i3×r3+vbg > Vref at this time, and the target reference voltage Vref is stably established.
And the bandgap reference voltage VBG is smaller than the target reference voltage Vref, vdd > VBG in case Vdd > Vref. The bandgap reference voltage VBG is thus also established stable in the case of the signal output 140 outputting a flag signal.
To sum up, in the case where the signal output terminal 140 outputs the flag signal, vdd > Vref and Vdd > VBG, the target reference voltage Vref is stably established and the bandgap reference voltage VBG is stably established.
The detection circuit 100 can accurately output a reference voltage detection signal, improves detection accuracy, is suitable for a wide range of power supply voltages and a scene of different power supply voltage power-on speeds, and can be effectively applied to various power management chips 1000. The system power supply 300 of the bandgap reference voltage source 210 may be the power supply of the power management chip 1000. At the time of power-up of the power supply of the power management chip 1000, the target reference voltage starts to be established, and the detection circuit 100 is used to detect whether the target reference voltage is established to be stable.
The detection circuit 100 may also be applied to different electronic devices 10000, for detecting whether the target reference voltage is stable during the power-up process of the electronic device 10000.
In certain embodiments, the first current is less than 100nA.
The system power supply 300 is grounded through the first resistor 120, the first switching tube 110 and the first constant current source 130, and the power consumption of the detection circuit 100 is mainly the loss generated by the first current flowing through the first resistor 120 and is proportional to the square of the first current. Therefore, the first current is set small, which is advantageous in reducing the power consumption of the detection circuit 100.
Specifically, the first current may be set to a current less than 100nA, so that the power consumed by the detection circuit 100 is small, and normal use of the reference voltage generation circuit and the subsequent-stage circuit is not affected.
Referring to fig. 4, in some embodiments, the detection circuit 100 further includes a first schmitt trigger 101, and the drain of the first switching tube 110 is connected to the signal output terminal 140 through the first schmitt trigger 101.
The first schmitt trigger 101 may be used for signal shaping, so that the first schmitt trigger 101 outputs a high level and a low level more regularly, and thus the sign signal output by the output terminal is less noisy.
Specifically, the first schmitt trigger 101 may be a forward or reverse schmitt trigger, and in the case where the first schmitt trigger 101 is reverse, the number of the first schmitt triggers 101 is a multiple of 2.
The first schmitt trigger 101 may be INV2 and INV4 in fig. 4. The threshold voltage of the schmitt trigger INV2 is VTH2, and the threshold voltage of the schmitt trigger INV4 is VTH3.INV2 and INV4 are both reverse schmitt triggers, and when the voltage at the input end is smaller than the threshold voltage, the reverse schmitt triggers output a high level. In the case where the voltage of the input terminal is greater than the threshold voltage, the reverse schmitt trigger outputs a low level.
When the first switching tube 110 is turned off, vdd is smaller than Vref, the voltage output from the signal output terminal 140 is smaller than VTH2, and INV2 outputs a high level. The voltage outputted by INV2 is greater than VTH3, and INV4 outputs a low level. When INV4 outputs a low level, the voltage level output by INV4 is the same, so the signal noise output by INV4 is smaller.
When the first switching tube 110 is turned on, vdd is greater than Vref, the voltage output from the signal output terminal 140 is greater than VTH2, and INV2 outputs a low level. The voltage outputted by INV2 is smaller than VTH3, and INV4 outputs a high level. When INV4 outputs a high level, the magnitude of the voltage output by INV4 is the same, so the signal noise output by INV4 is smaller.
Referring to fig. 5, 6 and 7, in some embodiments, a target reference voltage is generated by a reference voltage generating circuit 400, the reference voltage generating circuit 400 includes a resistor group 410, and the target reference voltage is applied to the resistor group 410 to generate a reference current. The detection circuit 100 further includes a current mirror circuit 160, a second constant current source 170, and an and gate 180. The current mirror circuit 160 includes a first output terminal 163, and the current mirror circuit 160 is configured to copy the reference current into a second current and output the second current through the first output terminal 163. The first output terminal 163 is grounded through the second constant current source 170, and the second constant current source 170 is used to generate a third current, and the first output terminal 163 outputs a high level in case that the second current is greater than the third current. The input terminal of the and gate 180 is connected to the drain of the first switching tube 110 and the first output terminal 163, respectively, and the output terminal of the and gate 180 is connected to the signal output terminal 140, and the output terminal of the and gate 180 outputs a high level when both the drain of the first switching tube 110 and the first output terminal 163 output a high level.
Fig. 6 and 7 are schematic circuit diagrams of the split circuit of fig. 5.
The reference voltage generation circuit 400 simultaneously generates a reference current at the time of generating the target reference voltage. During the rise of the target reference voltage, the reference current also rises, and the second current output from the first output terminal 163 of the current mirror circuit 160 also rises.
In case the supply voltage rises above the bandgap reference voltage, the reference current is steadily established and the second current is steadily established. In the case of the second current steady establishment, the second current is greater than the third current, and the first output terminal 163 outputs a high level to indicate the reference current steady establishment.
In the case of the target reference voltage stable establishment, the power supply voltage is greater than the target reference voltage, while the reference current stable establishment, and the output terminal of the and gate 180 outputs a high level to indicate the target reference voltage stable establishment.
In case that the power supply voltage rapidly rises, both the first output terminal 163 and the drain of the first switching tube 110 rapidly output a high level, indicating that the target reference voltage has been stably established. In the case that the power supply voltage slowly rises, the first output terminal 163 outputs a high level when the power supply voltage is higher than the bandgap reference voltage, and at this time, since the power supply voltage is lower than the target reference voltage, the drain of the first switching tube 110 outputs a low level, indicating that the target reference voltage is not stably established.
Specifically, the resistor group 410 includes a resistor R1 and a resistor R2 in fig. 5, and the resistor R1 and the resistor R2 are connected in series. The target reference voltage is Vref, the voltage across the resistor group 410 is Vref, the resistor of the resistor group 410 is r1+r2, and the current flowing through the resistor group 410 is the reference current iref=vref/(r1+r2). The first output 163 of the current mirror circuit 160 is the point c in fig. 5, the current output at the point c is the second current Iref2, and Iref2 is n×iref. The current generated by the second constant current source 170 is I1, and when Iref2 is greater than I3, the point c outputs a high level, and when Iref2 is less than I1, the point c outputs a low level.
The drain of the first switching tube 110 and the first output 163 are both connected to the input of an and gate 180 in fig. 5. When the drain of the first switching tube 110 and the first output terminal 163 both output a high level, the and gate 180 outputs a high level, i.e., when the d point and the ok_pre output a high level, the ref_ok outputs a high level.
During the rise of the target reference voltage Vref, the reference current Iref also rises, and the second current Iref2 also rises. In the case where the voltage Vdd of the system power supply 300 rises above the bandgap reference voltage VBG, the reference current Iref is steadily established, and the second current Iref2 is steadily established. In the case where the second current Iref2 is stably established, the second current Iref2 is greater than the third current I1, the first output terminal 163 outputs a high level to indicate that the reference current is stably established, and the point c outputs a high level to indicate that the reference current is stably established, and ok_pre outputs a high level.
In the case where the power supply voltage rises rapidly, the target reference voltage Vref is stably established soon in the case where the reference current Iref is stably established. Both the first output terminal 163 and the drain of the first switching tube 110 rapidly output a high level, an ok_pre point output high level and a d point output high level, and the ref_ok output high level indicates that the target reference voltage is stably established.
In the case where the power supply voltage slowly rises, the target reference voltage Vref is not stably established in the case where the reference current Iref is stably established. The ok_pre point outputs a high level and the d point outputs a low level, and the ref_ok output low level indicates that the target reference voltage is not stably established.
In some embodiments, the bandgap reference voltage is generated by the bandgap reference voltage generation circuit 200. The bandgap reference voltage generating circuit 200 includes a bandgap reference voltage source 210 and outputs a bandgap reference voltage through the bandgap reference voltage source 210, and the reference voltage generating circuit includes a target reference voltage source 420. Resistor group 410 includes a second resistor 411 and a third resistor 412, with bandgap reference voltage source 210 being grounded through second resistor 411. The target reference voltage source 420 is connected to the second resistor 411 through the third resistor 412, and the target reference voltage source 420 is used for outputting a target reference voltage.
The voltage of the bandgap reference voltage source 210 is divided by the resistor R2 to obtain the reference current Iref. The reference current Iref flows through the resistor R2 and the resistor R3 to obtain the target reference voltage Vref.
Specifically, in fig. 5, the resistor R1 is a third resistor 412, the resistor R2 is a second resistor 411, and the bandgap reference voltage source 210 generated by the bandgap reference voltage generating circuit 200 is grounded through the resistor R2. The reference current iref=vbg/R2, so that the reference current Iref is stabilized in case the magnitude of the bandgap reference voltage VBG is stabilized.
In some embodiments, the third resistor 412 is an adjustable resistor.
The third resistor 412 is an adjustable resistor, and different target reference voltages Vref can be obtained by changing the resistance value of the third resistor 412.
Specifically, the third resistor 412 is the resistor R1 in fig. 5, and a tap of the resistor R1 may be used to adjust the resistance value of the resistor R1. Reference current iref=vbg/R2, and target reference voltage vref=iref (r1+r2) =vbg (r1+r2)/R2. By changing the resistance value of R2, different target reference voltages Vref can be obtained.
In some embodiments, the reference voltage generating circuit 400 further includes an operational amplifier 430, wherein an input terminal of the operational amplifier 430 is connected to the bandgap reference voltage source 210 and is grounded through a second resistor 411, and an output terminal of the operational amplifier 430 is connected to the target reference voltage source 420.
Because of the short imaginary length of the op-amp 430, the voltages at the two inputs of the op-amp 430 are the same, and are the voltages of the bandgap reference voltage source 210, and the voltage of the bandgap reference voltage source 210 divided by the resistor R2 results in the reference current Iref.
Specifically, op-amp 430 is op-amp a in fig. 5. The virtual short of the op-amp 430 means that in an ideal situation, the potentials of the two input ends of the op-amp 430 are equal, and the non-inverting input end of the op-amp a is connected to the bandgap reference voltage source 210, so the voltage connected to the inverting input end of the op-amp a is the bandgap reference voltage VBG.
The inverting input terminal of the operational amplifier a is grounded through the second resistor 411, and the reference current iref=vbg/R2, so that the reference current Iref is stabilized when the magnitude of the bandgap reference voltage VBG is stabilized.
In some embodiments, the current mirror circuit 160 includes a second switching tube 161 and a third switching tube 162. The gate of the second switching tube 161 is connected to the output terminal of the operational amplifier 430, the source of the second switching tube 161 is connected to the system power supply 300, and the drain of the second switching tube 161 is connected to the target reference voltage source 420. The gate of the third switching tube 162 is connected to the gate of the second switching tube 161. The source of the third switching tube 162 is connected to the source of the second switching tube 161, and the drain of the third switching tube 162 is connected to the first output terminal 163.
The second switching tube 161 and the third switching tube 162 form a current mirror structure, and the current flowing through the third switching tube 162 may replicate the reference current flowing through the second switching tube.
Specifically, the second switching tube 161 may be M1 of fig. 5, and the third switching tube 162 may be M2 of fig. 5. The gate of the second switching tube 161 is connected to the gate of the third switching tube 162, the gate voltage of the second switching tube 161 is the same as the gate voltage of the third switching tube 162, the source of the second switching tube 161 is connected to the source of the third switching tube 162, the source voltage of the second switching tube 161 is the same as the source voltage of the third switching tube 162, and the second switching tube 161 and the third switching tube 162 form a current mirror structure. The current Iref2 flowing through the third switching tube 162 is N times the magnitude of Iref.
In some embodiments, the second current is 2-10 times the reference current.
The size of Iref2 is N times that of Iref, N being related to the ratio of the width to length ratio of the third switching tube 162 and the second switching tube 161 in the current mirror structure. The size of Iref2 may be N times that of Iref, and the value of N may be set to 2-10 times. In the case where the reference current Iref is established to be stable, ensuring that Iref2 is greater than I3, the first output 163 outputs a flag signal to indicate that the reference current is stably established.
Specifically, the gate voltages of the second switching tube 161 and the third switching tube 162 are VG2, and the source voltages of the second switching tube 161 and the third switching tube 162 are VS2. For the second switching tube 161, the current flowing through the second switching tube 161 is the reference current Iref, iref=1/2×cox1×u1 (VG 2-VS2-Vth 1)/(2). Cox1 is the oxide capacitance of the second switching tube 161, and u2 is the aspect ratio of the second switching tube 161. For the third switching tube 162, the current flowing through the third switching tube 162 is the second current Iref2, iref2=1/2×cox2u2 (VG 2-VS2-Vth 2)/(2). Cox2 is the oxide capacitance of the third switching tube 162, and u2 is the aspect ratio of the third switching tube 162.
In the case where the second switching transistor 161 and the third switching transistor 162 are PMOS transistors, vth1 and Vth2 are the same. Iref2 may change the ratio of u1 to u2, and thus the ratio of Iref2 to Iref, by changing the parameters of the second and third switching transistors 161 and 162. The modified Iref2 ensures that I2 is greater than I3 in the case of stable reference current Iref establishment, and the first output 163 outputs a flag signal to indicate stable reference current establishment.
In some embodiments, the detection circuit 100 further includes a capacitor 190, and the first output 163 is grounded through the capacitor 190.
In the case where the reference current has not established stability, the third current I3 of the second constant current source 170 discharges the capacitor C1, pulling the level of the first output terminal 163 low. In the case where the reference current is established to be stable, the second current I2 output from the current mirror circuit 160 charges the capacitor C1, and pulls the level of the first output terminal 163 high.
Specifically, the capacitor 190 may be the capacitor C1 in fig. 5. In the case where Iref2 is smaller than I3, I3 discharges the capacitor C1, and the level of C is pulled low. In the case where the reference current is established to be stable, iref2 is greater than I3, iref2 charges the capacitor C1, and the level of C point is pulled high.
In some embodiments, the third current generated by the second constant current source 170 is less than 100nA.
The first output terminal 163 is grounded through the second constant current source 170, and the power consumption of the second constant current source 170 is mainly the loss generated by the third current, and is proportional to the square of the third current. Therefore, the third current is set small, which is advantageous in reducing the power consumption of the second constant current source 170.
Specifically, the third current may be set to a current less than 100nA, so that the power consumed by the detection circuit 100 is small, and normal use of the reference voltage generating circuit 400 and the subsequent-stage circuit is not affected.
In some embodiments, the detection circuit 100 further includes a second schmitt trigger 102, and the first output 163 is connected to an input of the and gate 180 through the second schmitt trigger 102.
The second schmitt trigger 102 may be used for signal shaping such that the output of the second schmitt trigger 102 is more regular with high and low levels and thus less signal noise is coupled to the input of the and gate 180. The second schmitt trigger 102 may be a forward or reverse schmitt trigger, and in the case where the second schmitt trigger 102 is a reverse schmitt trigger, the number of the second schmitt triggers 102 is a multiple of 2.
Specifically, the second schmitt trigger 102 may be INV1 and INV3 in fig. 5. INV1 and INV3 are both reverse schmitt triggers, and when the voltage at the input end is smaller than the threshold voltage, the reverse schmitt triggers output a high level. In the case where the voltage of the input terminal is greater than the threshold voltage, the reverse schmitt trigger outputs a low level.
The level output at the point c is shaped by INV1 and INV3 and then output to the point ok_pre, and the level output at the drain of the first switching tube 110 is shaped by INV2 and INV4 and then output to the point d. The input end of the and gate 180 is connected to the signal shaped by the schmitt trigger, so that the signal noise of the output signal output by the and gate 180 at ref_ok is smaller.
In the description of the present specification, reference is made to the terms "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., meaning that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.
Furthermore, the term "coupled" is to be broadly interpreted and includes, for example, either permanently coupled, detachably coupled, or integrally coupled; can include direct connection, indirect connection through intermediate media, and communication between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process, and further implementations are included within the scope of the preferred embodiment of the present invention in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order from that shown or discussed, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the embodiments of the present invention.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.

Claims (13)

1. A detection circuit for detecting whether a target reference voltage is stably established, the detection circuit comprising:
the grid electrode of the first switching tube is connected with a band gap reference voltage source;
the source electrode of the first switch tube is connected with the system power supply of the band gap reference voltage source through the first resistor;
the drain electrode of the first switch tube is grounded through the first constant current source;
the signal output end is connected with the drain electrode of the first switching tube;
the sum of the bandgap reference voltage provided by the bandgap reference voltage source, the threshold voltage of the first switching tube and the voltage generated by the first current generated by the first constant current source on the first resistor is larger than the target reference voltage, so that the first switching tube is conducted when the power supply voltage of the system power supply rises to be larger than the target reference voltage, and the signal output end outputs a marking signal;
the target reference voltage is generated by a reference voltage generating circuit including a resistor group to which the target reference voltage is applied to generate a reference current, the detecting circuit further includes:
the current mirror circuit comprises a first output end, and is used for copying the reference current into a second current and outputting the second current through the first output end;
the first output end of the first constant current source is grounded through the first constant current source, the first constant current source is used for generating a first current, and the first output end outputs a high level under the condition that the first current is larger than the first current;
and the input end of the AND gate is respectively connected with the drain electrode of the first switch tube and the first output end, the output end of the AND gate is connected with the signal output end, and the output end of the AND gate outputs high level under the condition that the drain electrode of the first switch tube and the first output end output high level.
2. The detection circuit of claim 1, wherein the first current is less than 100nA.
3. The detection circuit of claim 1, further comprising a first schmitt trigger, wherein a drain of the first switching tube is connected to the signal output terminal through the first schmitt trigger.
4. The detection circuit according to claim 1, wherein the bandgap reference voltage is generated by a bandgap reference voltage generating circuit including the bandgap reference voltage source and outputting the bandgap reference voltage through the bandgap reference voltage source, the reference voltage generating circuit including a target reference voltage source, the resistor group including a second resistor and a third resistor, the bandgap reference voltage source being grounded through the second resistor, the target reference voltage source being connected to the second resistor through the third resistor, the target reference voltage source being configured to output the target reference voltage.
5. The detection circuit of claim 4, wherein the third resistor is an adjustable resistor.
6. The detection circuit of claim 4, wherein the reference voltage generation circuit further comprises an op-amp, an input of the op-amp is connected to the bandgap reference voltage source and to ground through the second resistor, respectively, and an output of the op-amp is connected to the target reference voltage source.
7. The detection circuit of claim 6, wherein the current mirror circuit comprises a second switching tube and a third switching tube, wherein a gate of the second switching tube is connected with the output end of the op-amp, a source of the second switching tube is connected with the system power supply, a drain of the second switching tube is connected with the target reference voltage source, a gate of the third switching tube is connected with the gate of the second switching tube, a source of the third switching tube is connected with the source of the second switching tube, and a drain of the third switching tube is connected with the first output end.
8. The detection circuit of claim 1, wherein the second current is 2-10 times the reference current.
9. The detection circuit of claim 1, further comprising a capacitor, wherein the first output is coupled to ground through the capacitor.
10. The detection circuit according to claim 1, wherein the third current generated by the second constant current source is less than 100nA.
11. The detection circuit of claim 1, further comprising a second schmitt trigger, wherein the first output is coupled to the input of the and gate via the second schmitt trigger.
12. A power management chip, characterized in that it comprises the detection circuit according to any one of claims 1-11.
13. An electronic device comprising the power management chip of claim 12.
CN202311248063.4A 2023-09-26 2023-09-26 Detection circuit, power management chip and electronic equipment Active CN117007892B (en)

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