CN116758848A - Display panel and display device - Google Patents

Display panel and display device Download PDF

Info

Publication number
CN116758848A
CN116758848A CN202310340371.3A CN202310340371A CN116758848A CN 116758848 A CN116758848 A CN 116758848A CN 202310340371 A CN202310340371 A CN 202310340371A CN 116758848 A CN116758848 A CN 116758848A
Authority
CN
China
Prior art keywords
signal line
pixel driving
display panel
driving circuit
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310340371.3A
Other languages
Chinese (zh)
Inventor
刘少伟
赵虹
马志丽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yungu Guan Technology Co Ltd
Original Assignee
Yungu Guan Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yungu Guan Technology Co Ltd filed Critical Yungu Guan Technology Co Ltd
Priority to CN202310340371.3A priority Critical patent/CN116758848A/en
Publication of CN116758848A publication Critical patent/CN116758848A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2074—Display of intermediate tones using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The embodiment of the invention discloses a display panel and a display device. The display panel comprises a substrate, a pixel driving circuit, a plurality of data lines, a plurality of patch cords and a shielding structure; the pixel driving circuit is arranged on one side of the substrate, the pixel driving circuit comprises a first structure, and the pixel driving circuit comprises a first type of pixel driving circuit; the data lines are electrically connected with the pixel driving circuit; the plurality of patch cords are correspondingly and electrically connected with at least part of the data lines; the shielding structure is located between the patch cord and a first structure in the first type of pixel drive circuit. The technical scheme provided by the embodiment can improve the display effect of the display panel.

Description

Display panel and display device
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display panel and a display device.
Background
With the development of display technology, the requirements of people on the display panel are increasing. The duty ratio of the display area of the display panel is continuously improved, in order to reduce the lower frame of the display panel, the existing display panel adopts to set part of fan-out wiring which is connected with a driving chip and is positioned on the lower frame in the display area so as to reduce the width of the lower frame, but the display panel has the problem of poor display.
Disclosure of Invention
The embodiment of the invention provides a display panel and a display device, which can improve the display effect of the display panel.
In order to realize the technical problems, the invention adopts the following technical scheme:
an embodiment of the present invention provides a display panel including:
a substrate;
the pixel driving circuit is arranged on one side of the substrate and comprises a first structure, and the pixel driving circuit comprises a first type of pixel driving circuit;
a plurality of data lines electrically connected to the pixel driving circuits;
the plurality of patch cords are correspondingly and electrically connected with at least part of the data lines;
and the shielding structure is positioned between the patch cord and the first structure in the first type pixel driving circuit.
Optionally, the patch cord includes a first wire segment and a second wire segment connected to each other, where the first wire segment is electrically connected to the corresponding data line through the second wire segment; the extending direction of the second wire segment is intersected with the extending direction of the data wire; the first wire segment and the data line extend along a first direction;
the front projection of the second wire segment on the substrate overlaps with the front projection of the first type pixel driving circuit on the substrate, and the shielding structure is positioned between the second wire segment and the first structure in the first type pixel driving circuit;
Optionally, the second wire segment, the shielding structure and the first structure in the first-class pixel driving circuit are stacked along the thickness direction of the substrate;
optionally, at least part of the orthographic projection of the shielding structure on the substrate is located in an overlapping region of the orthographic projection of the second wire segment on the substrate and the orthographic projection of the first structure in the first type pixel driving circuit on the substrate;
optionally, the extending direction of the second wire segment is perpendicular to the extending direction of the data wire.
Optionally, the display panel further includes: and the light-emitting structure is connected with the first structure.
Optionally, the display panel includes an active layer, and the first structure includes a signal transmission portion, where the signal transmission portion is a part of the active layer; the shielding structure comprises a first shielding structure, and the first shielding structure is positioned between the second wire segment and the signal transmission part;
optionally, the signal transmission part is located at one side of the second wire section close to the substrate;
optionally, the extending direction of the signal transmission part intersects with the extending direction of the second wire segment;
and/or the first structure comprises a first electrode connected with the light emitting structure; the first electrode is positioned at one side of the light-emitting structure close to the substrate; the shielding structure comprises a second shielding structure, and the second shielding structure is positioned between the second wire segment and the first electrode;
Optionally, the signal transmission part and the first electrode are located at two opposite sides of the second wire section along the thickness direction of the substrate;
optionally, the first electrode is located on a side of the second wire segment remote from the substrate.
Optionally, the display panel further includes an initialization signal line, the pixel driving circuit further includes a data writing module, a driving module and a first initialization module, the data line is electrically connected with the driving module through the data writing module, the initialization signal line is electrically connected with the first structure through the first initialization module, and the first initialization module is used for initializing the first electrode connected with the light emitting structure;
optionally, in the same pixel driving circuit, the first initializing module initializes the first electrode connected to the light emitting structure, and simultaneously, the data voltage on the data line is transmitted to the driving module through the data writing module;
optionally, the initialization signal line and the first shielding structure are arranged on the same layer and are integrally connected.
Optionally, the display panel further includes a first scan signal line, and the data writing module and the first initializing module in the same pixel driving circuit are electrically connected to the first scan signal line.
Optionally, the display panel further includes a light emitting control signal line, the pixel driving circuit further includes a light emitting control module, the driving module and the light emitting structure are connected in series, two ends after being connected in series are respectively connected with the first potential signal line and the second potential signal line, a control end of the light emitting control module is connected with the light emitting control signal line, and orthographic projection of the second wire segment of the patch cord on the substrate is located between orthographic projection of the initialization signal line on the substrate and orthographic projection of the light emitting control signal line on the substrate;
Optionally, the second wire segment, the initialization signal line, and the light emission control signal line extend along a second direction;
optionally, the second potential signal line and the second shielding structure are arranged on the same layer and are of an integral connection structure;
alternatively, one of the first potential signal line and the second potential signal line is a high potential signal line, and the other is a low potential signal line.
Optionally, the shielding structure is electrically connected with the fixed potential signal line;
optionally, the fixed potential signal line includes one or more of a high potential signal line, a low potential signal line, and an initialization signal line, at least part of the fixed potential signal line is electrically connected to the pixel driving circuit;
and/or at least part of the fixed potential signal line is arranged in an insulating manner with the pixel driving circuit.
Optionally, the fixed potential signal line includes first potential signal line and third potential signal line, and display panel still includes the light emitting structure to and the second electrode that is connected with the light emitting structure, the second electrode is located the one side that the light emitting structure kept away from the base plate, and the one end of third potential signal line extends to the edge of display panel and is connected with first potential signal line electricity, and first potential signal line is connected with the second electrode electricity, and first potential signal line is used for providing first potential signal to the second electrode.
Optionally, the plurality of pixel driving circuits are arranged in an array, the display panel further comprises a virtual shielding structure, the pixel driving circuits further comprise a second type of pixel driving circuit, and the relative positions of the first structure in the second type of pixel driving circuit and the corresponding virtual shielding structure are the same as the relative positions of the first structure in the first type of pixel driving circuit and the corresponding shielding structure; the orthographic projection of the virtual shielding structure on the substrate is not overlapped with the orthographic projection of the patch cord on the substrate;
optionally, the virtual shielding structure and the shielding structure are the same size and shape.
According to another aspect of the present invention, there is provided a display device including the display panel set forth in any of the first aspects.
Optionally, the display device further includes a driving chip, and the driving chip is electrically connected to at least part of the data lines through the patch cord.
According to the display panel provided by the embodiment of the invention, the shielding structure is arranged between the first structure of the first-type pixel driving circuit and the patch cord, so that signal coupling between the patch cord transmitting data voltage and the first structure of the first-type pixel driving circuit is effectively shielded, the influence of potential on the first structure of the first-type pixel driving circuit on the data voltage transmitted on the patch cord is eliminated, the difference of the coupling degree of the transmission path of the data voltage of each position pixel driving circuit and the first structure is reduced, the difference of the data voltage writing degree of each position pixel driving circuit is reduced, the coupling degree of the data voltage transmission path of each position pixel driving circuit and the first structure tends to be consistent, the data voltage writing degree of each position pixel driving circuit tends to be consistent, the luminous brightness of each pixel of the pixel panel is consistent, the display is uniform, and the display effect of the display panel is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following description will briefly explain the drawings needed in the description of the embodiments of the present invention, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to the contents of the embodiments of the present invention and these drawings without inventive effort for those skilled in the art.
Fig. 1 is a schematic top view of a display panel according to an embodiment of the present invention;
FIG. 2 is a schematic diagram showing a partial cross-sectional structure along AA' in FIG. 1 of a display panel according to an embodiment of the present invention;
FIG. 3a is a schematic diagram of a layout of a display panel according to an embodiment of the present invention;
FIG. 3b is a schematic diagram of an active layer of the layout of the display panel shown in FIG. 3a according to an embodiment of the present invention;
FIG. 3c is a schematic diagram of a second conductive layer of the layout of the display panel shown in FIG. 3a according to an embodiment of the present invention;
FIG. 3d is a schematic diagram of a third conductive layer of the layout of the display panel shown in FIG. 3a according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a pixel driving circuit of a display panel according to an embodiment of the present invention;
Fig. 5 is a schematic diagram of a driving timing of a pixel driving circuit of a display panel according to an embodiment of the present invention;
FIG. 6a is a schematic diagram of a layout of another display panel according to an embodiment of the present invention;
FIG. 6b is a schematic diagram of an active layer of the layout of the display panel shown in FIG. 6a according to an embodiment of the present invention;
FIG. 6c is a schematic diagram of a second conductive layer of the layout of the display panel shown in FIG. 6a according to an embodiment of the present invention;
FIG. 6d is a schematic diagram of a third conductive layer of the layout of the display panel shown in FIG. 6a according to an embodiment of the present invention;
FIG. 6e is a partial cross-sectional view of the display panel of FIG. 6a according to an embodiment of the present invention;
FIG. 7a is a schematic diagram of a layout of a display panel according to an embodiment of the present invention;
FIG. 7b is a schematic diagram of an active layer of a layout of the display panel shown in FIG. 7a according to an embodiment of the present invention;
FIG. 7c is a schematic diagram of a second conductive layer of the layout of the display panel shown in FIG. 7a according to an embodiment of the present invention;
FIG. 7d is a schematic diagram of a third conductive layer of the layout of the display panel shown in FIG. 7a according to an embodiment of the present invention;
FIG. 7e is a schematic diagram of a fourth conductive layer of the layout of the display panel shown in FIG. 7a according to an embodiment of the present invention;
FIG. 7f is a partial cross-sectional view of the display panel of FIG. 7a according to an embodiment of the present invention;
FIG. 7g is a partial cross-sectional view of the display panel of FIG. 7a according to another embodiment of the present invention;
FIG. 8a is a schematic diagram of a layout of a display panel according to an embodiment of the present invention;
FIG. 8b is a schematic diagram of an active layer of a layout of the display panel shown in FIG. 8a according to an embodiment of the present invention;
FIG. 8c is a schematic diagram of a second conductive layer of the layout of the display panel shown in FIG. 8a according to an embodiment of the present invention;
FIG. 8d is a schematic diagram of a third conductive layer of the layout of the display panel shown in FIG. 8a according to an embodiment of the present invention;
FIG. 9 is a schematic top view of another display panel according to an embodiment of the present invention;
FIG. 10 is a schematic top view of another display panel according to an embodiment of the present invention;
FIG. 11 is a schematic view of a partial cross-sectional structure of a display panel according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
As mentioned in the background art, since users pursue high-resolution, narrow-bezel display panels. With the increasing resolution of the display panel, the number of pixel units in the display area increases, resulting in an increasing number of signal lines, and the area required for the wiring area of the connection lines also increases gradually. The technology of arranging part of fan-out wires in a display area (fanout in AA, FIAA) is adopted, so that all fan-out wires are prevented from being sequentially arranged on a lower frame, and the frame of the display panel is reduced. However, the inventor has found that, through research, there is a coupling capacitance between the data voltage transmitted on the fan-out wiring in the display area and the pixel driving circuit of the display panel, resulting in a problem of uneven display of the display panel. The embodiment provides a method for reducing the coupling effect of signals in a pixel driving circuit on data voltages by reducing the coupling capacitance between the data voltages transmitted on fan-out wires of a display area and the pixel driving circuit of a display panel, so as to reduce the difference between the coupling degree of the transmission paths of the data voltages of the pixel driving circuits at all positions and a first structure, reduce the difference between the writing degree of the data voltages of the pixel driving circuits at all positions, improve the display uniformity, reduce the brightness difference and improve the stability of the data voltages.
Based on the above technical problems, the present embodiment proposes the following solutions:
fig. 1 is a schematic top view of a display panel according to an embodiment of the invention. Fig. 2 is a schematic diagram illustrating a partial cross-sectional structure along AA' in fig. 1 of a display panel according to an embodiment of the invention. Referring to fig. 1, a display panel 100 according to an embodiment of the present invention includes a substrate 1, a pixel driving circuit 2, a plurality of data lines 4, a plurality of patch cords 5, and a shielding structure 6.
The pixel driving circuit 2 is arranged on one side of the substrate 1, the pixel driving circuit 2 comprises a first structure 3, and the pixel driving circuit 2 comprises a first type pixel driving circuit 21; a plurality of data lines 4 electrically connected to the pixel driving circuit 2; the plurality of patch cords 5 are correspondingly and electrically connected with at least part of the data lines 4; the shielding structure 6 is located between the patch cord 5 and the first structure 3 in the first type of pixel drive circuit 21.
Specifically, the pixel driving circuit 2 is configured to drive the light emitting structure of the display panel 100 to emit light, so that the display panel 100 displays a picture. The first structure 3 may include a conductive line structure connected to a driving module of the pixel driving circuit 2, a conductive line structure connected to a light emitting structure, or an electrode structure connected to a light emitting structure, and the like, and the first structure 3 may be a part of an active layer or a part of a conductive layer, and the like, without being limited thereto.
The first type of pixel driving circuit 21 may be a pixel driving circuit 2 adjacent to the patch cord 5, e.g. the front projection of the first type of pixel driving circuit 21 on the substrate 1 may be adjacent to or at least partially overlapping the front projection of the patch cord 5 on the substrate 1.
The plurality of data lines 4 may extend in the first direction Y and be arranged in the second direction X. The data line 4 is used to transmit a data voltage to the pixel driving circuit 2. The patch cord 5 and the data cord 4 are used for transmitting data voltages. The patch cord 5 may transmit the data voltage output from the driving chip to the data line 4 connected to the patch cord 5. The display panel may include a display area AA. The pixel driving circuits 2 may be arranged in an array and located in the display area AA, and fig. 1 illustrates only a part of the pixel driving circuits 2 by way of example. The patch cord 5 may be located in the display area AA. The first end of the patch cord 5 is connected with the corresponding data line 4; along the extending direction perpendicular to the data line 4, the second end of the patch cord 5 is close to the data line 4 located in the middle position of the display area AA relative to the first end, so that the space occupied by the fan-out wiring of the non-display area along the first direction Y is reduced, and the narrow frame is facilitated to be realized.
Before the patch cord 5 is not introduced, the data lines 4 at each position are coupled to the first structures 3 of the corresponding pixel driving circuits 2 to the same extent. When the patch cord 5 is introduced, the shielding structure 6 is not provided, the coupling degree between the first structure 3 of the pixel driving circuit 2 near the patch cord 5 and the patch cord 5 is relatively large, the coupling degree between the first structure of the pixel driving circuit 2 far from the patch cord 5 and the patch cord 5 is small, even if there is no coupling, when the data voltage is written one line by one line, for example, when the data voltage is written to one line of the pixel driving circuit 2 overlapped with the second wire segment 52 of the patch cord 5, the second wire segment 52 of the data voltage of the pixel driving circuit 2 is coupled with the first structure 3 of the pixel driving circuit 2, when the data voltage transmission path of the data voltage of the pixel driving circuit 2 does not include the patch cord 5, the coupling degree between the data voltage transmission path of the pixel driving circuit 2 and the first structure 3 of the pixel driving circuit 2 is different, for example, when the data voltage is written to one line of the pixel driving circuit 2 of the pixel driving circuit of each position, and the data voltage transmission degree between the data driving circuit of each position and the data driving circuit of each position is not consistent. The shielding structure 6 may be a conductive structure, and may implement a signal shielding function. The shielding structure 6 is arranged between the patch cord 5 and the first structure 3 in the first type pixel driving circuit 21, so that signal coupling between the patch cord 5 and the first structure 3 can be effectively shielded, interference of electric signals transmitted on the first structure 3 on data voltages transmitted on the patch cord 5 is reduced, difference of coupling degrees of data voltage transmission paths of the pixel driving circuits at all positions and the first structure is reduced, difference of data voltage writing degrees of the pixel driving circuits at all positions is reduced, the coupling degrees of the data voltage transmission paths of the pixel driving circuits 2 at all positions and the first structure 3 tend to be consistent, the data voltage writing degrees of the pixel driving circuits 2 at all positions tend to be consistent, the problem of oblique bright lines is solved, the problem of uneven display of the display panel 100 is well solved, and accordingly the display effect of the display panel 100 is improved. The arrangement is such that the data voltage transmitted on the patch cord 5 is relatively stable, so that the potential of the control end (for example, the gate) of the driving module of the pixel driving circuit 2 connected with the patch cord 5 is relatively stable, and the light emitting structure is driven to emit light stably.
The display panel 100 provided in this embodiment effectively shields signal coupling between the patch cord 5 transmitting data voltages and the first structure 3 of the first type pixel driving circuit 21 by disposing the shielding structure 6 between the first structure 3 of the first type pixel driving circuit 21 and the patch cord 5, thereby reducing the influence of the electrical signal on the first structure 3 of the first type pixel driving circuit 21 on the data voltages transmitted on the patch cord 5, reducing the difference between the coupling degree of the data voltages of the pixel driving circuits at each position and the coupling degree of the first structure, reducing the difference between the data voltage writing degree of the pixel driving circuits at each position, enabling the coupling degree of the data voltages of the pixel driving circuits 2 at each position and the coupling degree of the first structure 3 to be consistent, enabling the data voltage writing degree of the pixel driving circuits 2 at each position to be consistent, enabling the uniformity of light emission of each light emitting structure of the display panel 100 to be better, and improving the display effect of the display panel 100.
Optionally, the orthographic projection of the shielding structure 6 on the substrate is located between the orthographic projection of the second wire segment 52 on the substrate and the orthographic projection of the first structure 3 in the first type pixel driving circuit 21 on the substrate 1, so as to effectively shield the coupling between the second wire segment 52 and the first structure 3 in the first type pixel driving circuit 21, and reduce the influence of the signal on the first structure 3 in the first type pixel driving circuit 21 on the data voltage on the second wire segment 52.
Optionally, fig. 3a is a schematic structural diagram of a layout of a display panel according to an embodiment of the present invention. Fig. 3b is a schematic structural diagram of an active layer of the layout of the display panel shown in fig. 3a according to an embodiment of the present invention. Fig. 3c is a schematic structural diagram of a second conductive layer of the layout of the display panel shown in fig. 3a according to an embodiment of the present invention. Fig. 3d is a schematic structural diagram of a third conductive layer of the layout of the display panel shown in fig. 3a according to an embodiment of the present invention. Fig. 3b illustrates the first structure 3 of the first type of pixel driving circuit 21 in an active layer, fig. 3c illustrates the shielding structure 6 in a second conductive layer, and fig. 3d illustrates the second conductive segment 52 in a third conductive layer. The partial dashed boxes in fig. 3b, 3c and 3d may represent corresponding positions of corresponding structures, and are not representative of the structures being located in the film layer.
On the basis of the above embodiments, in combination with fig. 3a to 3d, the patch cord 5 may optionally include: the first wire segment 51 and the second wire segment 52 are connected, and the first wire segment 51 is electrically connected with the corresponding data line 4 through the second wire segment 52; the extending direction of the second wire segment 52 intersects with the extending direction of the data line 4. Optionally, the first wire segment 51 and the data line 4 extend along the first direction Y. I.e. the extending direction of the first wire segment 51 and the data line 4 may be the same. Alternatively, the first wire segment 51 may be a straight line, or may be a broken line or other shapes.
Alternatively, the first direction Y may be a column direction and the second direction X may be a row direction. The extending direction of the second wire segment 52 intersects with the extending direction of the data wire 4, so that the data wire 4 is transferred to the middle position of the display area AA through the second wire segment 52 and the first wire segment 51, and therefore, the data wire 4 partially located in the border area is better transferred to the middle position of the display area AA, the width of the fan-out area of the non-display area NA is reduced, and the border size of the display panel 100 is reduced.
The orthographic projection of the second wire segment 52 on the substrate 1 overlaps the orthographic projection of the first type pixel driving circuit 21 on the substrate 1, the second wire segment 52 passes through the first type pixel driving circuit 21, and the shielding structure 6 is located between the second wire segment 52 and the first structure 3 in the first type pixel driving circuit 21, so that the shielding structure 6 can shield signals between the second wire segment 52 passing through the first type pixel driving circuit 21 and the first structure 3 of the first type pixel driving circuit 21, the influence of the electric signal of the first structure 3 of the first type pixel driving circuit 21 on the second wire segment 52 for transmitting data voltage is reduced, and the phenomenon of uneven display is improved.
Optionally, with continued reference to fig. 3a, the second wire segment 52 extends in a direction perpendicular to the direction of extension of the data line 4. The extending direction of the second conducting wire segment 52 is perpendicular to the extending direction of the first conducting wire segment 51, and the patch cord 5 is a right-angle folding line. The arrangement is such that the length of the second wire segment 52 between the data line 4 and the first wire segment 51 is short. Since the second wire segment 52 passes through the first type pixel driving circuit 21, the area of the second wire segment 52 with the data voltage transmitted therein overlapping the first structure 3 of the first type pixel driving circuit 21 in the display panel 100 can be reduced, so that the coupling effect of the data voltage between the electrical signal transmitted on the first structure 3 of the first type pixel driving circuit 21 and the second wire segment 52 can be further reduced, and the display effect of the display panel 100 can be further improved.
Alternatively, with continued reference to fig. 2 and 3a, the second wire segments 52, the shielding structure 6 and the first structures 3 in the first-type pixel driving circuits 21 are arranged in a stacked manner along the thickness direction Z of the substrate 1. An insulating layer is provided between the second wire segment 52, the shielding structure 6 and adjacent two of the first structures 3 in the first-type pixel driving circuit 21. Along the thickness direction Z of the substrate 1, the shielding structure 6 is disposed between the second wire segment 52 and the first structure 3 of the first type pixel driving circuit 21, where the shielding structure 6 can effectively shield signal coupling between the second wire segment 52 and the first structure 3 in the first type pixel driving circuit 21, so as to improve shielding effect of the shielding structure 6 on the electrical signal transmitted on the first structure 3 in the first type pixel driving circuit 21 and the data voltage transmitted on the second wire segment 52, and improve uneven display phenomenon.
Optionally, fig. 4 is a schematic structural diagram of a pixel driving circuit of a display panel according to an embodiment of the present invention. Fig. 5 is a schematic diagram of a driving timing of a pixel driving circuit of a display panel according to an embodiment of the invention. On the basis of the above embodiment, referring to fig. 4 and 5, the display panel 100 provided in this embodiment further includes: the light emitting structure 7 is connected to the first structure 3.
Specifically, the light emitting structure 7 may include a light emitting material layer, and the light emitting structure 7 is configured to emit light under the driving current of the pixel driving circuit 2. The light emitting structure 7 is connected to the first structure 3 such that an electrical signal transmitted over the first structure 3 will act on the light emitting structure 7 to drive the light emitting structure 7 to emit light and/or to initialize the light emitting structure. The first structure 3 may include, for example, an electrode structure connected to the light emitting structure 7 or a signal transmission line connected to the light emitting structure 7, or the like.
Optionally, fig. 6a is a schematic structural diagram of a layout of another display panel according to an embodiment of the present invention. Fig. 6b is a schematic structural diagram of an active layer of the layout of the display panel shown in fig. 6a according to an embodiment of the present invention. Fig. 6c is a schematic structural diagram of a second conductive layer of the layout of the display panel shown in fig. 6a according to an embodiment of the present invention. Fig. 6d is a schematic structural diagram of a third conductive layer of the layout of the display panel shown in fig. 6a according to an embodiment of the present invention. Fig. 6e is a partial cross-sectional view of the display panel shown in fig. 6a according to an embodiment of the present invention. Fig. 6b illustrates the first structure 3 of the first type of pixel driving circuit 21 in an active layer, fig. 6c illustrates the shielding structure 6 in a second conductive layer, and fig. 6d illustrates the second conductive segment 52 in a third conductive layer. The partial dashed boxes in fig. 6b, 6c and 6d may represent corresponding positions of corresponding structures, and are not representative of the structures being located in the film layer.
On the basis of the above embodiment, referring to fig. 6a to 6e, the display panel 100 provided in this embodiment includes an active layer, and the first structure 3 includes a signal transmission portion 31, where the signal transmission portion 31 is a part (for example, may be a first part) of the active layer. With continued reference to fig. 6e, the shielding structure 6 includes a first shielding structure 61, the first shielding structure 61 being located between the second wire segment 52 and the signal transmission portion 31. The signal transmission section 31 may be used to transmit a signal. The second portion of the active layer may serve as a channel region, a source region, and a drain region in a transistor in the pixel driving circuit 2. The signal transmission part 31 is connected to the light emitting structure 7 for transmitting the electric signal transmitted by the signal transmission part 31 to the light emitting structure 7 to initialize the light emitting structure 7. The first shielding structure 61 is disposed between the second wire segment 52 and the signal transmission part 31, so that the first shielding structure 61 can shield the coupling between the data voltage transmitted on the second wire segment 52 and the electric signal transmitted on the signal transmission part 31, reduce the influence of the electric signal transmitted on the signal transmission part 31 on the data voltage transmitted on the second wire segment 52, improve the light-emitting brightness of the light-emitting structure 7 caused by the change of the data voltage, form the phenomenon of oblique bright lines, and improve the display uniformity effect of the display panel 100.
Fig. 7a is a schematic structural diagram of a layout of a display panel according to another embodiment of the present invention. Fig. 7b is a schematic structural diagram of an active layer of the layout of the display panel shown in fig. 7a according to an embodiment of the present invention. Fig. 7c is a schematic structural diagram of a second conductive layer of the layout of the display panel shown in fig. 7a according to an embodiment of the present invention. Fig. 7d is a schematic structural diagram of a third conductive layer of the layout of the display panel shown in fig. 7a according to an embodiment of the present invention. Fig. 7e is a schematic structural diagram of a fourth conductive layer of the layout of the display panel shown in fig. 7a according to an embodiment of the present invention. Fig. 7f is a partial cross-sectional view of the display panel shown in fig. 7a according to an embodiment of the present invention. Fig. 7g is a partial cross-sectional view of another display panel shown in fig. 7a according to an embodiment of the present invention. Fig. 7b illustrates the first shielding structure 61 in the active layer, fig. 7c illustrates the first shielding structure 6 in the second conductive layer, and fig. 7d illustrates the second conductive line segment 52 in the third conductive layer. The partial dashed boxes in fig. 7b, 7c and 7d may represent corresponding positions of corresponding structures, and are not representative of the structures being located in the film layer.
Alternatively, with continued reference to fig. 6a to 6e, the signal transmission portion 31 is located on the side of the second wire segment 52 close to the substrate 1. Alternatively, the signal transmission portion 31 is located on a side (not shown in the drawings) of the second wire segment 52 away from the substrate 1, and may be set as needed, which is not limited herein.
Alternatively, on the basis of the above-described embodiment, with continued reference to fig. 6a to 6d, the extending direction of the signal transmission portion 31 intersects with the extending direction of the second wire segment 52. By the arrangement, the overlapping area of the signal transmission part 31 and the second wire segment 52 is smaller, the coupling between the voltage signal transmitted on the signal transmission part 31 and the data voltage transmitted on the second wire segment 52 is reduced as much as possible, the interference of the voltage signal transmitted on the signal transmission part 31 to the data voltage transmitted on the second wire segment 52 is smaller, and the display uniformity effect of the display panel 100 is further improved. Alternatively, the extending direction of the signal transmission portion 31 is perpendicular to the extending direction of the second wire segment 52.
On the basis of the above-described embodiments, in combination with fig. 7a, 7d to 7f, the first structure 3 comprises a first electrode 32 connected to the light emitting structure 7; the first electrode 32 is positioned on one side of the light-emitting structure 7 close to the substrate 1; the shielding structure 6 comprises a second shielding structure 62, the second shielding structure 62 being located between the second wire segment 52 and the first electrode 32. Fig. 7d illustrates the second conductive line segment 52 being located on the third conductive layer, fig. 7e illustrates the second shielding structure 62 being located on the fourth conductive layer, and the first electrode 32 being located on a side of the fourth conductive layer remote from the plate. The partial dashed boxes in fig. 7b and 7e may indicate the location of the corresponding structure, and are not meant to represent that the structure is located in the film layer. The second shielding structure 62 is disposed between the second wire segment 52 and the first electrode 32, so that the second shielding structure 62 can shield the coupling between the data voltage transmitted on the second wire segment 52 and the electric signal transmitted on the first electrode 32, reduce the influence of the electric signal transmitted on the first electrode 32 on the data voltage transmitted on the second wire segment 52, improve the light-emitting brightness of the light-emitting structure 7 caused by the change of the data voltage, form a phenomenon of oblique bright lines, and improve the display uniformity effect of the display panel 100.
Optionally, a second electrode 8 is further disposed on a side of the light emitting structure 7 away from the substrate 1. One of the first electrode 32 and the second electrode 8 is an anode, and the other is a cathode. Alternatively, the first electrode 32 may be an anode and the second electrode 8 may be a cathode. Alternatively, with continued reference to fig. 7a and 7f, the first electrode 32 is located on the side of the second wire segment 52 remote from the substrate 1.
Referring to fig. 7g, the shielding structure 6 includes a first shielding structure 61 and a second shielding structure 62, the first shielding structure 61 being located between the second wire segment 52 and the signal transmitting portion 31. A second shielding structure 62 is located between the second wire segment 52 and the first electrode 32. Alternatively, the signal transmitting portion 31 and the first electrode 32 are located on opposite sides of the second wire section 52 in the thickness direction Z of the substrate 1.
Optionally, with continued reference to fig. 3a, at least part of the orthographic projection of the shielding structure 6 (e.g. the first shielding structure 61 and/or the second shielding structure 62) on the substrate 1 is located in the overlapping area of the orthographic projection of the second wire segment 52 on the substrate 1 and the orthographic projection of the first structure 3 in the first type of pixel driving circuit 21 on the substrate 1. The shielding structure 6 may cover the overlapping area of the second wire segment 52 and the first structure 3, the larger the area of the shielding structure 6 covering the overlapping area of the second wire segment 52 and the first structure 3, the better the shielding effect. Optionally, the overlapping area of the front projection of the second wire segment 52 on the substrate 1 and the front projection of the first structure 3 in the first type pixel driving circuit 21 on the substrate 1 is located within the front projection of the shielding structure 6 on the substrate 1, which corresponds to that the shielding structure 6 completely covers the overlapping area of the second wire segment 52 and the first structure 3.
Optionally, with continued reference to fig. 4, the display panel 100 further includes an initialization signal line Vrefn, the pixel driving circuit 2 further includes a data writing module 201, a driving module 202, and a first initialization module 203, the data line 4 is electrically connected to the driving module 202 via the data writing module 201, the initialization signal line Vrefn is electrically connected to the first structure 3 via the first initialization module 203, and the first initialization module 203 is used for initializing the first electrode 32 connected to the light emitting structure 7. The initialization signal line Vrefn may be used to transmit an initialization signal. The data writing module 201 may be used to write the data voltages on the data lines 4 to the driving module during the data writing phase.
Alternatively, in the same pixel driving circuit 2 as shown in fig. 4 and 5, the first initializing module 203 initializes the first electrode 32 connected to the light emitting structure 7, and the data voltage on the data line 4 is transmitted to the driving module 202 through the data writing module 201. By providing the shielding structure 6 (e.g., the first shielding structure 61 and/or the second shielding structure 62) between the first structure 3 and the second wire segment 52 connected to the light emitting structure 7, the problem that the first initializing module 203 initializes the first electrode 32 connected to the light emitting structure 7, and simultaneously, the first electrode 32 connected to the light emitting structure 7 jumps in potential, for example, is pulled down from a positive potential to an initializing signal, the second wire segment 52 and the data wire 4 connected to the second wire segment are pulled down, and the potential written into the control end of the driving module of the pixel driving circuit connected to the second wire segment is lower, and the brightness is higher, thereby causing a diagonal bright line can be solved.
Optionally, with continued reference to fig. 4, the display panel 100 provided in this embodiment may further include a first Scan signal line Scan1, where the data writing module 201 and the first initializing module 203 in the same pixel driving circuit 2 are electrically connected to the first Scan signal line Scan 1. The control terminal of the data writing module 201 and the control terminal of the first initializing module 203, which are equivalent to the same pixel driving circuit, are electrically connected to the output terminal of the same shift register in the scanning circuit via the first scanning signal line Scan1, so as to simplify the structure of the scanning circuit. The scanning circuit can comprise a plurality of cascaded shift registers, and can output scanning signals to corresponding scanning signal lines step by step so as to realize progressive scanning.
Specifically, the first Scan signal line Scan1 may be used to transmit the first Scan signal. In response to the first Scan signal on the first Scan signal line Scan1, the data writing module 201 and the first initializing module 203 are turned on at the same time. The arrangement is such that when the first initialization module 203 transmits an initialization signal to the first electrode 32 connected to the light emitting structure 7 via the signal transmitting part 31, the Data writing module 201 is turned on, so that the Data line 4 writes the Data voltage Data to the driving module 202 through the turned-on Data writing module 201.
When the shielding structure 6 is not provided, the first initializing module 203 and the data writing module 201 are simultaneously turned on when the first scanning signal transmitted on the first scanning signal line Scan1 arrives, and the first initializing module 203 initializes the first electrode 32 connected to the light emitting structure 7 and simultaneously writes the data voltage into the control terminal of the driving module 202. The first electrode 32 connected to the light emitting structure 7 is pulled down to the initialization signal by a positive potential. Since the second wire segment 52 having the data voltage transmitted thereon overlaps the first structure 3 (e.g., the signal transmission portion 31 and/or the first electrode 32 connected to the light emitting structure 7) of the at least one first type pixel driving circuit 21, parasitic capacitance exists, so that the potential of the data voltage transmitted on the second wire segment 52 will be pulled down, so that the potential written into the gate of the driving module 202 of the pixel driving circuit 2 connected to the second wire segment is lower, which may result in higher brightness of the light emitting structure 7, and uneven bright lines are formed in the display area AA of the display panel 100, thereby affecting the display effect of the display panel 100.
With continued reference to fig. 4, 5, and 7a to 7e, when the first scan signal arrives after the shielding structure 6 is disposed, the initializing signal is written into the first electrode 32 connected to the light emitting structure 7 by disposing the shielding structure 6 to include the first shielding structure 61 and/or the second shielding structure 62, the first shielding structure 61 being located between the second wire section 52 and the signal transmitting portion 31, and/or the second shielding structure 62 being located between the second wire section 52 and the first electrode 32 such that the first shielding structure 61 is located between the second wire section 52 having the data voltage transmitted thereto and the signal transmitting portion 31, and/or the second wire section 52 having the data voltage transmitted thereto and the first electrode 32 of the light emitting structure 7. The arrangement is such that the coupling between the second wire segment 52 and the signal transmission part 31 is reduced, and/or the coupling between the second wire segment 52 and the first electrode 32 is reduced, so that the coupling effect of the low potential on the signal transmission part 31 and/or the first electrode 32 on the data voltage transmitted on the second wire segment 52 is reduced, the data voltage transmitted on the second wire segment 52 is stable, the potential written into the control end of the driving module 202 of the pixel driving circuit 2 connected with the second wire segment is stable, and the brightness uniformity of the light emitting structure 7 is good.
Optionally, the shielding structure 6 may further include a third shielding structure disposed between the data line 4 and the first structure 3 to reduce the coupling effect of the low potential on the signal transmission portion 31 and/or the first electrode 32 on the data voltage transmitted on the data line 4, thereby improving the uniformity of display.
Optionally, the shielding structure 6 may further include a fourth shielding structure disposed between the first wire segment 51 and the first structure 3, so as to reduce the coupling effect of the low potential on the signal transmission portion 31 and/or the first electrode 32 on the data voltage transmitted on the data line 4, and improve the uniformity of display.
Optionally, with continued reference to fig. 4 on the basis of the foregoing embodiment, the display panel 100 provided in this embodiment may further include a light emission control signal line EM, where the pixel driving circuit 2 further includes a light emission control module 204, where the light emission control module 204, the driving module 202 and the light emission structure 7 are connected in series, and two ends after the connection are electrically connected to the first potential signal line ELVSS and the second potential signal line ELVDD, respectively, and a control end of the light emission control module 204 is connected to the light emission control signal line EM.
Referring to fig. 3 to 5, in the light emitting stage, in response to the light emission control signal on the light emission control signal line EM, the light emission control module 204 is turned on to make the driving current generated by the driving module 202 flow into the light emitting structure to drive the light emitting structure 7 to emit light. One of the first potential signal line ELVSS and the second potential signal line ELVDD is a high potential signal line, and the other is a low potential signal line. The first potential signal line ELVSS may be a low potential signal line. The second potential signal line ELVDD may be a high potential signal line.
Alternatively, with continued reference to fig. 6c, the second wire segment 52, the initialization signal line Vrefn, and the emission control signal line EM extend in the second direction X. Namely, the second wire segment 52, the initialization signal line Vrefn, and the emission control signal line EM extend in the same direction. Optionally, the orthographic projection of the second wire segment 52 of the patch cord 5 on the substrate 1 is located between the orthographic projection of the initialization signal line Vrefn on the substrate 1 and the orthographic projection of the emission control signal line EM on the substrate 1. Thus, the overlapping position of the second wire segment 52 and the active layer of the single pixel driving circuit 2 is one, and if the second wire segment 52 is arranged at other positions, the overlapping position of the second wire segment 52 and the active layer of the single pixel driving circuit 2 is two or more, so that the overlapping area of the second wire segment 52 and the active layer can be reduced, and the signal coupling effect of the active layer on the second wire segment 52 can be reduced.
Optionally, with continued reference to fig. 4 based on the above embodiment, the pixel driving circuit 2 may further include a second initialization module 206 for initializing the control terminal of the driving module 202. A first end of the second initialization module 206 is electrically connected to the initialization signal line Vrefn, and a second end of the second initialization module 206 is electrically connected to the control end of the driving module 202. Optionally, the control terminal of the second initialization module 206 may be connected to the second Scan signal line Scan 2. The second initialization module 206 is configured to conduct a second Scan signal transmitted according to the second Scan signal line Scan2 in the initialization stage t1, so as to transmit an initialization signal to the control terminal of the driving module 202. Optionally, the pixel driving circuit 2 may further include a storage module 207, where a first end of the storage module 207 is electrically connected to the control end of the driving module 202. A second terminal of the memory module 207 may be connected to the second potential signal line ELVDD. Optionally, the pixel driving circuit 2 may further include a compensation module 205 for performing threshold compensation on the driving module 202. The compensation module 205 is connected between the control terminal and the second terminal of the driving module 202. The control terminal of the compensation module 205 may be electrically connected to the first Scan signal line Scan 1. The Data writing module 201 may be connected between the Data line Data and the first end of the driving module 202.
Alternatively, in two adjacent rows of pixel driving circuits 2, the data writing module 201 of the previous row of pixel driving circuits 2 and the second initializing module 206 of the next row of pixel driving circuits 2 are connected to the same scanning signal line or the same shift register of the scanning circuit, so as to simplify the structure of the scanning circuit. The data writing module 201 of the previous row of pixel driving circuits and the second initializing module 206 of the next row of pixel driving circuits may be turned on at the same time and turned off at the same time.
With continued reference to fig. 4 and 5, the operation of the pixel driving circuit may be:
in the initialization stage t1, the second Scan signal transmitted by the second Scan signal line Scan2 is a conducting signal, for example, a low level signal, and the second initialization module 206 is turned on, and the initialization signal line Vrefn transmits an initialization signal to the control terminal of the driving module 202 to initialize the control terminal of the driving module 202. The first Scan signal transmitted by the first Scan signal line Scan1 is an off signal, and may be a high level signal, for example. The first initialization module 203 and the data writing module 201 and the compensation module 205 are both turned off. The emission control signal transmitted by the emission control signal line EM is an off signal, and may be a high level signal, for example. The light control module 204 is turned off.
In the data writing stage t2, the first Scan signal transmitted by the first Scan signal line Scan1 is an on signal, for example, a low level signal, and the first initialization module 203, the data writing module 201 and the compensation module 205 are all on. The Data line 4 transmits the Data voltage Data to the control terminal of the driving module 202 through the turned-on Data writing module 201 and the turned-on compensation module 205, and charges the storage module 207. Meanwhile, the first initializing module 203 is turned on according to the first Scan signal transmitted from the first Scan signal line Scan1, and transmits an initializing signal to the first electrode 32 connected to the light emitting structure 7 to initialize the first electrode 32 connected to the light emitting structure 7. The second Scan signal transmitted by the second Scan signal line Scan2 is an off signal, and may be a high level signal, for example. The second initialization module 206 is turned off. The emission control signal transmitted by the emission control signal line EM is an off signal, and may be a high level signal, for example. The light control module 204 is turned off.
In the light emitting stage t3, the light emitting control signal transmitted by the light emitting control signal line EM is a conducting signal, for example, may be a low level signal, and the light emitting control module 204 is conducted according to the light emitting control signal, and the memory module 207 has a stabilizing effect on the potential of the control terminal of the driving module 202. The driving module 202 and the light emitting structure 7 are connected between the second potential signal line ELVDD and the first potential signal line ELVSS, and the driving module 202 generates a driving current according to voltages of a control terminal and a first terminal thereof to drive the light emitting structure 7 to emit light. The first Scan signal transmitted by the first Scan signal line Scan1 is an off signal, and may be a high level signal, for example. The first initialization module 203 and the data writing module 201 and the compensation module 205 are both turned off. The second Scan signal transmitted by the second Scan signal line Scan2 is an off signal, and may be a high level signal, for example. The second initialization module 206 is turned off.
Alternatively, with continued reference to fig. 4, the driving module 202 may include a driving transistor T1, the data writing module 201 may include a first switching transistor T2, the compensating module 205 may include a second switching transistor T3, the first initializing module 203 may include a third switching transistor T7, the second initializing module 206 may include a fourth switching transistor T4, and the light emitting control module 204 may include a fifth switching transistor T5 and a sixth switching transistor T6. The storage module 207 may include a storage capacitor Cst. The driving transistor T1 and each switching transistor may be P-type transistors, or N-type transistors, or some of the driving transistor T1 and each switching transistor may be P-type transistors, and the rest may be N-type transistors.
Optionally, fig. 8a is a schematic structural diagram of a layout of a display panel according to another embodiment of the present invention. Fig. 8b is a schematic structural diagram of an active layer of the layout of the display panel shown in fig. 8a according to an embodiment of the present invention. Fig. 8c is a schematic structural diagram of a second conductive layer of the layout of the display panel shown in fig. 8a according to an embodiment of the present invention. Fig. 8d is a schematic structural diagram of a third conductive layer of the layout of the display panel shown in fig. 8a according to an embodiment of the present invention. Fig. 8b illustrates the first structure 3 of the first type of pixel driving circuit 21 in an active layer, fig. 8c illustrates the shielding structure 6 in a second conductive layer, and fig. 8d illustrates the second conductive segment 52 in a third conductive layer. The partial dashed boxes in fig. 8b, 8c and 8d may represent corresponding positions of corresponding structures, and are not representative of the structures being located in the film layer.
On the basis of the above embodiments, in combination with fig. 3a to 3d, 6a to 6e, 7a to 7g, and 8a to 8d, the shielding structure 6 is optionally electrically connected to a fixed potential signal line. By this arrangement, the shielding structure 6 can have a fixed potential signal, so that the second wire segments 52 located at two sides of the shielding structure 6 and the first structure 3 of the first type pixel driving circuit 21 cannot be coupled, and further the data voltage transmitted on the second wire segments 52 is not affected by the first structure 3 of the first type pixel driving circuit 21, so that the brightness uniformity of the light emitting structure 7 is improved, and the display effect of the display panel 100 is further improved.
Optionally, the fixed potential signal line includes one or more of a high potential signal line, a low potential signal line, and an initialization signal line Vrefn, and at least a part of the fixed potential signal line is electrically connected to the pixel driving circuit 2. The fixed potential signal lines connected to the first, second, third, and fourth shield structures 61, 62 include one or more of a high potential signal line (which may be, for example, the second potential signal line ELVDD), a low potential signal line (which may be, for example, the first potential signal line ELVSS), and the initialization signal line Vrefn electrically connected to the pixel driving circuit 2, so that the fixed potential signal line connected to the shield structure 6 does not need to be additionally provided to simplify wiring. According to the wiring requirement, the shielding structure 6 can be connected with the corresponding fixed potential signal line in a nearby choice according to the setting position of the shielding structure 6, the shielding structure 6 can be directly connected with the fixed potential signal line of the same layer, or the shielding structure 6 can be connected with the fixed potential signal line arranged at different layers through a via hole.
Alternatively, with continued reference to fig. 3c and 7c, the display panel 100 includes a first shielding structure 61, and the first shielding structure 61 may be connected to the initialization signal line Vrefn. Alternatively, with continued reference to fig. 7e, the display panel 100 includes the second shielding structure 62, and the second shielding structure 62 may be connected to the first potential signal line ELVSS or the second potential signal line ELVDD. The shielding structure 6 may be connected to a corresponding fixed potential signal line as needed, and is not limited in any way.
Alternatively, with continued reference to fig. 3c or fig. 7c, the initialization signal line Vrefn is disposed in the same layer as the first shielding structure 61 and is an integral connection structure. The first shielding structure 61 and the initialization signal line Vrefn can be obtained by patterning the same conductive layer, so as to simplify the manufacturing process and manufacture the same layer without increasing the thickness of the display panel 100. In addition, the initialization signal on the initialization signal line Vrefn is a dc potential, and the first shielding structure 61 is connected to the initialization signal line Vrefn to provide a stable initialization signal to the first shielding structure 61, so as to further improve the shielding effect of the first shielding structure 61 on the signal transmission portion 31 and the second wire section 52 of the first-type pixel driving circuit 21.
Alternatively, with continued reference to fig. 7e, the second potential signal line ELVDD is arranged in the same layer as the second shielding structure 62 and is an integral connection structure. The second potential signal line ELVDD and the second shielding structure 62 can be obtained by patterning the same conductive layer, so as to simplify the manufacturing process, and the thickness of the display panel 100 is not increased additionally. In addition, the signal on the second potential signal line ELVDD is a dc potential, and the second potential signal line ELVDD is connected to the second shielding structure 62 to provide a stable dc signal to the second shielding structure 62, so as to further improve the shielding effect of the second shielding structure 62 on the signal transmission portion 31 of the first-type pixel driving circuit 21 and the second wire segment 52.
Alternatively, with continued reference to fig. 6a to 6d, the second potential signal line ELVDD is electrically connected to the first shielding structure 61 through a via hole on the basis of the above-described embodiment. The second potential signal line ELVDD is disposed in a different layer from the first shielding structure 61 and is located in a different conductive layer.
Alternatively, with continued reference to fig. 8a to 8d, at least part of the fixed potential signal line connected to the shielding structure 6 is provided insulated from the pixel driving circuit 2, for example, the fixed potential signal line Vint in fig. 8c is not electrically connected to the pixel driving circuit 2. The arrangement is equivalent to externally connecting a stable signal, and the fixed potential transmitted by the additionally arranged fixed potential signal line is controllable and adjustable, so that a better shielding effect is obtained, and the display effect of the display panel 100 is further improved. Alternatively, the fixed potential signal line Vint and the first shielding structure 61 are arranged in the same layer, and are integrally connected. The fixed potential signal line Vint may be electrically connected to the driving chip 10.
Optionally, with continued reference to fig. 4 and fig. 8a to 8d, the fixed potential signal line may include a third potential signal line Vint, the display panel 100 further includes a light emitting structure 7, and a second electrode 8 connected to the light emitting structure 7, the second electrode 8 is located at a side of the light emitting structure 7 away from the substrate 1, and one end of the third potential signal line Vint extends to an edge of the display panel 100 and is electrically connected to the second electrode 8. One end of the third potential signal line Vint extends to an edge of the display panel 100 to be electrically connected to the first potential signal line ELVSS, which is electrically connected to the second electrode 8, for supplying the first voltage signal to the second electrode 8. The second electrode 8 may be a cathode of the light emitting structure 7, and the third potential signal line Vint may be used to transmit a low potential signal. The second electrode 8 can be continuously arranged on the whole surface, and the common mask plate is used for preparation, and patterning treatment is not needed, so that the process can be simplified, and the impedance of the second electrode 8 can be reduced.
Optionally, fig. 9 is a schematic top view of another display panel according to an embodiment of the present invention. On the basis of the above embodiment, referring to fig. 9, the pixel driving circuits 2 provided in this embodiment are plural, the plural pixel driving circuits 2 are arranged in an array, the display panel 100 further includes a virtual shielding structure 9, the pixel driving circuits 2 further include a second type pixel driving circuit 22, and the relative positions of the first structure 3 in the second type pixel driving circuit 22 and the corresponding virtual shielding structure 9 and the relative positions of the first structure 3 in the first type pixel driving circuit 21 and the corresponding shielding structure 6 are the same; the front projection of the virtual shielding structure 9 on the substrate 1 and the front projection of the patch cord 5 on the substrate 1 do not overlap, which is equivalent to interval arrangement.
The virtual shielding structure 9 and the second wire segment 52 are disposed at a distance from each other in front projection on the substrate 1. The shielding structures 6 and the virtual shielding structures 9 are uniformly distributed in the display area AA, so that the display panel 100 has better visual effect in the off-screen state, and the phenomenon of poor off-screen appearance (mura) of the display panel 100 is improved.
Alternatively, with continued reference to fig. 9, based on the above-described embodiment, the virtual shield structure 9 and the shield structure 6 are the same size and shape. Optionally, the dummy shielding structure 9 and the shielding structure 6 may be disposed on the same layer, and manufactured simultaneously by the same process, and patterned on the same conductive layer, so that the manufacturing process is saved, and the display panel 100 still has better uniformity in the off-screen state, thereby further improving the off-screen mura of the display panel 100.
Optionally, fig. 10 is a schematic top view of another display panel according to an embodiment of the present invention. The display panel 100 may further include a first compensation line 401 and a second compensation line 402, and the first compensation line 401 may extend in the first direction Y. The second compensation line 402 extends in a second direction X. The first compensation line 401 may be disposed between adjacent data lines 4. The second compensation line 402 may be located between the scan signal lines. The first compensation line 401 and the second compensation line 4002 can provide an appearance compensation effect for the patch cord 5, effectively eliminate the shadow eliminating situation, and well avoid the poor appearance of the display panel 100. The first compensation line 401 and the second compensation line 402 may be connected to a fixed potential signal line, and may be, for example, one or more of a high potential signal line, a low potential signal line, and an initialization signal line. The first compensation line 401 may be spaced apart from the first wire segment 51 at the same interval. The second compensation line 402 may be spaced apart from the second wire segment 52 at the same distance.
Fig. 11 is a schematic view of a partial cross-sectional structure of a display panel according to an embodiment of the invention. Optionally, the display panel further includes an active layer 101, a first conductive layer 102, a second conductive layer 103, a third conductive layer 104, and a fourth conductive layer 105, which are disposed on the substrate 1 and are sequentially stacked in a direction away from the substrate 1. The fourth conductive layer is located between the conductive layer where the first electrode 32 is located and the third conductive layer 104. The first conductive layer 102 may be used to form a gate electrode of a thin film transistor and a first plate of a storage capacitor. The second conductive layer 103 may be used to form a second plate of the storage capacitor. The third conductive layer 104 may be used to form a source and a drain of the thin film transistor. The thin film transistor may include a driving transistor and a switching transistor in the pixel driving circuit. Structures located on the same film layer can be formed simultaneously through a patterning process to simplify the process steps. Alternatively, as shown in fig. 3a, 6a, and 8a, the first conductive layer 102 may be used to form the first Scan signal line Scan1, the second Scan signal line Scan2, and the emission control signal line EM. The second conductive layer 103 may be used to form an initialization signal line Vrefn. The third conductive layer 104 may be used to form the second wire segment 52. The fourth conductive layer 105 may be used to form the first conductive line segment 51, the Data line Data, and the second potential signal line ELVDD. An inorganic insulating layer may be provided between the active layer 101, the first conductive layer 102, the second conductive layer 103, and the third conductive layer 104. An organic insulating layer can be arranged between the third conductive layer 104, the fourth conductive layer 105 and the first electrode 31, and has planarization effect
Optionally, the display panel further includes an active layer 101, a first conductive layer 102, a second conductive layer 103, a third conductive layer 104, a fourth conductive layer 105, and a fifth conductive layer that are disposed on the substrate 1 and are sequentially stacked in a direction away from the substrate 1. The fifth conductive layer may be located between the conductive layer where the first electrode is located and the fourth conductive layer 105. Alternatively, as shown in fig. 7a, the first conductive layer 102 may be used to form the first Scan signal line Scan1, the second Scan signal line Scan2, and the emission control signal line EM. The second conductive layer 103 may be used to form an initialization signal line Vrefn. The third conductive layer 104 may be used to form the second wire segment 52. The fourth conductive layer 105 may be used to form the second potential signal line ELVDD. The fifth conductive layer may be used to form the first wire segment 51 and the Data line Data. An organic insulating layer may be disposed between the third conductive layer 104, the fourth conductive layer 105, the fifth conductive layer, and the first electrode 31, and has a planarization function.
Fig. 12 is a schematic structural diagram of a display device according to an embodiment of the present invention. On the basis of the foregoing embodiments, referring to fig. 12, the display device 200 provided in this embodiment, including the display panel 100 provided in any of the foregoing embodiments, has the beneficial effects of the display panel 100 provided in any of the foregoing embodiments, and is not described herein again. The display device 200 provided in this embodiment includes terminal devices such as a mobile phone, a wearable device, and a computer.
Optionally, with continued reference to fig. 9, the display device 100 provided in this embodiment further includes a driving chip 10, where the driving chip 10 is electrically connected to at least a portion of the data lines 4 via the patch cord 5. The driving chip 10 may be electrically connected to an end of the first wire segment 51 remote from the second wire segment 52. The driving chip 10 may be located in a binding area of the non-display area NA of the display panel.
Optionally, all the data lines are provided with corresponding patch cords, and the driving chip 10 transmits the data voltage to the data line 4 through the first wire segment 51 and the second wire segment 52, and then transmits the data voltage to the pixel driving circuit 2. The partial data lines are provided with corresponding patch cords, the driving chip 10 transmits data voltages to the partial data lines 4 through the first wire segments 51 and the second wire segments 52, the driving chip 10 directly transmits the data voltages to the rest of the data lines 4, and then the data voltages output by the driving chip 10 are transmitted to the pixel driving circuit 2.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.

Claims (12)

1. A display panel, comprising:
a substrate;
the pixel driving circuit is arranged on one side of the substrate, the pixel driving circuit comprises a first structure, and the pixel driving circuit comprises a first type of pixel driving circuit;
a plurality of data lines electrically connected to the pixel driving circuits;
the plurality of patch cords are correspondingly and electrically connected with at least part of the data lines;
and the shielding structure is positioned between the patch cord and the first structure in the first type pixel driving circuit.
2. The display panel of claim 1, wherein the patch cord comprises a first wire segment and a second wire segment connected, the first wire segment being electrically connected to the corresponding data line via the second wire segment; the extending direction of the second wire segment is intersected with the extending direction of the data wire; the first wire segment and the data line extend along a first direction;
the orthographic projection of the second wire segment on the substrate overlaps with the orthographic projection of the first type pixel driving circuit on the substrate, and the shielding structure is positioned between the second wire segment and the first structure in the first type pixel driving circuit;
Preferably, the second wire section, the shielding structure, and the first structure in the first-type pixel driving circuit are stacked in a thickness direction of the substrate;
preferably, at least part of the orthographic projection of the shielding structure on the substrate is located in an overlapping area of the orthographic projection of the second wire section on the substrate and the orthographic projection of the first structure in the first type pixel driving circuit on the substrate;
preferably, the extending direction of the second wire segment is perpendicular to the extending direction of the data wire.
3. The display panel of claim 2, further comprising: and the light-emitting structure is connected with the first structure.
4. A display panel according to claim 2 or 3, wherein the display panel comprises an active layer, the first structure comprising a signal transmitting portion, the signal transmitting portion being part of the active layer; the shielding structure comprises a first shielding structure, and the first shielding structure is positioned between the second wire segment and the signal transmission part;
preferably, the signal transmission part is positioned at one side of the second wire section close to the substrate;
Preferably, the extending direction of the signal transmission part intersects with the extending direction of the second wire segment;
and/or the first structure comprises a first electrode connected with the light-emitting structure; the first electrode is positioned on one side of the light-emitting structure close to the substrate; the shielding structure comprises a second shielding structure, and the second shielding structure is positioned between the second wire segment and the first electrode;
preferably, the signal transmission part and the first electrode are positioned at two opposite sides of the second wire section along the thickness direction of the substrate;
preferably, the first electrode is located at a side of the second wire segment away from the substrate.
5. The display panel according to claim 4, further comprising an initialization signal line, wherein the pixel driving circuit further comprises a data writing module, a driving module, and a first initialization module, wherein the data line is electrically connected to the driving module via the data writing module, wherein the initialization signal line is electrically connected to the first structure via the first initialization module, and wherein the first initialization module is configured to initialize a first electrode connected to the light emitting structure;
Preferably, in the same pixel driving circuit, the first initializing module initializes a first electrode connected to the light emitting structure, and simultaneously, data voltages on the data lines are transmitted to the driving module through the data writing module;
preferably, the initialization signal line and the first shielding structure are arranged on the same layer and are of an integral connection structure.
6. The display panel according to claim 5, further comprising a first scan signal line, wherein the data writing module and the first initializing module in the same pixel driving circuit are electrically connected to the first scan signal line.
7. The display panel according to claim 5, wherein the display panel further comprises a light emission control signal line, the pixel driving circuit further comprises a light emission control module, the driving module and the light emission structure are connected in series, two ends after being connected in series are respectively electrically connected with a first potential signal line and a second potential signal line, a control end of the light emission control module is connected with the light emission control signal line, and orthographic projection of the second wire section on the substrate is located between orthographic projection of the initialization signal line on the substrate and orthographic projection of the light emission control signal line on the substrate;
Preferably, the second wire section, the initialization signal line, and the light emission control signal line extend in a second direction;
preferably, the second potential signal line and the second shielding structure are arranged on the same layer and are of an integral connection structure;
preferably, one of the first potential signal line and the second potential signal line is a high potential signal line, and the other is a low potential signal line.
8. The display panel according to claim 1, wherein the shielding structure is electrically connected to a fixed potential signal line;
preferably, the fixed potential signal line includes one or more of a high potential signal line, a low potential signal line, and an initialization signal line, at least a part of the fixed potential signal line being electrically connected to the pixel driving circuit;
and/or at least part of the fixed potential signal line is arranged in an insulating manner with the pixel driving circuit.
9. The display panel according to claim 8, wherein the fixed potential signal line includes a first potential signal line and a third potential signal line, the display panel further includes a light emitting structure, and a second electrode connected to the light emitting structure, the second electrode is located at a side of the light emitting structure away from the substrate, one end of the third potential signal line extends to an edge of the display panel to be electrically connected to the first potential signal line, the first potential signal line is electrically connected to the second electrode, and the first potential signal line is for supplying a first potential signal to the second electrode.
10. The display panel according to claim 1, wherein the plurality of pixel driving circuits are arranged in an array, the display panel further comprises a virtual shielding structure, the pixel driving circuits further comprise a second type of pixel driving circuit, and a relative position of the first structure in the second type of pixel driving circuit and the corresponding virtual shielding structure is the same as a relative position of the first structure in the first type of pixel driving circuit and the corresponding shielding structure; orthographic projection of the virtual shielding structure on the substrate is not overlapped with orthographic projection of the patch cord on the substrate;
preferably, the size and shape of the virtual shielding structure and the shielding structure are the same.
11. A display device comprising the display panel according to any one of claims 1 to 10.
12. The display device of claim 11, further comprising a driver chip electrically connected to at least a portion of the data lines via the patch cord.
CN202310340371.3A 2023-03-31 2023-03-31 Display panel and display device Pending CN116758848A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310340371.3A CN116758848A (en) 2023-03-31 2023-03-31 Display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310340371.3A CN116758848A (en) 2023-03-31 2023-03-31 Display panel and display device

Publications (1)

Publication Number Publication Date
CN116758848A true CN116758848A (en) 2023-09-15

Family

ID=87957773

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310340371.3A Pending CN116758848A (en) 2023-03-31 2023-03-31 Display panel and display device

Country Status (1)

Country Link
CN (1) CN116758848A (en)

Similar Documents

Publication Publication Date Title
CN106952940B (en) Organic light-emitting display panel and organic light-emitting display device
CN112117320A (en) Display panel and display device
CN113013218B (en) Array substrate, display panel and display device
CN113078174B (en) Array substrate, display panel and display device
CN115152030B (en) Display panel and display device
CN114495835B (en) Pixel driving circuit, driving method thereof, display panel and display device
CN112864199B (en) Touch display panel and display device
CN115050340A (en) Display panel and display device
CN116758848A (en) Display panel and display device
CN115274708A (en) Display panel and display device
CN114743504A (en) Pixel circuit, display panel and display device
WO2022082375A1 (en) Display substrate and display apparatus
CN115836597A (en) Display panel and display device
CN113410278A (en) Display device and display equipment
US11925080B2 (en) Display device
WO2023230817A1 (en) Drive backplane, display panel, and display apparatus
CN114902320B (en) Display substrate, driving method thereof and display device
CN219228311U (en) Display substrate and display device
US20240074266A1 (en) Display panel and display device
CN117296477A (en) Display substrate and display device
CN117337099A (en) Display panel and display device
CN116998246A (en) Display substrate, manufacturing method thereof and display device
CN113594138A (en) Display panel and display device
CN117529769A (en) Pixel driving circuit, display substrate and display device
CN116600597A (en) Display panel and display device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination