CN116743951A - Video data processing method, system, storage medium and electronic equipment - Google Patents
Video data processing method, system, storage medium and electronic equipment Download PDFInfo
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- H04N5/00—Details of television systems
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- H04N5/91—Television signal processing therefor
- H04N5/915—Television signal processing therefor for field- or frame-skip recording or reproducing
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- H—ELECTRICITY
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- H04N7/0127—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter
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Abstract
The application provides a video data processing method, a system, a storage medium and electronic equipment, which relate to the field of image data processing, and in order to reduce the frame loss rate in the video processing process, the method comprises the following steps: acquiring video data and calculating the frame number of the video data; the video data is sequenced frame by frame according to the frame number and then written into a receiving memory; if the receiving memory does not have a full signal during video data writing, marking a normal writing mark as a first set value; if the receiving memory has a full signal during video data writing, marking a normal writing mark as a second set value; establishing a mapping relation between the normal writing mark and the corresponding frame number; the normal write flag is used to indicate the integrity of the video data in the receiving memory. The application can detect the data which is possibly lost in the video frame during the writing process, and greatly reduces the frame loss rate of the compressed video and the occupation of on-chip resources.
Description
Technical Field
The present application relates to the field of image data processing, and in particular, to a video data processing method, a video data processing system, a storage medium, and an electronic device.
Background
Currently, the processing mode of video frame loss in a traditional baseboard management control chip is as follows:
the original RGB data generated by VGA (Video Graphics Array ) is converted into YUV format data after color space conversion, then is input into VIDEO compression IP (VIDEO CMP) for VIDEO compression, wherein various VIDEO compression formats such as JPEG/H.264/AVS are adopted, compressed VIDEO is input into an off-chip memory, and is ready to be driven and read. However, because the system bus is busy, the video compression function does not always occupy the system bus to write the compressed video data into the external memory. Therefore, the video compression module stops writing the compressed video into the memory, but the baseboard management control chip still continuously generates new compressed video, and the on-chip cache resource of the baseboard management control chip is limited, so that the newly generated compressed video which cannot be written into the external memory can not be stored.
For this reason, the existing scheme needs to compare the read-write pointer (i.e., a large-capacity FIFO) of the on-chip buffer space of the baseboard management control chip for storing the compressed video in real time to determine the remaining space of the FIFO. When the remaining space of the FIFO is insufficient to hold the current new compressed video data, writing of the current compressed video is stopped. The interaction flow of the frame loss control module and the driver is as follows: after the frame loss processing module generates the output completion interrupt, the driving is firstly interrupted, then the compressed data in the memory is probably not immediately read, and the compressed data needs to be read again for a period of time, which can easily cause that when the driving really reads the related state memory (the registers record the initial address, the length and the like of the compressed data in the memory), the values of the registers are already covered by the state information of the data of the new 1 frame/2 frame, so that the driving can not read all the compressed data, and the frame loss rate is further increased.
Disclosure of Invention
The application aims to provide a video data processing method, a system, a storage medium and electronic equipment, which can reduce the frame loss rate in the video processing process.
In order to solve the above technical problems, the present application provides a video data processing method, including:
acquiring video data and calculating the frame number of the video data;
the video data are written into a receiving memory after being sequenced frame by frame according to the frame number;
if the receiving memory does not have a full signal during video data writing, marking a normal writing mark as a first set value;
if the receiving memory has a full signal during video data writing, marking the normal writing mark as a second set value;
establishing a mapping relation between the normal writing mark and the corresponding frame number; the normal write flag is used to indicate the integrity of the video data in the receiving memory.
Optionally, the writing the video data into the receiving memory after the frame-by-frame ordering according to the frame number includes:
writing the frame count and the corresponding frame data into a receiving memory frame by frame as a mapping group; wherein the frame count is the number of frames corresponding to the current frame data.
Optionally, the method further comprises:
Detecting whether the receiving memory is full or not when the video data is written into the receiving memory;
if yes, generating the full writing signal.
Optionally, when the video data is written into the receiving memory after being sequenced frame by frame according to the frame number, the method further includes:
when the frame head is detected, the normal mark is pulled up;
and if the full signal of the receiving memory is detected, the normal mark is pulled down, and the video data is stopped from being written into the receiving memory.
Optionally, after the normal flag is pulled up, the method further includes:
if the frame head and the frame tail of the target data frame in the video data are written into the receiving memory, the normal mark position is a first preset value;
and if the frame head of the target data frame is written into the receiving memory, and the frame tail is not written into the receiving memory, the normal mark position is a second preset value.
Optionally, the method further comprises:
and for the video frame to be written in the video data, if the frame head and the frame tail of the video frame to be written in the receiving memory are written in, and the corresponding normal mark zone bit is the first preset value, writing the normal mark zone bit and the frame count in a video frame information memory.
Optionally, the method further comprises:
and for the video frame to be written in the video data, if the frame head and the frame tail of the video frame to be written in the receiving memory are written in, and the corresponding normal mark zone bit is the second preset value, writing the normal mark zone bit and the frame count in a video frame information memory.
Optionally, the method further comprises:
and if the frame head of the video frame to be written is written into the receiving memory, the frame tail of the video frame to be written is not written into the receiving memory, and the corresponding normal mark zone bit is a second preset value, the video frame to be written is refused to be written into the video frame information memory.
Optionally, after establishing the mapping relationship between the normal writing mark and the frame number, the method further includes:
receiving address information of a space information register of a drive configuration;
determining each storage address of the video data in the receiving memory according to the address information; the memory address includes a head address and a space size.
Optionally, after determining each storage address of the video frame to be written in the memory according to the address information, the method further includes:
And reading the video data according to the storage address, and reading the data according to the normal writing mark and the integrity of the frame head and the frame tail.
Optionally, the reading data according to the normal writing mark and the integrity of the frame head and the frame tail includes:
if the normal writing mark corresponding to the video frame to be read is a first preset value, and the frame head and the frame tail are both positioned in the receiving memory, the video frame to be read is written into the state memory.
Optionally, the reading data according to the normal writing mark and the integrity of the frame head and the frame tail includes:
and if the normal writing mark corresponding to the video frame to be read is a second preset value, and the frame head and the frame tail are both positioned in the receiving memory, refusing to write the video frame to be read into the state memory.
Optionally, the reading data according to the normal writing mark and the integrity of the frame head and the frame tail includes:
if the normal writing mark corresponding to the video frame to be read is a second preset value and the frame tail is not positioned in the receiving memory, returning to the abnormal mark value.
Optionally, after writing the video frame to be read into the state memory, the method further includes:
triggering the enabling of the state memory, and reading video data according to the state memory.
Optionally, the method further comprises:
and caching the storage information of the video data in the state memory.
Optionally, if burst transmission is used to write the video data into the receiving memory, the method further includes:
and executing zero padding operation on the data of the last transmission period of the current frame according to the set length of the burst transmission.
Optionally, after performing the zero padding operation on the data of the last transmission period of the current frame, the method further includes:
burst transmission is performed on video data satisfying the set length, and written into a reception memory.
The application also provides a video data processing system, comprising:
the video data acquisition module is used for acquiring video data and calculating the frame number of the video data;
the ordering module is used for ordering the video data frame by frame according to the frame number and writing the video data into the receiving memory;
a first marking module for marking the normal writing mark as a first set value if the receiving memory has no full signal during writing video data
The second marking module is used for marking the normal writing mark as a second set value if the receiving memory has a full signal when the video data is written;
An adding module, configured to establish a mapping relationship between the normal write mark and the frame number; the normal write flag is used to indicate the integrity of the video data in the receiving memory.
Optionally, the sorting module includes:
and the first writing unit is used for writing the frame count and the corresponding frame data into the receiving memory frame by frame for the mapping group.
Optionally, the method further comprises:
the detection module is used for detecting whether the receiving memory is full or not when the video data is written into the receiving memory;
and the generating module is used for receiving the full memory and generating the full signal.
Optionally, the method further comprises:
pull Gao Mokuai, which is used to pull up the normal mark when the frame header is detected;
and the pull-down module is used for pulling down the normal mark and stopping writing the video data into the receiving memory if the full write signal of the receiving memory is detected.
Optionally, the method further comprises:
the third marking module is used for writing the frame head and the frame tail of the target data frame in the video data into the receiving memory and setting the normal marking mark position as a first preset value;
and the fourth marking module is used for writing the frame head of the target data frame into the receiving memory, and if the frame tail is not written into the receiving memory, setting the normal marking mark position as a second preset value.
Optionally, the method further comprises:
and the first writing module is used for writing the normal mark bit and the frame count into the video frame information memory if the frame head and the frame tail of the video frame to be written are written into the receiving memory and the corresponding normal mark bit is the first preset value for the video frame to be written into in the video data.
Optionally, the method further comprises:
and the second writing module is used for writing the normal mark bit and the frame count into the video frame information memory if the frame head and the frame tail of the video frame to be written are both written into the receiving memory and the corresponding normal mark bit is the second preset value for the video frame to be written into in the video data.
Optionally, the method further comprises:
and the refusing writing module is used for writing the video frame to be written in the video data into the receiving memory if the frame head of the video frame to be written is written into the receiving memory, the frame tail of the video frame to be written is not written into the receiving memory, and the corresponding normal mark zone bit is a second preset value, so that the video frame to be written into is refused to be written into the video frame information memory.
Optionally, the method further comprises:
The receiving module is used for receiving the address information of the space information register of the drive configuration;
a determining module, configured to determine each storage address of the video data in the receiving memory according to the address information; the memory address includes a head address and a space size.
Optionally, the method further comprises:
and the reading module is used for reading the video data according to the storage address and reading the data according to the normal writing mark and the integrity of the frame head and the frame tail.
Optionally, the reading module includes:
and the second writing unit is used for writing the video frame to be read into the state memory if the normal writing mark corresponding to the video frame to be read is a first preset value and the frame head and the frame tail are both positioned in the receiving memory.
Optionally, the reading module includes:
and the refusing writing module is used for refusing to write the video frame to be read into the state memory if the normal writing mark corresponding to the video frame to be read is a second preset value and the frame head and the frame tail are both positioned in the receiving memory.
Optionally, the reading module includes:
and the return module is used for returning an abnormal marking value if the normal writing marking corresponding to the video frame to be read is a second preset value and the frame tail is not positioned in the receiving memory.
Optionally, the method further comprises:
and the reading unit is used for triggering the enabling of the state memory and reading the video data according to the state memory.
Optionally, the method further comprises:
and the caching unit is used for caching the storage information of the video data in the state memory.
Optionally, if burst transmission is used to write the video data into the receiving memory, the method further includes:
and the zero padding module is used for executing zero padding operation on the data of the last transmission period of the current frame according to the set length of the burst transmission.
Optionally, the method further comprises:
and the transmission module is used for performing burst transmission on the video data meeting the set length and writing the video data into the receiving memory.
The application also provides a computer readable storage medium having stored thereon a computer program which when executed by a processor implements the steps of the method as described above.
The application also provides an electronic device comprising a memory in which a computer program is stored and a processor which when calling the computer program in the memory implements the steps of the method as described above.
The application provides a video data processing method, which comprises the following steps: acquiring video data and calculating the frame number of the video data; the video data are written into a receiving memory after being sequenced frame by frame according to the frame number; if the receiving memory does not have a full signal during video data writing, marking a normal writing mark as a first set value; if the receiving memory has a full signal during video data writing, marking the normal writing mark as a second set value; establishing a mapping relation between the normal writing mark and the corresponding frame number; the normal write flag is used to indicate the integrity of the video data in the receiving memory.
When the video data is processed, the serial numbers of the video data are arranged according to the frame number when the video data are written into the receiving memory, and whether a full writing signal is generated or not is recorded in the writing process by using the normal writing mark when the video data are written. If a full writing signal is generated in the writing process, the fact that the frame loss exists in the video data due to the fact that the receiving memory is possibly full in writing is indicated, and therefore the normal writing mark can be used for distinguishing whether the frame loss occurs in the writing process of the video data, and the frame loss rate of the compressed video and the occupation of on-chip resources are greatly reduced.
The application also provides a video data processing system, a storage medium and an electronic device, which have the beneficial effects and are not repeated here.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present application, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of a video data processing method according to an embodiment of the present application;
FIG. 2 is a control block diagram of video data processing logic according to an embodiment of the present application;
fig. 3 is a schematic diagram of a video data processing system according to an embodiment of the present application.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Currently, when a video compression process is executed, the original image information in RGB format generated by the host end passes through the color conversion module of the baseboard management control chip, video data in YUV format is obtained after the color space conversion is completed, then the video data is sent to the video compression module to carry out video compression in JPEG format and the like, and then the video data is output to the data output control module, and the compressed video data is written into the off-chip memory through the module.
The data output control module comprises a write control module for receiving compressed video data input from a previous stage, detecting WR and RD (read-write pointer) of the FIFO in real time to judge the residual capacity of the FIFO, writing the current frame into the FIFO when the residual capacity is enough to hold the current complete frame, discarding the current frame if the current frame cannot be held, detecting the frame head of the next frame and the residual capacity of the FIFO in real time, and judging the next round. But as such, it occupies a lot of on-chip resources and extremely high frame loss rate. Firstly, it is ensured that the buffer FIFO is capable of storing at least two frames of compressed data, and if there are less than two frames, the whole video processing system will not operate normally, for example, the JPEG format is 10 times compressed with a resolution of 1920×1200, and the RGB888 format requires a buffer space of 2×1920×1200×3/10/1024/1024=1.3 MB. For expensive on-chip resources, this is a great challenge. Meanwhile, since the existing scheme needs to keep the space for accommodating one frame at any time, the current compressed frame is written continuously, otherwise, the frame is lost, which requires that the data in the memory is written into the memory through the system bus in time, and once the system bus cannot be occupied by the video compression function all the time, for example, one frame of compressed data is 0.5MB, namely 524288B, and when the rest of the memory is (524288-4) b= 524284B, the frame is lost, and the frame loss rate is very high because of the defects in the driving interaction flow.
In order to solve the above-mentioned drawbacks, please refer to fig. 1, fig. 1 is a flowchart of a video data processing method according to an embodiment of the present application, the method includes:
s101: acquiring video data and calculating the frame number of the video data;
this step is intended to obtain video data, which may be source video data or video compression data. After the video data is obtained, the frame number of the video data is counted, and the specific counting process can count the frame head and the frame tail, so that the frame number is determined. It should be noted that if video data is continuously acquired, statistics may be performed by taking a certain number of video frames as a group, and each group may include a fixed number of video frames. The number of frames of video data is not limited herein, and the number of frames is calculated in order to facilitate receiving memory statistics and distinguishing between video data where video loss may occur and complete video data.
S102: the video data are written into a receiving memory after being sequenced frame by frame according to the frame number;
this step is intended to order the video data frame by frame and then write it to the receiving memory, and is not limited to how it is ordered, and may be ordered sequentially. If the video data is received in a segmented manner, the numbering and sorting can be carried out again for each segment of video data.
After the statistics have obtained the frame count, the frame count may be written to each frame in the video data. Specifically, the frame count and corresponding frame data are written into the receiving memory frame by frame as a mapping group. For example, the data may be written to the receiving memory in the format { frame count, frame data }. Of course, other formats may be used, not to be limiting. On this basis, a cyclic counting manner may also be employed, for example, as a group per a set number of video frames. So that only a few bits of data are needed to count the video frames.
S103: if the receiving memory does not have a full signal during video data writing, marking a normal writing mark as a first set value;
s104: if the receiving memory has a full signal during video data writing, marking the normal writing mark as a second set value;
step S103 and step S104 are parallel steps, and there is no predetermined sequence relationship between the two steps, and the embodiment defaults to determine whether a full signal exists in the receiving memory when video data is written, if so, the normal write flag corresponding to the video frame being written when the full signal occurs is recorded as a second set value. The first setting value and the second setting value are not limited herein, and any numerical value or representation that can be used to distinguish normal writing marks can be used for the first setting value and the second setting value.
The full signal is generated when the receiving memory is full, that is, when the video data is written into the receiving memory, whether the receiving memory is full is detected, and if yes, the full signal is generated. Since the receiving memory is typically read-while-write, if the read speed is greater than the write speed, the receiving memory will typically not generate a full signal. However, since the read speed is not stable, once the read speed is less than the write speed for a period of time, the receiving memory will saturate, and a write-full signal will be generated. Once the write full signal is generated, the video data being written will be processed directly by frame dropping until the next frame currently to be written into the receiving memory can be written when it is possible to write.
S105: establishing a mapping relation between the normal writing mark and the corresponding frame number; the normal write flag is used to indicate the integrity of the video data in the receiving memory.
The step aims to establish a mapping relationship between the normal writing mark and the corresponding frame number, and in one possible manner, each frame of the video data written into the receiving memory may contain the corresponding normal writing mark, which is used to indicate whether the frame loss occurs when the video data is written into the receiving memory. In other embodiments, the normal write flag may also be used to reflect whether a portion of the video frame data is written in its entirety.
When the video data is processed, the video data is written into the receiving memory, the sequence number is arranged according to the frame number, and whether a full writing signal is generated or not is recorded in the writing process by using the normal writing mark. If a full write signal is generated in the writing process, the writing of the video data indicates that the frame loss exists in the video data due to the fact that the receiving memory may be full, and therefore the normal writing mark can be used for distinguishing whether the frame loss occurs in the writing process of the video data. Compared with the existing scheme that the read-write pointer of the receiving memory needs to be detected to judge the residual capacity of the memory, the embodiment of the application can continuously write only if the receiving memory is not full, thereby greatly reducing the frame loss rate of the compressed video and the occupation of on-chip resources.
On the basis of the above embodiment, as a preferred embodiment, when the video data is written into the receiving memory after being sequenced frame by frame according to the frame number, the method may further include the following steps:
when the frame head is detected, the normal mark is pulled up;
and if the full signal of the receiving memory is detected, the normal mark is pulled down, and the video data is stopped from being written into the receiving memory.
If the frame head and the frame tail of the target data frame in the video data are written into the receiving memory, the normal mark position is a first preset value;
and if the frame head of the target data frame is written into the receiving memory, and the frame tail is not written into the receiving memory, the normal mark position is a second preset value.
The present embodiment aims to distinguish between several writing states of video frame data, namely, when a frame header is detected, it indicates that the video frame data starts to be written into the receiving memory, and at this time, the normal flag is pulled high, which indicates that the current state is normal. Upon detecting the full signal, the normal flag is pulled down while stopping writing data to the receiving memory. For a video frame, if the frame head and the frame tail of the video frame are written into the receiving memory, the normal mark position is set to a first preset value. However, if only the frame head is written and the frame tail is not written, the normal mark position is set to be a second preset value at the moment, which indicates that the video frame data is in frame loss during writing.
In order to further distinguish the writing situations of the above three data frames, a video frame information memory may be used for recording:
and for the video frame to be written in the video data, if the frame head and the frame tail of the video frame to be written in the receiving memory are written in, and the corresponding normal mark zone bit is the first preset value, writing the normal mark zone bit and the frame count in the video frame information memory.
And for the video frame to be written in the video data, if the frame head and the frame tail of the video frame to be written in the receiving memory are written in, and the corresponding normal mark zone bit is the second preset value, writing the normal mark zone bit and the frame count in a video frame information memory.
And if the frame head of the video frame to be written is written into the receiving memory, the frame tail of the video frame to be written is not written into the receiving memory, and the corresponding normal mark zone bit is a second preset value, the video frame to be written is refused to be written into the video frame information memory.
It can be seen that the above three cases correspond to the frame header and the frame end being written into the receiving memory entirely, and the receiving memory not generating the video frame data of the full signal in the writing process, the frame header and the frame end being written into the receiving memory entirely, but the receiving memory generating the video frame data of the full signal in the writing process, and only the frame header or the frame header and part of the frame data being written into the receiving memory. When the reading speed is unstable, the receiving memory can generate full signals, meanwhile, the receiving memory stops writing new data, the unwritten data in the video frame data need to be subjected to frame loss processing, and if the subsequent reading speed is increased, the unwritten data frames of the video frame number are subsequently written. Thus causing both header and trailer data to be written into the receiving memory, but there are essentially mid-portion frame losses. If only the frame header or the frame header and part of the frame data are written into the receiving memory, but the frame tail is not written, the frame is not written into the information memory, and is not written into the external DDR memory, and the corresponding state memory is not required to be set.
On the basis of this, after adding a normal write flag to a corresponding video frame in the video data, address information of a spatial information register of a drive configuration may be received to determine respective storage addresses of the video data in the receiving memory based on the address information. The memory address includes a head address and a space size. It should be noted that the storage address may include a plurality of storage addresses, i.e. support discontinuous memory storage of video data, so that the obtained address information may include a plurality of storage addresses.
Further, on the basis of the above embodiment, after each storage address of the video frame to be written in the memory is determined according to the address information, the video data may be read according to the storage address, and the data may be read according to the normal write flag and the integrity of the frame head and the frame tail.
Specifically, the reading process may include the steps of:
if the normal writing mark corresponding to the video frame to be read is a first preset value, and the frame head and the frame tail are both positioned in the receiving memory, the video frame to be read is written into the state memory.
And if the normal writing mark corresponding to the video frame to be read is a second preset value, and the frame head and the frame tail are both positioned in the receiving memory, refusing to write the video frame to be read into the state memory.
If the normal writing mark corresponding to the video frame to be read is a second preset value and the frame tail is not positioned in the receiving memory, returning to the abnormal mark value.
After the video frame to be read is written into the state memory, the enabling of the state memory can be triggered, and video data can be read according to the state memory. Meanwhile, the storage information of the video data can be cached in the state memory.
Because the embodiment of the application supports discontinuous memory storage, for the operation of continuously writing compressed data into a memory, taking an AXI3 protocol as an example, AXI3 supports Burst transmission for 1-16 times, the Burst length is set to 16 in the application, and a write control module can perform temporary memory caching from read return data of a receiving memory, and start Burst transmission once when the cache is 16, thus ensuring seamless transmission of data in a Burst period, greatly improving the utilization efficiency of a bus, and because even if Burst transmission is started in the prior art, the Burst operation needs to wait for data because the receiving memory is empty, thereby causing great waste of the bus period. It is therefore required that the first data of a frame must be on the first data of one Burst transmission period. And if the video data is written into the receiving memory by Burst transmission, performing zero padding operation on the data of the last transmission period of the current frame according to the set length of the Burst transmission. Namely, the embodiment of the application can apply the zero padding module, and when the situation occurs, the data of the last Burst period of the current frame is padded up to 16.
Referring to fig. 2, fig. 2 is a control block diagram of video data processing logic provided in an embodiment of the present application, and in fig. 2, a logic process of the video data processing method provided in the foregoing embodiment is described in a form of a module and a memory, and specifically includes:
for the writing control module, the module detects the video data transmitted from the front stage, counts the number of frames of the video data, and can modify the data format, add the frame count to the video data and write the frame count into the receiving memory. The data is changed into the format of { frame count, frame data }, then written into the receiving memory, and the writing of the data into the receiving memory is stopped after the full signal of the receiving memory is detected and pulled up.
The detection control module is added, and the functions of the module are as follows:
compressed video data is continuously written into the receiving memory, when the frame head is detected, the Gao Zhengchang mark is pulled, the writing is stopped when the writing signal of the receiving memory is met, and then the normal mark is pulled down.
And finally checking the state of the normal mark when the last data (namely the end of the frame, note that the input of the front-stage module is not the data written into the receiving memory) is detected, and if the normal mark=1, the condition that the full signal does not appear when the current frame is written into the FIFO is indicated, and the frame is a normal complete frame. Set normal flag bit = 1 otherwise set to 0.
If the frame head and the frame tail are written into the receiving memory and the normal flag bit=1, 1 is written into the video frame information memory together with the frame count, and the correspondence is represented as { frame count, 1}.
If the frame head and the frame tail are written into the receiving memory and the normal flag bit=0, 0 is written into the video frame information memory together with the frame count, and the correspondence is represented as { frame count, 0}.
If only the frame header is written into the receiving memory, the frame trailer is not written, and the video frame information memory is not updated at this time. I.e. the data is to be written into the receiving memory at this time, but it is not known at first whether this frame is a valid complete frame or not, so the receiving memory must be written but no corresponding video frame information memory data is written.
If the frame header is not written into the receiving memory, the read-write control module stops writing the remaining data of the current frame until it is detected that the frame header of the next frame is written into the receiving memory.
The write control module receives the values of the spatial information registers of the drive configuration, and the registers keep the first address and the spatial size of the memory address that the output control module can write in, unlike the existing scheme, which requires a continuous complete space for storing compressed data in a memory, the present scheme can realize the segmented storage of the compressed data in the memory, such as the existing scheme requires a continuous space of 10MB, the embodiment of the present application can use the discontinuous spaces of 2MB,3MB,4MB and 1MB to store the compressed data, and can realize the recycling of the memory space that is driven to read away, such as the compressed data stored in the space of 2MB is read away, and then the operating system can continue to allocate the space of 2MB to the output compression control module for use. The advantage of this is that it makes full use of memory space and reduces the impact on the baseboard management control chip operating system and the software running thereon.
The write control module can also read the data of the receiving memory, wherein the data of the receiving memory has three types, namely, the 1 type is complete video data, the 2 type is video data with frame head and frame tail but middle lost number, and the 3 type is video data with frame head and no frame tail. The write control module reads the receiving memory and writes the data into the memory in one pass, when the frame end is read, the video frame information memory is read (because the reading side reads the frame end, the writing side of the receiving memory certainly completes the writing),
if the return value of the video frame information memory is 1, it indicates that the current frame is a type 1 complete frame, at which time the information for that frame (the starting address stored in memory and the frame length) is written into the state memory.
If the return value of the video frame information memory is 0, it indicates that the current frame is a class 2 frame, i.e., the number of dropped frames between the frame header and the frame trailer, and such frame information will not be written into the state memory, nor will the drive read the corresponding memory.
For class 3 (only the frame header has no frame end), because such frame information is not written into the video frame information memory, when the frame header is detected at this time, the frame count field of the return value of the video frame information memory is read out, and the frame count field of the receiving memory is not corresponding, so that it can be judged that the frame is class 3 frame. For such frame data, RD_CTRL is not written to memory, and the state memory is not updated even more. It should be noted that, at this time, the return value of the video frame information memory is temporarily stored in a register for the judgment of the next frame.
In this embodiment, the starting address, length, etc. of the compressed data in the memory are cached by the state memory. When the driver really reads the compressed data, the related register is set first, then the read enabling of the state memory is triggered, and the corresponding information is read. Therefore, the condition that compressed data information is covered in the existing scheme is avoided, the frame loss rate is greatly reduced, and the memory space is fully utilized.
The embodiment optimizes the compressed video storage control flow and the interaction flow with the driver in the existing scheme, realizes discontinuous address storage of compressed video data, and seamless transmission of data in a Burst period, greatly reduces the frame loss rate of the compressed video, and reduces the occupation of on-chip resources.
The following describes a video data processing system according to an embodiment of the present application, and the video data processing system described below and the video data processing method described above may be referred to correspondingly.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a video data processing system according to an embodiment of the present application, where the system includes:
the video data acquisition module is used for acquiring video data and calculating the frame number of the video data;
The ordering module is used for ordering the video data frame by frame according to the frame number and writing the video data into the receiving memory;
the first marking module is used for marking a normal writing mark as a first set value if the receiving memory does not have a full signal when video data is written;
the second marking module is used for marking the normal writing mark as a second set value if the receiving memory has a full signal when the video data is written;
an adding module, configured to establish a mapping relationship between the normal write mark and the frame number; the normal write flag is used to indicate the integrity of the video data in the receiving memory.
Based on the above embodiments, as a preferred embodiment, the sorting module includes:
and the first writing unit is used for writing the frame count and the corresponding frame data into the receiving memory frame by frame for the mapping group.
Based on the above embodiment, as a preferred embodiment, further comprising:
the detection module is used for detecting whether the receiving memory is full or not when the video data is written into the receiving memory;
and the generating module is used for receiving the full memory and generating the full signal.
Based on the above embodiment, as a preferred embodiment, further comprising:
Pull Gao Mokuai, which is used to pull up the normal mark when the frame header is detected;
and the pull-down module is used for pulling down the normal mark and stopping writing the video data into the receiving memory if the full write signal of the receiving memory is detected.
Based on the above embodiment, as a preferred embodiment, further comprising:
the third marking module is used for writing the frame head and the frame tail of the target data frame in the video data into the receiving memory and setting the normal marking mark position as a first preset value;
and the fourth marking module is used for writing the frame head of the target data frame into the receiving memory, and if the frame tail is not written into the receiving memory, setting the normal marking mark position as a second preset value.
Based on the above embodiment, as a preferred embodiment, further comprising:
and the first writing module is used for writing the normal mark bit and the frame count into the video frame information memory if the frame head and the frame tail of the video frame to be written are written into the receiving memory and the corresponding normal mark bit is the first preset value for the video frame to be written into in the video data.
Based on the above embodiment, as a preferred embodiment, further comprising:
And the second writing module is used for writing the normal mark bit and the frame count into the video frame information memory if the frame head and the frame tail of the video frame to be written are both written into the receiving memory and the corresponding normal mark bit is the second preset value for the video frame to be written into in the video data.
Based on the above embodiment, as a preferred embodiment, further comprising:
and the refusing writing module is used for writing the video frame to be written in the video data into the receiving memory if the frame head of the video frame to be written is written into the receiving memory, the frame tail of the video frame to be written is not written into the receiving memory, and the corresponding normal mark zone bit is a second preset value, so that the video frame to be written into is refused to be written into the video frame information memory.
Based on the above embodiment, as a preferred embodiment, further comprising:
the receiving module is used for receiving the address information of the space information register of the drive configuration;
a determining module, configured to determine each storage address of the video data in the receiving memory according to the address information; the memory address includes a head address and a space size.
Based on the above embodiment, as a preferred embodiment, further comprising:
And the reading module is used for reading the video data according to the storage address and reading the data according to the normal writing mark and the integrity of the frame head and the frame tail.
Based on the above embodiments, as a preferred embodiment, the reading module includes:
and the second writing unit is used for writing the video frame to be read into the state memory if the normal writing mark corresponding to the video frame to be read is a first preset value and the frame head and the frame tail are both positioned in the receiving memory.
Based on the above embodiments, as a preferred embodiment, the reading module includes:
and the refusing writing module is used for refusing to write the video frame to be read into the state memory if the normal writing mark corresponding to the video frame to be read is a second preset value and the frame head and the frame tail are both positioned in the receiving memory.
Based on the above embodiments, as a preferred embodiment, the reading module includes:
and the return module is used for returning an abnormal marking value if the normal writing marking corresponding to the video frame to be read is a second preset value and the frame tail is not positioned in the receiving memory.
Based on the above embodiment, as a preferred embodiment, further comprising:
and the reading unit is used for triggering the enabling of the state memory and reading the video data according to the state memory.
Based on the above embodiment, as a preferred embodiment, further comprising:
and the caching unit is used for caching the storage information of the video data in the state memory.
Based on the above embodiments, as a preferred embodiment, if burst transmission is used to write the video data into the receiving memory, the method further includes:
and the zero padding module is used for executing zero padding operation on the data of the last transmission period of the current frame according to the set length of the burst transmission.
Based on the above embodiment, as a preferred embodiment, further comprising:
and the transmission module is used for performing burst transmission on the video data meeting the set length and writing the video data into the receiving memory.
The present application also provides a computer-readable storage medium having stored thereon a computer program which, when executed, performs the steps provided by the above-described embodiments. The storage medium may include: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The application also provides an electronic device, which can comprise a memory and a processor, wherein the memory stores a computer program, and the processor can realize the steps provided by the embodiment when calling the computer program in the memory. Of course the electronic device may also include various network interfaces, power supplies, etc.
In the description, each embodiment is described in a progressive manner, and each embodiment is mainly described by the differences from other embodiments, so that the same similar parts among the embodiments are mutually referred. The system provided by the embodiment is relatively simple to describe as it corresponds to the method provided by the embodiment, and the relevant points are referred to in the description of the method section.
The principles and embodiments of the present application have been described herein with reference to specific examples, the description of which is intended only to facilitate an understanding of the method of the present application and its core ideas. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the application can be made without departing from the principles of the application and these modifications and adaptations are intended to be within the scope of the application as defined in the following claims.
It should also be noted that in this specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Claims (20)
1. A method of video data processing, comprising:
acquiring video data and calculating the frame number of the video data;
the video data are written into a receiving memory after being sequenced frame by frame according to the frame number;
if the receiving memory does not have a full signal during video data writing, marking a normal writing mark as a first set value;
if the receiving memory has a full signal during video data writing, marking the normal writing mark as a second set value;
establishing a mapping relation between the normal writing mark and the corresponding frame number; the normal write flag is used to indicate the integrity of the video data in the receiving memory.
2. The video data processing method according to claim 1, wherein the writing of the video data into the receiving memory after the frame-by-frame ordering of the video data according to the number of frames comprises:
writing the frame count and the corresponding frame data into a receiving memory frame by frame as a mapping group; wherein the frame count is the number of frames corresponding to the current frame data.
3. The video data processing method according to claim 2, characterized by further comprising:
detecting whether the receiving memory is full or not when the video data is written into the receiving memory;
If yes, generating the full writing signal.
4. A video data processing method according to claim 3, wherein when the video data is written into the receiving memory after being ordered frame by frame in accordance with the number of frames, further comprising:
when the frame head is detected, the normal mark is pulled up;
and if the full signal of the receiving memory is detected, the normal mark is pulled down, and the video data is stopped from being written into the receiving memory.
5. The video data processing method of claim 4, further comprising, after pulling up the normal flag:
if the frame head and the frame tail of the target data frame in the video data are written into the receiving memory, the normal mark position is a first preset value;
and if the frame head of the target data frame is written into the receiving memory, and the frame tail is not written into the receiving memory, the normal mark position is a second preset value.
6. The video data processing method according to claim 5, further comprising:
and for the video frame to be written in the video data, if the frame head and the frame tail of the video frame to be written in the receiving memory are written in, and the corresponding normal mark zone bit is the first preset value, writing the normal mark zone bit and the frame count in a video frame information memory.
7. The video data processing method according to claim 5, further comprising:
and for the video frame to be written in the video data, if the frame head and the frame tail of the video frame to be written in the receiving memory are written in, and the corresponding normal mark zone bit is the second preset value, writing the normal mark zone bit and the frame count in a video frame information memory.
8. The video data processing method according to claim 5, further comprising:
and if the frame head of the video frame to be written is written into the receiving memory, the frame tail of the video frame to be written is not written into the receiving memory, and the corresponding normal mark zone bit is a second preset value, the video frame to be written is refused to be written into the video frame information memory.
9. The video data processing method according to claim 1, further comprising, after establishing a mapping relationship between the normal write flag and the corresponding frame number:
receiving address information of a space information register of a drive configuration;
determining each storage address of the video data in the receiving memory according to the address information; the memory address includes a head address and a space size.
10. The method according to claim 9, further comprising, after determining each storage address of the video frame to be written in the memory according to the address information:
and reading the video data according to the storage address, and reading the data according to the normal writing mark and the integrity of the frame head and the frame tail.
11. The video data processing method of claim 10, wherein reading data based on the normal write flag and the integrity of the head and tail of the frame comprises:
if the normal writing mark corresponding to the video frame to be read is a first preset value, and the frame head and the frame tail are both positioned in the receiving memory, the video frame to be read is written into the state memory.
12. The video data processing method of claim 10, wherein reading data based on the normal write flag and the integrity of the head and tail of the frame comprises:
and if the normal writing mark corresponding to the video frame to be read is a second preset value, and the frame head and the frame tail are both positioned in the receiving memory, refusing to write the video frame to be read into the state memory.
13. The video data processing method of claim 10, wherein reading data based on the normal write flag and the integrity of the head and tail of the frame comprises:
If the normal writing mark corresponding to the video frame to be read is a second preset value and the frame tail is not positioned in the receiving memory, returning to the abnormal mark value.
14. The video data processing method according to claim 11, characterized by further comprising, after writing the video frame to be read into a state memory:
triggering the enabling of the state memory, and reading video data according to the state memory.
15. The video data processing method according to claim 11, characterized by further comprising:
and caching the storage information of the video data in the state memory.
16. The video data processing method according to claim 1, wherein if burst transfer is employed to write the video data to the receiving memory, further comprising:
and executing zero padding operation on the data of the last transmission period of the current frame according to the set length of the burst transmission.
17. The video data processing method of claim 16, further comprising, after performing a zero padding operation on the data of the last transmission period of the current frame:
burst transmission is performed on video data satisfying the set length, and written into a reception memory.
18. A video data processing system, comprising:
the video data acquisition module is used for acquiring video data and calculating the frame number of the video data;
the ordering module is used for ordering the video data frame by frame according to the frame number and writing the video data into the receiving memory;
a first marking module for marking the normal writing mark as a first set value if the receiving memory has no full signal during writing video data
The second marking module is used for marking the normal writing mark as a second set value if the receiving memory has a full signal when the video data is written;
an adding module, configured to establish a mapping relationship between the normal write mark and the frame number; the normal write flag is used to indicate the integrity of the video data in the receiving memory.
19. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the video data processing method according to any one of claims 1-17.
20. An electronic device comprising a memory and a processor, the memory having a computer program stored therein, the processor implementing the steps of the video data processing method of any of claims 1-17 when the computer program in the memory is invoked by the processor.
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