CN116667848A - Resistance-capacitance hybrid digital-to-analog converter, analog-to-digital converter, chip and electronic device - Google Patents

Resistance-capacitance hybrid digital-to-analog converter, analog-to-digital converter, chip and electronic device Download PDF

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Publication number
CN116667848A
CN116667848A CN202310463062.5A CN202310463062A CN116667848A CN 116667848 A CN116667848 A CN 116667848A CN 202310463062 A CN202310463062 A CN 202310463062A CN 116667848 A CN116667848 A CN 116667848A
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China
Prior art keywords
reference voltage
selection switch
analog converter
array
voltage signal
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Inventor
郝维政
刘维辉
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Chipsea Technologies Shenzhen Co Ltd
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Chipsea Technologies Shenzhen Co Ltd
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Priority to CN202310463062.5A priority Critical patent/CN116667848A/en
Publication of CN116667848A publication Critical patent/CN116667848A/en
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0602—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
    • H03M1/0604—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic at one point, i.e. by adjusting a single reference value, e.g. bias or gain error
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters

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  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

The application provides a resistance-capacitance hybrid digital-to-analog converter, an analog-to-digital converter, a chip and electronic equipment, wherein the resistance-capacitance hybrid digital-to-analog converter comprises: a resistor array; a capacitor array; the first connection unit is used for receiving at least one reference voltage signal and outputting one of the reference voltage signals to the resistor array; and the second connection unit is used for receiving at least one reference voltage signal and outputting one of the reference voltage signals to the capacitor array. The application solves the problem of different reference voltages of the resistor array and the capacitor array caused by voltage drop, improves the precision of the resistance-capacitance hybrid digital-to-analog converter and reduces the gain error of the resistance-capacitance hybrid digital-to-analog converter.

Description

Resistance-capacitance hybrid digital-to-analog converter, analog-to-digital converter, chip and electronic device
Technical Field
The application relates to the technical field of integrated circuits, in particular to a resistance-capacitance hybrid digital-to-analog converter, an analog-to-digital converter, a chip and electronic equipment.
Background
The reference voltage is an important parameter affecting the gain error and the accuracy of the resistance-capacitance hybrid digital-to-analog converter, and the voltage drop exists in the connecting line between the resistance-capacitance hybrid digital-to-analog converter and the reference voltage source, so that the reference voltage actually received by the capacitor array and the reference voltage actually received by the resistor array are inaccurate.
Disclosure of Invention
In view of the above, embodiments of the present application provide a resistive-capacitive hybrid digital-to-analog converter, an analog-to-digital converter, a chip, and an electronic device to solve the above technical problems.
In a first aspect, an embodiment of the present application provides a circuit for reducing gain error of a rc hybrid DAC, including:
a resistor array;
a capacitor array;
the first connection unit is used for receiving at least one reference voltage signal and outputting one of the reference voltage signals to the resistor array;
and the second connection unit is used for receiving at least one reference voltage signal and outputting one of the reference voltage signals to the capacitor array.
In a second aspect, an embodiment of the present application further provides an analog-to-digital converter, including a resistive-capacitive hybrid digital-to-analog converter as described above; the method comprises the steps of,
and the input end of the comparator is connected with the output end of the resistance-capacitance hybrid digital-analog converter.
In a third aspect, an embodiment of the present application further provides a chip, including a rc hybrid digital-to-analog converter as described above, or including an analog-to-digital converter as described above.
In a fourth aspect, an embodiment of the present application further provides an electronic device, including an apparatus main body and a chip provided in the apparatus main body and described above.
According to the resistance-capacitance hybrid digital-to-analog converter provided by the embodiment of the application, when the resistance-capacitance hybrid digital-to-analog converter receives at least one reference voltage signal, the first connection unit is arranged to control the reference voltage received by the resistor array, and the second connection unit is arranged to control the reference voltage received by the capacitor array, so that the technical problem that the resistor array reference voltage and the capacitor array reference voltage are different due to voltage drop of the resistance-capacitance hybrid digital-to-analog converter is solved, the precision of the reference voltage of the resistance-capacitance hybrid digital-to-analog converter is improved, and the gain error of the resistance-capacitance hybrid digital-to-analog converter is reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic block diagram of a rc-type digital-to-analog converter according to an embodiment of the present application.
Fig. 2 shows a block diagram of a rc hybrid digital-to-analog converter according to an embodiment of the present application.
Fig. 3 shows another structure diagram of a rc hybrid digital-to-analog converter according to an embodiment of the present application.
Fig. 4 shows a further structure diagram of a resistive-capacitive hybrid digital-to-analog converter according to an embodiment of the present application.
Fig. 5 shows a further structure diagram of a resistive-capacitive hybrid digital-to-analog converter according to an embodiment of the present application.
Fig. 6 shows a further block diagram of a rc hybrid digital-to-analog converter according to an embodiment of the present application.
Fig. 7 shows a further structure diagram of a rc hybrid digital-to-analog converter according to an embodiment of the present application.
Fig. 8 shows a further structure diagram of a resistive-capacitive hybrid digital-to-analog converter according to an embodiment of the present application.
Fig. 9 shows a further structure diagram of a resistive-capacitive hybrid digital-to-analog converter according to an embodiment of the present application.
Fig. 10 shows still another structure of a rc hybrid digital-to-analog converter according to an embodiment of the present application.
Fig. 11 shows still another structure of a rc hybrid digital-to-analog converter according to an embodiment of the present application.
Fig. 12 is a schematic block diagram of an analog-to-digital converter according to an embodiment of the present application.
Detailed Description
In order to enable those skilled in the art to better understand the technical solution of the present application, the following description will make clear and complete descriptions of the technical solution of the present application in the embodiments of the present application with reference to the accompanying drawings. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
In the present embodiment, it should be noted that, in this document, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
It should be noted that, in the embodiment of the present application, "and/or" describe the association relationship of the association object, which means that three relationships may exist, for example, a and/or B may be represented: a exists alone, A and B exist together, and B exists alone. The character "/", unless otherwise specified, generally indicates that the associated object is an "or" relationship.
It should be noted that, in the embodiments of the present application, "a plurality" and "a plurality" refer to two or more, and in the embodiments of the present application, "connection" is understood as electrical connection, where two electrical components may be directly or indirectly connected between two electrical components. For example, a may be directly connected to B, or indirectly connected to B via one or more other electrical components.
The rc hybrid digital-to-analog converter generally includes a capacitor array and a resistor array that are respectively connected to a reference voltage source to receive a reference voltage. In a conventional rc hybrid digital-to-analog converter, a capacitor array and a resistor array are connected to a reference voltage source through the same path, and when the reference voltage source is turned on due to a certain resistor existing in the path, a voltage drop is generated when a current from the reference voltage source to the ground passes through the path through the resistor array, so that the reference voltage actually received by the capacitor array and the resistor array is reduced.
On the one hand, when the rc-type dac uses only one reference voltage signal, the path is a trace connecting the rc-type dac and the reference voltage source, and if a conventional structure is used, a certain voltage drop occurs in the reference voltage signal when a current passes through the trace resistor, so that the reference voltage actually received by the capacitor array is lower than the reference voltage generated by the reference voltage source.
On the other hand, when the rc hybrid digital-to-analog converter needs to use a plurality of reference voltage signals, the path includes a trace and a switch for switching different reference voltage signals, and the on-resistance of the path is larger. If the conventional structure is used, after the circuit is conducted, the conduction resistance of the current and the path can cause a larger voltage drop of the reference voltage, so that the reference voltage actually received by the capacitor array is lower than the reference voltage generated by the reference voltage source.
In order to solve the technical problems, the inventor provides the resistance-capacitance hybrid digital-to-analog converter in the embodiment of the application through long-term research, and the capacitor array and the resistor array in the resistance-capacitance hybrid digital-to-analog converter are respectively connected to a reference voltage source through different paths so as to avoid the influence of voltage drop on the resistor array path on the reference voltage of the capacitor array, thereby improving the conversion precision.
Fig. 1 is a schematic block diagram of a rc-to-rc digital-to-analog converter according to an embodiment of the present application, and as shown in fig. 1, the rc-to-capacitive digital-to-analog converter according to an embodiment of the present application includes a first connection unit 11, a second connection unit 12, a resistor array 21, and a capacitor array 22.
The first connection unit 11 is used for receiving at least one reference voltage signal V ref (V ref1 —V refn N is greater than or equal to 1), and outputs one of the reference voltage signals to the resistor array 21; the second connection unit 12 is used for connectingReceiving at least one reference voltage signal (V ref1 —V refn N.gtoreq.1) and outputs one of the reference voltage signals to the capacitor array 22.
The reference voltage signal is generated by a reference voltage source, and one reference voltage source can generate one or more different reference voltage signals.
The embodiment of the application sets the first connection unit 11 to receive at least one reference voltage signal and output one of the reference voltage signals to the resistor array 21, sets the second connection unit 12 to receive at least one reference voltage signal and output one of the reference voltage signals to the capacitor array 22, so that the reference voltage signal received by the resistor array 21 and the reference voltage signal received by the capacitor array 22 are not interfered with each other in the circuit transmission process, namely, the voltage drop of the first connection unit 11 caused by the path of the resistor array 21 cannot affect the capacitor array 22, so that the reference voltage signal received by the capacitor array 22 always comes from the reference voltage signal selected by the second connection unit 12, thereby avoiding the influence of the voltage drop on the path of the resistor array on the reference voltage of the capacitor array and improving the precision of the reference voltage of the resistance-capacitance hybrid digital-analog converter.
In some embodiments, when the reference voltage signal received by the resistor array 21 and the reference voltage signal received by the capacitor array 22 are the same reference voltage signal, that is, the reference voltage signal selected by any one of the first connection unit 11 and the second connection unit 12 is determined, the reference voltage signal selected by the other connection unit is also determined; for example, when one reference voltage source can provide a plurality of reference voltages, one end of the first connection unit 11 and one end of the second connection unit 12 may be connected to the same output port of the reference voltage source to receive the same reference voltage. As another example, when different reference voltages are provided by different reference voltage sources, one end of the first connection unit 11 and one end of the second connection unit 12 may be connected to the same reference voltage source to receive the same reference voltage. Since the reference voltage signal of the resistor array 21 is derived from the reference voltage signal selected by the first connection unit 11, the reference voltage signal of the capacitor array 22 is derived from the reference voltage signal selected by the second connection unit 12, that is, the voltage drop caused by the first connection unit 11 cannot affect the capacitor array 22, which solves the technical problem that the reference voltage of the capacitor array is lower than the reference voltage of the resistor array due to the voltage drop in the prior art.
In some embodiments, as shown in fig. 2, fig. 2 shows a structure diagram of a rc hybrid digital-to-analog converter provided by an embodiment of the present application, and the first connection unit 11 includes: a first selection switch 31, a first end of the first selection switch 31 is connected to the resistor array 21, and a second end of the first selection switch 31 is connected to a reference voltage source for receiving a reference voltage signal (V ref1 —V refn ) The first selection switch 31 is used to select one of the reference voltage signals to be output to the resistor array 21.
In some embodiments, as shown in fig. 2, the second connection unit 12 includes: a second selector switch 32, a first end of the second selector switch 32 being connected to the capacitor array 22, a second end of the second selector switch 32 being for connection to a reference voltage source for receiving a reference voltage signal (V ref1 —V refn ) The second selection switch 32 is used for selecting one of the reference voltage signals to be output to the capacitor array 22.
As shown in fig. 2, a first end of the first selection switch 31 is connected to the resistor array 21, a second end of the first selection switch 31 includes n ports A1-An, and the second ends A1-An are connected to a reference voltage source to respectively receive the reference voltage signals V ref1 —V refn The first end of the second selection switch 32 is connected to the capacitor array 22, the second end of the second selection switch 32 includes n ports B1-Bn, and the second ends B1-Bn are connected to a reference voltage source for receiving reference voltage signals V respectively ref1 —V refn A second end of the first selector switch 31 andthe second terminal of the second selection switch 32 may be connected to different ports of one reference voltage source for receiving a plurality of different reference voltage signals, and may also be connected to different reference voltage sources, one reference voltage signal being provided by one reference voltage source. Taking a resistance-capacitance hybrid digital-to-analog converter for digital-to-analog conversion as an example, the reference voltages selected by the first selection switch 31 and the second selection switch 32 are V ref1 At this time, the A1 terminal of the first selection switch 31 is turned on to enable the resistor array 21 to receive the reference voltage V ref1 The B1 terminal of the second selection switch is conducted to enable the capacitor array 22 to receive the reference voltage V ref1 The reference voltage of the resistance-capacitance hybrid digital-to-analog converter to be replaced at a certain moment is V ref2 When the first selection switch 31 controls the end A1 to be turned off and the end A2 to be turned on to switch the reference voltage output to the resistor array 21 to V ref2 Similarly, the second selector switch 32 controls the end B1 to be turned off and the end B2 to be turned on to switch the reference voltage output to the capacitor array 22 to V ref2 . So that the selection and switching of the reference voltage among the plurality of reference voltages can be performed through the first and second selection switches 31 and 32.
In the embodiment of the present application, as shown in fig. 2, the first selection switch 31 is configured to receive a plurality of reference voltage signals and select one of the reference voltage signals for the resistor array 21, the second selection switch 32 is configured to receive a plurality of reference voltage signals and select one of the reference voltage signals for the capacitor array 22, so that the reference voltage signals received by the resistor array 21 and the reference voltage signals received by the capacitor array 22 do not interfere with each other, that is, the voltage drop of the corresponding path of the resistor array 21 does not affect the capacitor array 22, so that the technical problem that the reference voltage of the resistor array is different from the reference voltage of the capacitor array due to the voltage drop in the prior art is solved by setting the positions of the first selection switch 31 and the second selection switch 32 in the circuit, the precision of the reference voltage of the resistor-capacitor hybrid digital-analog converter is improved, the resistance value of the selection switch is small, and the setting of the selection switch can further reduce the influence of the resistances of the first connection unit and the second connection unit on the reference voltage.
It should be clear that, in the embodiment of the present application, the primary purpose of the first selection switch 31 and the second selection switch 32 is to select one reference voltage signal to be input to the resistor array and the capacitor array, so that the first selection switch 31 and the second selection switch 32 may be replaced by other electronic components in the circuit design that can achieve the technical effect.
In some implementations, as shown in fig. 3, fig. 3 shows another structure diagram of a rc hybrid digital-to-analog converter provided by an embodiment of the present application, the first selection switch 31 includes a plurality of first selection switch units 310 connected in parallel, and the first connection unit 11 is further configured to control a corresponding number of first selection switch units 310 to be closed according to a selected reference voltage signal. A first terminal of each first selection switch unit 310 is connected to the resistor array 21, and a second terminal of each first selection switch unit 310 is connected to a reference voltage source for receiving the reference voltage signal (V ref1 —V refn ). In this embodiment, according to different reference voltage signals, different numbers of the first selection switch units 310 may be closed, so that the on-resistance of the first selection switch 310 is matched with the reference voltage, and the conversion accuracy is further improved. The second connection unit 12 comprises a second selection switch 32, a first end of the second selection switch 32 is connected to the capacitor array 22, and a second end of the second selection switch 32 is connected to a reference voltage source for receiving a reference voltage signal (V ref1 —V refn )。
Alternatively, the larger the reference voltage signal selected by the first connection unit 11, the smaller the number of first selection switch units 310 closed when the reference voltage signal is selected, as shown in fig. 3, to reference the voltage signal V ref1 Greater than reference voltage signal V ref2 For example, the reference voltage signal selected by the first connection unit 11 is the reference voltage signal V ref1 The number of the first selection switch units 310 is A when the first connection unit 11 switches the selected reference voltage signal from V ref1 Is switched to a reference voltage signal V ref2 The first selector switch unit 310 is also correspondingly closed by B. It should be clear that the total number of the first selection switch units 310 is not fixed, so that the first connection unit 11 selects one reference voltage signal to correspond toThe specific number of first selection switch units 310 to be closed is also not fixed; the means for determining the number of the first selection switch units 310 corresponding to different reference voltage signals is not fixed, for example, when the total number of the first selection switch units 310 is designed, the total number of the first selection switch units 310 and the size of the reference voltage signals can be determined together, and the experiment design can be performed according to the total number of the first selection switch units 310 and the size of the reference voltage signals, and the experiment result can be determined according to the experiment design.
In some implementations, as shown in fig. 4, fig. 4 shows a further structure diagram of a rc hybrid digital-to-analog converter provided by an embodiment of the present application, the second selection switch 32 includes a plurality of second selection switch units 320 connected in parallel, and the second connection unit 12 is further configured to control the first selection switch units 320 to be closed according to a selected reference voltage signal. A first terminal of each second selection switch unit 320 is connected to the capacitor array 22, and a second terminal of each second selection switch unit 320 is connected to a reference voltage source for receiving the reference voltage signal (V ref1 —V refn ) According to the embodiment, different numbers of the second selection switch units 320 can be closed according to different reference voltage signals, so that the on-resistance of the second selection switch 320 is matched with the reference voltage, and the conversion accuracy is further improved. The first connection unit 11 comprises a first selection switch 31, a first end of the first selection switch 31 is connected to the resistor array 21, and a second end of the first selection switch 31 is connected to a reference voltage source for receiving a reference voltage signal (V ref1 —V refn )。
Alternatively, the larger the reference voltage signal selected by the second connection unit 12, the fewer the number of second selection switch units 320 that are closed when the reference voltage signal is selected, as shown in fig. 4, and taking the reference voltage signal Vref3 being larger than the reference voltage signal Vref4 as an example, the number of second selection switch units 320 that are closed is the number C when the reference voltage signal selected by the second connection unit 12 is the reference voltage signal Vref3, and the number D of second selection switch units 320 that are closed is also the corresponding number D when the second connection unit 12 switches the selected reference voltage signal from Vref3 to the reference voltage signal Vref 4. It should be clear that the total number of the second selection switch units 320 is not fixed, so that the specific number of the second selection switch units 320 to be closed corresponding to one reference voltage signal selected by the second connection unit 12 is not fixed; the means for determining the number of the second selection switch units 320 corresponding to different reference voltage signals is not fixed, for example, when the total number of the second selection switch units 320 is designed, the total number of the second selection switch units 320 and the size of the reference voltage signals can be determined together, and the experiment design can be performed according to the total number of the second selection switch units 320 and the size of the reference voltage signals, and the experiment result can be determined according to the experiment design.
As shown in the embodiments of fig. 3 and fig. 4, according to different reference voltage signals, different numbers of the first selection switch units 310 or the second selection switch units 320 can be closed, so that the on-resistance of the first selection switch units 310 or the second selection switch units 320 is matched with the reference voltage, and the conversion accuracy is further improved.
In some implementations, as shown in fig. 5, fig. 5 shows a further structure diagram of a rc hybrid digital-to-analog converter provided by an embodiment of the present application, the first selection switch 31 includes a plurality of first selection switch units 310 connected in parallel, and the first connection unit 11 is further configured to control a corresponding number of first selection switch units 310 to be closed according to a selected reference voltage signal. The second selection switch 32 includes a plurality of second selection switch units 320 connected in parallel, and the second connection unit 12 is further configured to control a corresponding number of first selection switch units 320 to be closed according to the selected reference voltage signal. In this embodiment, according to different reference voltage signals, different numbers of the first selection switches 310 and the second selection switch units 320 may be closed, so that the on-resistance of the first selection switch 310 is matched with the reference voltage signal, and the on-resistance of the second selection switch 320 is matched with the reference voltage signal, thereby further improving the conversion accuracy.
Optionally, as shown in fig. 5, the number of to be closed of the first selection switch unit 310 and/or the second selection switch 320 is determined according to the amplitude of the reference voltage signal selected by the first connection unit 11 and/or the second connection unit 12, in order to ensure the reference voltage of the resistor array 21 and/or the capacitor array 22 to the greatest extent, when the amplitude of the selected reference voltage signal is larger, the number of to be closed of the first selection switch unit 310 and/or the second selection switch 320 is smaller, and when the amplitude of the selected reference voltage signal is smaller, the number of to be closed of the first selection switch unit 310 and/or the second selection switch 320 is larger, and in the circuit design, the number of to be closed of the first selection switch unit 310 and/or the second selection switch 320 corresponding to different reference voltage signals can also be set according to the above principle.
In the embodiment of the present application, as shown in fig. 3-5, the reference voltage signal (V) is received by the first selection switch unit 310 ref1 —V refn ) When one of the reference voltage signals is selected and output to the resistor array, the first selector switch unit 310 is not necessarily closed completely, the number of the closed first selector switch units 310 is determined according to the magnitude of the selected reference voltage signal, dynamic matching between the resistor array 21 and the first selector switch unit 310 under different reference voltages is realized, and similarly, the second selector switch unit 320 receives the reference voltage signal (V ref1 —V refn ) When one of the reference voltage signals is selected and output to the capacitor array, the second selection switch units 320 are not necessarily all closed, the number of the closed second selection switch units 320 is also determined according to the magnitude of the selected reference voltage signal, so that dynamic matching between the capacitor array 22 and the second selection switch units 320 under different reference voltages is realized, and the consistency of gain errors of the resistance-capacitance hybrid digital-analog converter under different reference voltages is further ensured.
In some embodiments, as shown in fig. 6, fig. 6 shows a further structure diagram of a rc-type dac provided in an embodiment of the application, the first connection unit 11 includes N first selection switches 31, the number of the first selection switches 31 is the same as the number of branches of the resistor array 21, a first end of each first selection switch 31 is respectively connected to one branch of the resistor array 21, and a second end of each first selection switch 31 is used for receiving at least one reference voltage signal (V ref1 —V refn ) Each first selection switch 31 selects one of the reference voltage signals to be output to the corresponding branch of the resistor array 21. The embodiment isThe number of the first selection switches 31 is the same as the number of branches of the resistor array 21, so that individual control of each branch of the resistor array is realized.
In this embodiment, optionally, each first selection switch 31 may include one first selection switch unit 310, or may include a plurality of first selection switch units 310, and when including a plurality of first selection switch units 310, the specific implementation manner of the first selection switch unit may refer to the related description of the embodiment shown in fig. 3, which is not repeated herein.
In the present embodiment, the number of the second selection switches 32 in the second connection unit 12 may be one or more, alternatively. Taking the example that the second connection unit 12 comprises a second selection switch 32, a first end of the second selection switch 32 is connected to the capacitor array 22, and a second end of the second selection switch 32 is connected to a reference voltage source for receiving a reference voltage signal (V ref1 —V refn ) The second selection switch 32 selects one of the reference voltage signals to output to the capacitor array 22.
In some embodiments, as shown in fig. 7, fig. 7 shows another structure diagram of a rc hybrid digital-to-analog converter provided by an embodiment of the present application, where the first connection unit 11 includes N first selection switches 31, and each first selection switch 31 is correspondingly connected to one resistor branch. The second selection switch 32 includes a plurality of second selection switch units 320 connected in parallel, each second selection switch unit 320 is connected to the same node of the capacitor array, and the second connection unit 12 is further configured to control the corresponding number of second selection switch units 320 to be closed according to the selected reference voltage signal, in this embodiment, the first selection switch 31 is connected to the branches of the resistor array 21 in a one-to-one correspondence manner, and the second connection unit 12 closes the corresponding number of second selection switch units according to the selected reference voltage signal, so that not only is independent control of each branch of the resistor array realized, but also dynamic matching of the capacitor array 22 and the second selection switch units 320 is realized.
In some embodiments, as shown in fig. 6-7, each first selection switch 31 selects the same reference voltage signal at the same stage of the digital-to-analog conversion cycle to ensure that each resistor branch in the resistor array can obtain the same reference voltage.
In some embodiments, as shown in fig. 8, fig. 8 shows a further structure diagram of a rc-dac provided in the embodiment of the application, the second connection unit 12 includes M second selection switches 32, the number of the second selection switches 32 is the same as the number of branches of the capacitor array 22, a first end of each second selection switch 32 is respectively connected to one branch of the capacitor array 22, and a second end of each second selection switch 32 is used for receiving at least one reference voltage signal (V ref1 —V refn ) Each of the second selection switches 32 selects one of the reference voltage signals to be output to a corresponding branch of the capacitor array 22. In this embodiment, the number of the second selection switches 32 is the same as the number of branches of the capacitor array 22, so that each branch of the capacitor array is controlled independently.
In this embodiment, optionally, each second selection switch 32 may include one second selection switch unit 320, or may include a plurality of second selection switch units 320, and when a plurality of second selection switch units 320 are included, the specific implementation manner of the second selection switch unit may refer to the related description of the embodiment shown in fig. 4, which is not repeated herein.
In the present embodiment, alternatively, the number of the first selection switches 31 in the first connection unit 11 may be one or more. Taking the first connection unit 11 as an example, the first connection unit 11 includes a first selection switch 31, a first end of the first selection switch 31 is connected to the resistor array 21, and a second end of the first selection switch 31 is connected to a reference voltage source for receiving a reference voltage signal (V ref1 —V refn ) The first selection switch 31 selects one of the reference voltage signals to output to the resistor array 21.
In some embodiments, as shown in fig. 9, fig. 9 shows a further structure diagram of a rc hybrid digital-to-analog converter according to an embodiment of the present application, where the second connection unit 12 includes M second selection switches 32, and each second selection switch 32 is correspondingly connected to one capacitive branch. The first selection switch 31 includes a plurality of first selection switch units 310 connected in parallel, each first selection switch 310 is connected to the same node of the capacitor array, and the first connection unit 11 is further configured to control the second selection switch units 310 to be closed according to the selected reference voltage signal. In this embodiment, the second selection switches 32 are connected to the branches of the capacitor array 22 in a one-to-one correspondence manner, and the first connection unit 11 closes a corresponding number of second selection switch units according to the selected reference voltage signal, so that not only is the individual control of each branch of the capacitor array realized, but also the dynamic matching of the resistor array 21 and the first selection switch unit 310 is realized.
In some embodiments, as shown in fig. 8-9, each second selection switch 32 selects the same reference voltage signal at the same stage of the digital-to-analog conversion cycle to ensure that each capacitive branch in the capacitive array is able to obtain the same reference voltage.
In some embodiments, as shown in fig. 10, fig. 10 shows a further structure diagram of a rc-type digital-to-analog converter according to an embodiment of the present application, where the first connection unit 11 includes N first selection switches 31, the number of the first selection switches 31 is the same as the number of branches of the resistor array 21, a first end of each first selection switch 31 is respectively connected to one branch of the resistor array 21, and a second end of each first selection switch 31 is used for receiving at least one reference voltage signal (V ref1 —V refn ) Each first selection switch 31 selects one of the reference voltage signals to be output to the corresponding branch of the resistor array 21. The second connection unit 12 includes M second selection switches 32, the number of the second selection switches 31 is the same as the number of branches of the capacitor array 22, a first end of each second selection switch 32 is correspondingly connected to one branch of the capacitor array 22, and a second end of each second selection switch 32 is used for receiving at least one reference voltage signal (V ref1 —V refn ) Each of the second selection switches 32 selects one of the reference voltage signals to be output to a corresponding branch of the capacitor array 22.
In some embodiments, as shown in fig. 10, each first selection switch 31 selects the same reference voltage signal at the same stage of the digital-to-analog conversion period to ensure that each resistor branch in the resistor array can obtain the same reference voltage. Each second selection switch 32 selects the same reference voltage signal to ensure that each capacitive branch in the capacitive array is able to obtain the same reference voltage.
In the embodiment of the present application, the number of the first selection switches 31 and/or the second selection switches 32 is the same as the number of the branches of the resistor array 21 and/or the capacitor array 22, so that each branch of the resistor array and/or the capacitor array is controlled independently.
In some implementations, as shown in fig. 11, fig. 11 shows a further structure diagram of a rc hybrid digital-to-analog converter provided by an embodiment of the present application, where the first connection unit 11 includes a first circuit connection line 41, and the first circuit connection line 41 is used to connect a reference voltage source and the resistor array 21; the second connection unit 12 comprises a second circuit connection line 42, the second circuit connection line 42 being for connecting a reference voltage source and the capacitor array 22. When only one reference voltage signal is received by the resistance-capacitance hybrid digital-analog converter, the resistor array 21 and the capacitor array 22 are connected through the first circuit connecting wire 41 and the second circuit connecting wire 42 respectively, so that circuit transmission of the resistor array 21 and circuit transmission of the capacitor array 22 are not affected, wiring resistance of the first circuit connecting wire 41 can not affect the second circuit connecting wire 42 to transmit the reference voltage signal to the capacitor array, and influence of wiring resistance on the reference voltage is reduced. The wirings of the rc hybrid digital-to-analog converter and the reference voltage are usually routed through the PCB, and at this time, the first circuit connection line 41 and the second circuit connection line 42 are wirings in the circuit design. For example, when the rc hybrid digital-to-analog converter is integrated in a chip, the first circuit connection line 41 and the second circuit connection line 42 are both wirings inside the chip.
In some embodiments, the first circuit connection line 41 and the second circuit connection line 42 are connected to the same end of the reference voltage source, respectively, so as to be able to receive the same reference voltage signal at the same stage of the digital-to-analog conversion period.
In the embodiment of the application, as shown in fig. 11, the first circuit connection line 41 is arranged to be directly connected to the resistor array from the reference voltage source, the second circuit connection line 42 is arranged to be directly connected to the capacitor array from the reference voltage source, and the reference voltages received by the capacitor array and the resistor array are not interfered with each other, so that the technical problem that the reference voltages of the resistor array and the reference voltages of the capacitor array are different due to the wiring resistance of the first circuit connection line 41 is avoided, the precision of the reference voltages of the resistance-capacitance hybrid digital-analog converter is improved, and the gain error of the resistance-capacitance hybrid digital-analog converter is reduced.
In some embodiments, a resistor array of a resistive-capacitive hybrid digital-to-analog converter includes at least one resistor branch, each resistor branch including at least one resistor switch and one resistor unit; the capacitor array of the resistance-capacitance hybrid digital-to-analog converter comprises at least one capacitor branch, and each capacitor branch at least comprises a capacitor switch and a capacitor unit.
It should be clear that specific circuit structures of the resistor array and the capacitor array of the rc hybrid digital-to-analog converter designed by different manufacturers are not necessarily the same, and the specific circuit structures of the resistor array and the capacitor array in the embodiment of the present application are not limited as long as the resistor array includes a plurality of branches including resistors, the capacitor array includes a plurality of branches including capacitors, and the connection relationship and the circuit design between the branches including resistors, the connection relationship and the circuit design between the branches including capacitors in the embodiment of the present application are not limited thereto.
An embodiment of the present application further provides an analog-to-digital converter, as shown in fig. 12, fig. 12 is a schematic block diagram of the analog-to-digital converter according to the embodiment of the present application, where the analog-to-digital converter includes:
the resistive-capacitive hybrid digital-to-analog converter as described in the above embodiments; the method comprises the steps of,
and the input end of the comparator is connected with the output end of the resistance-capacitance hybrid digital-analog converter.
The embodiment of the application also provides a Chip which comprises the circuit for reducing the gain error of the resistance-capacitance hybrid DAC, and the Chip can be, but is not limited to, a System On Chip (SOC) Chip or a System In Package (SIP) Chip, and the reference voltage sources of a resistor array and a capacitor array of the resistance-capacitance hybrid DAC are controlled by a first control unit and a second control unit, so that the Chip performance is improved.
The embodiment of the application also provides electronic equipment which comprises an equipment main body and the chip arranged in the equipment main body, wherein the first control unit and the second control unit are used for controlling the reference voltage sources of the resistor array and the capacitor array of the resistance-capacitance hybrid digital-analog converter, so that the performance of the electronic equipment is improved.
Although the present application has been described in terms of the preferred embodiments, it should be understood that the present application is not limited to the specific embodiments, but is capable of numerous modifications and equivalents, and alternative embodiments and modifications of the embodiments described above, without departing from the spirit and scope of the present application.

Claims (16)

1. A resistive-capacitive hybrid digital-to-analog converter, comprising:
a resistor array;
a capacitor array;
the first connection unit is used for receiving at least one reference voltage signal and outputting one of the reference voltage signals to the resistor array;
and the second connection unit is used for receiving at least one reference voltage signal and outputting one of the reference voltage signals to the capacitor array.
2. The resistive-capacitive hybrid digital-to-analog converter of claim 1 in which the reference voltage signal received by the resistive array and the reference voltage signal received by the capacitive array are the same reference voltage signal.
3. The resistive-capacitive hybrid digital-to-analog converter of claim 1, wherein the first connection unit comprises:
the first end of the first selection switch is connected with the resistor array, the second end of the first selection switch is used for being connected with a reference voltage source to receive the reference voltage signals, and the first selection switch is used for selectively outputting one of the reference voltage signals to the resistor array.
4. A resistive-capacitive hybrid digital-to-analog converter as claimed in claim 3, characterized in that,
the first selection switch comprises a plurality of first selection switch units connected in parallel, and the first connection unit is further used for controlling the first selection switch units to be closed according to the selected reference voltage signals.
5. The resistive-capacitive hybrid digital-to-analog converter of claim 1, wherein the second connection unit comprises:
the first end of the second selection switch is connected with the capacitor array, the second end of the second selection switch is used for being connected with a reference voltage source to receive the reference voltage signals, and the second selection switch is used for selecting one of the reference voltage signals to be output to the capacitor array.
6. The resistive-capacitive hybrid digital-to-analog converter of claim 5 in which,
the second selection switch comprises a plurality of second selection switch units which are connected in parallel, and the second connection unit is also used for controlling the closing of a corresponding number of the second selection switch units according to the selected reference voltage signal.
7. The resistive-capacitive hybrid digital-to-analog converter of claim 1 in which the resistor array comprises N branches;
the first connection unit includes:
a number N of first selection switches,
the first ends of the first selection switches are respectively and correspondingly connected with one branch of the resistor array, the second ends of the first selection switches are respectively used for receiving at least one reference voltage signal, and each first selection switch is used for selecting one of the reference voltage signals and outputting the reference voltage signals to the corresponding branch of the resistor array.
8. The resistive-capacitive hybrid digital-to-analog converter of claim 7 in which said reference voltage signal selected by each of said first selection switches is the same.
9. The resistive-capacitive hybrid digital-to-analog converter of claim 1 in which said capacitive array comprises M branches;
the second connection unit includes: a plurality of M second selection switches,
the first end of each second selection switch is correspondingly connected with one branch of the capacitor array, the second end of each second selection switch is used for receiving at least one reference voltage signal, and each second selection switch is used for selecting one of the reference voltage signals and outputting the reference voltage signal to the corresponding branch of the capacitor array.
10. The resistive-capacitive hybrid digital-to-analog converter of claim 9 in which said reference voltage signal selected by each of said second selection switches is the same.
11. The resistive-capacitive hybrid digital-to-analog converter of claim 1, wherein the first connection unit comprises:
a first circuit connection line for connecting a reference voltage source and the resistor array;
the second connection unit includes:
and the second circuit connecting wire is used for connecting the reference voltage source and the capacitor array.
12. The resistive-capacitive hybrid digital-to-analog converter of claim 11 in which the first circuit connection and the second circuit connection are connected to the reference voltage source to receive the same reference voltage signal.
13. The resistive-capacitive hybrid digital-to-analog converter of claim 1 in which said resistor array comprises a plurality of resistor branches, each of said resistor branches comprising at least one resistor switch and one resistor unit;
the capacitive array comprises a plurality of capacitive branches, and each capacitive branch at least comprises a capacitive switch and a capacitive unit.
14. An analog-to-digital converter, comprising:
a resistive-capacitive hybrid digital-to-analog converter as claimed in any one of claims 1 to 13; the method comprises the steps of,
and the input end of the comparator is connected with the output end of the resistance-capacitance hybrid digital-analog converter.
15. A chip comprising a resistive-capacitive hybrid digital-to-analog converter as claimed in any one of claims 1 to 13 or an analog-to-digital converter as claimed in claim 14.
16. An electronic device comprising a device body and a chip as claimed in claim 15 provided on the device body.
CN202310463062.5A 2023-04-26 2023-04-26 Resistance-capacitance hybrid digital-to-analog converter, analog-to-digital converter, chip and electronic device Pending CN116667848A (en)

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CN202310463062.5A CN116667848A (en) 2023-04-26 2023-04-26 Resistance-capacitance hybrid digital-to-analog converter, analog-to-digital converter, chip and electronic device

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