CN116631852A - 硬掩模层的移除方法 - Google Patents

硬掩模层的移除方法 Download PDF

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CN116631852A
CN116631852A CN202210132873.2A CN202210132873A CN116631852A CN 116631852 A CN116631852 A CN 116631852A CN 202210132873 A CN202210132873 A CN 202210132873A CN 116631852 A CN116631852 A CN 116631852A
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etchant
hard mask
mask layer
silicon nitride
phosphoric acid
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冯森茂
任明轩
黄世贤
谈文毅
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United Semi Integrated Circuit Manufacture Xiamen Co ltd
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Abstract

本发明公开一种硬掩模层的移除方法,包含提供一栅极,一硬掩模层覆盖并接触栅极的上表面,两个间隙壁结构分别接触栅极的两侧,两个第一间隙壁分别位于各个间隙壁结构上,然后,进行一湿蚀刻制作工艺以移除硬掩模层以及第一间隙壁并且保留间隙壁结构,其中湿蚀刻制作工艺所使用的蚀刻剂的氮化硅对氧化硅的蚀刻选择比大于90,蚀刻剂包含硅酸(Si(OH)4),硅酸的浓度大于等于3.95ppm并且小于等于10ppm。

Description

硬掩模层的移除方法
技术领域
本发明涉及一种硬掩模层的移除方法,特别是涉及一种关于使用氮化硅对氧化硅的蚀刻选择比大于90的蚀刻剂去除硬掩模层的方法。
背景技术
在传统光刻制作工艺中,将图案化光致抗蚀剂形成在设置在基板上的堆叠材料层上,之后使用蚀刻制作工艺将图案化光致抗蚀剂上的图案转移到堆叠材料层。
然而,由于半导体元件的集成度不断提升,因此对于制造具有小临界尺寸、高深宽结构等的精确图案转移的需求越来越难以满足,上述光致抗蚀剂在蚀刻制作工艺期间可能不足以遮蔽下面的材料层,因此在光致抗蚀剂和下面的材料层之间额外增加了硬掩模层,以促进图案转移。
一般而言,在不再需要硬掩模层之后,需要将其移除,然而在移除硬掩模层的同时,却会造成主动区域的结构损坏。
发明内容
有鉴于此,本发明提供一种具有高蚀刻选择比的蚀刻剂以在移除硬掩模层的同时,保持主动(有源)区域的结构完整。
根据本发明的一优选实施例,一种硬掩模层的移除方法,包含提供一栅极,一硬掩模层覆盖并接触栅极的上表面,两个间隙壁结构分别接触栅极的两侧,两个第一间隙壁分别位于各个间隙壁结构上,然后,进行一湿蚀刻制作工艺以移除硬掩模层以及第一间隙壁并且保留间隙壁结构,其中湿蚀刻制作工艺所使用的蚀刻剂的氮化硅对氧化硅的蚀刻选择比大于90,蚀刻剂包含硅酸(Si(OH)4),硅酸的浓度大于等于3.95ppm并且小于等于10ppm。
为让本发明的上述目的、特征及优点能更明显易懂,下文特举优选实施方式,并配合所附的附图,作详细说明如下。然而如下优选实施方式与附图仅供参考与说明用,并非用来对本发明加以限制者。
附图说明
图1至图2为本发明的优选实施例所绘示的一种硬掩模层的移除方法的示意图;
图3为本发明的蚀刻剂的制备方法的示意图;
图4为磷酸水溶液的共沸点的示意图;
图5为本发明的一示范例所绘示的一种硬掩模层的移除方法的示意图。
主要元件符号说明
10:基底
12:栅极
14:栅极介电层
16:硬掩模层
18:源极/漏极掺杂区
20:保护层
22:湿蚀刻制作工艺
24:测试晶片
26:氮化硅层
28:磷酸水溶液
30:蚀刻剂
L:衬垫层
S:间隙壁结构
S1:第一间隙壁
S2:第二间隙壁
S3:第三间隙壁
具体实施方式
图1至图2为根据本发明的优选实施例所绘示的一种硬掩模层的移除方法。
如图1所示,首先,提供一基底10,一栅极12设置在基底10上,一栅极介电层14设置在栅极12和基底10之间,一硬掩模层16覆盖并接触栅极12的上表面,两个间隙壁结构S分别接触栅极12的两侧和硬掩模层16的两侧,两个第一间隙壁S1分别位于各个间隙壁结构S上,各个间隙壁结构S各自包含一衬垫层L、一第二间隙壁S2和一第三间隙壁S3,衬垫层L接触栅极12,第二间隙壁S2接触衬垫层L,第三间隙壁S3接触第二间隙壁S2。两个源极/漏极掺杂区18各自位于栅极12两侧的基底10中,两层保护层20分别接触并且覆盖两个源极/漏极掺杂区18,此外保护层20也覆盖基底10上其它主动区域(图未示)。其中硬掩模层16、第一间隙壁S1和第二间隙壁S2为氮化硅,衬垫层L、第三间隙壁S3和保护层20为氧化硅。
如图1和图2所示,进行一湿蚀刻制作工艺22以移除硬掩模层16以及两个第一间隙壁S1并且保留两个间隙壁结构S以及两个保护层20,湿蚀刻制作工艺22所使用的蚀刻剂包含磷酸和水,也就是蚀刻剂包含磷酸水溶液,根据本发明的一优选实施例,在进行湿蚀刻制作工艺22时,蚀刻剂的温度范围为大于等于150℃并且小于等于160℃,磷酸的浓度范围为大于等于83wt%并且小于等于89wt%。值得注意的是:湿蚀刻制作工艺22所使用的蚀刻剂的氮化硅对氧化硅的蚀刻选择比大于90,并且在蚀刻剂中包含硅酸(Si(OH)4),硅酸的浓度大于等于3.95ppm并且小于等于10ppm。因为氮化硅对氧化硅的蚀刻选择比大于90,在进行湿蚀刻制作工艺22时主要是移除氮化硅,因此硬掩模层16可以完全被去除以及第一间隙壁S1被移除,在此同时以氧化硅制作的保护层20依然覆盖在源极/漏极掺杂区18和主动区域上,所以源极/漏极掺杂区18和主动区域在湿蚀刻制作工艺22时不会被蚀刻剂损害。至此本发明的硬掩模层的移除方法业已完成。
本发明特别调控蚀刻剂的氮化硅对氧化硅的蚀刻选择比至大于90,以达成移除硬掩模层16时,保护层20不会被移除的结果,而本发明让蚀刻选择比大于90的制备方法是在特定浓度的磷酸水溶液中加入特定浓度的硅酸,如反应式(1)所呈现,由于硅酸在磷酸水溶液中会分解成氧化硅和水,并且反应式(1)是可逆反应,因此只要在磷酸水溶液中维持一定浓度的硅酸,就可以保持一定量的氧化硅,如此一来就可以降低磷酸水溶液对氧化硅的蚀刻率,提升氮化硅对氧化硅的蚀刻选择比。磷酸在反应式(1)中作为催化剂。
因此本发明的蚀刻剂需要在磷酸水溶液中形成硅酸,以下将说明本发明的蚀刻剂的制备方法,如图3所示,首先提供多片测试晶片(dummy wafer),图3中只以一片测试晶片24作为代表,各个测试晶片的正面和背面上各自覆盖有一氮化硅层26,接着将测试晶片24以一预定时间浸泡在磷酸水溶液28中,最后浸泡完预定时间后,此时磷酸水溶液28已变成本发明的蚀刻剂30,然后将测试晶片24由蚀刻剂30中移除。当氮化硅层26浸泡在磷酸水溶液28中时,氮化硅层26会和水反应生成氧化硅和氨,接着氧化硅会和水反应生成硅酸,如下面反应式(2)和反应式(3)所呈现,在反应式(2)和反应式(3)中,磷酸都作为催化剂。
Si3N4+12H2O→3SiO2+4NH3……………(2)
因此,本发明利用测试晶片24上的氮化硅层26提供氮化硅,并且以氮化硅层26的厚度和测试晶片24的数量来控制浸泡在磷酸水溶液28中的氮化硅的量,并且控制测试晶片24的浸泡时间来调控硅酸的生成量。根据本发明的优选实施例,测试晶片24的正面和背面上所覆盖的氮化硅层26各自的厚度为3000埃,而测试晶片24的数量为100片,浸泡时间介于300000至700000秒之间,如此所生成的硅酸的浓度会大于等于3.95ppm并且小于等于10ppm,由此便可使蚀刻剂30的氮化硅对氧化硅的蚀刻选择比大于90。
此外,在进行湿蚀刻制作工艺时,本发明的蚀刻剂需选择在磷酸水溶液会产生共沸状态的条件下进行,也就是在共沸点进行,图4中所绘示的是磷酸水溶液在不同温度和不同磷酸浓度时的共沸点。如图4所示,本发明的蚀刻剂在进行湿蚀刻制作工艺时,最佳的磷酸的浓度是86wt%,最佳的磷酸水溶液的温度是155℃,此时磷酸水溶液会形成共沸点,然而在尚未经过前述的制备方法之前,在此条件下的磷酸水溶液的氮化硅对氧化硅的蚀刻选择比会小于35,然后利用前文所述的制备方法,在磷酸水溶液中加入大于等于3.95ppm并且小于等于10ppm的硅酸,即可将磷酸水溶液的氮化硅对氧化硅的蚀刻选择比提升到大于90,就成为本发明的蚀刻剂。在进行湿蚀刻制作工艺时,蚀刻剂的温度和浓度有一定的容许度,根据本发明的优选实施例,在进行湿蚀刻制作工艺时,蚀刻剂中的磷酸的浓度范围为大于等于83wt%并且小于等于89wt%,蚀刻剂温度范围为大于等于150℃并且小于等于160℃就可以达成氮化硅对氧化硅的蚀刻选择比大于90的结果。
然而蚀刻剂中的磷酸的浓度和蚀刻剂温度可以视情况调整,较佳是选在磷酸水溶液共沸点上的浓度和温度。而硅酸在磷酸水溶液中的浓度,也会随着所选择的磷酸浓度和温度而改变,但只要是在磷酸水溶液加入硅酸以提升蚀刻剂中氮化硅对氧化硅的蚀刻选择比的方式,即在本发明的范围内。
图5为根据本发明的一示范例所绘示的一种硬掩模层的移除方法,其中具有相同功能和位置的元件,将使用图1中的元件标号。
如图5所示,在本示范例中所使用的蚀刻剂的氮化硅对氧化硅的蚀刻选择比小于35,因此进行湿蚀刻制作工艺22会造成原本在源极/漏极掺杂区18上的保护层20也一并被移除,使得源极/漏极掺杂区18表面受损。
本发明利用在磷酸水溶液中加入硅酸以提升蚀刻剂的氮化硅对氧化硅的蚀刻选择比至大于90,因此可以在移除硬掩模层的同时保留氧化硅层,使得被氧化硅层覆盖的源极/漏极掺杂区和其它主动区域不会受损。
以上所述仅为本发明的优选实施例,凡依本发明权利要求所做的均等变化与修饰,都应属本发明的涵盖范围。

Claims (7)

1.一种硬掩模层的移除方法,包含:
提供栅极,硬掩模层覆盖并接触该栅极的上表面,两个间隙壁结构分别接触该栅极的两侧,两个第一间隙壁分别位于各该间隙壁结构上;以及
进行一湿蚀刻制作工艺以移除该硬掩模层以及该两个第一间隙壁并且保留该两个间隙壁结构,其中该湿蚀刻制作工艺所使用的蚀刻剂的氮化硅对氧化硅的蚀刻选择比大于90,该蚀刻剂包含硅酸(Si(OH)4),硅酸的浓度大于等于3.95ppm并且小于等于10ppm。
2.如权利要求1所述的硬掩模层的移除方法,其中该蚀刻剂包含磷酸和水,磷酸的浓度范围为大于等于83wt%并且小于等于89wt%。
3.如权利要求2所述的硬掩模层的移除方法,其中该蚀刻剂的制备方法包含:
提供多片测试晶片(dummy wafer),各该测试晶片的正面和背面上各自覆盖有氮化硅层;
将该多片测试晶片以预定时间浸泡在该蚀刻剂中;以及
浸泡完该预定时间后,将该多片测试晶片由该蚀刻剂中移除。
4.如权利要求3所述的硬掩模层的移除方法,其中该氮化硅层的厚度为3000埃,该预定时间介于300000至700000秒之间。
5.如权利要求3所述的硬掩模层的移除方法,其中在经过该多片测试晶片浸泡之前,该蚀刻剂的氮化硅对氧化硅的蚀刻选择比小于35,在经过该多片测试晶片浸泡之后,该蚀刻剂的氮化硅对氧化硅的蚀刻选择比大于90。
6.如权利要求3所述的硬掩模层的移除方法,其中利用将该多片测试晶片浸泡在该蚀刻剂中以产生硅酸。
7.如权利要求1所述的硬掩模层的移除方法,其中在进行该湿蚀刻制作工艺时,该蚀刻剂的温度范围为大于等于150℃并且小于等于160℃。
CN202210132873.2A 2022-02-14 2022-02-14 硬掩模层的移除方法 Pending CN116631852A (zh)

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