CN116436461B - Digital-to-analog converter and electronic device - Google Patents

Digital-to-analog converter and electronic device Download PDF

Info

Publication number
CN116436461B
CN116436461B CN202310694122.4A CN202310694122A CN116436461B CN 116436461 B CN116436461 B CN 116436461B CN 202310694122 A CN202310694122 A CN 202310694122A CN 116436461 B CN116436461 B CN 116436461B
Authority
CN
China
Prior art keywords
unit
digital
signal
digital signal
analog
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202310694122.4A
Other languages
Chinese (zh)
Other versions
CN116436461A (en
Inventor
王本川
黄强
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Thinking Semiconductor Technology Co ltd
Original Assignee
Beijing Thinking Semiconductor Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Thinking Semiconductor Technology Co ltd filed Critical Beijing Thinking Semiconductor Technology Co ltd
Priority to CN202310694122.4A priority Critical patent/CN116436461B/en
Publication of CN116436461A publication Critical patent/CN116436461A/en
Application granted granted Critical
Publication of CN116436461B publication Critical patent/CN116436461B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
    • H03M1/0809—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of bubble errors, i.e. irregularities in thermometer codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

The present disclosure relates to the field of integrated circuit design, and more particularly, to a digital-to-analog converter and an electronic device to improve the accuracy of digital signal conversion. The digital-to-analog converter includes: the device comprises a first segmentation device, a second segmentation device and a thermometer code digital-to-analog conversion device; the first segmentation device comprises a high-pass filtering unit and a signal generating unit, and the high-pass filtering unit and the signal generating unit work cooperatively to generate a first digital signal carrying a filtering function according to a digital signal to be converted; the second sectioning device is connected with the first sectioning device and is used for inputting the digital signal to be converted and the first digital signal and generating a second digital signal according to the digital signal to be converted and the first digital signal; the thermometer code digital-to-analog conversion device is respectively connected with the first segmentation device and the second segmentation device and is used for respectively carrying out digital-to-analog conversion on the first digital signal and the second digital signal to obtain a target analog signal corresponding to the digital signal to be converted.

Description

Digital-to-analog converter and electronic device
Technical Field
The present disclosure relates to the field of integrated circuit design, and in particular, to a digital-to-analog converter and an electronic device.
Background
A digital-to-analog converter (DAC), which is a device that converts a discrete digital signal into a continuously varying analog signal, typically converts the digital signal into an analog signal that represents a proportional voltage value. The photovoltaic broadband power line carrier communication chip needs to convert a digital baseband signal into an analog signal through a digital-to-analog converter and send the analog signal to a power line through a power amplifier.
There are two ways the DAC can be implemented in, namely binary or thermometer codes. The binary code design is adopted, and the structure is compact. The weight of each bit of digital signal in quantization is distributed according to binary system, and thermometer coding is not needed, so that the area and power consumption of the digital part are smaller. Meanwhile, the number of current switches, voltage dividing resistors or charge distribution capacitors required by the structure is the same as the number of digits of the DAC, so that the binary code structure has fewer loads compared with the thermometer code structure, and the occupied area of the DAC is reduced. In addition, the processing speed of the DAC can be increased due to the small number of loads. However, the DAC with binary code structure has higher requirement for matching, for example, for a 12-bit DAC, the weight ratio of the most significant bit to the least significant bit is 4096, if the 1LSB quantization precision is to be achieved, the error between the most significant bit and the least significant bit should be controlled within 1/4096, which is often difficult to achieve in practical design, and the mismatch in the circuit easily causes harmonic distortion. In the design of adopting thermometer codes, an input digital signal is firstly converted into the thermometer codes through an encoder, each bit of digital signal after encoding controls an analog signal of 1LSB, the weights of all bits in quantization are the same, the requirement on the matching degree of components can be reduced, and the accuracy and the linearity of a DAC (digital-to-analog converter) are improved. But the DAC basic units controlled by the thermometer code are too many, and the layout wiring is complex.
Disclosure of Invention
It is an object of the present disclosure to provide a digital-to-analog converter and an electronic apparatus to solve the problems in the related art.
To achieve the above object, a first aspect of the present disclosure provides a digital-to-analog converter, including: the device comprises a first segmentation device, a second segmentation device and a thermometer code digital-to-analog conversion device;
the first segmentation device comprises a high-pass filtering unit and a signal generating unit, wherein the high-pass filtering unit and the signal generating unit work cooperatively to generate a first digital signal carrying a filtering function according to a digital signal to be converted, and the filtering function is used for filtering errors of the thermometer code digital-to-analog conversion device;
the second segmentation device is connected with the first segmentation device and is used for inputting the digital signal to be converted and the first digital signal generated by the first segmentation device and generating a second digital signal according to the digital signal to be converted and the first digital signal, wherein the sum of the first digital signal and the second digital signal is equal to the digital signal to be converted;
the thermometer code digital-to-analog conversion device is respectively connected with the first segmentation device and the second segmentation device and is used for respectively carrying out digital-to-analog conversion on the first digital signal and the second digital signal to obtain a target analog signal corresponding to the digital signal to be converted.
Optionally, the high-pass filtering unit is an N-order high-pass filtering unit, and the N-order high-pass filtering unit includes a gain unit, N delay units and a first combination unit, where N is an integer greater than or equal to 2;
the gain unit, the N delay units and the first combination unit are connected with the signal generation unit according to a preset connection relation, so that a formed filtering function is as follows:，/>the clock period of each delay cell is characterized.
Optionally, N is 2, where the N delay units include a first delay unit and a second delay unit, the first combination unit is a first subtractor, and a gain value of the gain unit is 2;
the input end of the first delay unit is connected with one end of the signal generating unit and is used for inputting the negative number of the error of the signal generating unit, and the output end of the first delay unit is respectively connected with the input end of the second delay unit and the input end of the gain unit;
the output end of the gain unit is connected with the positive input end of the first subtracter, and the output end of the second delay unit is connected with the negative input end of the first subtracter;
the output end of the first subtracter is connected with the other end of the signal generating unit, so that the signal generating unit generates a first digital signal carrying a filtering function based on the filtering parameters output by the first subtracter and the digital signal to be converted.
Optionally, the signal generating unit includes a first adder, a second subtractor and a quantizer, and a quantization error of the quantizer is an error of the signal generating unit;
the first positive input end of the first adder is connected with the output end of the first subtracter, the second positive input end of the first adder is used for inputting a digital signal to be converted, and the output end of the first adder is respectively connected with the input end of the quantizer and the positive input end of the second subtracter;
the negative input end of the second subtracter is connected with the output end of the quantizer, and the output end of the second subtracter is connected with the input end of the first delay unit so as to input the negative number of the quantization error of the quantizer to the first delay unit;
the output end of the quantizer is used for outputting the first digital signal.
Optionally, the expression of the target analog signal is:wherein the saidRepresenting an initial analog signal corresponding to the digital signal A to be converted, wherein D represents a target analog signal output by the digital-to-analog converter, delta represents an error of the thermometer code digital-to-analog conversion device, and e represents a quantization error of the quantizer.
Optionally, the second segmentation means comprises a third subtractor;
the positive input end of the third subtracter is used for inputting the digital signal to be converted, and the negative input end of the third subtracter is connected with the signal generating unit and used for inputting the first digital signal generated by the signal generating unit.
Optionally, the thermometer code digital-to-analog conversion device includes: the device comprises a first thermometer decoding unit, a first dynamic element matching unit, a first digital-to-analog conversion unit, a second thermometer decoding unit, a second dynamic element matching unit, a second digital-to-analog conversion unit and a second combination unit;
the first segmentation device, the first thermometer decoding unit, the first dynamic element matching unit and the first digital-to-analog conversion unit are sequentially connected;
the second sectioning device, the second thermometer decoding unit, the second dynamic element matching unit and the second digital-to-analog conversion unit are sequentially connected;
the second combination unit is respectively connected with the output end of the first digital-to-analog conversion unit and the output end of the second digital-to-analog conversion unit, and is used for combining the first analog signal converted by the first digital-to-analog conversion unit and the second analog signal converted by the second digital-to-analog conversion unit to generate a target analog signal corresponding to the digital signal to be converted.
Optionally, the second combining unit is a second adder.
Optionally, the quantizer is a 4-bit quantizer, and the first digital signal and the second digital signal are 4-bit digital signals.
A second aspect of the present disclosure provides an electronic device comprising a digital to analogue converter as described in any one of the first aspects of the present disclosure.
Through the technical scheme, the high-pass filtering unit and the signal generating unit are used for cooperating to generate the first digital signal carrying the filtering function according to the digital signal to be converted, and the second segmentation device is used for generating the second digital signal, so that the purpose of segmenting the digital signal to be converted is achieved, the number of basic units in the thermometer code structure can be reduced, and the layout connecting complexity of the digital-to-analog converter is reduced. In addition, the filter function can filter errors of the thermometer code digital-to-analog conversion device, so that the problems of harmonic distortion and noise floor lifting caused by array mismatch are reduced, and the accuracy of digital signal conversion is improved.
Additional features and advantages of the present disclosure will be set forth in the detailed description which follows.
Drawings
The accompanying drawings are included to provide a further understanding of the disclosure, and are incorporated in and constitute a part of this specification, illustrate the disclosure and together with the description serve to explain, but do not limit the disclosure.
Fig. 1 is a block diagram of a digital-to-analog converter, shown in accordance with an exemplary embodiment.
Fig. 2 is a schematic diagram showing a connection relationship between a second-order high-pass filtering unit and a signal generating unit according to an exemplary embodiment.
Fig. 3 is a schematic diagram of a digital-to-analog converter according to an exemplary embodiment.
Detailed Description
Specific embodiments of the present disclosure are described in detail below with reference to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating and illustrating the disclosure, are not intended to limit the disclosure. It should be noted that, the illustrations provided in the present embodiment are merely schematic illustrations of the basic concepts of the present invention, and only the components related to the present invention are shown in the illustrations, rather than being drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
In the related art, although the method of using segmented thermometer codes reduces the number of DAC basic units, there is still a matching error between the thermometer code array with high weight and the thermometer code array with low weight, thereby causing the problem of harmonic distortion of the converted analog signal.
In view of this, the disclosure provides a digital-to-analog converter and an electronic device, in which a digital signal to be converted is segmented by using a segmentation structure capable of filtering, so that the number of basic units of a thermometer code can be reduced, the complexity of layout connection of the digital-to-analog converter is reduced, and harmonic distortion caused by matching errors of a high-weight thermometer code array and a low-weight thermometer code array can be filtered by constructing a filtering function, so as to reduce the problems of harmonic distortion and noise floor lifting caused by array mismatch.
Fig. 1 is a block diagram of a digital-to-analog converter, shown in accordance with an exemplary embodiment. As shown in fig. 1, the digital-to-analog converter 10 comprises a first segmentation means 11, a second segmentation means 12 and a thermometer code digital-to-analog conversion means 13. The first segmentation device 11 comprises a high-pass filtering unit 111 and a signal generating unit 112, wherein the high-pass filtering unit 111 is connected with the signal generating unit 112, and the high-pass filtering unit 111 and the signal generating unit 112 cooperate to generate a first digital signal carrying a filtering function according to a digital signal to be converted, and the filtering function is used for filtering errors of the thermometer code digital-to-analog conversion device. The specific manner in which the first digital signal is generated will be described in detail below.
The second segmenting means 12 is connected to the first segmenting means 11 for inputting the digital signal to be converted and the first digital signal generated by the first segmenting means 11 and generating a second digital signal based on the digital signal to be converted and the first digital signal. Wherein the sum of the first digital signal and the second digital signal is equal to the digital signal to be converted. For example, the first digital signal may be subtracted from the digital signal to be converted to obtain the second digital signal.
The thermometer code digital-to-analog conversion device 13 is respectively connected with the first segmentation device 11 and the second segmentation device 12, and is used for respectively performing digital-to-analog conversion on the first digital signal and the second digital signal to obtain a target analog signal corresponding to the digital signal to be converted.
By adopting the technical scheme, the high-pass filtering unit and the signal generating unit are used for cooperating to generate the first digital signal carrying the filtering function according to the digital signal to be converted, and the second segmentation device is used for generating the second digital signal, so that the purpose of segmenting the digital signal to be converted is realized, the number of basic units in the thermometer code structure can be reduced, and the layout connecting complexity of the digital-to-analog converter is reduced. In addition, the filter function can filter errors of the thermometer code digital-to-analog conversion device, so that the problems of harmonic distortion and noise floor lifting caused by array mismatch are reduced, and the accuracy of digital signal conversion is improved.
In order to facilitate a better understanding of the digital-to-analog converter provided by the present disclosure, a complete embodiment of the digital-to-analog converter is described below.
In the present disclosure, the high-pass filtering unit 111 is an N-order high-pass filtering unit, and the N-order high-pass filtering unit includes a gain unit, N delay units, and a first combining unit, where N is an integer greater than or equal to 2. The gain unit, the N delay units and the first combination unit are connected with the signal generation unit according to a preset connection relation, so that a formed filtering function is as follows:，/>the clock period of each delay cell is characterized. It should be appreciated that the N delay units may include a first delay unit, a second delay unit … …, an N-1 delay unit, and an N delay unit, wherein each delay unit has a delay period of +.>。
It should be understood that the N-order high-pass filtering unit includes the same number of gain units, and the gain value of each gain unitIs related to the expansion of (a). In practical use, it is possible to use the method according to +.>The number of gain cells and the gain value of each gain cell are determined, which is not particularly limited by the present disclosure.
In one embodiment, n=2, and fig. 2 is a schematic diagram showing a connection relationship between a second-order high-pass filtering unit and a signal generating unit according to an exemplary embodiment. The second-order high-pass filtering unit comprises a gain unit, 2 delay units and a first combination unit. The 2 delay units include a first delay unit and a second delay unit, and the first combination unit may be a first subtractor. In addition, the first delay unit and the second delay unit are each 1 in order. The gain unit may be a gain booster.
As shown in fig. 2, an input terminal of the first delay unit 1111 is connected to one terminal of the signal generating unit 112, and is used for inputting a negative number of errors of the signal generating unit 112, and an output terminal of the first delay unit 1111 is connected to an input terminal of the second delay unit 1112 and an input terminal of the gain unit 1113, respectively. The output end of the gain unit 1113 is connected with the positive input end of the first subtracter 1114, and the output end of the second delay unit 1112 is connected with the negative input end of the first subtracter 1114The ends are connected. The output of the first subtractor 1114 is coupled to the other end of the signal generating unit 112 to generate a first digital signal carrying a filter function by the signal generating unit 112 based on the filter parameters output by the first subtractor and the digital signal to be converted. Wherein, considerIn this embodiment, the gain value of the gain unit is 2. The filtering parameters may be: -2/>+/>。
Assuming that the error of the signal generating unit 112 is e, the input of the first delay unit 1111 is-e, and the output result is-eThe output of the second delay unit 1112 is-e +.>The output of gain unit 1113 is-2 e +.>The output of the first subtractor 1114 is-2 e +.>+e/>. Thus, after the output result of the first subtractor 1114 is input to the signal generating unit 112, the first digital signal output from the signal generating unit 112 carries the filter function。
In another embodiment, n=3, and the third-order high-pass filtering unit includes a first gain unit, a second gain unit, 3 delay units, and a first combining unit. The 3 delay units comprise a first delay unit, a second delay unit and a third delay unit. The specific connection relationship is as follows:
the input end of the first delay unit is connected with one end of the signal generating unit and is used for inputting the negative number of errors of the signal generating unit, the output end of the first delay unit is respectively connected with the input end of the first gain unit and the input end of the second delay unit, the output end of the second delay unit is respectively connected with the input end of the second gain unit and the input end of the third delay unit, and the output end of the first gain unit, the output end of the second gain unit and the output end of the third delay unit are connected through a first combination unit, namely, the output ends of the first gain unit, the output end of the second gain unit and the output end of the third delay unit are combined, and the output end of the first combination unit is connected with the other end of the signal generating unit.
Assuming that the error of the signal generating unit is e, the input of the first delay unit is-e, and the output result is-eThe output result of the second delay unit is-e->The gain value of the first gain unit is 3, and the output result of the first gain unit is-3 e->The gain value of the second gain unit is-3, and the output result of the second gain unit is 3e +.>The output result of the third delay unit is-e->The first combining unit may be an adder, and combines the results output from the output end of the first gain unit, the output end of the second gain unit, and the output end of the third delay unit into +.>. Thus, after the adder inputs the output result thereof to the signal generating unit, the first digital signal outputted by the signal generating unit carries the filter function +.>。
It should be understood at first that the gain value of the second gain unit may also be 3, so that the first combining unit may comprise an adder and a subtractor through which-3 e, the second gain unit is outputConversion to 3eThe present disclosure is not particularly limited thereto. It should be further appreciated that higher order filter functions, e.g., fourth order filter functions, sixth order filter functions, etc., may also be constructed in a similar manner, as the disclosure is not specifically limited.
In yet another embodiment, the gain value of the gain unit in fig. 2 is 1.977. At this time, the first digital signal output by the signal generating unit carries a filter function. Compared with a standard filter function, the filter function has two conjugate zero points within the signal bandwidth, and can better inhibit harmonic waves and noise floors caused by matching errors.
For convenience of description, the following description will take the high-pass filtering unit as a second-order high-pass filtering unit as an example.
Fig. 3 is a schematic diagram of a digital-to-analog converter according to an exemplary embodiment. As shown in fig. 3, the signal generating unit 112 may include a first adder 1121, a second subtractor 1122, and a quantizer 1123. The structure of the second-order high-pass filtering unit is shown in fig. 2, and will not be described here again.
In fig. 3, a first positive input terminal of the first adder 1121 is connected to an output terminal of the first subtractor 1114, a second positive input terminal of the first adder 1121 is used for inputting a digital signal a to be converted, and an output terminal of the first adder 1121 is connected to an input terminal of the quantizer 1123 and a positive input terminal of the second subtractor 1122, respectively. The negative input terminal of the second subtractor 1122 is connected to the output terminal of the quantizer 1123, and the output terminal of the second subtractor 1122 is connected to the input terminal of the first delay unit 1111 to input the negative number of the quantization error of the quantizer 1123 to the first delay unit 1111. An output terminal of the quantizer 1123 is for outputting a first digital signal. It should be understood that in this embodiment, the quantization error of the quantizer 1123 is the error of the signal generating unit.
Illustratively, the output of the first subtractor 1114 with reference to FIG. 2 is-2 e+e/>In FIG. 3, the inputs of the first adder 1121 are digital signals A and-2 e +.>+e/>The output of the first adder 1121 is A-2 e->+e/>The output of the quantizer 1123 is a first digital signalWherein->The result of the quantization of the digital signal a is characterized.
In one embodiment, the second segmentation means comprises a third subtractor; the positive input end of the third subtracter is used for inputting the digital signal to be converted, and the negative input end of the third subtracter is connected with the signal generating unit and used for inputting the first digital signal generated by the signal generating unit.
Furthermore, as shown in fig. 3, the second segmentation means 12 comprises a third subtractor 121, wherein the positive input of the third subtractor 121 is for inputting the digital signal a to be converted, and the negative input of the third subtractor 121 is connected to the output of the quantizer 1123. Thus, the output of the quantizer 1123 is the first digital signalThe output of the third subtractor 121 is then the second digital signal +>。
In one embodiment, as shown in fig. 3, the thermometer code digital to analog conversion apparatus 13 may include a first thermometer decoding unit 131, a first dynamic element matching unit 132, a first digital to analog conversion unit 133, a second thermometer decoding unit 134, a second dynamic element matching unit 135, a second digital to analog conversion unit 136, and a second combining unit 137.
As shown in fig. 3, the second combining unit 137 may be a second adder. The first segmenting device 11, the first thermometer decoding unit 131, the first dynamic element matching unit 132 and the first digital-to-analog conversion unit 133 are sequentially connected; the second segmentation means 12, the second thermometer decoding unit 134, the second dynamic element matching unit 135 and the second digital to analog conversion unit 136 are connected in sequence. That is, the first thermometer decoding unit 131 processes the first digital signal generated by the first segmentation device 11 to generate a thermometer code signal of the first digital signal, inputs the thermometer code signal to the first dynamic element matching unit 132 to perform random scrambling, and inputs the result of the random scrambling to the first digital-to-analog conversion unit 133 to perform digital-to-analog conversion to obtain the first analog signal. Similarly, the second thermometer decoding unit 134 processes the second digital signal generated by the second segmentation device 12 to generate a thermometer code signal of the second digital signal, inputs the thermometer code signal into the second dynamic element matching unit 135 for random scrambling, and inputs the result after random scrambling into the second digital-to-analog conversion unit 136 for digital-to-analog conversion to obtain a second analog signal. The second combining unit 137 is connected to the output terminal of the first digital-to-analog conversion unit 133 and the output terminal of the second digital-to-analog conversion unit 136, respectively, and combines the first analog signal and the second analog signal to generate a target analog signal corresponding to the digital signal to be converted.
For example, assuming that the digital signal a to be converted is a 6-bit signal and the quantizer 1123 is a 4-bit quantizer, the quantizer 1123 outputs a first digital signalAlso 4 bits, and the second digital signal +.>Also 4bit digital signals. The first digital signal of 4 bits is converted into a thermometer code of 16 bits by the first thermometer decoding unit 131, the basic units in the first digital-to-analog converting unit 133 with the weight of 4 are controlled, the second digital signal of 4 bits is converted into a thermometer code of 16 bits by the second thermometer decoding unit 134, and the basic units in the second digital-to-analog converting unit 136 with the weight of 1 are controlled.
The final output result of the digital-to-analog converter shown in FIG. 3 isWherein->Representing an initial analog signal corresponding to a digital signal A to be converted, and D representing a target analog signal output by a digital-to-analog converter,/I>Error of digital-to-analog conversion device of characterization thermometer code, +.>Characterizing the quantization error of the quantizer. It should be understood that the errors of the thermometer code digital to analog conversion means refer to the basic unit and the second digital to analog conversion unit in the first digital to analog conversion unit 133136, the matching error between the base units.
In the present disclosure, harmonics and noise due to a matching error between the basic units in the first digital-to-analog conversion unit 133 and the basic units in the second digital-to-analog conversion unit 136 are included in the initial analog signal, and the target analog result is that the harmonics and noise due to the matching error are removed in the initial analog signal.
It should be understood that, according to the formula of the final output result of the digital-to-analog converter, only the quantization error of the quantizer and the error of the thermometer code digital-to-analog conversion device are filtered, and the analog signal corresponding to the digital signal theory is not filtered in the present disclosure.
For example, if a scheme in the related art is adopted, a 6-bit digital signal is segmented into a 3-bit binary high-bit signal and a 3-bit binary low-bit signal according to high-low bits, the 3-bit binary high-bit signal is converted into an 8-bit thermometer code by a thermometer decoding unit, and the basic units of 8 first digital-to-analog conversion units with weight of 8 are controlled; the 3bit binary low-order signal is converted into an 8bit thermometer code through a thermometer decoding unit, and 8 basic units of the second digital-to-analog conversion unit with weight of 1 are controlled. When implementing the CMOS (complementary metal oxide semiconductor ) process, it is unavoidable that the weight ratio between the basic unit of the manufactured first digital-to-analog conversion unit and the basic unit of the manufactured second digital-to-analog conversion unit is strictly 8:1, i.e. there is a matching error between the basic unit of the first digital-to-analog conversion unit and the basic unit of the second digital-to-analog conversion unit.
Taking an example that a 1% matching error exists between the basic unit of the first digital-to-analog conversion unit and the basic unit of the second digital-to-analog conversion unit, when the signal-to-noise distortion ratio (SNDR) of an input digital signal is 78.5dB, the SNDR of an analog signal output by the digital-to-analog converter is 63.5dB by adopting a scheme in the related technology, the effective bit of about 2.5bit is lost, and meanwhile, both the harmonic wave and the noise floor are obviously raised.
Still taking a 1% matching error between the basic unit of the first digital-to-analog conversion unit and the basic unit of the second digital-to-analog conversion unit as an example, when the signal-to-noise-and-distortion ratio (SNDR) of the input digital signal is 78.5dB, the SNDR of the analog signal output by the digital-to-analog converter provided by the present disclosure is 78.1dB, and only about 0.05bit of significant bit is lost.
Therefore, by adopting the digital-to-analog converter provided by the disclosure, the loss of the effective bits of the signals in the signal conversion process and the harmonic wave and noise floor caused by the mismatch of the thermometer code digital-to-analog conversion device can be reduced, and the effectiveness of digital-to-analog conversion of the signals is improved.
It should be appreciated that the bit widths of the digital signals to be converted, the first digital signal and the second digital signal are not particularly limited, wherein the bit widths of the first digital signal and the second digital signal are determined by the bit width of the quantizer.
Based on the same inventive concept, the present disclosure also provides an electronic device including the digital-to-analog converter provided by the present disclosure.
The preferred embodiments of the present disclosure have been described in detail above with reference to the accompanying drawings, but the present disclosure is not limited to the specific details of the above embodiments, and various simple modifications may be made to the technical solutions of the present disclosure within the scope of the technical concept of the present disclosure, and all the simple modifications belong to the protection scope of the present disclosure.
In addition, the specific features described in the above embodiments may be combined in any suitable manner without contradiction. The various possible combinations are not described further in this disclosure in order to avoid unnecessary repetition.
Moreover, any combination between the various embodiments of the present disclosure is possible as long as it does not depart from the spirit of the present disclosure, which should also be construed as the disclosure of the present disclosure.

Claims (9)

1. A digital-to-analog converter, the digital-to-analog converter comprising: the device comprises a first segmentation device, a second segmentation device and a thermometer code digital-to-analog conversion device;
the first segmentation device comprises a high-pass filtering unit and a signal generating unit, wherein the high-pass filtering unit and the signal generating unit work cooperatively to generate a first digital signal carrying a filtering function according to a digital signal to be converted, and the filtering function is used for filtering errors of the thermometer code digital-to-analog conversion device;
the second segmentation device is connected with the first segmentation device and is used for inputting the digital signal to be converted and the first digital signal generated by the first segmentation device and generating a second digital signal according to the digital signal to be converted and the first digital signal, wherein the sum of the first digital signal and the second digital signal is equal to the digital signal to be converted;
the thermometer code digital-to-analog conversion device is respectively connected with the first segmentation device and the second segmentation device and is used for respectively carrying out digital-to-analog conversion on the first digital signal and the second digital signal to obtain a target analog signal corresponding to the digital signal to be converted;
the high-pass filtering unit is an N-order high-pass filtering unit, the N-order high-pass filtering unit comprises a gain unit, N delay units and a first combination unit, and N is an integer greater than or equal to 2;
the gain unit, the N delay units and the first combination unit are connected with the signal generation unit according to a preset connection relation, so that a formed filtering function is as follows:，/>the clock period of each delay cell is characterized.
2. The digital-to-analog converter according to claim 1, wherein N is 2, the N delay units include a first delay unit and a second delay unit, the first combining unit is a first subtractor, and the gain value of the gain unit is 2;
the input end of the first delay unit is connected with one end of the signal generating unit and is used for inputting the negative number of the error of the signal generating unit, and the output end of the first delay unit is respectively connected with the input end of the second delay unit and the input end of the gain unit;
the output end of the gain unit is connected with the positive input end of the first subtracter, and the output end of the second delay unit is connected with the negative input end of the first subtracter;
the output end of the first subtracter is connected with the other end of the signal generating unit, so that the signal generating unit generates a first digital signal carrying a filtering function based on the filtering parameters output by the first subtracter and the digital signal to be converted.
3. The digital-to-analog converter according to claim 2, wherein the signal generating unit includes a first adder, a second subtractor, and a quantizer, and a quantization error of the quantizer is an error of the signal generating unit;
the first positive input end of the first adder is connected with the output end of the first subtracter, the second positive input end of the first adder is used for inputting a digital signal to be converted, and the output end of the first adder is respectively connected with the input end of the quantizer and the positive input end of the second subtracter;
the negative input end of the second subtracter is connected with the output end of the quantizer, and the output end of the second subtracter is connected with the input end of the first delay unit so as to input the negative number of the quantization error of the quantizer to the first delay unit;
the output end of the quantizer is used for outputting the first digital signal.
4. A digital to analog converter according to claim 3, wherein the expression of the target analog signal is:wherein, said->Representing an initial analog signal corresponding to the digital signal A to be converted, wherein D represents a target analog signal output by the digital-to-analog converter,/and->Characterizing errors of the thermometer code digital to analog conversion means, and (2)>Characterizing quantization errors of the quantizer.
5. A digital to analogue converter according to any of claims 1-4, wherein said second segmentation means comprises a third subtractor;
the positive input end of the third subtracter is used for inputting the digital signal to be converted, and the negative input end of the third subtracter is connected with the signal generating unit and used for inputting the first digital signal generated by the signal generating unit.
6. The digital-to-analog converter according to any one of claims 1 to 4, wherein the thermometer code digital-to-analog conversion means comprises: the device comprises a first thermometer decoding unit, a first dynamic element matching unit, a first digital-to-analog conversion unit, a second thermometer decoding unit, a second dynamic element matching unit, a second digital-to-analog conversion unit and a second combination unit;
the first segmentation device, the first thermometer decoding unit, the first dynamic element matching unit and the first digital-to-analog conversion unit are sequentially connected;
the second sectioning device, the second thermometer decoding unit, the second dynamic element matching unit and the second digital-to-analog conversion unit are sequentially connected;
the second combination unit is respectively connected with the output end of the first digital-to-analog conversion unit and the output end of the second digital-to-analog conversion unit, and is used for combining the first analog signal converted by the first digital-to-analog conversion unit and the second analog signal converted by the second digital-to-analog conversion unit to generate a target analog signal corresponding to the digital signal to be converted.
7. The digital to analog converter of claim 6, wherein said second combining unit is a second adder.
8. A digital to analogue converter as claimed in claim 3 in which the quantizer is a 4bit quantizer and the first digital signal and the second digital signal are 4bit digital signals.
9. An electronic device comprising a digital-to-analog converter as claimed in any of claims 1-8.
CN202310694122.4A 2023-06-12 2023-06-12 Digital-to-analog converter and electronic device Active CN116436461B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310694122.4A CN116436461B (en) 2023-06-12 2023-06-12 Digital-to-analog converter and electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310694122.4A CN116436461B (en) 2023-06-12 2023-06-12 Digital-to-analog converter and electronic device

Publications (2)

Publication Number Publication Date
CN116436461A CN116436461A (en) 2023-07-14
CN116436461B true CN116436461B (en) 2023-09-19

Family

ID=87081881

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310694122.4A Active CN116436461B (en) 2023-06-12 2023-06-12 Digital-to-analog converter and electronic device

Country Status (1)

Country Link
CN (1) CN116436461B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109347452A (en) * 2018-10-17 2019-02-15 东南大学 Double frequency power amplifier digital predistortion apparatus and method based on piecewise linear function
CN109560817A (en) * 2018-11-30 2019-04-02 中国科学技术大学 A kind of analog-digital converter
CN113796013A (en) * 2019-03-14 2021-12-14 混合信号设备股份有限公司 Linearization and related methods for digital-to-analog converters (DACs) and analog-to-digital converters (ADCs)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001352247A (en) * 2000-06-09 2001-12-21 Burr-Brown Japan Ltd Method and device for converting signal being modulated in frequency region from digital to analog

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109347452A (en) * 2018-10-17 2019-02-15 东南大学 Double frequency power amplifier digital predistortion apparatus and method based on piecewise linear function
CN109560817A (en) * 2018-11-30 2019-04-02 中国科学技术大学 A kind of analog-digital converter
CN113796013A (en) * 2019-03-14 2021-12-14 混合信号设备股份有限公司 Linearization and related methods for digital-to-analog converters (DACs) and analog-to-digital converters (ADCs)

Also Published As

Publication number Publication date
CN116436461A (en) 2023-07-14

Similar Documents

Publication Publication Date Title
US9654135B2 (en) AD converter including a capacitive DAC
US5977899A (en) Digital-to-analog converter using noise-shaped segmentation
US7969340B2 (en) Noise-shaped segmented digital-to-analog converter
CN1976235A (en) Time-interleaved AD converter
WO2001067614A1 (en) Digital cancellation of d/a converter noise in pipelined a/d converters
US8963754B2 (en) Circuit for digitizing a sum of signals
TW201306493A (en) Analog-to-digital converter and analog-to-digital conversion method
CN109936369B (en) Hybrid structure SAR-VCO ADC
CN111654285A (en) Digital background calibration method for capacitor mismatch and gain error of pipeline SAR ADC
CN116170021A (en) Pipeline successive approximation type analog-to-digital converter, integrated circuit and electronic equipment
CN113271102B (en) Pipelined analog-to-digital converter
CN116436461B (en) Digital-to-analog converter and electronic device
CN1945978B (en) Pipeline ADC employing integral non-linear error correction
US20110285564A1 (en) Method of gain calibration of an adc stage and an adc stage
US7283081B2 (en) Application circuit and method for shaping noises
CN111371456B (en) Second-order mismatch error shaping technique in full dynamic range NS SAR ADC
CN114095030A (en) Sigma-delta ADC (analog to digital converter) for fully-differential chord tone elimination
CN111654289B (en) Signal processing device, method and analog-digital converter
CN101051840A (en) Non-linear error correcting method for multiple position quantizer used in sigma Delta A/D and D/A converter
CN107517059B (en) Circuit and method for improving conversion speed of analog-to-digital converter
CN113783572B (en) Method for setting reverse gain coefficient in sigma-delta analog-to-digital converter
CN116054836A (en) Three-step zoom ADC and analog-to-digital conversion method
US7986258B2 (en) Analog-digital conversion cell and analog-digital converter
Xie A digital foreground calibration method for SAR ADCs with redundancy
Bakhtar et al. A Low Power Pipeline ADC with Digital Correction Logic

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant