CN116418328A - Shutdown control circuit, battery management system and battery pack - Google Patents
Shutdown control circuit, battery management system and battery pack Download PDFInfo
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- CN116418328A CN116418328A CN202310680171.2A CN202310680171A CN116418328A CN 116418328 A CN116418328 A CN 116418328A CN 202310680171 A CN202310680171 A CN 202310680171A CN 116418328 A CN116418328 A CN 116418328A
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- 238000001514 detection method Methods 0.000 claims abstract description 34
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- 230000002159 abnormal effect Effects 0.000 description 2
- 238000007599 discharging Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 description 1
- HBBGRARXTFLTSG-UHFFFAOYSA-N Lithium ion Chemical compound [Li+] HBBGRARXTFLTSG-UHFFFAOYSA-N 0.000 description 1
- FKNQFGJONOIPTF-UHFFFAOYSA-N Sodium cation Chemical compound [Na+] FKNQFGJONOIPTF-UHFFFAOYSA-N 0.000 description 1
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- 238000004891 communication Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- QHGJSLXSVXVKHZ-UHFFFAOYSA-N dilithium;dioxido(dioxo)manganese Chemical compound [Li+].[Li+].[O-][Mn]([O-])(=O)=O QHGJSLXSVXVKHZ-UHFFFAOYSA-N 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052744 lithium Inorganic materials 0.000 description 1
- 229910001416 lithium ion Inorganic materials 0.000 description 1
- GELKBWJHTRAYNV-UHFFFAOYSA-K lithium iron phosphate Chemical compound [Li+].[Fe+2].[O-]P([O-])([O-])=O GELKBWJHTRAYNV-UHFFFAOYSA-K 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/007—Regulation of charging or discharging current or voltage
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
- H01M2010/4271—Battery management systems including electronic circuits, e.g. control of current or voltage to keep battery in healthy state, cell balancing
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Abstract
The embodiment of the invention provides a shutdown control circuit, a battery management system and a battery pack. The off control circuit includes: the detection module is connected with a source electrode of a switching tube, a drain electrode of the switching tube is connected to a battery anode, the source electrode of the switching tube is connected to a load or a power supply anode, a grid electrode of the switching tube is used for receiving a turn-off control signal to enable the switching tube to be turned off, and the detection module is used for detecting voltage variation generated when the source electrode is turned off from the load or the power supply anode; the driving module is connected with the detection module and is used for generating a first driving signal when the voltage fluctuation of the source electrode meets a first voltage drop condition; and the pull-down module is connected with the driving module and the grid electrode of the switching tube and is used for pulling down the voltage of the turn-off control signal according to the first driving signal.
Description
Technical Field
The embodiment of the invention relates to the technical field of electronic circuits, in particular to a shutdown control circuit, a battery management system and a battery pack.
Background
The MOS transistor may be provided on the positive side of the power supply as a switching transistor for managing the charge and discharge of the battery to perform charge and discharge management of the battery, for example, a source electrode of the MOS transistor is connected to the positive side of the power supply, and a gate electrode of the MOS transistor is driven by a special gate driving circuit to turn on or off the MOS transistor. When the MOS tube is turned off by reducing the gate voltage of the MOS tube, the source electrode of the MOS tube is disconnected from the positive electrode side of the power supply, so that the source voltage of the MOS tube is suddenly reduced.
The existing turn-off control circuit of the MOS tube is difficult to realize the following from the gate voltage to the source voltage of the MOS tube, and because various non-ideal effects and parasitic factors exist in the MOS tube, higher turn-off current is generated in the MOS tube, and reliable turn-off cannot be realized.
Disclosure of Invention
In view of the above, the present invention provides a shutdown control circuit, a battery management system and a battery pack to at least partially solve the above-mentioned problems.
According to a first aspect of an embodiment of the present invention, there is provided a shutdown control circuit including: the detection module is connected with a source electrode of a switching tube, a drain electrode of the switching tube is connected to a battery anode, the source electrode of the switching tube is connected to a load or a power supply anode, a grid electrode of the switching tube is used for receiving a turn-off control signal to enable the switching tube to be turned off, and the detection module is used for detecting voltage variation generated when the source electrode is turned off from the load or the power supply anode; the driving module is connected with the detection module and is used for generating a first driving signal when the voltage fluctuation of the source electrode meets a first voltage drop condition; and the pull-down module is connected with the driving module and the grid electrode of the switching tube and is used for pulling down the voltage of the turn-off control signal according to the first driving signal.
In another implementation manner of the present invention, the detection module includes a first PMOS transistor, a source of the first PMOS transistor is connected to a source of the switching transistor, a gate of the first PMOS transistor is connected to a gate of the switching transistor, and a drain of the first PMOS transistor is connected to the driving module, and is configured to output a voltage variation of the source to the driving module.
In another implementation manner of the present invention, the driving module includes a trigger circuit, an input end of the trigger circuit is connected to a drain electrode of the first PMOS transistor, and when a voltage variation of the source electrode meets the first voltage drop condition, an output end of the trigger circuit outputs a trigger signal, and a voltage of the trigger signal is biased and adjusted according to the preset driving parameter, so as to obtain a voltage of the first driving signal.
In another implementation manner of the present invention, the driving module further includes a bias circuit, an input end of the bias circuit is connected to an output end of the trigger circuit, and is configured to receive the trigger signal, the output end of the bias circuit outputs the first driving signal, and the bias circuit performs bias adjustment on a voltage of the trigger signal according to a preset driving parameter, so as to obtain a voltage of the first driving signal.
In another implementation manner of the invention, the bias circuit comprises a first current mirror, a second NMOS tube, a second resistor and a third resistor, wherein the first current mirror is composed of a second PMOS tube and a third PMOS tube, a common source electrode of the first current mirror is connected to a bias voltage, a drain electrode of the second PMOS tube is connected to a drain electrode of the second NMOS tube, a source electrode of the second NMOS tube is connected to one end of the second resistor, the other end of the second resistor is grounded, and a grid electrode of the second NMOS tube is used as an input end of the bias circuit. The drain electrode of the third PMOS tube is connected to one end of the third resistor, the other end of the third resistor is grounded, and the output end of the bias circuit is arranged between the drain electrode of the third PMOS tube and the third resistor.
In another implementation of the present invention, the trigger circuit is an inverting trigger, and a voltage of the trigger signal varies in positive correlation with a voltage of the first driving signal. The pull-down module comprises a first NMOS tube, wherein the drain electrode of the first NMOS tube is connected to the grid electrode of the switch tube, the source electrode of the first NMOS tube is grounded, and the grid electrode of the first NMOS tube is connected to the driving module and used for receiving the first driving signal to enable the first NMOS tube to be connected.
In another implementation manner of the present invention, the detection module further includes a pull-down circuit, one end of the pull-down circuit is connected to the drain electrode of the first PMOS transistor, the other end of the pull-down circuit is grounded, one end of the driving module is connected between the drain electrode of the first PMOS transistor and one end of the pull-down circuit, and the other end of the driving module is connected to the pull-down module.
In another implementation manner of the present invention, the detection module further includes a first clamping circuit, one end of the first clamping circuit is connected to one end of the pull-down circuit, and the other end of the first clamping circuit is grounded.
In another implementation manner of the present invention, the first clamping circuit includes a sixth NMOS transistor and a second current mirror composed of a third NMOS transistor and a fourth NMOS transistor, where a common source of the second current mirror is grounded, a gate of the sixth NMOS transistor is connected to a drain, a source of the sixth NMOS transistor is connected to a drain of the third NMOS transistor, and a drain of the fourth NMOS transistor is connected between the driving module and the pull-down module.
In another implementation of the present invention, the detection module is further configured to detect a voltage variation of the gate of the switching tube. The driving module is further configured to generate a second driving signal when the voltage variation of the gate satisfies a second voltage drop condition, where the second driving signal is used to prohibit the pull-down module from pulling down the voltage of the turn-off control signal.
In another implementation manner of the invention, the detection module further comprises a second clamping circuit and a first resistor, wherein the second clamping circuit and the first resistor are connected in parallel between the grid electrode of the first PMOS transistor and the grid electrode of the switching transistor.
In another implementation manner of the invention, the second clamping circuit comprises a fourth resistor and a nonlinear device which are connected in series, and when the nonlinear device is conducted reversely, the voltage at two ends of the second clamping circuit is smaller than the gate-source voltage of the first PMOS tube.
According to a second aspect of an embodiment of the present invention, there is provided a battery management system including: the power supply control unit is arranged between the battery anode and the power supply anode or between the battery anode and the load; the off control circuit according to the first aspect is connected to a switching tube in the power supply control unit.
According to a third aspect of the embodiment of the present invention, there is provided a battery pack including: a battery cell module; and a battery management system according to the second aspect.
In the embodiment of the invention, the detection module is connected with the source electrode of the switching tube, the drain electrode of the switching tube is connected with the positive electrode of the battery, the source electrode of the switching tube is connected with the positive electrode of the load or the power supply, and the grid electrode of the switching tube is used for receiving the turn-off control signal to turn off the switching tube, so that the detection module is adopted to reliably detect the voltage variation generated when the source electrode is disconnected with the positive electrode of the load or the power supply. In addition, the driving module can generate a first driving signal when the detected voltage fluctuation of the source electrode meets a first voltage drop condition, and the pull-down module further pulls down the voltage of the turn-off control signal according to the first driving signal, so that the source electrode voltage of the switching tube is followed.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments described in the embodiments of the present invention, and other drawings may be obtained according to these drawings for a person having ordinary skill in the art.
Fig. 1 is a schematic view of a battery pack according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of a partial circuit structure of a battery management system of the battery pack of the embodiment of fig. 1.
Fig. 3 is a schematic block diagram of a shutdown control circuit according to another embodiment of the invention.
Fig. 4 is a circuit diagram of one example of the off control circuit of fig. 3.
Fig. 5 is an exemplary circuit diagram of a bias circuit of the off control circuit of fig. 3.
Fig. 6A-6B illustrate exemplary circuit diagrams of the second clamp circuit of the embodiment of fig. 3.
Fig. 7A-7C illustrate exemplary circuit diagrams of the third clamp circuit or the fourth clamp circuit of the embodiment of fig. 3.
Fig. 8 shows an exemplary circuit diagram of the first clamp circuit of the embodiment of fig. 3.
Fig. 9 shows a schematic block diagram of a battery management system according to another embodiment of the present invention.
Detailed Description
In order to better understand the technical solutions in the embodiments of the present invention, the following description will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which are derived by a person skilled in the art based on the embodiments of the present invention, shall fall within the scope of protection of the embodiments of the present invention.
The implementation of the embodiments of the present invention will be further described below with reference to the accompanying drawings.
With the development of battery technology, lithium ion batteries such as lithium iron phosphate batteries, lithium manganate batteries, ternary polymer lithium batteries, lead-acid batteries, sodium ion batteries, and the like may be used as the energy storage battery. The energy storage battery is widely applied in various scenes, and can be used as a power battery in electric equipment such as unmanned aerial vehicles, electric tools, electric bicycles, electric motorcycles, energy storage systems and the like.
The energy storage battery can provide electric energy for electric equipment in the form of a battery pack, and a battery management system (Battery Management System, BMS) can monitor the battery pack in different application scenes, manage the charging and discharging of the battery pack, and improve the working efficiency and the service life of the battery pack. Specifically, the battery management system may perform control management such as battery state monitoring, battery state analysis, battery safety protection, energy control management, and battery information management. The battery management system can be connected with the battery cell module and is arranged in the battery pack to manage the charging and discharging of the battery cell module, wherein the battery cell module comprises a plurality of battery cells, and the battery cells can be connected in series, in parallel or in series-parallel.
Fig. 1 is a schematic view of an exemplary battery pack. The battery pack 100 of fig. 1 includes a battery cell module 110 and a battery management system 120. The battery management system 120 includes a power control circuit 130, a controller 150, and other functional circuits 160. The power supply control circuit 130 is electrically connected to the controller 150 and the other functional circuits 160 for supplying power to the controller 150 and the other functional circuits 160. The voltage required by the controller 150 is smaller than the voltage provided by the cell module 110, and in general, the power supply control circuit 130 performs a step-down process on the voltage output from the b+ side of the cell module 110, and supplies power to the controller 150 based on the step-down voltage.
In some examples, other functional circuitry 160 includes, but is not limited to, communication circuitry, peripheral circuitry (e.g., digital input output circuitry), etc., with other functional circuitry 160 and controller 150 being separate modules in the battery management system.
Fig. 2 is a schematic diagram of the power supply control circuit 130 of fig. 1. In one specific implementation, the power supply control circuit 130 includes a power supply control unit 131, a driving circuit 132, and a shutdown control circuit 133. Specifically, the power supply control unit 131 includes at least a switching tube NM20 for charge control and a switching tube NM0 for discharge control, wherein R20 is connected between the gate and the source of NM20, R23 is connected between the gate and the source of NM0, a resistor R21 is (optionally) connected between the driving circuit 132 and the gate of NM20, and a resistor R22 is (optionally) connected between the driving circuit 132 and the gate of NM 0. The driving circuit 132 may be used for switching of the NM20 and NM0 of the switching tube as a whole or configured as two independent driving modules for switching of the NM20 and NM0 of the switching tube, respectively, to realize charge control and discharge control.
The turn-off control circuit 133 is used for turn-off control of the switching tube NM0, and since various non-ideal effects and parasitic factors exist in the NM0, a higher turn-off current is generated in the NM0, and reliable turn-off of the NM0 cannot be achieved.
The shutdown control circuit of one embodiment of the present invention will be described in detail below in conjunction with fig. 3. The shutdown control circuit of fig. 3 may be, for example, shutdown control circuit 133 of fig. 2, but is not limited to shutdown control circuit 133 of fig. 2. The turn-off control circuit of this embodiment includes a detection module 310, a driving module 320, and a pull-down module 330.
The detection module 310 is connected to a source of a switching tube, a drain of the switching tube is connected to a battery anode, the source of the switching tube is connected to a load or a power source anode, a gate of the switching tube is used for receiving a turn-off control signal to turn off the switching tube, and the detection module is used for detecting voltage variation generated when the source is disconnected from the load or the power source anode. For example, the detection module may be implemented as any device structure that detects voltage variations that occur when the source is disconnected from the load or positive electrode of the power supply. The detection module includes a first PMOS transistor that is not limited in its implementation to the following.
The driving module 320 is connected to the detecting module, and is configured to generate a first driving signal when the voltage variation of the source electrode satisfies a first voltage drop condition. The driving module 320 may be implemented as any device structure that generates a first driving signal when the voltage variation of the source satisfies the first voltage drop condition. The driving module 320 includes, but is not limited to, being implemented as an inversion flip-flop as follows.
The pull-down module 330 is connected to the driving module 320 and the gate of the switching tube, and is configured to pull down the voltage of the turn-off control signal according to the first driving signal. The pull-down module 330 may be implemented as any device structure that pulls down the voltage of the turn-off control signal according to the first driving signal. The pull-down module 330 includes, but is not limited to, being implemented as a first NMOS transistor, hereinafter.
In the embodiment of the invention, the detection module is connected with the source electrode of the switching tube, the drain electrode of the switching tube is connected with the positive electrode of the battery, the source electrode of the switching tube is connected with the positive electrode of the load or the power supply, and the grid electrode of the switching tube is used for receiving the turn-off control signal to turn off the switching tube, so that the detection module is adopted to reliably detect the voltage variation generated when the source electrode is disconnected with the positive electrode of the load or the power supply. In addition, the driving module 320 can generate a first driving signal when the detected voltage variation of the source electrode meets the first voltage drop condition, and the pull-down module 330 further pulls down the voltage of the turn-off control signal according to the first driving signal, so as to realize the following of the source electrode voltage of the switching tube.
A specific example of the off control circuit will be described in detail below with reference to fig. 4. The detection module 310 of the turn-off control circuit is used for detecting voltage variation generated when the source is disconnected from the load or the positive electrode of the power supply. As an example, the detection module 310 may include PM0 (an example of the first PMOS transistor), where a source of PM0 is connected to a source of the switching transistor NM0, and a gate of PM0 is connected to a gate of NM 0.
Further, the detection module 310 may further include a current source I0, and accordingly, the drain of the PM0 is connected to one end of the current source I0, and the other end of the current source I0 is grounded.
Without loss of generality, the source of the first PMOS transistor is connected to the source of the switching transistor, the gate of the first PMOS transistor is connected to the gate of the switching transistor, and the drain of the first PMOS transistor is connected to the driving module 320, for outputting the voltage variation of the source to the driving module 320.
Referring further to fig. 4, the driving module 320 is configured to generate a first driving signal when the voltage variation of the source satisfies the first voltage drop condition, and as an example, the driving module 320 may include a schmitt trigger S1 (an example of a trigger circuit), where an input terminal of the schmitt trigger S1 is connected between a drain of the PM0 and the current source I0 or a drain of the pull-down resistor and the PM0, that is, one terminal of the first PMOS transistor and the pull-down circuit (another terminal of the pull-down circuit may be connected to a low voltage side or ground). Accordingly, one end of the driving module 320 is connected between the drain of the first PMOS transistor and one end of the pull-down circuit, and the other end of the driving module 320 is connected to the pull-down module 330.
It will be appreciated that the current source I0 or pull-down resistor here acts to cause a trigger circuit, such as a schmitt trigger, to capture the source voltage variations. Then, the trigger circuit converts the voltage fluctuation of the source from the analog domain to the digital domain when the voltage fluctuation of the source satisfies the first voltage drop condition. The first driving signal output by the driving module 320 is identical to the edge signal state of the trigger signal, and depending on the driving signal state required by the pull-down module 330, the voltage value of the trigger signal may be identical to the voltage value of the first driving signal, or may satisfy a certain numerical relationship with the voltage of the first driving signal.
Without loss of generality, the input end of the trigger circuit is connected to the drain electrode of the first PMOS tube, when the voltage variation of the source electrode meets the first voltage drop condition, the output end of the trigger circuit outputs a trigger signal, and the voltage of the trigger signal is subjected to bias adjustment according to preset driving parameters, so that the voltage of the first driving signal is obtained.
With further reference to fig. 4, depending on the state of the driving signal required by the pull-down module 330, the voltage value of the triggering signal and the voltage of the first driving signal satisfy a certain numerical relationship, for example, a number relationship of forward switches. It should be appreciated that the above-described numerical relationship may be performed by the bias circuit B1.
Without losing generality, the input end of the bias circuit is connected to the output end of the trigger circuit and used for receiving the trigger signal, the output end of the bias circuit outputs a first driving signal, and the bias circuit carries out bias adjustment on the voltage of the trigger signal according to preset driving parameters to obtain the voltage of the first driving signal.
More specifically, the bias circuit includes a first current mirror composed of PM2 and PM3, NM2, R2, and R3, a common source of the first current mirror is connected to a bias voltage (e.g., a drain b+ of a switching transistor), a drain of PM2 is connected to a drain of NM2, a source of NM2 is connected to one end of R2, the other end of R2 is grounded, and a gate of NM2 receives a trigger signal fet_ctr as an input terminal of the bias circuit. The drain of PM3 is connected to one end of R3, the other end of R3 is grounded, and the bias circuit outputs a first drive signal fet_g between the drain of PM3 and R3.
Specifically, the trigger signal fet_ctg has the following relationship with the first drive signal fet_g:
v (fet_g) = (V (fet_ctr) -V (GS, NM 2)). K×r3/R2, wherein k= (W/L) PM3 /(W/L) PM2 ;(W/L) PM3 Is the aspect ratio of PM3, (W/L) PM2 Is the aspect ratio of PM 2; v (GS, NM 2) is the gate-source voltage of NM 2; v (fet_g) is the voltage of the first drive signal or the second drive signal fet_g; v (fet_ctr) is the voltage of the trigger signal fet_ctr.
Without loss of generality, the bias circuit comprises a first current mirror, a second NMOS tube, a second resistor and a third resistor, wherein the first current mirror, the second NMOS tube, the second resistor and the third resistor are formed by a second PMOS tube (PM 2) and a third PMOS tube (PM 3), a common source electrode of the first current mirror is connected to a bias voltage, a drain electrode of the second PMOS tube is connected to a drain electrode of the second NMOS tube, a source electrode of the second NMOS tube is connected to one end of the second resistor, the other end of the second resistor is grounded, and a grid electrode of the second NMOS tube serves as an input end of the bias circuit. And the drain electrode of the third PMOS tube is connected to one end of the third resistor, the other end of the third resistor is grounded, and the output end of the bias circuit is arranged between the drain electrode of the third PMOS tube and the third resistor.
In some examples, when the voltage value of the trigger signal and the voltage of the first driving signal satisfy the positive correlation variation, the trigger circuit is an inverting trigger, so that when the voltage variation of the source electrode is reduced, the voltage variation can be converted into an increased first driving signal by the inverting trigger, and the pull-down module 330 can be configured to increase the first driving signal to a certain threshold value to trigger pull-down of the gate electrode of the switching tube. For example, when the pull-down module 330 is configured as a first NMOS transistor, the threshold may be a gate-source voltage of the NMOS transistor.
With further reference to fig. 4, the first NMOS transistor may be implemented such that the drains of NM1, NMZ1 are connected to the gates of the switching transistors, the source of NM1 is grounded, and the gate of NM1 is connected to the output of the bias circuit. The threshold may be a threshold set for a gate-source voltage of the first NMOS transistor, and when the threshold is satisfied, the NM1 receives the first driving signal to turn on the first NMOS transistor.
It should be appreciated that the source of the first NMOS transistor can be connected to a low voltage side (e.g., ground), thereby driving the first NMOS transistor on with a gate voltage higher than the source voltage, thereby reducing the power consumption of the driving module 320 and the turn-off control circuit. Further, the reverse trigger converts the voltage drop change of the source electrode of the switching tube into the increase of the first driving signal, and the control mechanism of the first NMOS tube is better matched.
Without loss of generality, the drain electrode of the first NMOS tube is connected to the gate electrode of the switch tube, the source electrode of the first NMOS tube is grounded, and the gate electrode of the first NMOS tube is connected to the driving module 320 and used for receiving a first driving signal to enable the first NMOS tube to be turned on.
The detailed circuit configuration of the off-control voltage and the off-control principle in the case where the voltage variation of the source of the switching tube is reduced are described in detail above, and the off-circuit control principle in other cases will be described in detail below.
Specifically, when the voltage variation of the source of the switching transistor detected by the detection module 310 is rising, the trigger signal and the first driving signal output by the reverse trigger are falling (i.e., in the case of normal falling), the possibility of reaching the threshold value of the pull-down module 330 is increased, i.e., the possibility of prohibiting the pull-down of the pull-down module 330 is increased, thereby prohibiting or alleviating the gate voltage of the switching transistor from following the source voltage.
However, in a case where the voltage fluctuation of the source is jittered or unstable such as when the source of the switching tube is disconnected from the battery positive electrode, the voltage drop of the source should not be determined to be a normal drop (i.e., a case of abnormal drop), at which time the inverse flip-flop may be implemented as a schmitt trigger that determines the voltage fluctuation of the source using a hysteresis mechanism formed by a first falling edge threshold indicated by a first voltage drop condition and a second falling edge threshold indicated by a second voltage drop condition, at which time the first falling edge threshold is lower than the second falling edge threshold. That is, the voltage drop of the source is the above-described abnormal drop for the first voltage drop condition, but the voltage drop of the source is still normal for the second voltage drop condition, the schmitt trigger outputs the trigger signal consistent with the previous one, i.e., the trigger operation of the schmitt trigger is not caused, thereby improving the reliability of the trigger circuit and the reliability of the driving module 320, i.e., outputting the more reliable first driving signal.
As the gate voltage of the switching tube drops, when the gate voltage is smaller than the gate-source voltage threshold value that the source voltage exceeds PM0, PM0 turns off, the source connected to the PACK terminal cannot transfer the voltage variation of the PACK terminal to the drain of PM0, that is, the voltage variation of the source is greatly reduced compared with the previous drop state and even the voltage variation of the source is stopped to drop, at this time, the voltage drop of the source meets the second voltage drop condition and no longer meets the first voltage drop condition, the trigger signal output by the schmitt trigger changes, and accordingly the bias circuit outputs the second drive signal.
Without loss of generality, the detection module is further configured to detect a voltage variation of the gate of the switching tube, and the driving module 320 is further configured to generate a second driving signal when the voltage variation of the gate meets a second voltage drop condition, where the second driving signal is configured to prohibit the pull-down module 330 from pulling down the voltage of the turn-off control signal.
With further reference to fig. 4, the pull-down circuit may further include a capacitor C0 for bypassing the current source I0 or the ac signal of the pull-down resistor, thereby improving the reliability of the pull-down circuit and thus the reliability of the turn-off control circuit.
In addition, the pull-down circuit may further include a first CLAMP circuit CLAMP1, one end of the first CLAMP circuit CLAMP1 is connected to one end of the pull-down circuit, and the other end of the first CLAMP circuit CLAMP1 is grounded.
With further reference to fig. 8, in one specific implementation of the first clamp circuit, the first clamp circuit includes a current mirror composed of NM3 (an example of a third NMOS transistor) and NM4 (an example of a fourth NMOS transistor), the gate of NM3 is connected to the gate of NM4, the source of NM3 and the source of NM4 are connected to a low voltage side or ground, the gate and drain of at least one NM6 (an example of a sixth NMOS transistor) are connected with a relatively low impedance in a direction from source to drain, and a relatively high impedance in a direction from drain to source for providing a stable voltage drop, and the number of series of NM6 depends on the design requirements such that the sum of the stable voltage drops provided by each of the at least one NM6 meets the requirements.
In fig. 8, the output current of the drain of NM4 is a mirror image of the input current of the drain of NM3, and the drain of NM4 may be connected between the driving module 320 and the pull-down module 330.
Without loss of generality, the first clamping circuit comprises a sixth NMOS tube and a second current mirror formed by a third NMOS tube and a fourth NMOS tube, the common source electrode of the second current mirror is grounded, the grid electrode of the sixth NMOS tube is connected with the drain electrode, the source electrode of the sixth NMOS tube is connected to the drain electrode of the third NMOS tube, and the drain electrode of the fourth NMOS tube is connected between the driving module 320 and the pull-down module 330. Based on the above circuit configuration, the superposition of the drop-down voltage of the drain electrode of the pull-down circuit and the PM0 may generate an excessive voltage drop, and at this time, the first clamping circuit generates a current in the drain-to-source direction, thereby pulling down the voltage of the NM1 driving signal, which is beneficial to forming the second driving signal for turning off the NM1 to stop the following of the source voltage of the switching tube.
Referring to fig. 4, the detection module 310 further includes a second CLAMP circuit CLAMP2 and a first resistor R1, where the second CLAMP circuit CLAMP2 and the first resistor R1 are connected in parallel between the gate of the first PMOS transistor and the gate of the switching transistor.
In the example of fig. 6A, the second CLAMP circuit CLAMP2 includes at least one resistor R4, at least one PM4 (an example of a fourth PMOS transistor), and at least one PM5 (an example of a fifth PMOS transistor), the gate and drain of the PM4 are connected, the gate and source of the PM5 are connected in a body diode mode, one end of the resistor R4 serves as one end of the second CLAMP circuit, the other end of the resistor R4 is connected to the source of the PM4, the drain of the PM4 is connected to the source of the PM5, and the drain of the PM5 serves as the other end of the second CLAMP circuit. When a plurality of PMs 4 are connected in series, the drain of the PM4 is connected to the source of the neighboring PM4, and when a plurality of PMs 5 are connected in series, the drain of the PM5 is connected to the source of the neighboring PM 5.
Further, fig. 6B shows another example of the second clamp circuit, and in fig. 6B, the second clamp circuit includes at least one resistor R6 and at least one PM6 (an example of a sixth PMOS transistor), and the source-to-gate connection of each PM6 is in the body diode mode. In the case where a plurality of PMs 6 are connected in series, the drain of the PM6 is connected to the source of the neighboring PM 6.
Without loss of generality, the second CLAMP circuit CLAMP2 comprises a fourth resistor R4 and a nonlinear device which are connected in series, and when the nonlinear device is conducted reversely, the voltage at two ends of the second CLAMP circuit is smaller than the gate-source voltage of the first PMOS tube. Since the fourth resistor R4 is advantageous in generating a stable voltage drop, excessive pull-down of the gate voltage of the switching tube NM0 when NM1 is turned on is alleviated or avoided.
Referring to fig. 4, a third clamping circuit may be disposed between the gate and the source of the first PMOS transistor, where one end of the third clamping circuit is connected to the gate of the first PMOS transistor and the other end of the third clamping circuit is connected to the source of the first PMOS transistor.
In addition, a fourth clamp circuit such as a third clamp circuit may be provided between the gate and the source of the first NMOS transistor, where one end of the fourth clamp circuit is connected to the gate of the first NMOS transistor and the other end of the fourth clamp circuit is connected to the source of the first NMOS transistor.
Fig. 7A to 7C show respective examples of the third clamp circuit or the fourth clamp circuit. In the example of fig. 7A, the third clamp circuit or the fourth clamp circuit includes at least one PM7 (an example of a seventh PMOS), and the gate and the drain of each PM7 are connected. In the case where a plurality of PMs 7 are connected in series, the drain of the PM7 is connected to the source of the adjacent PM 7. The source of PM7 is connected to the high voltage side and the drain of PM7 is connected to the low voltage side.
In the example of fig. 7B, the third clamp circuit or the fourth clamp circuit includes at least one NM5 (an example of a fifth NMOS), and the gate and the drain of each NM5 are connected. In the case where a plurality of NMs 5 are connected in series, the drain of NM5 is connected to the source of the adjacent NM 5. The source of NM5 is connected to the low voltage side and the drain of NM5 is connected to the high voltage side.
In the example of fig. 7C, the third clamp circuit or the fourth clamp circuit includes a diode D1 such as a zener diode, a cathode of the diode D1 is connected to the high voltage side, and an anode of the diode D1 is connected to the low voltage side.
Fig. 9 shows a schematic block diagram of a battery management system according to another embodiment of the present invention. The battery management system 120 of fig. 9 includes a power supply control unit 131 and a shutdown control circuit 133, where the power supply control unit 131 is disposed between a battery positive electrode (e.g., a positive electrode of a battery module) and a power supply positive electrode (e.g., a positive electrode of a battery pack) or between the battery positive electrode and a load (e.g., a powered device). The off control circuit 133 is connected to a switching tube such as NM0 in the power supply control unit.
Thus, particular embodiments of the present subject matter have been described. Other embodiments are within the scope of the following claims. In some cases, the actions recited in the claims can be performed in a different order and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may be advantageous.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.
In this specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for system embodiments, since they are substantially similar to method embodiments, the description is relatively simple, as relevant to see a section of the description of method embodiments.
The foregoing is merely exemplary of the present application and is not intended to limit the present application. Various modifications and changes may be made to the present application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc. which are within the spirit and principles of the present application are intended to be included within the scope of the claims of the present application.
Claims (14)
1. A shutdown control circuit, comprising:
the detection module is connected with a source electrode of a switching tube, a drain electrode of the switching tube is connected to a battery anode, the source electrode of the switching tube is connected to a load or a power supply anode, a grid electrode of the switching tube is used for receiving a turn-off control signal to enable the switching tube to be turned off, and the detection module is used for detecting voltage variation generated when the source electrode is turned off from the load or the power supply anode;
the driving module is connected with the detection module and is used for generating a first driving signal when the voltage fluctuation of the source electrode meets a first voltage drop condition;
the pull-down module is connected with the driving module and the grid electrode of the switch tube, and the voltage of the turn-off control signal is pulled down according to the first driving signal.
2. The shutdown control circuit of claim 1 wherein the detection module comprises a first PMOS transistor having a source connected to the source of the switching transistor, a gate connected to the gate of the switching transistor, and a drain connected to the drive module for outputting a voltage variation of the source to the drive module.
3. The turn-off control circuit according to claim 2, wherein the driving module includes a trigger circuit, an input end of the trigger circuit is connected to a drain electrode of the first PMOS transistor, and when a voltage variation of the source electrode meets the first voltage drop condition, an output end of the trigger circuit outputs a trigger signal, and a voltage of the trigger signal is biased and adjusted according to a preset driving parameter, so as to obtain a voltage of the first driving signal.
4. The shutdown control circuit of claim 3 wherein the drive module further comprises a bias circuit, an input of the bias circuit is connected to an output of the trigger circuit for receiving the trigger signal, an output of the bias circuit outputs the first drive signal, and the bias circuit performs bias adjustment on a voltage of the trigger signal according to the preset drive parameter to obtain a voltage of the first drive signal.
5. The turn-off control circuit according to claim 4, wherein the bias circuit comprises a first current mirror, a second NMOS transistor, a second resistor, and a third resistor composed of a second PMOS transistor and a third PMOS transistor, a common source of the first current mirror is connected to a bias voltage, a drain of the second PMOS transistor is connected to a drain of the second NMOS transistor, a source of the second NMOS transistor is connected to one end of the second resistor, the other end of the second resistor is grounded, a gate of the second NMOS transistor is used as an input terminal of the bias circuit,
the drain electrode of the third PMOS tube is connected to one end of the third resistor, the other end of the third resistor is grounded, and the output end of the bias circuit is arranged between the drain electrode of the third PMOS tube and the third resistor.
6. The shutdown control circuit of claim 3 wherein the trigger circuit is an inverting trigger, the voltage of the trigger signal varies in positive correlation with the voltage of the first drive signal,
the pull-down module comprises a first NMOS tube, wherein the drain electrode of the first NMOS tube is connected to the grid electrode of the switch tube, the source electrode of the first NMOS tube is grounded, and the grid electrode of the first NMOS tube is connected to the driving module and used for receiving the first driving signal to enable the first NMOS tube to be connected.
7. The shutdown control circuit of claim 2 wherein the detection module further comprises a pull-down circuit, one end of the pull-down circuit is connected to the drain of the first PMOS transistor, the other end of the pull-down circuit is grounded, one end of the driving module is connected between the drain of the first PMOS transistor and one end of the pull-down circuit, and the other end of the driving module is connected to the pull-down module.
8. The shutdown control circuit of claim 2 wherein the detection module further comprises a first clamp circuit having one end connected to one end of the pull-down circuit and the other end grounded.
9. The shutdown control circuit of claim 8 wherein the first clamp circuit comprises a sixth NMOS transistor and a second current mirror comprised of a third NMOS transistor and a fourth NMOS transistor, the common source of the second current mirror being grounded, the gate of the sixth NMOS transistor being connected to the drain, the source of the sixth NMOS transistor being connected to the drain of the third NMOS transistor, the drain of the fourth NMOS transistor being connected between the drive module and the pull-down module.
10. The shutdown control circuit of claim 2 wherein the detection module is further configured to detect a voltage variation of a gate of the switching tube;
the driving module is further configured to generate a second driving signal when the voltage variation of the gate satisfies a second voltage drop condition, where the second driving signal is used to prohibit the pull-down module from pulling down the voltage of the turn-off control signal.
11. The shutdown control circuit of claim 2 wherein the detection module further comprises a second clamp circuit and a first resistor, the second clamp circuit and the first resistor being connected in parallel between the gate of the first PMOS transistor and the gate of the switching transistor.
12. The shutdown control circuit of claim 11 wherein the second clamp circuit comprises a fourth resistor in series with a nonlinear device that is less than the gate-source voltage of the first PMOS transistor at both ends when turned on in reverse.
13. A battery management system, comprising:
the power supply control unit is arranged between the battery anode and the power supply anode or between the battery anode and the load;
the shutdown control circuit according to any of claims 1-12, being connected with a switching tube in the power supply control unit.
14. A battery pack, comprising:
a battery cell module; and
the battery management system of claim 13.
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