CN116363991A - Scanning circuit, display panel and display driving method - Google Patents

Scanning circuit, display panel and display driving method Download PDF

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Publication number
CN116363991A
CN116363991A CN202310362007.7A CN202310362007A CN116363991A CN 116363991 A CN116363991 A CN 116363991A CN 202310362007 A CN202310362007 A CN 202310362007A CN 116363991 A CN116363991 A CN 116363991A
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China
Prior art keywords
display
partition
output end
transistor
turned
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CN202310362007.7A
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Chinese (zh)
Inventor
许传志
谢正芳
胡思明
卢慧玲
朱修剑
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Kunshan Govisionox Optoelectronics Co Ltd
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Kunshan Govisionox Optoelectronics Co Ltd
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Priority to CN202310362007.7A priority Critical patent/CN116363991A/en
Publication of CN116363991A publication Critical patent/CN116363991A/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/14—Display of multiple viewports
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0686—Adjustment of display parameters with two or more screen areas displaying information with different brightness or colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The embodiment of the invention discloses a scanning circuit, a display panel and a display driving method. The scanning circuit includes: the multi-stage shifting unit, a plurality of first switch modules and a plurality of level transmission modules; in the adjacent two-stage shifting units, the output end of the previous-stage shifting unit is connected with the initial signal input end of the next-stage shifting unit through a first switch module, and the first switch module is used for switching on or switching off the adjacent two-stage shifting units; each level transmission module is connected with the output end of the corresponding primary shifting unit and a signal output end of the scanning circuit, and is used for transmitting the first level to the signal output end of the scanning circuit so as to adjust the frequency of the pulse signal transmitted to the signal output end of the scanning circuit. According to the technical scheme, the display panel can display in different display partitions with different refreshing frequencies, and the position of each display partition is not fixed, so that the supportable display scene of the display panel is expanded.

Description

Scanning circuit, display panel and display driving method
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a scanning circuit, a display panel and a display driving method.
Background
Along with the continuous development of display technology, the display industry has higher and higher requirements on the image quality of display products, and the application scenes of the display products are also expanding continuously. At present, the existing display products support the technology of dynamically switching the refresh frequency, but only can support the whole screen to switch the refresh frequency at the same time, and can not display in different areas of the same screen with different refresh frequencies, so that the application of multiple display scenes in one screen is difficult to realize.
Disclosure of Invention
The embodiment of the invention provides a scanning circuit, a display panel and a display driving method, so that the display panel can display in different display partitions with different refreshing frequencies, and the position of each display partition is not fixed, thereby expanding the supportable display scene of the display panel.
In a first aspect, an embodiment of the present invention provides a scan circuit, including:
a multi-stage shift unit;
the output end of the previous stage of shifting unit is connected with the initial signal input end of the next stage of shifting unit through a first switching module in the adjacent two stages of shifting units, and the first switching module is used for switching on or switching off the adjacent two stages of shifting units;
The level transmission modules are connected with the output end of the corresponding primary shifting unit and a signal output end of the scanning circuit, and are used for transmitting the first level to the signal output end of the scanning circuit so as to adjust the frequency of a pulse signal transmitted to the signal output end of the scanning circuit; the effective level of the scanning signal output by the shifting unit is opposite to the logic of the first level.
Optionally, the scanning circuit further includes a plurality of second switch modules, wherein in the adjacent two-stage shift units, the output end of the previous-stage shift unit is connected to the output end of the next-stage shift unit through a second switch module, and the second switch modules are used for switching on or switching off the output end of the adjacent two-stage shift unit so as to control whether the scanning signal output by the previous-stage shift unit is transmitted to the output end of the next-stage shift unit, so that whether the skip-stage transmission of the scanning signal output by the shift unit is realized.
Optionally, the first switch module includes a first transistor, a first pole of the first transistor is connected to an output end of a previous stage shift unit in the adjacent two stage shift units, and a second pole of the first transistor is connected to a start signal input end of a next stage shift unit in the adjacent two stage shift units;
The second switch module comprises a second transistor, a first pole of the second transistor is connected with the output end of a previous stage shifting unit in the adjacent two-stage shifting units, and a second pole of the second transistor is connected with the output end of a next stage shifting unit in the adjacent two-stage shifting units;
optionally, one of the first transistor and the second transistor is a P-type transistor, the other is an N-type transistor, the first transistor and the second transistor are connected between the same two stages of shift units, and the gate of the first transistor and the gate of the second transistor are connected with the same control signal line;
optionally, the gates of the different first transistors are connected to different control signal lines; the gates of the different second transistors are connected to different control signal lines.
Optionally, the level transmission module includes a first switch unit and a second switch unit;
the first end of the first switch unit is connected with the output end of the shift unit, the second end of the first switch unit is connected with the signal output end of the scanning circuit, and the first switch unit is used for switching on or switching off the output end of the shift unit and the signal output end of the scanning circuit;
the first end of the second switch unit is connected with the first level signal line, the second end of the second switch unit is connected with the signal output end of the scanning circuit, and the second switch unit is used for switching on or switching off the first level signal line and the signal output end of the scanning circuit;
Optionally, the first switching unit is used for shielding the scan signal transmitted by the skip stage from being transmitted to the signal output end of the scan circuit when the first switching unit is turned off.
Optionally, the first switch module includes a first transistor, a first pole of the first transistor is connected to an output end of a previous stage shift unit in the adjacent two stage shift units, and a second pole of the first transistor is connected to a start signal input end of a next stage shift unit in the adjacent two stage shift units;
the second switch module comprises a second transistor, a first pole of the second transistor is connected with the output end of a previous stage shifting unit in the adjacent two-stage shifting units, and a second pole of the second transistor is connected with the output end of a next stage shifting unit in the adjacent two-stage shifting units;
the first switch unit comprises a third transistor, a first pole of the third transistor is connected with the output end of the shift unit, and a second pole of the third transistor is connected with the signal output end of the scanning circuit;
the second switch unit comprises a fourth transistor, a first pole of the fourth transistor is connected with the first level signal line, and a second pole of the fourth transistor is connected with a signal output end of the scanning circuit;
optionally, a first transistor, a second transistor, a third transistor and a fourth transistor connected to the output end of the same shift unit, wherein the gate of the third transistor and the gate of the first transistor are connected to the same control signal line, the gate of the fourth transistor and the gate of the second transistor are connected to the same control signal line, and the gate of the third transistor and the gate of the fourth transistor are connected to different control signal lines;
Or, the first transistor, the second transistor, the third transistor and the fourth transistor are connected with the output end of the same shifting unit, the grid electrode of the first transistor, the grid electrode of the second transistor, the grid electrode of the third transistor and the grid electrode of the fourth transistor are connected with the same control signal line, the third transistor and the first transistor are both P-type transistors, the fourth transistor and the second transistor are both N-type transistors, or the third transistor and the first transistor are both N-type transistors, and the fourth transistor and the second transistor are both P-type transistors;
alternatively, the gates of the different third transistors are connected to different control signal lines, and the gates of the different fourth transistors are connected to different control signal lines.
Optionally, the level transmission modules are arranged in one-to-one correspondence with the shifting units, and the output ends of the shifting units are connected with the signal output ends of the corresponding scanning circuits;
the first end of the ith level transmission module is connected with the output end of the ith shifting unit, the second end of the ith level transmission module is connected with the output end of the (i+1) th shifting unit, the first end of the nth level transmission module is connected with the output end of the nth shifting unit, and the second end of the nth level transmission module is connected with the first level signal line;
Wherein i is more than or equal to 1 and less than or equal to n-1, i is an integer, and n is the total number of the level transmission modules;
optionally, the level transmission module includes a fifth transistor, a first pole of the i fifth transistor is connected to an output end of the i shift unit, a second pole of the i fifth transistor is connected to an output end of the i+1th shift unit, a first pole of the n fifth transistor is connected to an output end of the n shift unit, and a second pole of the n fifth transistor is connected to the first level signal line;
optionally, gates of at least two fifth transistors are connected to different control signal lines;
optionally, gates of different fifth transistors are connected to different control signal lines.
Optionally, a first end of the level transmission module is connected with the output end of the corresponding shift unit and the signal output end of the scanning circuit, and a second end of the level transmission module is connected with the first level signal line;
optionally, the level transmission module includes a sixth transistor, a first pole of the sixth transistor is connected to the output end of the corresponding shift unit and the signal output end of the scanning circuit, and a second pole of the sixth transistor is connected to the first level signal line;
optionally, gates of at least two sixth transistors are connected to different control signal lines;
Alternatively, gates of different sixth transistors are connected to different control signal lines.
In a second aspect, an embodiment of the present invention provides a display panel, including a plurality of rows of pixel circuits and the scanning circuit of the first aspect, where a signal output end of the scanning circuit is connected to a corresponding pixel circuit.
In a third aspect, an embodiment of the present invention provides a display driving method for driving a display panel to operate, where the display panel includes a scanning circuit, and the scanning circuit includes: the device comprises a multi-stage shifting unit, a plurality of first switch modules and a plurality of level transmission modules, wherein in the adjacent two-stage shifting units, the output end of the former-stage shifting unit is connected with the initial signal input end of the latter-stage shifting unit through a first switch module; each level transmission module is connected with the output end of the corresponding primary shifting unit and a signal output end of the scanning circuit;
the display driving method includes:
according to the refresh frequency of different partitions in the display area of the display panel and the positions of the dividing lines, the working states of the first switch module and the level transmission module are controlled so as to transmit the scanning signals or the first level output by the shifting unit to the signal output end of the scanning circuit, and the frequency of the pulse signals transmitted to the signal output end of the scanning circuit is regulated; wherein, the effective level of the scanning signal output by the shifting unit is opposite to the logic of the first level.
Optionally, the first display period includes at least one first display frame and at least one second display frame; the display area comprises at least two display partitions;
according to the refresh frequency of different subareas in the display area of the display panel and the positions of dividing lines, the working states of the first switch module and the level transmission module are controlled, and the method comprises the following steps: in a first display frame, controlling the first switch module to be conducted, and transmitting a scanning signal output by the shifting unit to a signal output end of the scanning circuit;
in the second display frame, the first switch module corresponding to the partition with the large refresh frequency in the display area is controlled to be turned on, the scanning signal output by the shifting unit is transmitted to the signal output end of the scanning circuit, at least part of the first switch module corresponding to the partition with the small refresh frequency in the display area is controlled to be turned off, and the level transmission module transmits the first level to the signal output end of the scanning circuit;
optionally, the number of data voltages supplied to the pixel circuits in the display area in the first display frame is greater than the number of data voltages supplied to the pixel circuits in the display area in the second display frame;
optionally, the display driving method further includes: supplying a data voltage to the pixel circuits driving the partition having the large refresh frequency in the display area in the second display frame; stopping supplying the data voltage to the pixel circuits of the partition in the display area where the refresh frequency is small;
Optionally, the positions of the dividing lines of the different partitions in the display area are adjustable, and the positions of the dividing lines of the different partitions in the display area correspond to the positions of the dividing lines of the scanning signal output by the shifting unit, which is transmitted to the signal output end of the scanning circuit, and the first level is transmitted to the signal output end of the scanning circuit;
optionally, the refresh period corresponding to the partition with the smallest refresh frequency in the display area comprises at least one first display frame and at least one second display frame;
optionally, the duration of the first display frame is equal to the refresh period corresponding to the partition with the largest refresh frequency in the display area;
optionally, the duration of the second display frame is equal to the refresh period corresponding to the partition with the largest refresh frequency in the display area.
Optionally, the refresh frequency of the partition in the plurality of shift unit corresponding display areas located at the front stage is greater than or less than the refresh frequency of the partition in the plurality of shift unit corresponding display areas located at the rear stage, or the refresh frequency of the partition in the plurality of shift unit corresponding display areas located at the front stage is greater than the refresh frequency of the partition in the plurality of shift unit corresponding display areas located at the rear stage in the first period, and the refresh frequency of the partition in the plurality of shift unit corresponding display areas located at the front stage is less than the refresh frequency of the partition in the plurality of shift unit corresponding display areas located at the rear stage in the second period.
Optionally, the display panel further includes a plurality of second switch modules, wherein in the adjacent two-stage shift units, the output end of the previous-stage shift unit is connected to the output end of the next-stage shift unit through a second switch module, and the second switch modules are used for switching on or switching off the output end of the adjacent two-stage shift unit so as to control whether the scanning signal output by the previous-stage shift unit is transmitted to the output end of the next-stage shift unit, so as to realize whether the skip-stage transmission of the scanning signal output by the shift unit is realized;
according to the refresh frequency of different subareas in the display area of the display panel and the positions of dividing lines, the working states of the first switch module and the level transmission module are controlled, and the method comprises the following steps:
in a first display frame, controlling each first switch module to be turned on, and each second switch module to be turned off, wherein the level transmission module transmits a scanning signal output by the shifting unit to a signal output end of the scanning circuit;
in a second display frame, controlling a first switch module corresponding to a partition with high refreshing frequency in a display area to be turned on, turning off a second switch module, transmitting a scanning signal output by a shifting unit to a signal output end of a scanning circuit by a level transmission module, and controlling the first switch module corresponding to a partition with low refreshing frequency in the display area to be turned off, and transmitting a first level to the signal output end of the scanning circuit by the level transmission module;
Optionally, when the first switch module is turned on, the second switch module connected with the first switch module between the same two-stage shifting units is controlled to be turned off;
when the second switch module is turned on, the first switch module connected with the second switch module between the same two-stage shifting units is controlled to be turned off.
Optionally, the display area includes at least three display partitions, and the at least three display partitions include a first display partition, a second display partition and a third display partition that are adjacent in sequence, and refresh frequencies of two adjacent display partitions in the first display partition, the second display partition and the third display partition are different; the ordering of the shift units corresponding to the first display partition, the second display partition and the third display partition is sequentially backward; the positions of dividing lines among the first display partition, the second display partition and the third display partition are all adjustable;
the display driving method further includes:
the operating modes of the first display partition, the second display partition and the third display partition include one or more of the following:
the refreshing frequency of the first display partition and the refreshing frequency of the third display partition are the same; the refresh frequency of the first display partition is greater than the refresh frequency of the second display partition, and the display driving method further comprises the steps of:
In a first display frame, controlling each first switch module to be turned on, and each second switch module to be turned off, wherein the level transmission module transmits scanning signals output by the shifting units corresponding to the first display partition, the second display partition and the third display partition to the signal output end of the scanning circuit;
in a second display frame, a first switch module corresponding to a first display partition and a third display partition is controlled to be turned on, a second switch module corresponding to the first display partition and the third display partition is controlled to be turned off, a level transmission module corresponding to the first display partition and the third display partition transmits scanning signals output by a shifting unit corresponding to the first display partition and the third display partition to a signal output end of a scanning circuit, the first switch module corresponding to the second display partition is controlled to be turned off, a second switch module corresponding to the second display partition is controlled to be turned on, and a level transmission module corresponding to the second display partition transmits a first level to a signal output end of the scanning circuit, so that the frequency of pulse signals transmitted to the signal output end of the scanning circuit is regulated;
the first switch module, the second switch module and the level transmission module are connected with the output end of the shift unit for transmitting scanning signals to the pixel circuit of the first display partition, and correspond to the first display partition; the first switch module, the second switch module and the level transmission module are connected with the output end of the shift unit for transmitting scanning signals to the pixel circuit of the second display partition, and correspond to the second display partition;
The first switch module, the second switch module and the level transmission module are connected with the output end of the shift unit for transmitting scanning signals to the pixel circuit of the third display partition, and correspond to the third display partition;
optionally, in the second display frame, the data voltages are continuously supplied to the pixel circuits driving the first display section and the third display section; stopping supplying the data voltage to the pixel circuit driving the second display section; or the refresh frequencies of the first display partition and the third display partition are the same; the refresh frequency of the first display partition is smaller than the refresh frequency of the second display partition, and the display driving method further comprises the following steps:
in a first display frame, controlling each first switch module to be turned on, and each second switch module to be turned off, wherein the level transmission module transmits scanning signals output by the shifting units corresponding to the first display partition, the second display partition and the third display partition to the signal output end of the scanning circuit;
in the second display frame, the first switch module corresponding to the second display partition is controlled to be turned on, the second switch module corresponding to the second display partition is turned off, the level transmission module corresponding to the second display partition transmits the scanning signal output by the shifting unit corresponding to the second display partition to the signal output end of the scanning circuit, the first switch module corresponding to the first display partition and the third display partition is controlled to be turned off, the second switch module corresponding to the first display partition and the third display partition is controlled to be turned on, and the level transmission module corresponding to the first display partition and the third display partition transmits the first level to the signal output end of the scanning circuit, so that the frequency of the pulse signal transmitted to the signal output end of the scanning circuit is adjusted;
Optionally, stopping supplying the data voltage to the pixel circuits driving the first display section and the third display section in the second display frame; or the refresh frequencies of the first display partition, the second display partition and the third display partition are different, the partition with the largest refresh frequency in the first display partition, the second display partition and the third display partition is a high-frequency display partition, the partition with the smallest refresh frequency is a low-frequency display partition, and the other partition is a medium-frequency display partition; the first display period further includes at least one third display frame, and the display driving method further includes:
in a first display frame, controlling each first switch module to be turned on, and each second switch module to be turned off, wherein the level transmission module transmits scanning signals output by the shifting units corresponding to the first display partition, the second display partition and the third display partition to the signal output end of the scanning circuit;
in the second display frame, the first switch module corresponding to the high-frequency display partition is controlled to be turned on, the second switch module corresponding to the high-frequency display partition is turned off, the level transmission module corresponding to the high-frequency display partition transmits the scanning signal output by the shifting unit to the signal output end of the scanning circuit, the first switch module corresponding to the intermediate-frequency display partition and the low-frequency display partition is controlled to be turned off, the second switch module corresponding to the intermediate-frequency display partition and the low-frequency display partition is controlled to be turned on, and the level transmission module corresponding to the intermediate-frequency display partition and the low-frequency display partition transmits the first level to the signal output end of the scanning circuit, so that the frequency of the pulse signal transmitted to the signal output end of the scanning circuit is regulated;
In a third display frame, a first switch module corresponding to the high-frequency display partition and the intermediate-frequency display partition is controlled to be turned on, a second switch module corresponding to the high-frequency display partition and the intermediate-frequency display partition is controlled to be turned off, a level transmission module corresponding to the high-frequency display partition and the intermediate-frequency display partition transmits scanning signals output by the shifting unit to a signal output end of the scanning circuit, a first switch module corresponding to the low-frequency display partition is controlled to be turned off, a second switch module corresponding to the low-frequency display partition is controlled to be turned on, and a level transmission module corresponding to the low-frequency display partition transmits a first level to a signal output end of the scanning circuit, so that the frequency of pulse signals transmitted to the signal output end of the scanning circuit is adjusted;
the magnitude relationship of the refresh frequencies of the first display partition, the second display partition, and the third display partition includes one or more of the following relationships: low medium high, low high medium, high low medium, high medium low, medium high low and medium low;
optionally, in the second display frame, stopping supplying the data voltage to the pixel circuits driving the intermediate frequency display section and the low frequency display section;
in the third display frame, continuously supplying data voltages to pixel circuits driving the high-frequency display section and the intermediate-frequency display section; stopping supplying the data voltage to the pixel circuits driving the low frequency display section;
Optionally, the duration of the third display frame is equal to the refresh period corresponding to the partition with the largest refresh frequency in the display area.
Optionally, the level transmission module includes a first switch unit and a second switch unit; the first end of the first switch unit is connected with the output end of the shift unit, the second end of the first switch unit is connected with the signal output end of the scanning circuit, and the first switch unit is used for switching on or switching off the output end of the shift unit and the signal output end of the scanning circuit; the first end of the second switch unit is connected with the first level signal line, the second end of the second switch unit is connected with the signal output end of the scanning circuit, and the second switch unit is used for switching on or switching off the first level signal line and the signal output end of the scanning circuit; the display driving method further includes:
for the same level transmission module, a first switch unit connected with the output end of the shifting unit is turned on, and a second switch unit is turned off, so that a scanning signal output by the shifting unit is transmitted to the signal output end of the scanning circuit;
for the same level transmission module, the first switch unit connected with the output end of the shift unit is turned off, and the second switch unit is turned on, so that the first level is transmitted to the signal output end of the scanning circuit.
Optionally, the level transmission modules are arranged in one-to-one correspondence with the shifting units, and the output ends of the shifting units are connected with the signal output ends of the corresponding scanning circuits; the first end of the ith level transmission module is connected with the output end of the ith shifting unit, the second end of the ith level transmission module is connected with the output end of the (i+1) th shifting unit, the first end of the nth level transmission module is connected with the output end of the nth shifting unit, and the second end of the nth level transmission module is connected with the first level signal line; wherein i is more than or equal to 1 and less than or equal to n-1, i is an integer, and n is the total number of the level transmission modules;
the display driving method further includes:
in a first display frame, controlling the first switch module to be turned on and the level transmission module to be turned off;
in the second display frame, a first switch module connected with the output end of the first m-stage shifting unit is turned on, and a first switch module connected with the output end of at least the (m+1) -th stage shifting unit is turned off; the level transmission module connected with the output end of the previous m+1 level shift unit is controlled to be turned off, and the rest level transmission modules are controlled to be turned on; wherein m is more than or equal to 0 and less than or equal to n-2, and m is an integer.
Optionally, the display area includes at least three display partitions, the first display period includes at least one first display frame and a plurality of second display frames, and m values in at least part of the second display frames in the same first display period are different.
Optionally, a first end of the level transmission module is connected with the output end of the corresponding shift unit and the signal output end of the scanning circuit, and a second end of the level transmission module is connected with the first level signal line;
the display driving method further includes:
in a first display frame, controlling the first switch module to be turned on and the level transmission module to be turned off;
in the second display frame, a first switch module connected with the output end of the front w-level shift unit is turned on, and at least a first switch module connected with the output end of the w+1th level shift unit is turned off; the level transmission module connected with the output end of the w+1 level shifting unit is controlled to be turned off, and the rest level transmission modules are controlled to be turned on; wherein w is more than or equal to 0 and less than or equal to n-2,w, n is an integer, and n is the total number of shift units.
Optionally, the display area includes at least three display partitions, the first display period includes at least one first display frame and a plurality of second display frames, and in the same first display period, w in at least part of the second display frames has a different value.
Optionally, the display panel further includes: the clock signal line is connected with the shift unit, and the number of pulses transmitted by the clock signal line in the first display frame is larger than the number of pulses transmitted by the clock signal line in the second display frame.
According to the scanning circuit, the display panel and the display driving method provided by the embodiment of the invention, the working states of the first switch module and the level transmission module in each display partition are controlled according to the refresh frequency of different partitions and the positions of the dividing lines in the display area of the display panel, so that the scanning signals or the first levels output by the shift unit are transmitted to the signal output end of the scanning circuit, the frequency of pulse signals transmitted to the signal output end of the scanning circuit is regulated, namely the pulse signal frequency of the grid electrode of the switch transistor in the pixel circuit of each display partition is regulated, the refresh frequency of each display partition is regulated, the display panel can be controlled to display in different display partitions with different refresh frequencies, the positions of each display partition are not fixed, and the positions of the display partitions can be dynamically regulated according to the display scene requirements, so that the supportable display scene of the display panel is expanded. In addition, for the display partition with relatively low refresh frequency, in the display frame where the display partition does not refresh the display picture, the first switch module corresponding to the display partition can be controlled to be turned off, so that at least part of the shift units corresponding to the display partition stop working, and the power consumption is reduced.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a display device according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a scan circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a pixel circuit applied to a display panel;
FIG. 4 is a schematic diagram of another scan circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of another scan circuit according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of the scanning circuit of FIG. 5 in an operating state of the first display frame;
FIG. 7 is a schematic diagram of the scan circuit of FIG. 5 in an operating state of a second display frame;
FIG. 8 is a schematic diagram of the scan circuit of FIG. 5 in another operating state of the second display frame;
FIG. 9 is a schematic diagram of the scan circuit of FIG. 5 in an operating state of a third display frame;
FIG. 10 is a schematic diagram of another scan circuit according to an embodiment of the present invention;
FIG. 11 is a schematic diagram of another scan circuit according to an embodiment of the present invention;
FIG. 12 is a schematic diagram of the scan circuit of FIG. 11 in an operating state of the first display frame;
FIG. 13 is a schematic diagram of signal waveforms output by the scan circuit of FIG. 12;
FIG. 14 is a schematic diagram showing an operating state of the scan circuit of FIG. 11 in a second display frame;
FIG. 15 is a schematic diagram of signal waveforms output by the scan circuit of FIG. 14;
FIG. 16 is a schematic diagram illustrating another operation state of the scan circuit in FIG. 11 in a second display frame;
FIG. 17 is a schematic diagram of the scan circuit of FIG. 11 in an operating state of a third display frame;
FIG. 18 is a schematic diagram of signal waveforms output by the scan circuit during a display phase;
FIG. 19 is a schematic diagram of another scan circuit according to an embodiment of the present invention;
FIG. 20 is a schematic diagram of another scan circuit according to an embodiment of the present invention;
FIG. 21 is a schematic diagram of another scan circuit according to an embodiment of the present invention;
fig. 22 is a flowchart of a display driving method according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The embodiment of the invention provides a scanning circuit. Fig. 1 is a schematic structural diagram of a display device according to an embodiment of the present invention; fig. 2 is a schematic structural diagram of a scan circuit according to an embodiment of the present invention. Referring to fig. 1 and 2, the scan circuit 100 includes: a multi-stage shift unit 10, a plurality of first switch modules 20, and a plurality of level transmission modules 30.
In the adjacent two-stage shift units 10, the output end O1 of the previous-stage shift unit 10 is connected to the start signal input end SIN of the next-stage shift unit 10 through a first switch module 20, and the first switch module 20 is used for switching on or switching off the adjacent two-stage shift unit 10 so as to control whether the scan signal output by the output end O1 of the previous-stage shift unit 10 is transmitted to the start signal input end SIN of the next-stage shift unit 10 or not, so as to control whether the next-stage shift unit 10 works or not. Each level transmission module 30 is connected to the output terminal O1 of the corresponding stage shifting unit 10 and a signal output terminal out of the scan circuit 100, and the level transmission module 30 is at least configured to transmit a first level to the signal output terminal out of the scan circuit 100, so as to adjust the frequency of the pulse signal transmitted to the signal output terminal out of the scan circuit 100. Alternatively, the level transmission module 30 is configured to transmit the scan signal or the first level output by the shift unit 10 to the signal output terminal out of the scan circuit 100, so as to adjust the frequency of the pulse signal transmitted to the signal output terminal out of the scan circuit 100. Wherein the effective level of the scan signal output by the shift unit 10 is opposite to the logic of the first level.
In particular, the scanning circuit provided by the embodiment of the invention can be suitable for a display device. The display device includes a display driving module 200 and a display panel 300. The display driving module 200 may be a display driving chip (Display Driver Integrated Circuit, DDIC) or a touch and display driving integrated (Touch and Display Driver Integration, TDDI) chip, or the like. The display panel 300 has a display area AA in which a plurality of rows of pixel circuits 400 are disposed, and a non-display area NAA. The display panel 300 further includes a plurality of scan lines GL extending along a row direction X and arranged along a column direction Y of the pixel circuits 400, and a plurality of data lines DL extending along the column direction Y and arranged along the row direction X of the pixel circuits 400, each of the scan lines GL being connected to a corresponding row of the pixel circuits 400, each of the data lines DL being connected to a corresponding column of the pixel circuits 400.
The scan circuit 100 may be located in the non-display area NAA, and the scan circuit 100 has a plurality of signal output terminals out, each of which is connected to the pixel circuit 400 through a scan line GL. The display driving module 200 can control the scan circuit 100 according to the received image signal, supply the scan signal in the form of a pulse signal to each scan line GL through the signal output terminal out of the scan circuit 100, and supply the data voltage to each data line DL through the display driving module 200. The pixel circuit 400 includes a thin film transistor, which includes a switching transistor and a driving transistor. When a scan signal in the form of a pulse signal is input into the scan line GL, the switching transistor in the pixel circuit 400 connected to the scan line GL is turned on, and the pixel circuit 400 can receive the data voltage transmitted by the data line DL, so that the driving transistor in the pixel circuit 400 drives the light emitting device to emit light with corresponding brightness according to the data voltage, so that the display panel 300 achieves the display function.
Fig. 3 is a schematic diagram of a pixel circuit applied to a display panel. Illustratively, referring to fig. 3, the pixel circuit includes a driving transistor DT, a data writing transistor M1, a threshold compensating transistor M2, a first initializing transistor M3, a second initializing transistor M4, a first light emitting control transistor M5, a second light emitting control transistor M6, a storage capacitor Cst, and a light emitting device D1. The Light Emitting device D1 may be an Organic Light Emitting Diode (OLED). The first initialization transistor M3 is used to write the initialization voltage Vref to the gate of the driving transistor DT in the initialization stage. The second initialization transistor M4 is used to write the initialization voltage Vref to the first electrode of the light emitting device D1 in an initialization stage. The Data writing transistor M1 is used for writing a Data voltage Data to the gate of the driving transistor DT in a Data writing stage, the threshold compensation transistor M2 is used for compensating the threshold voltage of the driving transistor DT, and the storage capacitor Cst is used for storing the gate voltage of the driving transistor DT. The first and second light emission control transistors M5 and M6 are used to control a discharge path between the first and second power lines VDD and VSS in a light emission stage, so that the driving transistor DT generates a driving current according to its gate voltage, driving the light emitting device D1 to emit light at a luminance corresponding to the Data voltage Data.
Referring to fig. 1 and 2, the shift unit 10 may be a shift register, and the shift unit 10 may be capable of shifting back the timing of the pulse signal input from the start signal input terminal SIN thereof to obtain the scan signal and output the scan signal through the output terminal O1 thereof. In the case that each first switch module 20 is turned on, cascade connection is implemented between the shift units 10 of each stage, the start signal input terminal SIN of the first shift unit 10 inputs a start signal in the form of a pulse signal, and in the adjacent shift units 10 of two stages, the output terminal O1 of the shift unit 10 of the previous stage is connected to the start signal input terminal SIN of the shift unit 10 of the next stage, so that the scan signal output by the shift unit 10 of the previous stage is used as the input signal of the shift unit 10 of the next stage, so that each shift unit 10 can output the scan signal with sequential backward movement step by step.
The scan signal output by the shift unit 10 is suitable for controlling each of the switching transistors in the pixel circuit 400, wherein the switching transistors include, but are not limited to, one or more of the data writing transistor M1, the threshold compensation transistor M2, the first initialization transistor M3, the second initialization transistor M4, the first light emission control transistor M5, and the second light emission control transistor M6 in fig. 3, and the scan circuit 100 may also function as a light emission control circuit when the switching transistors are the first light emission control transistor M5 and the second light emission control transistor M6. The effective level of the scanning signal output from the shift unit 10 is a level at which the shift unit 10 can be activated to perform a shift function. If the shift unit 10 is used to control the switching states of the data writing transistor M1, the threshold compensating transistor M2, the first initializing transistor M3, the second initializing transistor M4, and the like in the pixel circuit 400, the effective level of the scan signal output by the shift unit 10 is the on level of the switching transistor, and when the switching transistor is a P-type transistor, the effective level of the scan signal is a low level, and when the switching transistor is an N-type transistor, the effective level of the scan signal is a high level. If the shift unit 10 is used to control the switching states of the first light emitting control transistor M5 and the second light emitting control transistor M6 in the pixel circuit 400, the effective level of the scan signal output by the shift unit 10 is the level at which the switching transistor is turned off, and when the switching transistor is a P-type transistor, the effective level of the scan signal is high, and when the switching transistor is an N-type transistor, the effective level of the scan signal is low. Optionally, the display panel 300 further includes a first level signal line 40, each level transmission module 30 is connected to the first level signal line 40, and the first level signal line 40 is used for transmitting a first level, one of the first level and an active level of the scan signal is a high level, and the other is a low level. The inactive level of the scan signal may be the same as the first level.
When the scan signal output from the shift unit 10 is directly transmitted or indirectly transmitted to the signal output terminal out of the scan circuit 100 through the level transmission module 30, the signal output terminal out of the scan circuit 100 outputs the scan signal including an effective level; when the level transmission module 30 transmits the first level to the signal output terminal out of the scan circuit 100, the signal output terminal out of the scan circuit 100 outputs the first level, so that the frequency of the effective level of the scan signal output by the signal output terminal out is reduced, the duration of the inactive level of the scan signal is increased, and the frequency of the pulse signal output by the signal output terminal out of the scan circuit 100 is reduced, compared with the case where the signal output terminal out of the scan circuit 100 outputs the scan signal including the effective level. By controlling the operation state of the level transmission module 30, the frequency of the pulse signal transmitted to the signal output terminal out of the scan circuit 100 can be adjusted, thereby controlling the refresh frequency of the different partitions of the display area of the display panel and the position of the boundary line, so that the position of the boundary line of the different partitions of the display area of the display panel can be adjusted. The positions of the dividing lines of the different partitions of the display area of the display panel correspond to the positions of the dividing lines where the scan signal output from the shift unit 10 is transmitted to the signal output terminal out of the scan circuit and the first level is transmitted to the signal output terminal out of the scan circuit in part of the display frame.
The operation principle of the scanning circuit 100 will be described below with reference to fig. 1 to 3 by taking an example in which the signal output terminal out of the scanning circuit 100 is connected to the gate of the data writing transistor M1 in the pixel circuit 400 through the scanning line GL.
Illustratively, the operating states of the first switch module 20 and the level transmission module 30 are controlled according to the refresh frequencies of the different partitions in the display area AA of the display panel 300 and the positions of the dividing lines. The display area AA includes a first display area AA1 and a second display area AA2. The shift unit 10 corresponding to the first display area AA1 is a front stage or a rear stage of the shift unit 10 corresponding to the second display area AA2. The display panel 300 may include a plurality of display frames, and in a portion of the display frames of one display period, each first switch module 20 may be controlled to be turned on, so that each shift unit 10 outputs a scan signal step by step, and each level transmission module 30 is controlled to transmit the scan signal output by the shift unit 10 to the signal output end out of the scan circuit 100, or directly transmit the scan signal output by the shift unit 10 to the signal output end out of the scan circuit 100, so as to drive the Data writing transistor M1 in each row of pixel circuits 400 to respond to the effective level of the scan signal, so that the pixel circuits 400 in the first display area AA1 and the second display area AA2 can both write the Data voltage Data, thereby realizing the refresh of the display screen.
In the rest of the display frames in the display period, the first switch module 20 corresponding to the first display partition AA1 may be controlled to be turned on, the level transmission module 30 corresponding to the first display partition AA1 transmits the scan signal output by the shift unit 10 to the signal output end out of the scan circuit 100, or directly transmits the scan signal output by the shift unit 10 to the signal output end out of the scan circuit 100, so as to control the pixel circuit 400 in the first display partition AA1 to write the Data voltage Data, and realize refreshing of the display screen, and meanwhile, the level transmission module 30 corresponding to the second display partition AA2 is controlled to transmit the first level to the signal output end out of the scan circuit 100, so that the Data write transistor M1 in the pixel circuit 400 in the second display partition AA2 is in an off state in response to the first level, so that the pixel circuit 400 in the second display partition AA2 cannot write the Data voltage Data, and refreshing of the display screen is not performed. The first switch module 20 and the level transmission module 30, which are connected to the output end O1 of the shift unit 10 for transmitting the scanning signal to the pixel circuit of the first display area AA1, are the first switch module 20 and the level transmission module 30 corresponding to the first display area AA1, and the first switch module 20 and the level transmission module 30, which are connected to the output end O1 of the shift unit 10 for transmitting the scanning signal to the pixel circuit of the second display area AA2, are the first switch module 20 and the level transmission module 30 corresponding to the second display area AA 2.
In this way, the first display partition AA1 performs refreshing of the display screen in all display frames in the same display period, the second display partition AA2 performs refreshing of the display screen in part of the display frames in the display period, and refreshing of the display screen is not performed in the rest of the display frames, so that the refresh frequency of the first display partition AA1 is greater than that of the second display partition AA2, and the display panel can perform display in different display partitions with different refresh frequencies. Optionally, the dividing line of the first display partition AA1 and the second display partition AA2 is adjustable, so that the dividing line of the first display partition AA1 and the second display partition AA2 is not fixed, and therefore the display area AA of the display panel can be partitioned at any position and displayed in different display partitions with different refresh frequencies.
In addition, in the display frame where the second display area AA2 does not refresh the display screen, the first switch module 20 corresponding to the second display area AA2 may be controlled to be turned on, or the first switch module 20 corresponding to the second display area AA2 may be controlled to be turned off. The first switch module 20 is turned on or off, and the level transmission module 30 connected to the output terminal O1 of the same shift unit 10 is not affected to transmit the first level to the signal output terminal out of the scan circuit 100. In the display frame where the second display partition AA2 does not refresh the display screen, the scan signal does not need to be output to the pixel circuit of the second display partition AA2, and by controlling at least part of the first switch modules 20 corresponding to the second display partition AA2 to be turned off, the start signal end SIN of the partial shift unit 10 can be stopped without signal input, which is equivalent to no operation, thereby reducing power consumption.
It should be noted that, in the above embodiment, only the display area AA of the display panel is divided into the first display area AA1 and the second display area AA2 as an example, in other embodiments, the display area AA of the display panel may be divided into more display areas, and the dividing line between two adjacent display areas may be adjusted, so that the position of each display area is not fixed, and by controlling the working states of the first switch module 20 and the level transmission module 30 corresponding to each display area, the display panel may display at different refresh frequencies in different display areas.
In summary, according to the technical solution of the embodiment of the present invention, according to the refresh frequencies of different partitions and the positions of the dividing lines in the display area of the display panel, the working states of the first switch module and the level transmission module in each display partition are controlled to transmit the scan signal or the first level output by the shift unit to the signal output end of the scan circuit, so as to adjust the frequency of the pulse signal transmitted to the signal output end of the scan circuit, that is, adjust the pulse signal frequency of the gate electrode of the switch transistor in the pixel circuit of each display partition, thereby realizing the adjustment of the refresh frequency of each display partition, so that the display panel can be controlled to display in different display partitions with different refresh frequencies, and the position of each display partition is not fixed, and the position of each display partition can be dynamically adjusted according to the display scene requirement, so as to expand the supportable display scene of the display panel. In addition, for the display partition with relatively low refresh frequency, in the display frame where the display partition does not refresh the display picture, the first switch module corresponding to the display partition can be controlled to be turned off, so that at least part of the shift units corresponding to the display partition stop working, and the power consumption is reduced.
Referring to fig. 1 to 3, optionally, the display period of the display panel 300 includes a first display period including at least one first display frame and at least one second display frame on the basis of the above-described embodiments. The display area AA includes at least two display sections. In the first display frame, the first switch module 20 is controlled to be turned on, and the scan signal output by the shift unit 10 is transmitted to the signal output terminal out of the scan circuit 100. In the second display frame, the first switching module 20 corresponding to the partition having the high refresh frequency in the display area is controlled to be turned on, the scan signal output from the shift unit 10 is transmitted to the signal output terminal out of the scan circuit 100, and at least part of the first switching module 20 corresponding to the partition having the low refresh frequency in the display area is controlled to be turned off (for example, at least the first switching module 20 connected to the shift unit 10 of the forefront stage corresponding to the partition having the low refresh frequency in the display area, or all the first switching modules 20 corresponding to the partition having the low refresh frequency in the display area is included), and the level transmission module 30 transmits the first level to the signal output terminal out of the scan circuit 100. At least part of the shift units corresponding to the partitions of the display area where the refresh frequency is small may be deactivated in the second display frame to reduce power consumption.
The first display period includes a plurality of display frames, and the first display frame and the second display frame may be any two frames in the first display period. The following description will be given by taking the display area AA including the first display area AA1 and the second display area AA2 as an example.
Illustratively, the refresh frequency of the first display partition AA1 is greater than the refresh frequency of the second display partition AA 2. In the first display frame, each first switch module 20 is controlled to be turned on, and each level transmission module 30 is controlled to transmit the scanning signal output by the shift unit 10 to the signal output end out of the scanning circuit 100, so as to drive the Data writing transistor M1 in each row of pixel circuits 400 to respond to the effective level of the scanning signal, so that the pixel circuits 400 in the first display partition AA1 and the second display partition AA2 both write the Data voltage Data, and refreshing of the display picture is realized.
In the second display frame, the first switch module 20 corresponding to the first display partition AA1 is controlled to be turned on, and the level transmission module 30 corresponding to the first display partition AA1 transmits the scanning signal output by the shift unit 10 to the signal output end out of the scanning circuit 100, so as to control the pixel circuit 400 in the first display partition AA1 to write the Data voltage Data, thereby realizing refreshing of the display picture. Meanwhile, the first switch module 20 corresponding to the second display partition AA2 is controlled to be turned off, that is, the first switch module 20 connected to the output end O1 of the shift unit 10 for transmitting the scanning signal to the pixel circuit of the second display partition AA2 is turned off, so that the turned-off first switch module 20 cannot transmit the scanning signal output by the connected previous shift unit 10 to the next shift unit 10, and the start signal end SIN of the next shift unit 10 has no signal input and stops working, thereby reducing power consumption. The level transmission module 30 corresponding to the second display area AA2 is controlled to transmit the first level to the signal output end out of the scan circuit 100, so that the pulse signal frequency of the signal output end out of the scan circuit 100 corresponding to the second display area AA2 is lower than the pulse signal frequency of the signal output end out of the scan circuit 100 corresponding to the first display area AA1, and the Data writing transistor M1 in the pixel circuit 400 of the second display area AA2 is in an off state in response to the first level, so that the pixel circuit 400 in the second display area AA2 cannot write the Data voltage Data and does not refresh the display screen.
The first display partition AA1 refreshes display pictures in a first display frame and a second display frame of a first display period, the second display partition AA2 refreshes display pictures in the first display frame of the first display period, and the second display frame of the first display period does not refresh display pictures, so that the refresh frequency of the first display partition AA1 is higher than that of the second display partition AA2, and the refresh frequency requirements of the first display partition AA1 and the second display partition AA2 are met.
Optionally, in an embodiment, when the first display area AA1 and the second display area AA2 are adjacent in sequence, in the second display frame, the last first switch module 20 corresponding to the first display area AA1 may be further controlled to be turned off, and the rest of the first switch modules 20 corresponding to the first display area AA1 are turned on. The last first switch module 20 corresponding to the first display area AA1 is the first switch module 20 connected to the output end O1 of the shift unit 10 for transmitting the scanning signal to the pixel circuit of the last row of the first display area AA1, so that the start signal end SIN of the shift unit 10 for transmitting the scanning signal to the pixel circuit of the second display area AA2 can be stopped without any signal input, thereby reducing power consumption. Meanwhile, the first switch module 20 corresponding to the second display area AA2 can be controlled to be turned on or off, and the working state of the shift unit 10 for transmitting the scanning signal to the pixel circuit of the second display area AA2 is not affected.
Alternatively, in another embodiment, in the second display frame, each of the first switch modules 20 may also be controlled to be turned on. The first switch modules 20 corresponding to the first display area AA1 are all turned on, so that the shift units 10 corresponding to the first display area AA1 can output the scan signals step by step. Even if the first switch module 20 corresponding to the second display area AA2 is in the on state, the level transmission module 30 connected to the output terminal O1 of the same shift unit 10 is not affected to transmit the first level to the signal output terminal out of the scan circuit 100.
Optionally, the duration of the first display frame is equal to the refresh period corresponding to the partition with the largest refresh frequency in the display area AA. Optionally, the duration of the second display frame is equal to the refresh period corresponding to the partition with the largest refresh frequency in the display area AA.
The refresh period corresponding to the display partition refers to a time period required for refreshing a display picture of the display partition for each frame. Still take the example that the display area AA is divided into a first display partition AA1 and a second display partition AA2, and the refresh frequency of the first display partition AA1 is greater than that of the second display partition AA2, then the partition with the largest refresh frequency in the display area AA is the first display partition AA1, and the first display frame and the second display frame of the first display partition AA1 in the first display period are refreshed, and the duration of the first display frame and the duration of the second display frame are generally equal, so that the duration of the first display frame or the second display frame is equal to the refresh period of the first display partition AA 1.
On the basis of the above embodiments, the refresh frequency of the first display area AA1 is twice the refresh frequency of the second display area AA2, the total number of the display frames in the first display period is an even number, the odd frames in the display frames in the first display period are all the first display frames, the even frames are all the second display frames, or the even frames in the display frames in the first display period are all the first display frames, and the odd frames are all the second display frames. For example, the refresh frequency of the first display area AA1 is 60Hz, the refresh frequency of the second display area AA2 is 30Hz, the odd frames in each display frame in the first display period are all first display frames, the even frames are all second display frames, and the refresh frequency requirement of the first display area AA1 and the second display area AA2 is met by controlling the first switch module 20 and the level transmission module 30 corresponding to the first display area AA1 and the second display area AA2, so that the first display area AA1 can refresh the display frames in each display frame in the first display period, the second display area AA2 can refresh the display frames in the odd frames in the first display period, and the even frames in the first display period can not refresh the display frames.
In other embodiments, the duty cycle of the first display frame and the second display frame in the first display period may also be adjusted according to the refresh frequency of the first display partition AA1 and the second display partition AA 2. For example, when the refresh frequency of the first display area AA1 is 120Hz and the refresh frequency of the second display area AA2 is 1Hz, the first display period may further be set to include 120 frames, where the 1 st frame is a first display frame, and the remaining 119 frames are all second display frames, and by controlling the first switch module 20 and the level transmission module 30 corresponding to the first display area AA1 and the second display area AA2, the first display area AA1 can refresh display frames in the first display period, the second display area AA2 refreshes display frames in the 1 display frame in the first display period, and the 119 display frames in the first display period do not refresh display frames, so as to meet the refresh frequency requirement of the first display area AA1 and the second display area AA 2.
Optionally, the refresh period corresponding to the partition with the smallest refresh frequency in the display area AA includes at least one first display frame and at least one second display frame. Alternatively, the first display period may be equal to a refresh period corresponding to a partition with the smallest refresh frequency in the display area AA. Alternatively, the first display period may be equal to the least common multiple of the refresh period of each display partition in the display area AA. Still take the example that the display area AA is divided into a first display partition AA1 and a second display partition AA2, and the refresh frequency of the first display partition AA1 is greater than that of the second display partition AA2, then the partition with the smallest refresh frequency in the display area AA is the second display partition AA2, and the second display partition AA2 does not refresh the display picture in the first display frame of the first display period and refreshes the display picture in the second display frame of the first display period, so that the refresh period corresponding to the second display partition AA2 includes at least one first display frame and at least one second display frame. Illustratively, when the first display period includes only one first display frame and one second display frame, the refresh period corresponding to the second display partition AA2 is equal to the first display period, that is, the total duration of one first display frame and one second display frame; when the first display period includes two or more first display frames and one second display frame, the refresh period corresponding to the second display area AA2 is equal to the first display period, that is, the total duration of all the first display frames and all the second display frames (for example, in the case where the refresh frequency of the first display area AA1 is 120Hz and the refresh frequency of the second display area AA2 is 1Hz in the above embodiment); when the number of first display frames and second display frames included in the first display period is equal and one first display frame and one second display frame are alternately present, the refresh period corresponding to the second display area AA2 is equal to the total duration of one first display frame and one second display frame (for example, in the case where the refresh frequency of the first display area AA1 is 60Hz and the refresh frequency of the second display area AA2 is 30Hz in the above-described embodiment).
On the basis of the above embodiments, optionally, the number of data voltages supplied to the pixel circuits in the display area AA in the first display frame is greater than the number of data voltages supplied to the pixel circuits in the display area AA in the second display frame to reduce power consumption.
Referring to fig. 1 to 3, illustratively, in the first display frame, each of the first switch modules 20 is controlled to be turned on, each of the level transmission modules 30 transmits the scan signal output by the shift unit 10 to the signal output terminal out of the scan circuit 100, and the display driving module 200 supplies the Data voltage Data to the pixel circuits 400 driving the first display area AA1 and the second display area AA2, so that the pixel circuits 400 in the first display area AA1 and the second display area AA2 write the Data voltage Data, thereby realizing the refresh of the display screen.
In the second display frame, the first switch module 20 corresponding to the first display partition AA1 is controlled to be turned on, the level transmission module 30 corresponding to the first display partition AA1 transmits the scanning signal output by the shift unit 10 to the signal output end out of the scanning circuit 100, and the display driving module 200 supplies the Data voltage Data to the pixel circuit 400 driving the first display partition AA1, so that the pixel circuit 400 in the first display partition AA1 writes the Data voltage Data, and refreshing of the display picture is realized. Meanwhile, the first switch module 20 corresponding to the second display area AA2 is controlled to be turned off, the level transmission module 30 corresponding to the second display area AA2 transmits the first level to the signal output out of the scan circuit 100, and stops supplying the Data voltage Data to the pixel circuit 400 driving the second display area AA2, so that the Data writing transistor M1 in the pixel circuit 400 of the second display area AA2 is turned off in response to the first level, and the pixel circuit 400 in the second display area AA2 cannot write the Data voltage Data without refreshing the display screen.
Since the pixel circuit 400 of the second display area AA2 does not refresh the display screen in the second display frame, the Data voltage Data is not required to be written, and the display driving module 200 supplies the Data voltage Data to the pixel circuit 400 driving the first display area AA1 in the second display frame, and then stops supplying the Data voltage Data to the pixel circuit 400 driving the second display area AA2, which helps to reduce the power consumption of the display driving module 200.
On the basis of the above embodiments, alternatively, the positions of the dividing lines of the different partitions in the display area correspond to the positions of the dividing lines at which the scanning signal output from the shift unit 10 is transmitted to the signal output terminal out of the scanning circuit 100 and the first level is transmitted to the signal output terminal out of the scanning circuit 100.
In an exemplary embodiment, in the second display frame, the level transmission module 30 corresponding to the first display area AA1 transmits the scan signal output by the shift unit 10 to the signal output end out of the scan circuit 100, and the level transmission module 30 corresponding to the second display area AA2 transmits the first level to the signal output end out of the scan circuit 100, so that the signal output end out of the scan circuit 100 transmits the boundary between the scan signal and the first level signal to the scan line GL, that is, the boundary between the first display area AA1 and the second display area AA 2.
Fig. 4 is a schematic diagram of another scan circuit according to an embodiment of the present invention. Referring to fig. 4, optionally, the scan circuit further includes a plurality of second switch modules 50, in the adjacent two-stage shift units 10, the output end O1 of the previous-stage shift unit 10 is connected to the output end O1 of the next-stage shift unit 10 through a second switch module 50, and the second switch module 50 is configured to turn on or off the output end O1 of the adjacent two-stage shift unit 10, so as to control whether the scan signal output by the previous-stage shift unit 10 is transmitted to the output end O1 of the next-stage shift unit 10, so as to implement a skip-stage transmission of the scan signal, implement a transmission of the scan signal between the two non-adjacent shift units 10, and further implement any adjustment of one or more ordering relationships among sequentially ascending, sequentially descending, ascending, and descending, etc. of adjacent display partitions of the display area of the display panel. The refresh frequency of the partition in the display area corresponding to the plurality of shift units located at the front stage is greater than or less than the refresh frequency of the partition in the display area corresponding to the plurality of shift units located at the rear stage. By the arrangement, two display partitions with different refresh frequencies can be realized, wherein the shift unit 10 corresponding to the high-frequency display partition is the front stage of the shift unit 10 corresponding to the low-frequency display partition; two display partitions with different refresh frequencies can be realized, wherein the shift unit 10 corresponding to the low-frequency display partition is the front stage of the shift unit 10 corresponding to the high-frequency display partition; and at least three display partitions can be realized, the refresh frequencies of two adjacent display partitions are different, and the relationship among the number of the partitions, the positions of the partitions and the refresh frequency can be switched and adjusted at will. By way of example, the refresh rate of three display sections arranged in the column direction may be switched in a number of modes: high-low, or low-high, or low-medium-high, or low-high-medium, or high-low-medium, or high-medium-low, or medium-high, or medium-low-high, etc. The number of the partitions can be switched at will, and the display partitions are switched back and forth between two display partitions and three display partitions by way of example. In addition, it is also possible to achieve that the refresh frequency of the different display partitions in different periods can be switched and adjusted at will, for example, the refresh frequency of the partitions in the display areas corresponding to the plurality of shift units 10 located at the front stage is greater in the first period than the refresh frequency of the partitions in the display areas corresponding to the plurality of shift units 10 located at the rear stage, and the refresh frequency of the partitions in the display areas corresponding to the plurality of shift units 10 located at the front stage is smaller in the second period than the refresh frequency of the partitions in the display areas corresponding to the plurality of shift units 10 located at the rear stage, where the first period and the second period may be any two consecutive or mutually spaced periods in the same display period, or may also be periods in different display periods. Specifically, when the first switch module 20 connected between the adjacent two-stage shift units 10 is turned on, the scan signal output by the previous-stage shift unit 10 may be transmitted to the start signal terminal SIN of the next-stage shift unit 10 through the first switch module 20, so that the next-stage shift unit 10 operates to obtain the shifted scan signal according to the signal of the start signal terminal SIN thereof and output the shifted scan signal through the output terminal O1 thereof, and at this time, the scan signal output by the previous-stage shift unit 10 is not required to be transmitted to the output terminal O1 of the next-stage shift unit 10 through the second switch module 50, so that the second switch module 50 connected between the same two-stage shift units 10 with the first switch module 20 may be turned off. When the first switch module 20 connected between the two adjacent stages of the shift units 10 is turned off, the scan signal output by the previous stage of the shift unit 10 cannot be transmitted to the start signal terminal SIN of the next stage of the shift unit 10, the next stage of the shift unit 10 does not work and the output terminal O1 thereof has no signal output, at this time, the second switch module 50 connected between the same two stages of the shift units 10 with the first switch module 20 can be controlled to be turned on so as to transmit the scan signal output by the previous stage of the shift unit 10 to the output terminal O1 of the next stage of the shift unit 10, and meanwhile, the control level transmission module 30 selects the scan signal output by the shift unit 10 or the first level to be transmitted to the signal output terminal out of the scan circuit 100. Similarly, when the second switch module 50 is turned on, the first switch module 20 connected between the same two-stage shift units 10 as the second switch module 50 may be controlled to be turned off.
Referring to fig. 4, optionally, the first switch module 20 includes a first transistor T1, a first pole of the first transistor T1 is connected to an output terminal O1 of a previous stage shift unit 10 of the adjacent two stage shift units 10, and a second pole of the first transistor T1 is connected to a start signal input terminal SIN of a next stage shift unit 10 of the adjacent two stage shift units 10. Optionally, the second switching module 50 includes a second transistor T2, a first pole of the second transistor T2 is connected to the output terminal O1 of the previous stage shift unit 10 in the adjacent two stage shift units 10, and a second pole of the second transistor T2 is connected to the output terminal O1 of the next stage shift unit 10 in the adjacent two stage shift units 10.
The different first switch modules 20 are connected to different control signal lines, which is equivalent to that the different first switch modules 20 are turned on or off in response to the control signals on the different control signal lines, so as to realize adjustable partition positions. The different second switch modules 50 are connected to different control signal lines, which is equivalent to that the different second switch modules 50 are turned on or off in response to the control signals on the different control signal lines, so as to realize the adjustable partition positions. The gates of the different first transistors T1 are connected to different control signal lines, and the gates of the different second transistors T2 are connected to different control signal lines to control the operating states of the different first transistors T1 and the second transistors T2, respectively.
As can be seen from the above embodiments, the working states of the first switch module 20 and the second switch module 50 connected between the same two-stage shift units 10 are opposite, one of them is in an on state, and the other is in an off state. Therefore, when the first transistor T1 and the second transistor T2 are of the same type, for example, when the first transistor T1 and the second transistor T2 are P-type transistors or N-type transistors, the gate of the first transistor T1 and the gate of the second transistor T2 connected between the same two-stage shift units 10 may be respectively connected to different control signal lines to respectively control the operation states of the two transistors. In this embodiment, the first transistor T1 and the second transistor T2 are provided in the same type, which is beneficial to simplifying the manufacturing process of the scan circuit.
In other embodiments, one of the first transistor T1 and the second transistor T2 may be a P-type transistor, the other is an N-type transistor, the first transistor T1 and the second transistor T2 connected between the same two-stage shift units 10 are connected to the same control signal line, so as to control one of the first transistor T1 and the second transistor T2 connected between the same two-stage shift units 10 to be in an on state, and the other to be in an off state. The advantage of this arrangement is that the gates of the first transistor T1 and the second transistor T2 connected between the same two stages of shift units 10 need only be connected to one control signal line, which is advantageous in reducing the number of signal lines in the display panel, thereby simplifying the structure of the display panel.
With continued reference to fig. 4, optionally, the display area includes a first display area AA1 and a second display area AA2, where a refresh frequency of the first display area AA1 is greater than a refresh frequency of the second display area AA2, and a boundary position between the first display area AA1 and the second display area AA2 is adjustable. Illustratively, the shift unit 10 corresponding to the first display area AA1 is the front stage of the shift unit 10 corresponding to the second display area AA 2.
In the first display frame, each first switch module 20 is controlled to be turned on, each second switch module 50 is controlled to be turned off, and the level transmission module 30 transmits the scan signal output by the shift unit 10 corresponding to the first display area AA1 and the second display area AA2 to the signal output terminal out of the scan circuit 100.
In the second display frame, the first switch module 20 corresponding to the first display partition AA1 is controlled to be turned on, the second switch module 50 corresponding to the first display partition AA1 is turned off, the level transmission module 30 transmits the scanning signal output by the shift unit 10 corresponding to the first display partition AA1 to the signal output end out of the scanning circuit 100, the first switch module 20 corresponding to the second display partition AA2 is controlled to be turned off, the second switch module 50 corresponding to the second display partition AA2 is controlled to be turned on, and the level transmission module 30 corresponding to the second display partition AA2 transmits the first level to the signal output end out of the scanning circuit 100, so that the frequency of the pulse signal transmitted to the signal output end out of the scanning circuit 100 is adjusted to realize two display partitions with different refreshing frequencies, wherein the shift unit 10 corresponding to the high-frequency display partition is the front stage of the shift unit 10 corresponding to the low-frequency display partition.
The second switch module 50 connected to the output end O1 of the shift unit 10 for transmitting the scanning signal to the pixel circuit of the first display area AA1 is the second switch module 50 corresponding to the first display area AA1, and the second switch module 50 connected to the output end O1 of the shift unit 10 for transmitting the scanning signal to the pixel circuit of the second display area AA2 is the second switch module 50 corresponding to the second display area AA 2.
On the basis of the above-described embodiment, the supply of the data voltage to the pixel circuits driving the second display partition AA2 is optionally stopped at the second display frame to reduce the power consumption of the display driving module.
With continued reference to fig. 4, optionally, the display area includes a first display area AA1 and a second display area AA2, where a refresh frequency of the first display area AA1 is smaller than a refresh frequency of the second display area AA2, and a boundary position between the first display area AA1 and the second display area AA2 is adjustable. Illustratively, the shift unit 10 corresponding to the first display area AA1 is the front stage of the shift unit 10 corresponding to the second display area AA 2.
In the first display frame, each first switch module 20 is controlled to be turned on, and each second switch module 50 is controlled to be turned off, so that the scanning signals output by the shift units 10 corresponding to the first display area AA1 and the second display area AA2 are transmitted to the signal output end out of the scanning circuit 100.
In the second display frame, the first switch module 20 corresponding to the first display area AA1 is controlled to be turned off, the second switch module 50 corresponding to the first display area AA1 is turned on, and the level transmission module 30 corresponding to the first display area AA1 transmits the first level to the signal output end out of the scan circuit 100, so that the frequency of the pulse signal corresponding to the signal output end out of the scan circuit 100 corresponding to the first display area AA1 is reduced. The scanning signal output by the output end O1 of the first stage shifting unit 10 in the shifting unit 10 corresponding to the first display partition AA1 is transmitted to the output end O1 of the first stage shifting unit 10 in the shifting unit 10 corresponding to the second display partition AA2 through the second switch module 50 corresponding to the first display partition AA1, the first switch module 20 corresponding to the second display partition AA2 is controlled to be turned on, the second switch module 50 corresponding to the second display partition AA2 is controlled to be turned off, and the scanning signal output by the shifting unit 10 corresponding to the second display partition AA2 is transmitted to the signal output end out of the scanning circuit 100, so that the scanning signal is transmitted to the corresponding display partition by a skip stage, and two display partitions with different refreshing frequencies are realized, wherein the shifting unit corresponding to the low-frequency display partition is the front stage of the shifting unit corresponding to the high-frequency display partition.
On the basis of the above-described embodiment, the supply of the data voltage to the pixel circuit driving the first display area AA1 is optionally stopped at the second display frame to reduce the power consumption of the display driving module.
Fig. 5 is a schematic diagram of another scan circuit according to an embodiment of the present invention. Referring to fig. 5, the display area AA may optionally include at least three display sections, based on the above-described embodiment. The display area AA further comprises a third display partition AA3, the first display partition AA1, the second display partition AA2 and the third display partition AA3 are sequentially adjacent, and the dividing line position of the second display partition AA2 and the dividing line position of the third display partition AA3 are adjustable. Optionally, the shift unit 10 corresponding to the second display area AA2 is the previous stage of the shift unit 10 corresponding to the third display area AA 3. The sequences of the shift units 10 corresponding to the first display area AA1, the second display area AA2 and the third display area AA3 are sequentially later. The positions of the dividing lines among the first display area AA1, the second display area AA2 and the third display area AA3 are all adjustable. The refresh frequencies of two adjacent display partitions in the first, second and third display partitions AA1, AA2 and AA3 are different. Optionally, the refresh rate of the first display area AA1 is greater than the refresh rate of the second display area AA2, and the refresh rate of the third display area AA3 is greater than the refresh rate of the second display area AA 2. Optionally, the refresh frequency of the first display area AA1 and the third display area AA3 is the same.
In the first display frame, each first switch module 20 is controlled to be turned on, each second switch module 50 is controlled to be turned off, and the level transmission module 30 transmits the scanning signals output by the shift units 10 corresponding to the first display area AA1, the second display area AA2 and the third display area AA3 to the signal output end out of the scanning circuit.
In the second display frame, the first switch modules 20 corresponding to the first display partition AA1 and the third display partition AA3 are controlled to be turned on, the second switch modules 50 corresponding to the first display partition AA1 and the third display partition AA3 are turned off, the level transmission modules 30 corresponding to the first display partition AA1 and the third display partition AA3 transmit the scanning signals output by the shift units 10 corresponding to the first display partition AA1 and the third display partition AA3 to the signal output end out of the scanning circuit, the first switch modules 20 corresponding to the second display partition AA2 are controlled to be turned off, the second switch modules 50 corresponding to the second display partition AA2 are controlled to be turned on, and the level transmission modules 30 corresponding to the second display partition AA2 transmit the first level to the signal output end out of the scanning circuit, so that the frequency of the pulse signals transmitted to the signal output end out of the scanning circuit is adjusted.
The first switch module 20, the second switch module 50, and the level transmission module 30, which are connected to the output end O1 of the shift unit 10 for transmitting the scanning signal to the pixel circuit of the third display area AA3, are the first switch module 20, the second switch module 50, and the level transmission module 30 corresponding to the third display area AA 3.
FIG. 6 is a schematic diagram of the scanning circuit of FIG. 5 in an operating state of the first display frame; FIG. 7 is a schematic diagram of the scan circuit of FIG. 5 in an operating state of the second display frame. The transistor marked "x" indicates a transistor in an off state, and the transistor not marked "x" indicates the transistor in an on state. The operation principle of the scanning circuit in the first display period will be described below with reference to the transistor structures in the first switch module and the second switch module. For convenience of description, the first transistor T1 and the second transistor T2 connected to the output terminal O1 of the shift unit 10 for transmitting the scan signal to the pixel circuit of the first display area AA1 are denoted as the first transistor T1 and the second transistor T2 corresponding to the first display area AA1, and the first transistor T1 and the second transistor T2 corresponding to the second display area AA2 and the third display area AA3 are the same.
For example, referring to fig. 6, in the first display frame, each first transistor T1 is controlled to be turned on, each second transistor T2 is controlled to be turned off, and each level transmission module 30 is controlled to transmit the scanning signal output by the corresponding shift unit 10 to the signal output end out of the scanning circuit 100, so as to drive the data writing transistor in each row of pixel circuits to respond to the effective level of the scanning signal, so that the pixel circuits in the first display area AA1, the second display area AA2 and the third display area AA3 can write the data voltage, and refresh the display screen is realized.
Referring to fig. 7, in the second display frame, the first transistors T1 corresponding to the first display partition AA1 and the third display partition AA3 are controlled to be turned on, the second transistors T2 corresponding to the first display partition AA1 and the third display partition AA3 are controlled to be turned off, the level transmission modules 30 corresponding to the first display partition AA1 and the third display partition AA3 transmit the scan signals output by the shift unit 10 to the signal output end out of the scan circuit 100, so as to drive the data writing transistors of the pixel circuits in the first display partition AA1 and the third display partition AA3 to respond to the effective level of the scan signals, so that the pixel circuits in the first display partition AA1 and the third display partition AA3 can write data voltages, and refreshing of the display picture is achieved. Meanwhile, the first transistor T1 corresponding to the second display area AA2 is controlled to be turned off, the second transistor T2 corresponding to the second display area AA2 is turned on, and the level transmission module 30 corresponding to the second display area AA2 transmits the first level to the signal output end out of the scanning circuit 100, so that the frequency of the pulse signal output to the signal output end out of the scanning circuit 100 corresponding to the second display area AA2 is reduced, and the data writing transistor in the pixel circuit of the second display area AA2 is turned off in response to the first level, so that the pixel circuit in the second display area AA2 cannot write the data voltage and the refresh of the display screen is not performed.
In this way, the first display partition AA1 and the third display partition AA3 refresh the display frames in the first display frame and the second display frame, the second display partition AA2 refresh the display frames in the first display frame, and the second display frame does not refresh the display frames, so that the refresh frequency of the first display partition AA1 and the third display partition AA3 is greater than the refresh frequency of the second display partition AA2, thereby meeting the refresh frequency requirement of each display partition.
In the technical solution of the present embodiment, in the first display frame, since the shift units 10 are cascaded through the first transistor T1, each shift unit 10 outputs the scanning signal with sequentially delayed time sequence of the active level step by step, without controlling the second transistor T2 to be turned on. In the second display frame, since each shift unit 10 corresponding to the first display partition AA1 and the first shift unit 10 corresponding to the second display partition AA2 are cascaded through the first transistor T1, the output terminal O1 of the first shift unit 10 corresponding to the second display partition AA2 is connected to the output terminal O1 of the first shift unit 10 corresponding to the third display partition AA3 through the second transistor T2, and each shift unit 10 corresponding to the third display partition AA3 is cascaded through the first transistor T1, each shift unit 10 corresponding to the first display partition AA1 and the first shift unit 10 corresponding to the second display partition AA2 output sequentially delayed scan signals at the time sequence of the active level step by step, and the scan signals output by the first shift unit 10 corresponding to the second display partition AA2 serve as the signals of the output terminal O1 of the first shift unit 10 corresponding to the third display partition AA3, so that each shift unit 10 corresponding to the third display partition AA3 outputs sequentially delayed scan signals at the time sequence of the active level step by step. In the second display frame, since the second display area AA2 does not refresh the display screen, by controlling the operation states of the first transistor T1 and the second transistor T2 corresponding to each display area, the pulse timing of the signal output terminal out of the first scanning circuit 100 corresponding to the third display area AA3 can be received with the pulse timing of the signal output terminal out of the last scanning circuit 100 corresponding to the first display area AA1, so that after the pixel circuits of each row in the first display area AA1 refresh the display screen, the pixel circuits of each row in the second display area AA2 are skipped, and then the pixel circuits of each row in the third display area AA3 refresh the display screen. According to the technical scheme of the embodiment, pulse time sequences of scanning signals transmitted to the first display partition AA1 and the third display partition AA3 can be received, and the operation of the two last shift units 10 corresponding to the second display partition AA2 and the first shift unit 10 corresponding to the third display partition AA3 is not required to be controlled, so that the power consumption is saved.
On the basis of the above-described embodiment, optionally, the data voltages are continuously supplied to the pixel circuits driving the first display area AA1 and the third display area AA3 in the second display frame, and the supply of the data voltages to the pixel circuits of the second display area AA2 is stopped to reduce the power consumption.
For example, since the second display area AA2 does not refresh the display screen in the second display frame, no data voltage is required to be written, the data voltage may be continuously supplied to the pixel circuits driving the first display area AA1 and the third display area AA3 by the display driving module in the second display frame, for example, according to the pulse timing of the scan signal transmitted by the scan line GL in the first display area AA1 and the third display area AA3, the data voltage is sequentially supplied to the pixel circuits driving the first display area AA1 first, then the data voltage of the pixel circuits driving the rows in the second display area AA2 is skipped, and then the data voltage is supplied to the pixel circuits driving the third display area AA3, so that the display driving module 200 does not need to supply the data voltage to the pixel circuits driving the rows in the second display area AA2, which is helpful for reducing the power consumption of the display driving module.
Referring to fig. 5, alternatively, in another embodiment, the refresh frequency of the first display area AA1 and the third display area AA3 are the same, and the refresh frequency of the first display area AA1 is less than the refresh frequency of the second display area AA 2.
Accordingly, in the first display frame, each first switch module 20 is controlled to be turned on, each second switch module 50 is controlled to be turned off, and the level transmission module 30 transmits the scanning signals output by the shift units 10 corresponding to the first display area AA1, the second display area AA2 and the third display area AA3 to the signal output end out of the scanning circuit.
In the second display frame, the first switch module 20 corresponding to the second display partition AA2 is controlled to be turned on, the second switch module 50 corresponding to the second display partition AA2 is turned off, the level transmission module 30 corresponding to the second display partition AA2 transmits the scanning signal output by the shift unit 10 corresponding to the second display partition AA2 to the signal output end out of the scanning circuit, the first switch module 20 corresponding to the first display partition AA1 and the third display partition AA3 is controlled to be turned off, the second switch module 50 corresponding to the first display partition AA1 and the third display partition AA3 is controlled to be turned on, and the level transmission module 30 corresponding to the first display partition AA1 and the third display partition AA3 transmits the first level to the signal output end out of the scanning circuit, so that the frequency of the pulse signal transmitted to the signal output end out of the scanning circuit is adjusted. Alternatively, the first switch modules 20 corresponding to the first display area AA1 and the third display area AA3 are controlled to be turned off, the second switch modules 50 corresponding to the first display area AA1 are turned on, the second switch modules 50 corresponding to the third display area AA3 are turned off, and the level transmission modules 30 corresponding to the first display area AA1 and the third display area AA3 transmit the first level to the signal output end out of the scanning circuit, so that the frequency of the pulse signal transmitted to the signal output end out of the scanning circuit is adjusted.
In this way, the second display partition AA2 performs refresh of the display screen in the first display frame and the second display frame, the first display partition AA1 and the third display partition AA3 perform refresh of the display screen in the first display frame, and the second display frame does not perform refresh of the display screen, so that refresh frequencies of the first display partition AA1 and the third display partition AA3 are smaller than refresh frequencies of the second display partition AA2, and thus refresh frequency requirements of each display partition are satisfied. In addition, each second switch module 50 corresponding to the first display partition AA1 may skip the scan signal output by the first shift unit 10 corresponding to the first display partition AA1 to the output terminal O1 of the first shift unit 10 corresponding to the second display partition AA2, so that the output terminal O1 of each shift unit 10 corresponding to the second display partition AA2 may output the scan signal with sequentially delayed time sequence of the active level step by step.
Alternatively, the supply of the data voltage to the pixel circuits driving the first and third display partitions AA1 and AA3 is stopped at the second display frame to reduce power consumption.
With continued reference to fig. 5, the display panel may optionally further include a clock signal line connected to the shift unit 10, where the number of pulses transmitted by the clock signal line in the first display frame is greater than the number of pulses transmitted by the clock signal line in the second display frame, so as to reduce power consumption.
Specifically, the clock signal lines connecting the shift unit 10 include a first clock signal line CLK1 and a second clock signal line CLK2, the first clock signal line CLK1 and the second clock signal line CLK2 are each used to transmit clock signals, and pulse timings of the clock signals transmitted by the first clock signal line CLK1 and the second clock signal line CLK2 are different. Each shift unit 10 is connected to the first clock signal line CLK1 and the second clock signal line CLK2, so that each shift unit 10 operates in response to signals transmitted by the first clock signal line CLK1 and the second clock signal line CLK2, and shifts the pulse timing of the signal of the start signal terminal SIN thereof back to obtain a scan signal. As described in the above embodiment, in the first display frame, each of the shift units 10 needs to output the scan signal, and therefore, the clock signals need to be continuously supplied to the first clock signal line CLK1 and the second clock signal line CLK2 through the display driving module so that the number of clock signals transmitted by the first clock signal line CLK1 and the second clock signal line CLK2 is sufficient to control the operation of each of the shift units 10. In the second display frame, the last two shift units 10 corresponding to the second display partition AA2 and the first shift unit 10 corresponding to the third display partition AA3 do not operate, and the remaining shift units 10 operate, so that clock signals can be provided to the first clock signal line CLK1 and the second clock signal line CLK2 by the display driving module according to the number of shift units 10 required to operate, so that the number of pulses provided to the first clock signal line CLK1 and the second clock signal line CLK2 by the display driving module in the second display frame is smaller than the number of pulses provided to the first clock signal line CLK1 and the second clock signal line CLK2 in the first display frame, thereby reducing power consumption.
Referring to fig. 5, optionally, refresh frequencies of the first display partition AA1, the second display partition AA2, and the third display partition AA3 may be different, a partition with a largest refresh frequency among the first display partition AA1, the second display partition AA2, and the third display partition AA3 is a high-frequency display partition, a partition with a smallest refresh frequency is a low-frequency display partition, and the remaining one is an intermediate-frequency display partition, and the first display period further includes at least one third display frame.
In the first display frame, each first switch module 20 is controlled to be turned on, each second switch module 50 is controlled to be turned off, and the level transmission module 30 transmits the scanning signals output by the shift units 10 corresponding to the first display area AA1, the second display area AA2 and the third display area AA3 to the signal output end out of the scanning circuit.
In the second display frame, the first switch module 20 corresponding to the high-frequency display partition is controlled to be turned on, the second switch module 50 corresponding to the high-frequency display partition is turned off, the level transmission module 30 corresponding to the high-frequency display partition transmits the scanning signal output by the shift unit 10 to the signal output end out of the scanning circuit, the first switch module 20 corresponding to the intermediate-frequency display partition and the low-frequency display partition is controlled to be turned off, the second switch module 50 corresponding to the intermediate-frequency display partition and the low-frequency display partition is controlled to be turned on, and the level transmission module 30 corresponding to the intermediate-frequency display partition and the low-frequency display partition transmits the first level to the signal output end out of the scanning circuit, so that the frequency of the pulse signal transmitted to the signal output end out of the scanning circuit is adjusted.
In the third display frame, the first switch modules 20 corresponding to the high-frequency display partition and the intermediate-frequency display partition are controlled to be turned on, the second switch modules 50 corresponding to the high-frequency display partition and the intermediate-frequency display partition are controlled to be turned off, the level transmission modules 30 corresponding to the high-frequency display partition and the intermediate-frequency display partition transmit the scanning signals output by the shifting unit 10 to the signal output end out of the scanning circuit, the first switch modules 20 corresponding to the low-frequency display partition are controlled to be turned off, the second switch modules 50 corresponding to the low-frequency display partition are controlled to be turned on, and the level transmission modules 30 corresponding to the low-frequency display partition transmit the first level to the signal output end out of the scanning circuit, so that the frequency of the pulse signals transmitted to the signal output end out of the scanning circuit is adjusted.
Alternatively, in the second display frame, the supply of the data voltage to the pixel circuits driving the intermediate frequency display section and the low frequency display section is stopped to reduce the power consumption. Alternatively, in the third display frame, the data voltages are continuously supplied to the pixel circuits driving the high-frequency display section and the intermediate-frequency display section, and the supply of the data voltages to the pixel circuits driving the low-frequency display section is stopped to continuously drive the high-frequency display section and the intermediate-frequency display section for display without driving the low-frequency display section for display, while reducing power consumption.
Optionally, the magnitude relationship of the refresh frequencies of the first display area AA1, the second display area AA2, and the third display area AA3 includes one or more of the following relationships: low medium high, low high medium, high low medium, high medium low, medium high low and medium low. In the following description, one of the first display area AA1 is a low-frequency display area, the second display area AA2 is a medium-frequency display area, and the third display area AA3 is a high-frequency display area.
In the first display frame, each first switch module 20 is controlled to be turned on, each second switch module 50 is controlled to be turned off, and the level transmission module 30 transmits the scanning signals output by the shift units 10 corresponding to the first display area AA1, the second display area AA2 and the third display area AA3 to the signal output end out of the scanning circuit.
In the second display frame, the first switch module 20 corresponding to the third display partition AA3 is controlled to be turned on, the second switch module 50 corresponding to the third display partition AA3 is turned off, the level transmission module 30 corresponding to the third display partition AA3 transmits the scanning signal output by the shift unit 10 to the signal output end out of the scanning circuit, the first switch module 20 corresponding to the first display partition AA1 and the second display partition AA2 is controlled to be turned off, the second switch module 50 corresponding to the first display partition AA1 and the second display partition AA2 is controlled to be turned on, and the level transmission module 30 corresponding to the first display partition AA1 and the second display partition AA2 transmits the first level to the signal output end out of the scanning circuit, so that the frequency of the pulse signal transmitted to the signal output end out of the scanning circuit is adjusted.
In the third display frame, the first switch modules 20 corresponding to the second display partition AA2 and the third display partition AA3 are controlled to be turned on, the second switch modules 50 corresponding to the second display partition AA2 and the third display partition AA3 are turned off, the level transmission modules 30 corresponding to the second display partition AA2 and the third display partition AA3 transmit the scanning signals output by the shift unit 10 to the signal output end out of the scanning circuit, the first switch modules 20 corresponding to the first display partition AA1 are controlled to be turned off, the second switch modules 50 corresponding to the first display partition AA1 are controlled to be turned on, and the level transmission modules 30 corresponding to the first display partition AA1 transmit the first level to the signal output end out of the scanning circuit, so that the frequency of the pulse signals transmitted to the signal output end out of the scanning circuit is adjusted.
FIG. 8 is a schematic diagram of the scan circuit of FIG. 5 in another operating state of the second display frame; fig. 9 is a schematic diagram of an operating state of the scanning circuit in fig. 5 in a third display frame. The following describes the case where the refresh frequencies of the first display area AA1, the second display area AA2, and the third display area AA3 are high, medium, and low in size in combination with the transistor structures in the first switch module 20 and the second switch module 50.
For example, referring to fig. 6, in the first display frame, the operation states of each first transistor T1, each second transistor T2, and each level transmission module 30 are the same as those of the above embodiment, and will not be described again.
Referring to fig. 8, in the second display frame, the first transistor T1 corresponding to the first display partition AA1 is controlled to be turned on, the second transistor T2 corresponding to the first display partition AA1 is controlled to be turned off, and the level transmission module 30 corresponding to the first display partition AA1 transmits the scan signal output by the shift unit 10 to the signal output end out of the scan circuit 100, so as to drive the data writing transistor of the pixel circuit in the first display partition AA1 to respond to the effective level of the scan signal, so that the pixel circuits in the first display partition AA1 can write the data voltage, and refresh the display screen is realized. Meanwhile, the first transistor T1 corresponding to the second display partition AA2 and the third display partition AA3 is controlled to be turned off, the second transistor T2 corresponding to the second display partition AA2 and the third display partition AA3 is turned on, the level transmission module 30 corresponding to the second display partition AA2 and the third display partition AA3 transmits the first level to the signal output end out of the scanning circuit 100, so that the frequency of the pulse signal output to the signal output end out of the scanning circuit 100 corresponding to the second display partition AA2 and the third display partition AA3 is reduced, and the data writing transistors in the pixel circuits of the second display partition AA2 and the third display partition AA3 are in an off state in response to the first level, so that the pixel circuits in the second display partition AA2 and the third display partition AA3 cannot write the data voltage without refreshing the display picture.
Referring to fig. 9, in the third display frame, the first transistor T1 corresponding to the first display partition AA1 and the second display partition AA2 is controlled to be turned on, the second transistor T2 corresponding to the first display partition AA1 and the second display partition AA2 is controlled to be turned off, and the level transmission module 30 corresponding to the first display partition AA1 and the second display partition AA2 transmits the scan signal output by the shift unit 10 to the signal output end out of the scan circuit 100, so as to drive the data writing transistors of the pixel circuits in the first display partition AA1 and the second display partition AA2 to respond to the effective level of the scan signal, so that the pixel circuits in the first display partition AA1 and the second display partition AA2 can write the data voltage, thereby realizing the refreshing of the display picture. Meanwhile, the first transistor T1 corresponding to the third display area AA3 is controlled to be turned off, the second transistor T2 corresponding to the third display area AA3 is turned on, and the level transmission module 30 corresponding to the third display area AA3 transmits the first level to the signal output end out of the scanning circuit 100, so that the frequency of the pulse signal output to the signal output end out of the scanning circuit 100 corresponding to the third display area AA3 is reduced, and the data writing transistor in the pixel circuit of the third display area AA3 is turned off in response to the first level, so that the pixel circuit in the third display area AA3 cannot write the data voltage and does not refresh the display screen.
As can be seen, the first display area AA1 performs refreshing of display images in the first display frame, the second display frame and the third display frame, the second display area AA2 performs refreshing of display images in the first display frame and the third display frame, the second display area AA3 performs refreshing of display images in the first display frame, and the third display area AA3 performs refreshing of display images in the second display frame and the third display frame, so that the refresh frequency of the first display area AA1 is greater than the refresh frequency of the second display area AA2, and the refresh frequency of the second display area AA2 is greater than the refresh frequency of the third display area AA3, thereby meeting the refresh frequency requirements of each display area.
Alternatively, the first display frame, the second display frame, and the third display frame may be any three display frames in the first display period. Optionally, the second display frame is located between the first display frame and the third display frame.
In one embodiment, the refresh frequency of the first display area AA1 is 120Hz, the refresh frequency of the second display area AA2 is 60Hz, the refresh frequency of the third display area AA3 is 1Hz, the first display period includes 120 frames, 1 frame is a first display frame, 59 frames are third display frames, 60 frames are second display frames, and the refresh of the display frames can be performed by the first display area AA1 in 120 display frames of the first display period, the second display area AA2 in 60 display frames of the first display period, and the third display area AA3 in 1 display frame of the first display period through the control of the first transistor T1, the second transistor T2 and the level transmission module 30, so that the refresh frequency requirement of each display area can be met.
Optionally, the duration of the third display frame is equal to the refresh period corresponding to the partition with the largest refresh frequency in the display area AA. The partition with the largest refresh frequency in the display area AA is a first display partition AA1, and the first display frame, the second display frame and the third display frame in the first display period of the first display partition AA1 are refreshed, and the duration of the first display frame, the second display frame and the third display frame are generally equal, so that the duration of the first display frame, the second display frame or the third display frame is equal to the refresh period of the first display partition AA 1.
Alternatively, the data voltages are sequentially supplied to the pixel circuits driving the first and second display partitions AA1 and AA2 in the third display frame; the supply of the data voltage to the pixel circuits of the third display area AA3 is stopped. Because the pixel circuits of the third display area AA3 do not refresh the display screen in the third display frame, no data voltage is required to be written, the display driving module supplies the data voltage to the pixel circuits driving the first display area AA1 in the third display frame, then supplies the data voltage to the pixel circuits driving the second display area AA2, and immediately stops supplying the data voltage to the pixel circuits driving the third display area AA3, thereby contributing to reducing the power consumption of the display driving module.
Fig. 10 is a schematic diagram of another scan circuit according to an embodiment of the present invention. Referring to fig. 10, the level transmission module 30 may alternatively include a first switching unit 310 and a second switching unit 320. The first end of the first switching unit 310 is connected to the output end O1 of the shift unit 10, the second end of the first switching unit 310 is connected to the signal output end out of the scan circuit 100, and the first switching unit 310 is used to turn on or off the output end O1 of the shift unit 10 and the signal output end out of the scan circuit 100. The first end of the second switching unit 320 is connected to the first level signal line 40, the second end of the second switching unit 320 is connected to the signal output end out of the scanning circuit 100, and the second switching unit 320 is used for switching on or off the first level signal line 40 and the signal output end out of the scanning circuit 100.
Optionally, the display area AA includes a first display area AA1 and a second display area AA2, the refresh frequency of the first display area AA1 is greater than the refresh frequency of the second display area AA2, and the boundary positions of the first display area AA1 and the second display area AA2 are adjustable.
Optionally, for the same level transmission module 30, the first switching unit 310 connected to the output terminal of the shift unit is turned on, and the second switching unit 320 is turned off, so that the scan signal output by the shift unit 10 is transmitted to the signal output terminal out of the scan circuit; for the same level transmission module 30, the first switching unit 310 connected to the output terminal of the shift unit is turned off, and the second switching unit 320 is turned on, so that the first level is transmitted to the signal output terminal out of the scan circuit.
In the same level transmission module 30, the switching states of the first switching unit 310 and the second switching unit 320 are opposite to select one of the first level signal line 40 and the scan signal outputted from the shift unit 10 to be outputted to the signal output terminal out connected to the level transmission module 30. Alternatively, in the same level transmission module 30, when the first switch unit 310 is turned on, the second switch unit 320 is turned off to output the scan signal output by the shift unit 10; when the second switching unit 320 is turned on, the first switching unit 310 is turned off to output the first level of the first level signal line 40.
In the first display frame, each of the first switching units 310 is controlled to be turned on, and each of the second switching units 320 is controlled to be turned off, so as to transmit the scan signal output from the shift unit 10 to the signal output terminal out of the scan circuit 100. In the second display frame, the first switch unit 310 corresponding to the first display area AA1 is controlled to be turned on, and the second switch unit 320 corresponding to the first display area AA1 is controlled to be turned off, so as to transmit the scan signal output by the shift unit 10 to the signal output end out of the scan circuit 100. Meanwhile, the first switching unit 310 corresponding to the second display area AA2 is controlled to be turned off, and the second switching unit 320 corresponding to the first display area AA1 is turned on to transmit the first level to the signal output terminal out of the scan circuit 100, thereby adjusting the frequency of the pulse signal transmitted to the signal output terminal out of the scan circuit 100.
The first switch unit 310 and the second switch unit 320, which are connected to the output terminal O1 of the shift unit 10 for transmitting the scan signal to the pixel circuit of the first display area AA1, are the first switch unit 310 and the second switch unit 320 corresponding to the first display area AA 1. The first switching unit 310 and the second switching unit 320 connected to the output terminal O1 of the shift unit 10 for transmitting the scan signal to the pixel circuit of the second display area AA2 are the first switching unit 310 and the second switching unit 320 corresponding to the second display area AA 2.
Referring to fig. 10, on the basis of the above-described embodiment, when the first switching unit 310 is turned on, the first switching module 20 connected to the output terminal O1 of the same shifting unit 10 is controlled to be turned on. When the first switching unit 310 is turned off, the first switching module 20 connected to the output terminal O1 of the same shifting unit 10 is controlled to be turned off.
Illustratively, in the case where the refresh frequency of the first display area AA1 is greater than the refresh frequency of the second display area AA2, each of the first switch modules 20 is in an on state and each of the first switch units 310 is in an on state in the first display frame. In the second display frame, each first switch module 20 corresponding to the first display partition AA1 is in an on state, each first switch unit 310 corresponding to the first display partition AA1 is in an on state, each first switch module 20 corresponding to the second display partition AA2 is in an off state, and each first switch unit 310 corresponding to the second display partition AA2 is in an off state. That is, the first switching module 20 and the first switching unit 310 connected to the output terminal O1 of the same shifting unit 10 have the same switching state.
With continued reference to fig. 10, further, the first switching unit 310 includes a third transistor T3, a first pole of the third transistor T3 is connected to the output terminal O1 of the shift unit 10, and a second pole of the third transistor T3 is connected to the signal output terminal out of the scan circuit 100. The second switching unit 320 includes a fourth transistor T4, a first pole of the fourth transistor T4 is connected to the first level signal line 40, and a second pole of the fourth transistor T4 is connected to the signal output terminal out of the scan circuit 100.
The different first switch units 310 are connected to different control signal lines, which corresponds to that the different first switch units 310 are turned on or off in response to the control signals of the different control signal lines. The different second switching units 320 are connected to different control signal lines, which corresponds to the second switching units 320 being turned on or off in response to control signals of the different control signal lines. The gates of the different third transistors T3 are connected to different control signal lines, and the gates of the different fourth transistors T4 are connected to different control signal lines to control the operating states of the different third transistors T3 and fourth transistors T4, respectively.
As can be seen from the above embodiments, the first switch unit 310 and the second switch unit 320 connected to the output terminal O1 of the same shift unit 10 are in opposite operation states, one of which is in an on state and the other of which is in an off state. The first switch module 20 and the first switch unit 310 connected to the output terminal O1 of the same shift unit 10 have the same operation state, which corresponds to being turned on and off simultaneously. The second switching module 50 and the second switching unit 320 connected to the output terminal O1 of the same shifting unit 10 have the same operation state, which corresponds to being simultaneously turned on and off. The second switching module 50 and the first switching unit 310 connected to the output terminal O1 of the same shifting unit 10, and when the second switching module 50 is turned on, the first switching unit 310 may be used to shield the scan signal transmitted by the skip stage from being transmitted to the signal output terminal of the scan circuit when turned off.
At least two of the first switching module 20, the second switching module 50, the first switching unit 310, and the second switching unit 320 connected to the output terminal O1 of the same shifting unit 10 are connected to the same control signal line. Two of the first switching module 20, the second switching module 50, the first switching unit 310, and the second switching unit 320 connected to the output terminal O1 of the same shifting unit 10 are connected to one control signal line, and the other two are connected to the other control signal line, for example, the first switching module 20 and the first switching unit 310 are connected to one control signal line, and the second switching module 50 and the second switching unit 320 are connected to the other control signal line. The first switching module 20, the second switching module 50, the first switching unit 310, and the second switching unit 320 connected to the output terminal O1 of the same shifting unit 10 are connected to the same control signal line. Therefore, when the types of the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are the same, for example, the four are P-type transistors, or the N-type transistors, the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 connected to the output terminal O1 of the same shift unit 10 are provided, the gate of the third transistor T3 and the gate of the first transistor T1 are connected to the same control signal line, the gate of the fourth transistor T4 and the gate of the second transistor T2 are connected to the same control signal line, and the gate of the third transistor T3 and the gate of the fourth transistor T4 are connected to different control signal lines. The arrangement has the advantages that the number of signal lines in the display panel is reduced, the structure of the display panel is simplified, the types of the first transistor T1 to the fourth transistor T4 are the same, and the manufacturing process of the scanning circuit is simplified.
In other embodiments, the first transistor T1, the second transistor T2, the third transistor T3 and the fourth transistor T4 connected to the output terminal O1 of the same shift unit 10 may be further provided, the gate of the first transistor T1, the gate of the second transistor T2, the gate of the third transistor T3 and the gate of the fourth transistor T4 are connected to the same control signal line, the third transistor T3 and the first transistor T1 are both P-type transistors, the fourth transistor T4 and the second transistor T2 are both N-type transistors, or the third transistor T3 and the first transistor T1 are both N-type transistors, and the fourth transistor T4 and the second transistor T2 are both P-type transistors. In this way, the first to fourth transistors T1 to T4 connected to the output terminal O1 of the same shift unit 10 may be connected to the same control signal line, which is advantageous for reducing the number of signal lines in the display panel, thereby simplifying the structure of the display panel.
With continued reference to fig. 10, optionally, when the first switching unit 310 is turned on, the first switching module 20 connected to the output terminal O1 of the same shifting unit 10 is controlled to be turned on, and the second switching module 50 is controlled to be turned off. When the first switching unit 310 is turned off, the first switching module 20 connected to the output terminal O1 of the same shifting unit 10 is controlled to be turned off, and the second switching module 50 is controlled to be turned on.
Illustratively, the refresh frequency of the first display partition AA1 is greater than the refresh frequency of the second display partition AA 2. In the first display frame, each first switch module 20 is controlled to be turned on, each second switch module 50 is controlled to be turned off, each first switch unit 310 is turned on, and each second switch unit 320 is turned off, so as to transmit the scanning signals output by the shift units 10 corresponding to the first display partition AA1 and the second display partition AA2 to the signal output end out of the scanning circuit 100. In the second display frame, the first switch module 20 corresponding to the first display partition AA1 is controlled to be turned on, the second switch module 50 corresponding to the first display partition AA1 is controlled to be turned off, the first switch unit 310 corresponding to the first display partition AA1 is turned on, and the second switch unit 320 corresponding to the first display partition AA1 is turned off, so that the scanning signal output by the shift unit 10 corresponding to the first display partition AA1 is transmitted to the signal output end out of the scanning circuit 100. Meanwhile, the first switch module 20 corresponding to the second display area AA2 is controlled to be turned off, the second switch module 50 corresponding to the second display area AA2 is turned on, the first switch unit 310 corresponding to the second display area AA2 is turned off, and the second switch unit 320 corresponding to the second display area AA2 is turned on to transmit the first level to the signal output end out of the scan circuit 100, so as to adjust the frequency of the pulse signal transmitted to the signal output end out of the scan circuit 100.
Alternatively, the supply of the data voltage to the pixel circuits driving the second display partition AA2 is stopped at the second display frame to reduce the power consumption of the display driving module.
Fig. 11 is a schematic diagram of another scan circuit according to an embodiment of the present invention. Referring to fig. 11, based on the above embodiment, optionally, the display area AA further includes a third display area AA3, where the first display area AA1, the second display area AA2, and the third display area AA3 are sequentially adjacent, the boundary positions of the second display area AA2 and the third display area AA3 are adjustable, and the refresh frequency of the third display area AA3 is greater than the refresh frequency of the second display area AA 2.
In the first display frame and the second display frame, the first switch module 20 corresponding to the third display area AA3 is controlled to be turned on, the second switch module 50 is controlled to be turned off, the first switch unit 310 is turned on, and the second switch unit 320 is controlled to be turned off, so that the scan signal output by the shift unit 10 is transmitted to the signal output end out of the scan circuit 100.
The first switch unit 310 and the second switch unit 320 connected to the output terminal O1 of the shift unit 10 for transmitting the scan signal to the pixel circuit of the third display area AA3 are the first switch unit 310 and the second switch unit 320 corresponding to the third display area AA 3.
FIG. 12 is a schematic diagram of the scan circuit of FIG. 11 in an operating state of the first display frame; FIG. 13 is a schematic diagram of signal waveforms output by the scan circuit of FIG. 12; FIG. 14 is a schematic diagram showing an operating state of the scan circuit of FIG. 11 in a second display frame; fig. 15 is a schematic diagram of signal waveforms output from the scan circuit in fig. 14. The working principle of the scanning circuit in the first display period is described below by taking P-type transistors as examples of the transistors in the first switch module, the level transmission module and the second switch module in combination. For convenience of description, a transistor connected to the output terminal O1 of the shift unit 10 for transmitting the scan signal to the pixel circuit of the first display area AA1 is denoted as a transistor corresponding to the first display area AA1, and transistors corresponding to the second display area AA2 and the third display area AA3 are the same.
Illustratively, the effective level of the scan signal output by the shift unit 10 may be a low level, and the first level may be a high level. Referring to fig. 12 and 13, in the first display frame, on signals, for example, low level signals, may be supplied to the gates of the first transistor T1 and the third transistor T3, off signals, for example, high level signals, may be supplied to the gates of the second transistor T2 and the fourth transistor T4, the first transistor T1 and the third transistor T3 are controlled to be turned on, the second transistor T2 and the fourth transistor T4 are controlled to be turned off, the shift units 10 are cascaded through the first transistor T1, the scan signals output by the shift units 10 are all transmitted to the signal output end out of the scan circuit 100 through the third transistor T3, the signals output by the 1 st to 9 th signal output ends out of the scan circuit 100 are respectively delayed in sequence according to the effective level time sequence of the out1 to out9, so as to drive the Data writing transistors in the corresponding pixel circuits in each row to respond to the effective level of the scan signals, and enable the pixel circuits in the first display partition 1, the second display partition 2 and the third display partition 3 to write Data AA into the pixel circuits in the Data partition AA, and the display partition AA is enabled.
Referring to fig. 14 and 15, in the second display frame, on signals, which may be low level signals, for example, are supplied to the gates of the first transistor T1 and the third transistor T3 corresponding to the first display section AA1 and the third display section AA3, off signals, which may be high level signals, for example, are supplied to the gates of the second transistor T2 and the fourth transistor T4 corresponding to the first display section AA1 and the third display section AA3, and the first transistor T1 and the third transistor T3 corresponding to the first display section AA1 and the third display section AA3 are controlled to be turned on, and the second transistor T2 and the fourth transistor T4 are controlled to be turned off. The scanning signals output by the shift units 10 corresponding to the first display partition AA1 and the third display partition AA3 are transmitted to the signal output end out of the scanning circuit 100 through the third transistor T3, so that the Data writing transistors in each row of pixel circuits of the first display partition AA1 and the third display partition AA3 are driven to respond to the effective level of the scanning signals, and the pixel circuits in the first display partition AA1 and the third display partition AA3 can write the Data voltage Data, so that the display picture can be refreshed. Meanwhile, the gate of the first transistor T1 and the third transistor T3 corresponding to the second display area AA2 may be supplied with an off signal, for example, a high level signal, and the gate of the second transistor T2 and the fourth transistor T4 corresponding to the second display area AA2 may be supplied with an on signal, for example, a low level signal, so as to control the first transistor T1 and the third transistor T3 corresponding to the second display area AA2 to be turned off, and the second transistor T2 and the fourth transistor T4 to be turned on. The fourth transistor T4 corresponding to the second display area AA2 transmits the first level to the signal output terminal out of the scan circuit 100, so as to reduce the frequency of the pulse signal output to the signal output terminal out of the scan circuit 100 corresponding to the second display area AA2, and make the Data writing transistor in the pixel circuit of the second display area AA2 in the off state in response to the first level, so that the pixel circuit in the second display area AA2 cannot write the Data voltage Data without refreshing the display screen.
Since the respective shift units 10 corresponding to the first display partition AA1 and the first shift units 10 corresponding to the second display partition AA2 are cascaded through the turned-on first transistor T1, the output terminal O1 of the first shift unit 10 corresponding to the second display partition AA2 is connected to the output terminal O1 of the first shift unit 10 corresponding to the third display partition AA3 through the turned-on second transistor T2, and the respective shift units 10 corresponding to the third display partition AA3 are cascaded through the turned-on first transistor T1, the respective shift units 10 corresponding to the first display partition AA1 and the first shift unit 10 corresponding to the second display partition AA2 sequentially output the scan signals sequentially delayed in the timing of the active level step by step, and the scan signals output by the first shift unit 10 corresponding to the second display partition AA2 are used as the signals of the output terminal O1 of the first shift unit 10 corresponding to the third display partition AA3, so that the respective shift units 10 corresponding to the third display partition AA3 output the scan signals sequentially delayed in the timing of the active level step by step. The timings of the active levels in the signals out1 to out3 and out7 to out9 outputted from the 1 st to 3 rd and 7 th to 9 th signal output terminals out of the scan circuit 100 are sequentially delayed, and the signals out4 to out6 outputted from the 4 th to 6 th signal output terminals out of the scan circuit 100 are all the first levels. This makes it possible to skip the pixel circuits of the rows in the second display area AA2 after the pixel circuits of the rows in the first display area AA1 are refreshed, and to refresh the display screen immediately after the pixel circuits of the rows in the third display area AA 3. According to the technical scheme of the embodiment, pulse time sequences of scanning signals transmitted to the first display partition AA1 and the third display partition AA3 can be received, and the second two shifting units 10 corresponding to the second display partition AA2 and the first shifting unit 10 corresponding to the third display partition AA3 do not need to be controlled to work, so that power consumption is saved.
It should be noted that the number of the shift units 10 corresponding to the display sections and the number of the signal output terminals out of the scan circuit 100 in the embodiments of the present invention are merely illustrative, and not limiting, in practical application, each display section may include a plurality of rows of pixel circuits, each row of pixel circuits is connected to the signal output terminal out of the corresponding scan circuit 100 through the scan line GL, and each signal output terminal out of the scan circuit 100 is correspondingly provided with the shift unit 10 for providing the scan signal thereto.
On the basis of the above-described embodiment, optionally, the Data voltage Data is continuously supplied to the pixel circuits driving the first display area AA1 and the third display area AA3 in the second display frame; the supply of the Data voltage Data to the pixel circuits of the second display area AA2 is stopped.
Referring to fig. 12 and 13, in the first display frame, the first display area AA1 and the third display area AA3 need to refresh the display screen, so that the display driving module can sequentially supply the Data voltage Data to each row of pixel circuits in the first display area AA1, the second display area AA2 and the third display area AA3 according to the timing sequence of the effective level in the scan signal output by each signal output terminal out of the scan circuit 100. In conjunction with fig. 14 and 15, in the second display frame, since the second display area AA2 does not refresh the display screen, no Data voltage is required to be written, the display driving module can supply the Data voltage Data to each row of pixel circuits driving the first display area AA1 in sequence according to the timing of the effective level in the scanning signals output from the 1 st to 3 rd and 7 th to 9 th signal output ends out of the scanning circuit 100, and then skip the Data voltage Data of each row of pixel circuits in the second display area AA2, and then supply the Data voltage Data to each row of pixel circuits driving the third display area AA3, so that the display driving module does not need to supply the Data voltage Data to each row of pixel circuits in the second display area AA2, which is helpful for reducing the power consumption of the display driving module.
Referring to fig. 11, in another embodiment, the refresh frequency of the third display area AA3 is smaller than that of the second display area AA2, the first display period further includes that the third display frame is in the second display frame, the first switch unit 310 corresponding to the third display area AA3 is controlled to be turned off, and the second switch unit 320 is turned on, so as to transmit the first level to the signal output out of the scan circuit 100. In the third display frame, the first switch units 310 corresponding to the first display partition AA1 and the second display partition AA2 are controlled to be turned on, and the second switch units 320 corresponding to the first display partition AA1 are controlled to be turned off, so that the scanning signals output by the shift unit 10 are transmitted to the signal output end out of the scanning circuit 100; the first switch unit 310 corresponding to the third display area AA3 is controlled to be turned off, and the second switch unit 320 is controlled to be turned on to transmit the first level to the signal output terminal out of the scan circuit 100.
FIG. 16 is a schematic diagram illustrating another operation state of the scan circuit in FIG. 11 in a second display frame; fig. 17 is a schematic diagram of an operating state of the scanning circuit in fig. 11 in a third display frame. The working principle of the scanning circuit in the first display period is described below by still combining the transistor structures in the first switch module, the level transmission module and the second switch module.
For example, referring to fig. 12, in the first display frame, the operation states of the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are the same as those of the above embodiment, and will not be described again.
Referring to fig. 16, in the second display frame, on signals, for example, low level signals, are supplied to the gates of the first transistor T1 and the third transistor T3 corresponding to the first display partition AA1, off signals, for example, high level signals, are supplied to the gates of the second transistor T2 and the fourth transistor T4 corresponding to the first display partition AA1, the first transistor T1 and the third transistor T3 corresponding to the first display partition AA1 are controlled to be on, the second transistor T2 and the fourth transistor T4 are controlled to be off, and the scan signals output by the shift unit 10 corresponding to the first display partition AA1 are transmitted to the signal output end out of the scan circuit 100 through the third transistor T3, so as to drive the data writing transistors in each row of pixel circuits of the first display partition AA1 to respond to the effective level operation of the scan signals, so that the pixel circuits in the first display partition AA1 can write data voltages, and refresh the display picture is realized. Meanwhile, the gate electrodes of the first transistor T1 and the third transistor T3 corresponding to the second display area AA2 and the third display area AA3 are supplied with off signals, which may be high level signals, for example, and the gate electrodes of the second transistor T2 and the fourth transistor T4 corresponding to the second display area AA2 and the third display area AA3 are supplied with on signals, which may be low level signals, for example, to control the first transistor T1 and the third transistor T3 corresponding to the second display area AA2 and the third display area AA3 to be turned off, and the second transistor T2 and the fourth transistor T4 to be turned on. The fourth transistor T4 corresponding to the second display area AA2 and the third display area AA3 transmits the first level to the signal output out of the scanning circuit 100, so that the data writing transistor in the pixel circuit of the second display area AA2 is in an off state in response to the first level, and the pixel circuit in the second display area AA2 cannot write the data voltage without refreshing the display screen.
Referring to fig. 17, in the third display frame, on signals, for example, low level signals, may be supplied to the gates of the first transistor T1 and the third transistor T3 corresponding to the first display partition AA1 and the second display partition AA2, off signals, for example, high level signals, may be supplied to the gates of the second transistor T2 and the fourth transistor T4 corresponding to the first display partition AA1 and the second display partition AA2, the first transistor T1 and the third transistor T3 corresponding to the first display partition AA1 and the second display partition AA2 are controlled to be turned on, the scan signals output by the shift unit 10 corresponding to the first display partition AA1 and the second display partition AA2 are transmitted to the signal output terminal out of the scan circuit 100 through the third transistor T3, so that the data writing transistors in the pixel circuits of each row of the first display partition AA1 and the second display partition AA2 are driven to operate in response to the effective level of the scan signals, and the data writing circuits of the first display partition AA1 and the second display partition AA2 are controlled to realize that the pixel circuits of each row of the pixel circuits of the first display partition AA1 and the second display partition AA2 can write data into the display partition AA 2. Meanwhile, the gate supply off signals, for example, high level signals, to the first transistor T1 and the third transistor T3 corresponding to the third display area AA3, and the gate supply on signals, for example, low level signals, to the second transistor T2 and the fourth transistor T4 corresponding to the third display area AA3, control the first transistor T1 and the third transistor T3 corresponding to the third display area AA3 to be turned off, and the second transistor T2 and the fourth transistor T4 to be turned on. The fourth transistor T4 corresponding to the third display area AA3 transmits the first level to the signal output out of the scanning circuit 100, so that the data writing transistor in the pixel circuit of the second display area AA2 is turned off in response to the first level, and the pixel circuit in the second display area AA2 cannot write the data voltage without refreshing the display screen.
As can be seen, the first display area AA1 performs refreshing of display images in the first display frame, the second display frame and the third display frame, the second display area AA2 performs refreshing of display images in the first display frame and the third display frame, the second display area AA3 performs refreshing of display images in the first display frame, and the third display area AA3 performs refreshing of display images in the second display frame and the third display frame, so that the refresh frequency of the first display area AA1 is greater than the refresh frequency of the second display area AA2, and the refresh frequency of the second display area AA2 is greater than the refresh frequency of the third display area AA3, thereby meeting the refresh frequency requirements of each display area.
Alternatively, the first display frame, the second display frame, and the third display frame may be any three display frames in the first display period. Optionally, the second display frame is located between the first display frame and the third display frame.
Fig. 18 is a schematic diagram of signal waveforms output by the scan circuit in the display stage. In combination with fig. 6, 16 to 18, in another embodiment, it may be further provided that one display stage of the display panel includes a plurality of first display periods F (only one of which is schematically shown in fig. 18), each first display period F includes a first display frame F1, two second display frames F2 and a third display frame F3, which are sequentially the first display frame F1, the second display frame F2, the third display frame F3 and the second display frame F2, so that the first display partition AA1 performs refresh of the display screen in each first display period F in the first display frame F1, the second display frame F2 and the third display frame F3, the second display partition AA2 performs refresh of the display screen in each first display period F in the first display frame F1 and the third display frame F3 only, and the third display partition AA3 performs refresh of the display screen in each first display frame F1 in the first display period F3 only, so that the refresh frequency of the first display partition AA1 is greater than the refresh frequency of the second display partition AA2, and the refresh frequency of the second display partition AA2 is greater than the refresh frequency of the third partition AA 2.
Alternatively, the data voltages are sequentially supplied to the pixel circuits driving the first and second display partitions AA1 and AA2 in the third display frame; the supply of the data voltage to the pixel circuits of the third display area AA3 is stopped to reduce power consumption.
Fig. 19 is a schematic diagram of another scan circuit according to an embodiment of the present invention. Referring to fig. 19, alternatively, the level transmission modules 30 are disposed in one-to-one correspondence with the shift units 10, and the output terminals O1 of the shift units 10 are connected to the signal output terminals out of the corresponding scan circuits 100. The first end of the ith level transmission module 30 is connected to the output end O1 of the ith shift unit 10, the second end of the ith level transmission module 30 is connected to the output end O1 of the (i+1) th shift unit 10, the first end of the nth level transmission module 30 is connected to the output end O1 of the nth shift unit 10, and the second end of the nth level transmission module 30 is connected to the first level signal line 40. Where 1.ltoreq.i.ltoreq.n-1, i being an integer, n being the total number of level transmission modules 30. By the arrangement, at least two display subareas of the display area of the display panel can be sequentially reduced in frequency, and the positions of dividing lines of different subareas are adjustable. The display area includes a first display area AA1 and a second display area AA2, where the shift unit 10 corresponding to the first display area AA1 is a front stage of the shift unit 10 corresponding to the second display area AA2, and the refresh frequency of the first display area AA1 is greater than the refresh frequency of the second display area AA 2. In a part of the display frame, the shift unit 10 corresponding to the display partition with a small refresh frequency is not operated to reduce power consumption.
Specifically, the number of the shift units 10, the level transmission module 30, and the signal output terminals out of the scan circuit 100 are identical, and the output terminals O1 of the shift units 10 are disposed in one-to-one correspondence with the signal output terminals out of the scan circuit 100. By controlling the on state of the first switch module 20, it is able to control whether the scan signal output by the previous stage shift unit 10 connected to the first switch module 20 is transmitted to the start signal terminal SIN of the next stage shift unit 10, so as to control whether the next stage shift unit 10 works. By controlling the on state of the level transmission module 30, it is possible to control whether the first level input by the first level signal line 40 is transmitted to the signal output terminal out of the scan circuit 100.
Referring to fig. 19, optionally, the first display period includes at least one first display frame and at least one second display frame. In the first display frame, the first switch module 20 is controlled to be turned on, and the level transmission module 30 is controlled to be turned off. In the second display frame, the first switch module 20 connected to the output end O1 of the first m stage shift unit 10 is turned on, and the first switch module 20 connected to the output end O1 of at least the (m+1) th stage shift unit 10 is turned off; the level transmission module 30 connected with the output end O1 of the m+1 level shifting unit 10 is controlled to be turned off, and the rest level transmission modules 30 are controlled to be turned on; wherein m is more than or equal to 0 and less than or equal to n-2, and m is an integer.
Illustratively, n=6, m=2 is illustrated. In the first display frame, each level transmission module 30 is turned off, the first level input by the first level signal line 40 cannot be transmitted to the signal output end out of the scanning circuit 100, each first switch module 20 is turned on, each shift unit 10 is cascaded through the first switch module 20, each shift unit 10 outputs a scanning signal step by step to the signal output end out of the scanning circuit 100, so as to drive the data writing transistor in each row of pixel circuits to respond to the effective level of the scanning signal, and each row of pixel circuits in the display area AA can write data voltage, thereby realizing the refreshing of the display picture. In the second display frame, the first switch module 20 connected to the output end O1 of the first 2 stage shift unit 10 is turned on, and the first switch modules 20 connected to the output ends O1 of the 3 rd to 6 th stage shift units 10 are turned off, so that the first 3 stage shift units 10 are cascaded through the first switch module 20, and the first 3 stage shift unit 10 outputs scanning signals to the first 3 signal output ends out of the scanning circuit 100 step by step, so as to drive the data writing transistors in each row of pixel circuits in the first display partition AA1 to respond to the effective level of the scanning signals, and enable each row of pixel circuits in the first display partition AA1 to write data voltages, thereby realizing the refreshing of the display picture. The level transmission module 30 connected to the output terminal O1 of the 3 rd level shift unit 10 is turned off, the level transmission module 30 connected to the output terminal O1 of the 4 th to 6 th level shift units 10 is turned on, the first level input by the first level signal line 40 may be transmitted to the 4 th to 6 th signal output terminals out of the scan circuit 100 through the level transmission module 30, so that the pulse signal frequency of the 4 th to 6 th signal output terminals out is lower than the pulse signal frequency of the first 3 signal output terminals out, and the data writing transistor in the pixel circuit of the second display area AA2 is in an off state in response to the first level, so that the pixel circuit in the second display area AA2 cannot write the data voltage and does not refresh the display screen.
The first display partition AA1 refreshes display pictures in a first display frame and a second display frame of a first display period, the second display partition AA2 refreshes display pictures in the first display frame of the first display period, and the second display frame of the first display period does not refresh display pictures, so that the refresh frequency of the first display partition AA1 is higher than that of the second display partition AA2, and the display panel can display with different refresh frequencies in different display partitions.
In the above embodiment, in the second display frame, the 4 th to 6 th shift units 10 are stopped by controlling the first switching module 20 connected to the output terminal O1 of the 3 rd to 6 th shift units 10 to be turned off, thereby saving power consumption. In another embodiment, only the first switch module 20 connected to the output end O1 of the 3 rd stage shift unit 10 may be controlled to be turned off, and the other first switch modules 20 are turned on, so that the 4 th to 6 th stage shift units 10 can stop working, thereby achieving the purpose of saving power consumption.
In addition, when the value of m is changed, the position of the dividing line between the first display area AA1 and the second display area AA2 is changed. For example, when m=1, the first display section AA1 includes pixel circuits in which the first 2 signal output terminals out of the scan circuit 100 are connected through the scan line GL, and the second display section AA2 includes pixel circuits in which the last 4 signal output terminals out of the scan circuit 100 are connected through the scan line GL; when m=3, the first display area AA1 includes pixel circuits of the first 4 signal outputs out of the scan circuit 100 connected through the scan line GL, and the second display area AA2 includes pixel circuits of the second 2 signal outputs out of the scan circuit 100 connected through the scan line GL. Therefore, according to the technical scheme, the display panel can display in different display partitions at different refreshing frequencies, the position of each display partition is not fixed, the position of the display partition can be dynamically adjusted according to the display scene requirement, and therefore the supportable display scene of the display panel is expanded.
With continued reference to fig. 19, the level transmission module 30 optionally includes a fifth transistor T5, a first pole of the ith fifth transistor T5 is connected to the output terminal O1 of the ith shift unit 10, a second pole of the ith fifth transistor T5 is connected to the output terminal O1 of the (i+1) th shift unit 10, a first pole of the nth fifth transistor T5 is connected to the output terminal O1 of the nth shift unit 10, and a second pole of the nth fifth transistor T5 is connected to the first level signal line 40.
Wherein the gates of at least two fifth transistors T5 are connected to different control signal lines.
In one embodiment, a part of the gates of the fifth transistors T5 may be provided to be connected to one control signal line, and the gates of the remaining fifth transistors T5 are provided to be connected to the other control signal line. Since the conductive states of the level transmission modules 30 connected to the output terminal O1 of the previous m+1 stage shift unit 10 are the same, and the conductive states of the remaining level transmission modules 30 are the same, it may be provided that the gate of the fifth transistor T5 connected to the output terminal O1 of the previous m+1 stage shift unit 10 is connected to one control signal line, and the gate of the remaining fifth transistor T5 is connected to the other control signal line, so as to reduce the number of control signals in the display panel, thereby simplifying the structure of the display panel. In this embodiment, the boundary between the first display area AA1 and the second display area AA2 is fixed, the first display area AA1 includes pixel circuits connected to the output terminal O1 of the first m+1 stage shift unit 10, and the second display area AA2 includes pixel circuits connected to the output terminals O1 of the remaining shift units 10.
In another embodiment, the gates of the different fifth transistors T5 may also be configured to be connected to different control signal lines, so that the operating states of the different fifth transistors T5 can be controlled individually, and the positions of the dividing lines of the first display area AA1 and the second display area AA2 can be adjusted conveniently. By the arrangement, at least two display subareas of the display area of the display panel can be sequentially reduced in frequency, for example, at least three display subareas can be sequentially reduced in frequency, and the positions of dividing lines of different subareas can be adjusted. Optionally, the first display period includes at least one first display frame and a plurality of second display frames. Optionally, in the same first display period, at least part of m in the second display frame has a different value. The display area comprises a first display partition AA1, a second display partition AA2 and a third display partition AA3 which are sequentially adjacent, and the ordering of the shift units 10 corresponding to the first display partition AA1, the second display partition AA2 and the third display partition AA3 is sequentially back. The positions of the dividing lines among the first display area AA1, the second display area AA2 and the third display area AA3 are all adjustable, and the refresh frequency is reduced in sequence.
In another embodiment, the total number n of the level transmission modules 30 may be further set to be smaller than the total number a of the shift units 10, the first end of the ith level transmission module 30 is connected to the output end O1 of the jth shift unit 10, the second end of the ith level transmission module 30 is connected to the output end O1 of the (j+1) th shift unit 10, the first end of the nth level transmission module 30 is connected to the output end O1 of the (a) th shift unit 10, and the second end of the nth level transmission module 30 is connected to the first level signal line 40. Wherein, j is more than or equal to 2 and less than or equal to a-1, j is more than i, and j is an integer. That is, at least one of the shift units 10 from the 1 st shift unit 10 or the output terminals O1 of two or more adjacent shift units 10 may not be connected to the level transmission module 30 while controlling the respective level transmission modules 30 to be turned on or off, it may be possible to divide the display area AA into the first display area AA1 and the second display area AA2 at fixed positions to perform display at the same or different refresh frequencies within different display areas. Accordingly, the level transmission module 30 includes the fifth transistors T5, and the number of the fifth transistors T5 is also less than the total number of the shift units 10, so as to reduce the total number of transistors in the scan circuit 100, which helps to simplify the circuit structure of the scan circuit 100.
Fig. 20 is a schematic diagram of another scan circuit according to an embodiment of the present invention. Referring to fig. 20, alternatively, a first terminal of the level transmission module 30 is connected to the output terminal O1 of the corresponding shift unit 10 and the signal output terminal out of the scan circuit 100, and a second terminal of the level transmission module 30 is connected to the first level signal line 40.
Specifically, by controlling the on state of the first switch module 20, it is able to control whether the scan signal output by the previous stage shift unit 10 connected to the first switch module 20 is transmitted to the start signal terminal SIN of the next stage shift unit 10, so as to control whether the next stage shift unit 10 works. By controlling the on state of the level transmission module 30, it is possible to control whether the first level input by the first level signal line 40 is transmitted to the signal output terminal out of the scan circuit 100.
Referring to fig. 20, optionally, the first display period includes a first display frame and a second display frame. In the first display frame, the first switch module 20 is controlled to be turned on, and the level transmission module 30 is controlled to be turned off. In the second display frame, the first switch module 20 connected to the output end O1 of the w-th stage shift unit 10 is controlled to be turned on, and the first switch module 20 connected to the output end O1 of at least the w+1th stage shift unit 10 is controlled to be turned off; the level transmission module 30 connected with the output end O1 of the w+1 level shifting unit 10 before control is turned off, and the rest level transmission modules 30 are turned on; wherein w is more than or equal to 0 and less than or equal to n-2,w is an integer, and n is the total number of the shift units 10.
Illustratively, n= 6,w =2 is described. In the first display frame, each level transmission module 30 is turned off, the first level input by the first level signal line 40 cannot be transmitted to the signal output end out of the scanning circuit 100, each first switch module 20 is turned on, each shift unit 10 is cascaded through the first switch module 20, each shift unit 10 outputs a scanning signal step by step to the signal output end out of the scanning circuit 100, so as to drive the data writing transistor in each row of pixel circuits to respond to the effective level of the scanning signal, and each row of pixel circuits in the display area AA can write data voltage, thereby realizing the refreshing of the display picture. In the second display frame, the first switch module 20 connected to the output end O1 of the first 2 stage shift unit 10 is turned on, and the first switch modules 20 connected to the output ends O1 of the 3 rd to 6 th stage shift units 10 are turned off, so that the first 3 stage shift units 10 are cascaded through the first switch module 20, and the first 3 stage shift unit 10 outputs scanning signals to the first 3 signal output ends out of the scanning circuit 100 step by step, so as to drive the data writing transistors in each row of pixel circuits in the first display partition AA1 to respond to the effective level of the scanning signals, and enable each row of pixel circuits in the first display partition AA1 to write data voltages, thereby realizing the refreshing of the display picture. The level transmission module 30 connected to the output terminal O1 of the 3 rd level shift unit 10 is turned off, the level transmission module 30 connected to the output terminal O1 of the 4 th to 6 th level shift units 10 is turned on, the first level input by the first level signal line 40 may be transmitted to the 4 th to 6 th signal output terminals out of the scan circuit 100 through the level transmission module 30, so that the pulse signal frequency of the 4 th to 6 th signal output terminals out is lower than the pulse signal frequency of the first 3 signal output terminals out, and the data writing transistor in the pixel circuit of the second display area AA2 is in an off state in response to the first level, so that the pixel circuit in the second display area AA2 cannot write the data voltage and does not refresh the display screen.
The first display partition AA1 refreshes display pictures in a first display frame and a second display frame of a first display period, the second display partition AA2 refreshes display pictures in the first display frame of the first display period, and the second display frame of the first display period does not refresh display pictures, so that the refresh frequency of the first display partition AA1 is higher than that of the second display partition AA2, and the display panel can display with different refresh frequencies in different display partitions.
In the above embodiment, in the second display frame, the 4 th to 6 th shift units 10 are stopped by controlling the first switching module 20 connected to the output terminal O1 of the 3 rd to 6 th shift units 10 to be turned off, thereby saving power consumption. In another embodiment, only the first switch module 20 connected to the output end O1 of the 3 rd stage shift unit 10 may be controlled to be turned off, and the other first switch modules 20 are turned on, so that the 4 th to 6 th stage shift units 10 can stop working, thereby achieving the purpose of saving power consumption.
In addition, when the value of w changes, the position of the dividing line between the first display area AA1 and the second display area AA2 changes. For example, when w=1, the first display section AA1 includes pixel circuits in which the first 2 signal output terminals out of the scan circuit 100 are connected through the scan line GL, and the second display section AA2 includes pixel circuits in which the last 4 signal output terminals out of the scan circuit 100 are connected through the scan line GL; when w=3, the first display area AA1 includes pixel circuits of the first 4 signal outputs out of the scan circuit 100 connected through the scan line GL, and the second display area AA2 includes pixel circuits of the second 2 signal outputs out of the scan circuit 100 connected through the scan line GL. Therefore, according to the technical scheme, the display panel can display in different display partitions at different refreshing frequencies, the position of each display partition is not fixed, the position of the display partition can be dynamically adjusted according to the display scene requirement, and therefore the supportable display scene of the display panel is expanded.
With continued reference to fig. 20, the level transmission module 30 may alternatively include a sixth transistor T6, a first pole of the sixth transistor T6 is connected to the output terminal O1 of the corresponding shift unit 10 and the signal output terminal out of the scan circuit 100, and a second pole of the sixth transistor T6 is connected to the first level signal line 40.
Wherein the gates of at least two sixth transistors T6 are connected to different control signal lines.
In one embodiment, a part of the gates of the sixth transistors T6 may be provided to be connected to one control signal line, and the gates of the remaining sixth transistors T6 are provided to be connected to the other control signal line. Since the conductive states of the level transmission modules 30 connected to the output terminal O1 of the front w+1 stage shift unit 10 are the same, and the conductive states of the remaining level transmission modules 30 are the same, it may be provided that the gate of the sixth transistor T6 connected to the output terminal O1 of the front w+1 stage shift unit 10 is connected to one control signal line, and the gate of the remaining sixth transistor T6 is connected to the other control signal line, so as to reduce the number of control signals in the display panel, thereby simplifying the structure of the display panel. In this embodiment, the boundary between the first display area AA1 and the second display area AA2 is fixed, the first display area AA1 includes a pixel circuit connected to the output terminal O1 of the first w+1 stage shift unit 10, and the second display area AA2 includes pixel circuits connected to the output terminals O1 of the remaining shift units 10.
In another embodiment, the gates of the different sixth transistors T6 may also be configured to be connected to different control signal lines, so that the operating states of the different sixth transistors T6 can be controlled individually, and the positions of the dividing lines of the first display area AA1 and the second display area AA2 can be adjusted conveniently. By the arrangement, at least two display subareas of the display area of the display panel can be sequentially reduced in frequency, for example, at least three display subareas can be sequentially reduced in frequency, and the positions of dividing lines of different subareas can be adjusted. Optionally, the first display period includes at least one first display frame and a plurality of second display frames. Optionally, in the same first display period, at least part of w in the second display frame has a different value. In a part of the display frame, the shift unit 10 corresponding to the display partition with a small refresh frequency is not operated to reduce power consumption.
The display area includes a first display area AA1 and a second display area AA2, where the shift unit 10 corresponding to the first display area AA1 is a front stage of the shift unit 10 corresponding to the second display area AA2, and the refresh frequency of the first display area AA1 is greater than the refresh frequency of the second display area AA 2.
Illustratively, the display area includes a first display area AA1, a second display area AA2, and a third display area AA3 that are sequentially adjacent, and the sequences of the shift units 10 corresponding to the first display area AA1, the second display area AA2, and the third display area AA3 are sequentially later. The positions of the dividing lines among the first display area AA1, the second display area AA2 and the third display area AA3 are all adjustable, and the refresh frequency is reduced in sequence.
Fig. 21 is a schematic diagram of another scan circuit according to an embodiment of the present invention. Referring to fig. 21, alternatively, the scan circuit 100 may further include only the shift unit 10, the first switch unit 310, and the second switch unit 320, and not the first switch module and the second switch module, and each shift unit 10 is directly cascaded therebetween, and the output terminal O1 of each shift unit 10 outputs a scan signal, and the scan signal or the first level output from the shift unit 10 is selectively transmitted to the signal output terminal out of the scan circuit 100 by controlling the operation states of the first switch unit 310 and the second switch unit 320. The advantage of this arrangement is that the structure of the scanning circuit 100 can be simplified, and the display panel can be displayed in different display partitions with different refresh frequencies, the position of each display partition is not fixed, and the position of the display partition can be dynamically adjusted according to the requirements of the display scene, so that the supportable display scene of the display panel is expanded.
Based on the same inventive concept, the embodiment of the invention also provides a display panel, which comprises the scanning circuit in any embodiment, has corresponding functional modules and beneficial effects of the scanning circuit, and further comprises a plurality of rows of pixel circuits, wherein the signal output ends of the scanning circuits are connected with the corresponding pixel circuits.
Based on the same inventive concept, the embodiments of the present invention also provide a display driving method for driving the display panel in the above embodiments to operate, which may be performed by the display driving module in the above embodiments. Fig. 22 is a flowchart of a display driving method according to an embodiment of the present invention. Referring to fig. 22, the method specifically includes the steps of:
s110, controlling the working states of the first switch module and the level transmission module according to the refresh frequencies of different partitions in the display area of the display panel and the positions of dividing lines.
S120, transmitting the scanning signal or the first level output by the shifting unit to a signal output end of the scanning circuit so as to adjust the frequency of the pulse signal transmitted to the signal output end of the scanning circuit.
Wherein, the effective level of the scanning signal output by the shifting unit is opposite to the logic of the first level.
According to the technical scheme of the embodiment of the invention, the working states of the first switch module and the level transmission module in each display partition are controlled according to the refresh frequencies of different partitions and the positions of the dividing lines in the display area of the display panel, so that the scanning signals or the first levels output by the shift units are transmitted to the signal output end of the scanning circuit, and the frequency of pulse signals transmitted to the signal output end of the scanning circuit is regulated, namely the frequency of pulse signals transmitted to the grid electrode of the switch transistor in the pixel circuit of each display partition is regulated, the refresh frequency of each display partition is regulated, the display panel can be controlled to display in different display partitions with different refresh frequencies, the positions of each display partition are not fixed, and the positions of the display partitions can be dynamically regulated according to the requirements of display scenes, so that the supportable display scenes of the display panel are expanded. In addition, for the display partition with relatively low refresh frequency, in the display frame where the display partition does not refresh the display picture, the first switch module corresponding to the display partition can be controlled to be turned off, so that at least part of the shift units corresponding to the display partition stop working, and the power consumption is reduced.
Optionally, the first display period includes at least one first display frame and at least one second display frame; the display area comprises at least two display partitions; accordingly, step S110 specifically includes:
in a first display frame, controlling the first switch module to be conducted, and transmitting a scanning signal output by the shifting unit to a signal output end of the scanning circuit;
in the second display frame, the first switch module corresponding to the partition with the large refresh frequency in the display area is controlled to be turned on, the scanning signal output by the shift unit is transmitted to the signal output end of the scanning circuit, at least part of the first switch module corresponding to the partition with the small refresh frequency in the display area is controlled to be turned off, and the level transmission module transmits the first level to the signal output end of the scanning circuit.
Alternatively, the number of data voltages supplied to the pixel circuits in the display area in the first display frame is greater than the number of data voltages supplied to the pixel circuits in the display area in the second display frame.
Optionally, the display driving method further includes: supplying a data voltage to the pixel circuits driving the partition having the large refresh frequency in the display area in the second display frame; the supply of the data voltage to the pixel circuits of the partition in the display area where the refresh frequency is small is stopped.
Optionally, the positions of the dividing lines of the different partitions in the display area are adjustable, and the positions of the dividing lines of the different partitions in the display area correspond to the positions of the dividing lines of the scanning signal output by the shifting unit, which is transmitted to the signal output end of the scanning circuit, and the first level is transmitted to the signal output end of the scanning circuit.
Optionally, the refresh period corresponding to the partition with the smallest refresh frequency in the display area includes at least one first display frame and at least one second display frame.
Optionally, the duration of the first display frame is equal to the refresh period corresponding to the partition with the largest refresh frequency in the display area.
Optionally, the duration of the second display frame is equal to the refresh period corresponding to the partition with the largest refresh frequency in the display area.
Optionally, the refresh frequency of the partition in the plurality of shift unit corresponding display areas located at the front stage is greater than or less than the refresh frequency of the partition in the plurality of shift unit corresponding display areas located at the rear stage, or the refresh frequency of the partition in the plurality of shift unit corresponding display areas located at the front stage is greater than the refresh frequency of the partition in the plurality of shift unit corresponding display areas located at the rear stage in the first period, and the refresh frequency of the partition in the plurality of shift unit corresponding display areas located at the front stage is less than the refresh frequency of the partition in the plurality of shift unit corresponding display areas located at the rear stage in the second period.
Optionally, the display panel further includes a plurality of second switch modules, wherein in the adjacent two-stage shift units, the output end of the previous-stage shift unit is connected to the output end of the next-stage shift unit through a second switch module, and the second switch modules are used for switching on or switching off the output end of the adjacent two-stage shift unit so as to control whether the scanning signal output by the previous-stage shift unit is transmitted to the output end of the next-stage shift unit, so that whether the skip-stage transmission of the scanning signal output by the shift unit is realized. Accordingly, step S110 specifically includes:
in a first display frame, controlling each first switch module to be turned on, and each second switch module to be turned off, wherein the level transmission module transmits a scanning signal output by the shifting unit to a signal output end of the scanning circuit;
in the second display frame, the first switch module corresponding to the partition with the large refreshing frequency in the display area is controlled to be turned on, the second switch module is controlled to be turned off, the level transmission module transmits the scanning signal output by the shifting unit to the signal output end of the scanning circuit, the first switch module corresponding to the partition with the small refreshing frequency in the display area is controlled to be turned off, and the level transmission module transmits the first level to the signal output end of the scanning circuit.
Optionally, when the first switch module is turned on, the second switch module connected with the first switch module between the same two-stage shifting units is controlled to be turned off; when the second switch module is turned on, the first switch module connected with the second switch module between the same two-stage shifting units is controlled to be turned off.
Optionally, the display area includes at least three display partitions, and the at least three display partitions include a first display partition, a second display partition and a third display partition that are adjacent in sequence, and refresh frequencies of two adjacent display partitions in the first display partition, the second display partition and the third display partition are different; the ordering of the shift units corresponding to the first display partition, the second display partition and the third display partition is sequentially backward; the positions of dividing lines among the first display partition, the second display partition and the third display partition are all adjustable; correspondingly, the display driving method further comprises the steps of:
the operating modes of the first display partition, the second display partition and the third display partition include one or more of the following:
the refreshing frequency of the first display partition and the refreshing frequency of the third display partition are the same; the refresh frequency of the first display partition is greater than the refresh frequency of the second display partition, and the display driving method further comprises the steps of:
In a first display frame, controlling each first switch module to be turned on, and each second switch module to be turned off, wherein the level transmission module transmits scanning signals output by the shifting units corresponding to the first display partition, the second display partition and the third display partition to the signal output end of the scanning circuit;
in the second display frame, the first switch module corresponding to the first display partition and the third display partition is controlled to be turned on, the second switch module corresponding to the first display partition and the third display partition is controlled to be turned off, the level transmission module corresponding to the first display partition and the third display partition transmits scanning signals output by the shifting units corresponding to the first display partition and the third display partition to the signal output end of the scanning circuit, the first switch module corresponding to the second display partition is controlled to be turned off, the second switch module corresponding to the second display partition is controlled to be turned on, and the level transmission module corresponding to the second display partition transmits the first level to the signal output end of the scanning circuit, so that the frequency of pulse signals transmitted to the signal output end of the scanning circuit is adjusted.
Optionally, in the second display frame, the data voltages are continuously supplied to the pixel circuits driving the first display section and the third display section; stopping supplying the data voltage to the pixel circuit driving the second display section; or the refresh frequencies of the first display partition and the third display partition are the same; the refresh frequency of the first display partition is smaller than the refresh frequency of the second display partition, and the display driving method further comprises the following steps:
In a first display frame, controlling each first switch module to be turned on, and each second switch module to be turned off, wherein the level transmission module transmits scanning signals output by the shifting units corresponding to the first display partition, the second display partition and the third display partition to the signal output end of the scanning circuit;
and in the second display frame, controlling the first switch module corresponding to the second display partition to be on, and the second switch module corresponding to the second display partition to be off, wherein the level transmission module corresponding to the second display partition transmits the scanning signal output by the shift unit corresponding to the second display partition to the signal output end of the scanning circuit, controlling the first switch module corresponding to the first display partition and the third display partition to be off, and controlling the second switch module corresponding to the first display partition and the third display partition to be on, wherein the level transmission module corresponding to the first display partition and the third display partition transmits the first level to the signal output end of the scanning circuit so as to adjust the frequency of the pulse signal transmitted to the signal output end of the scanning circuit.
Optionally, stopping supplying the data voltage to the pixel circuits driving the first display section and the third display section in the second display frame; or the refresh frequencies of the first display partition, the second display partition and the third display partition are different, the partition with the largest refresh frequency in the first display partition, the second display partition and the third display partition is a high-frequency display partition, the partition with the smallest refresh frequency is a low-frequency display partition, and the other partition is a medium-frequency display partition; the first display period further includes at least one third display frame, and the display driving method further includes:
In a first display frame, controlling each first switch module to be turned on, and each second switch module to be turned off, wherein the level transmission module transmits scanning signals output by the shifting units corresponding to the first display partition, the second display partition and the third display partition to the signal output end of the scanning circuit;
in the second display frame, the first switch module corresponding to the high-frequency display partition is controlled to be turned on, the second switch module corresponding to the high-frequency display partition is turned off, the level transmission module corresponding to the high-frequency display partition transmits the scanning signal output by the shifting unit to the signal output end of the scanning circuit, the first switch module corresponding to the intermediate-frequency display partition and the low-frequency display partition is controlled to be turned off, the second switch module corresponding to the intermediate-frequency display partition and the low-frequency display partition is controlled to be turned on, and the level transmission module corresponding to the intermediate-frequency display partition and the low-frequency display partition transmits the first level to the signal output end of the scanning circuit, so that the frequency of the pulse signal transmitted to the signal output end of the scanning circuit is regulated;
in the third display frame, the first switch module corresponding to the high-frequency display partition and the intermediate-frequency display partition is controlled to be turned on, the second switch module corresponding to the high-frequency display partition and the intermediate-frequency display partition is controlled to be turned off, the level transmission module corresponding to the high-frequency display partition and the intermediate-frequency display partition transmits the scanning signal output by the shifting unit to the signal output end of the scanning circuit, the first switch module corresponding to the low-frequency display partition is controlled to be turned off, the second switch module corresponding to the low-frequency display partition is controlled to be turned on, and the level transmission module corresponding to the low-frequency display partition transmits the first level to the signal output end of the scanning circuit, so that the frequency of the pulse signal transmitted to the signal output end of the scanning circuit is adjusted.
Optionally, the magnitude relation of the refresh frequencies of the first display partition, the second display partition, and the third display partition includes one or more of the following relations: low medium high, low high medium, high low medium, high medium low, medium high low and medium low.
Optionally, in the second display frame, stopping supplying the data voltage to the pixel circuits driving the intermediate frequency display section and the low frequency display section; in the third display frame, continuously supplying data voltages to pixel circuits driving the high-frequency display section and the intermediate-frequency display section; stopping supplying the data voltage to the pixel circuits driving the low frequency display section;
optionally, the duration of the third display frame is equal to the refresh period corresponding to the partition with the largest refresh frequency in the display area.
Optionally, the level transmission module includes a first switch unit and a second switch unit; the first end of the first switch unit is connected with the output end of the shift unit, the second end of the first switch unit is connected with the signal output end of the scanning circuit, and the first switch unit is used for switching on or switching off the output end of the shift unit and the signal output end of the scanning circuit; the first end of the second switch unit is connected with the first level signal line, the second end of the second switch unit is connected with the signal output end of the scanning circuit, and the second switch unit is used for switching on or switching off the first level signal line and the signal output end of the scanning circuit.
Correspondingly, the display driving method further comprises the steps of: for the same level transmission module, a first switch unit connected with the output end of the shifting unit is turned on, and a second switch unit is turned off, so that a scanning signal output by the shifting unit is transmitted to the signal output end of the scanning circuit; for the same level transmission module, the first switch unit connected with the output end of the shift unit is turned off, and the second switch unit is turned on, so that the first level is transmitted to the signal output end of the scanning circuit.
Optionally, the level transmission modules are arranged in one-to-one correspondence with the shifting units, and the output ends of the shifting units are connected with the signal output ends of the corresponding scanning circuits; the first end of the ith level transmission module is connected with the output end of the ith shifting unit, the second end of the ith level transmission module is connected with the output end of the (i+1) th shifting unit, the first end of the nth level transmission module is connected with the output end of the nth shifting unit, and the second end of the nth level transmission module is connected with the first level signal line; wherein i is more than or equal to 1 and less than or equal to n-1, i is an integer, and n is the total number of the level transmission modules. Correspondingly, the display driving method further comprises the steps of:
in a first display frame, controlling the first switch module to be turned on and the level transmission module to be turned off;
In the second display frame, a first switch module connected with the output end of the first m-stage shifting unit is turned on, and a first switch module connected with the output end of at least the (m+1) -th stage shifting unit is turned off; the level transmission module connected with the output end of the previous m+1 level shift unit is controlled to be turned off, and the rest level transmission modules are controlled to be turned on; wherein m is more than or equal to 0 and less than or equal to n-2, and m is an integer.
Optionally, the display area includes at least three display partitions, the first display period includes at least one first display frame and a plurality of second display frames, and m values in at least part of the second display frames in the same first display period are different.
Optionally, a first end of the level transmission module is connected to the output end of the corresponding shift unit and the signal output end of the scanning circuit, and a second end of the level transmission module is connected to the first level signal line. Correspondingly, the display driving method further comprises the steps of:
in a first display frame, controlling the first switch module to be turned on and the level transmission module to be turned off;
in the second display frame, a first switch module connected with the output end of the front w-level shift unit is turned on, and at least a first switch module connected with the output end of the w+1th level shift unit is turned off; the level transmission module connected with the output end of the w+1 level shifting unit is controlled to be turned off, and the rest level transmission modules are controlled to be turned on; wherein w is more than or equal to 0 and less than or equal to n-2,w, n is an integer, and n is the total number of shift units.
Optionally, the display area includes at least three display partitions, the first display period includes at least one first display frame and a plurality of second display frames, and in the same first display period, w in at least part of the second display frames has a different value.
Optionally, on the basis of the above embodiments, the display panel further includes: the clock signal line is connected with the shift unit, and the number of pulses transmitted by the clock signal line in the first display frame is larger than the number of pulses transmitted by the clock signal line in the second display frame.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims (16)

1. A scanning circuit, comprising:
a multi-stage shift unit;
the output end of the shifting unit of the previous stage is connected with the initial signal input end of the shifting unit of the next stage through one first switching module in the shifting units of the adjacent two stages, and the first switching modules are used for switching on or switching off the shifting units of the adjacent two stages;
the level transmission modules are connected with the output end of the corresponding level shifting unit and a signal output end of the scanning circuit, and are used for transmitting a first level to the signal output end of the scanning circuit so as to adjust the frequency of a pulse signal transmitted to the signal output end of the scanning circuit; the effective level of the scanning signal output by the shifting unit is opposite to the logic of the first level.
2. The scan circuit of claim 1, further comprising a plurality of second switch modules, wherein in the two adjacent stages of the shift units, the output end of the shift unit of the previous stage is connected to the output end of the shift unit of the next stage through one second switch module, and the second switch modules are used for switching on or switching off the output ends of the shift units of the adjacent two stages, so as to control whether the scan signal output by the shift unit of the previous stage is transmitted to the output end of the shift unit of the next stage, so as to realize whether the skip stage transmission of the scan signal output by the shift unit is performed.
3. The scan circuit of claim 2, wherein the first switch module comprises a first transistor, a first pole of the first transistor being connected to an output of a previous one of the two adjacent stages of the shift units, a second pole of the first transistor being connected to a start signal input of a subsequent one of the two adjacent stages of the shift units;
the second switch module comprises a second transistor, a first pole of the second transistor is connected with the output end of a previous stage of the shifting units in two adjacent stages of shifting units, and a second pole of the second transistor is connected with the output end of a next stage of the shifting units in two adjacent stages of shifting units;
preferably, one of the first transistor and the second transistor is a P-type transistor, the other is an N-type transistor, the first transistor and the second transistor connected between the same two stages of the shift units, and the gate of the first transistor and the gate of the second transistor are connected to the same control signal line;
preferably, the gates of different ones of the first transistors are connected to different ones of the control signal lines; the gates of different ones of the second transistors are connected to different ones of the control signal lines.
4. The scan circuit of claim 2, wherein the level transmission module comprises a first switching unit and a second switching unit;
the first end of the first switch unit is connected with the output end of the shift unit, the second end of the first switch unit is connected with the signal output end of the scanning circuit, and the first switch unit is used for switching on or switching off the output end of the shift unit and the signal output end of the scanning circuit;
the first end of the second switch unit is connected with a first level signal line, the second end of the second switch unit is connected with the signal output end of the scanning circuit, and the second switch unit is used for switching on or switching off the first level signal line and the signal output end of the scanning circuit;
preferably, the first switching unit is used for shielding the scan signal transmitted by the skip stage from being transmitted to the signal output end of the scan circuit when the first switching unit is turned off.
5. The scan circuit of claim 4, wherein the first switch module comprises a first transistor, a first pole of the first transistor being connected to an output of a previous one of the two adjacent stages of the shift units, a second pole of the first transistor being connected to a start signal input of a next one of the two adjacent stages of the shift units;
The second switch module comprises a second transistor, a first pole of the second transistor is connected with the output end of a previous stage of the shifting units in two adjacent stages of shifting units, and a second pole of the second transistor is connected with the output end of a next stage of the shifting units in two adjacent stages of shifting units;
the first switching unit comprises a third transistor, a first pole of the third transistor is connected with the output end of the shifting unit, and a second pole of the third transistor is connected with the signal output end of the scanning circuit;
the second switching unit comprises a fourth transistor, a first pole of the fourth transistor is connected with the first level signal line, and a second pole of the fourth transistor is connected with a signal output end of the scanning circuit;
preferably, the first transistor, the second transistor, the third transistor and the fourth transistor connected to the same output terminal of the shift unit, the gate of the third transistor and the gate of the first transistor are connected to the same control signal line, the gate of the fourth transistor and the gate of the second transistor are connected to the same control signal line, and the gate of the third transistor and the gate of the fourth transistor are connected to different control signal lines;
Or the first transistor, the second transistor, the third transistor and the fourth transistor which are connected with the output end of the same shifting unit are connected with the same control signal line, the grid electrode of the first transistor, the grid electrode of the second transistor, the grid electrode of the third transistor and the grid electrode of the fourth transistor are connected with the same control signal line, the third transistor and the first transistor are P-type transistors, the fourth transistor and the second transistor are N-type transistors, or the third transistor and the first transistor are N-type transistors, and the fourth transistor and the second transistor are P-type transistors;
preferably, the gates of the different third transistors are connected to different control signal lines, and the gates of the different fourth transistors are connected to different control signal lines.
6. The scanning circuit according to claim 1, wherein the level transmission modules are arranged in one-to-one correspondence with the shift units, and the output ends of the shift units are connected with the signal output ends of the corresponding scanning circuits;
the first end of the ith level transmission module is connected with the output end of the ith shifting unit, the second end of the ith level transmission module is connected with the output end of the (i+1) th shifting unit, the first end of the nth level transmission module is connected with the output end of the nth shifting unit, and the second end of the nth level transmission module is connected with a first level signal line;
Wherein i is more than or equal to 1 and less than or equal to n-1, i is an integer, and n is the total number of the level transmission modules;
preferably, the level transmission module includes a fifth transistor, a first pole of the i-th fifth transistor is connected to an output terminal of the i-th shift unit, a second pole of the i-th fifth transistor is connected to an output terminal of the i+1th shift unit, a first pole of the n-th fifth transistor is connected to an output terminal of the n-th shift unit, and a second pole of the n-th fifth transistor is connected to the first level signal line;
preferably, gates of at least two of the fifth transistors are connected to different control signal lines;
preferably, gates of different ones of the fifth transistors are connected to different ones of the control signal lines.
7. The scanning circuit according to claim 1, wherein a first end of the level transmission module is connected to the output end of the corresponding shift unit and the signal output end of the scanning circuit, and a second end of the level transmission module is connected to a first level signal line;
preferably, the level transmission module includes a sixth transistor, a first pole of the sixth transistor is connected to the output terminal of the corresponding shift unit and the signal output terminal of the scan circuit, and a second pole of the sixth transistor is connected to the first level signal line;
Preferably, gates of at least two of the sixth transistors are connected to different control signal lines;
preferably, gates of different ones of the sixth transistors are connected to different ones of the control signal lines.
8. A display panel comprising rows of pixel circuits and a scanning circuit as claimed in any one of claims 1-7, the scanning circuit having signal outputs connected to corresponding ones of the pixel circuits.
9. A display driving method for driving a display panel to operate, the display panel including a scanning circuit, the scanning circuit comprising: the device comprises a multistage shifting unit, a plurality of first switch modules and a plurality of level transmission modules, wherein in the shifting units of two adjacent stages, the output end of the shifting unit of the previous stage is connected with the initial signal input end of the shifting unit of the next stage through the first switch module; each level transmission module is connected with the output end of the corresponding level shifting unit and a signal output end of the scanning circuit;
the display driving method includes:
controlling the working states of the first switch module and the level transmission module according to the refresh frequencies of different partitions and the positions of dividing lines in the display area of the display panel so as to transmit scanning signals or first levels output by the shifting unit to the signal output end of the scanning circuit, and adjusting the frequency of pulse signals transmitted to the signal output end of the scanning circuit; wherein the effective level of the scanning signal output by the shifting unit is opposite to the logic of the first level.
10. The display driving method according to claim 9, wherein the first display period includes at least one first display frame and at least one second display frame; the display area comprises at least two display areas;
controlling the working states of the first switch module and the level transmission module according to the refresh frequencies of different partitions in the display area of the display panel and the positions of dividing lines, wherein the method comprises the following steps:
in the first display frame, the first switch module is controlled to be conducted, and the scanning signal output by the shifting unit is transmitted to the signal output end of the scanning circuit;
in the second display frame, controlling the first switch module corresponding to the partition with the large refresh frequency in the display area to be turned on, transmitting the scanning signal output by the shift unit to the signal output end of the scanning circuit, controlling at least part of the first switch module corresponding to the partition with the small refresh frequency in the display area to be turned off, and transmitting the first level to the signal output end of the scanning circuit by the level transmission module;
preferably, the number of data voltages supplied to the pixel circuits in the display area in the first display frame is greater than the number of data voltages supplied to the pixel circuits in the display area in the second display frame;
Preferably, the display driving method further includes: supplying a data voltage to the pixel circuits of the partition having a large refresh frequency in the display area in the second display frame; stopping supplying a data voltage to the pixel circuits of the partition in which the refresh frequency is small in the display area;
preferably, the positions of the dividing lines of the different partitions in the display area are adjustable, and the positions of the dividing lines of the different partitions in the display area correspond to the positions of the dividing lines of the scanning signal output by the shifting unit, which is transmitted to the signal output end of the scanning circuit, and the dividing lines of the first level, which is transmitted to the signal output end of the scanning circuit;
preferably, the refresh period corresponding to the partition with the smallest refresh frequency in the display area comprises at least one first display frame and at least one second display frame;
preferably, the duration of the first display frame is equal to the refresh period corresponding to the partition with the largest refresh frequency in the display area;
preferably, the duration of the second display frame is equal to the refresh period corresponding to the partition with the largest refresh frequency in the display area;
preferably, the refresh frequency of the partitions in the display area corresponding to the plurality of shift units located at the front stage is greater than or less than the refresh frequency of the partitions in the display area corresponding to the plurality of shift units located at the rear stage, or the refresh frequency of the partitions in the display area corresponding to the plurality of shift units located at the front stage is greater than the refresh frequency of the partitions in the display area corresponding to the plurality of shift units located at the rear stage in a first period, and the refresh frequency of the partitions in the display area corresponding to the plurality of shift units located at the front stage is less than the refresh frequency of the partitions in the display area corresponding to the plurality of shift units located at the rear stage in a second period.
11. The display driving method according to claim 10, wherein the display panel further comprises a plurality of second switch modules, wherein in the two adjacent stages of the shift units, the output end of the shift unit of the previous stage is connected to the output end of the shift unit of the next stage through one second switch module, and the second switch modules are used for switching on or switching off the output ends of the shift units of the adjacent stages so as to control whether the scanning signal output by the shift unit of the previous stage is transmitted to the output end of the shift unit of the next stage, so as to realize whether the skip stage transmission of the scanning signal output by the shift unit is performed;
controlling the working states of the first switch module and the level transmission module according to the refresh frequencies of different partitions in the display area of the display panel and the positions of dividing lines, wherein the method comprises the following steps:
in the first display frame, controlling each first switch module to be turned on, each second switch module to be turned off, and the level transmission module transmitting the scanning signal output by the shifting unit to the signal output end of the scanning circuit;
in the second display frame, the first switch module corresponding to the partition with the large refresh frequency in the display area is controlled to be turned on, the second switch module is controlled to be turned off, the level transmission module transmits the scanning signal output by the shifting unit to the signal output end of the scanning circuit, the first switch module corresponding to the partition with the small refresh frequency in the display area is controlled to be turned off, and the level transmission module transmits the first level to the signal output end of the scanning circuit;
Preferably, when the first switch module is turned on, the second switch module connected between the same two stages of the shift units as the first switch module is controlled to be turned off;
and when the second switch module is turned on, the first switch module connected with the second switch module between the same two stages of shift units is controlled to be turned off.
12. The display driving method according to claim 11, wherein the display area includes at least three display sections including a first display section, a second display section, and a third display section that are adjacent in this order, and refresh frequencies of adjacent two of the first display section, the second display section, and the third display section are different; the ordering of the shift units corresponding to the first display partition, the second display partition and the third display partition is sequentially backward; the positions of the dividing lines among the first display partition, the second display partition and the third display partition are all adjustable;
the display driving method further includes:
the working modes of the first display partition, the second display partition and the third display partition comprise one or more of the following:
The refresh frequencies of the first display partition and the third display partition are the same; the refresh frequency of the first display partition is greater than the refresh frequency of the second display partition, and the display driving method further includes:
in the first display frame, controlling each first switch module to be turned on, each second switch module to be turned off, and the level transmission module transmitting scanning signals output by the shift units corresponding to the first display partition, the second display partition and the third display partition to a signal output end of the scanning circuit;
in the second display frame, the first switch module corresponding to the first display partition and the third display partition is controlled to be turned on, the second switch module corresponding to the first display partition and the third display partition is controlled to be turned off, the level transmission module corresponding to the first display partition and the third display partition transmits scanning signals output by the shifting unit corresponding to the first display partition and the third display partition to the signal output end of the scanning circuit, the first switch module corresponding to the second display partition is controlled to be turned off, the second switch module corresponding to the second display partition is controlled to be turned on, and the level transmission module corresponding to the second display partition transmits the first level to the signal output end of the scanning circuit, so that the frequency of pulse signals transmitted to the signal output end of the scanning circuit is adjusted;
The first switch module, the second switch module and the level transmission module are connected with the output end of the shift unit, which is used for transmitting scanning signals to the pixel circuit of the first display partition, and are the first switch module, the second switch module and the level transmission module corresponding to the first display partition; the first switch module, the second switch module and the level transmission module are connected with the output end of the shift unit, which is used for transmitting scanning signals to the pixel circuit of the second display partition, and are the first switch module, the second switch module and the level transmission module corresponding to the second display partition;
the first switch module, the second switch module and the level transmission module are connected with the output end of the shift unit and are used for transmitting scanning signals to the pixel circuit of the third display partition, and the first switch module, the second switch module and the level transmission module are corresponding to the third display partition;
preferably, in the second display frame, data voltages are continuously supplied to the pixel circuits driving the first display section and the third display section; stopping supplying a data voltage to the pixel circuits driving the second display section;
Or the refresh frequencies of the first display partition and the third display partition are the same; the refresh frequency of the first display partition is smaller than the refresh frequency of the second display partition, and the display driving method further comprises the steps of:
in the first display frame, controlling each first switch module to be turned on, each second switch module to be turned off, and the level transmission module transmitting scanning signals output by the shift units corresponding to the first display partition, the second display partition and the third display partition to a signal output end of the scanning circuit;
in the second display frame, the first switch module corresponding to the second display partition is controlled to be turned on, the second switch module corresponding to the second display partition is controlled to be turned off, the level transmission module corresponding to the second display partition transmits a scanning signal output by the shifting unit corresponding to the second display partition to the signal output end of the scanning circuit, the first switch module corresponding to the first display partition and the third display partition is controlled to be turned off, the second switch module corresponding to the first display partition and the third display partition is controlled to be turned on, and the level transmission module corresponding to the first display partition and the third display partition transmits the first level to the signal output end of the scanning circuit, so that the frequency of a pulse signal transmitted to the signal output end of the scanning circuit is adjusted;
Preferably, the supply of the data voltage to the pixel circuits driving the first display section and the third display section is stopped at the second display frame;
or the refresh frequencies of the first display partition, the second display partition and the third display partition are different, the partition with the largest refresh frequency in the first display partition, the second display partition and the third display partition is a high-frequency display partition, the partition with the smallest refresh frequency is a low-frequency display partition, and the rest is a medium-frequency display partition; the first display period further includes at least one third display frame, and the display driving method further includes:
in the first display frame, controlling each first switch module to be turned on, each second switch module to be turned off, and the level transmission module transmitting scanning signals output by the shift units corresponding to the first display partition, the second display partition and the third display partition to a signal output end of the scanning circuit;
in the second display frame, the first switch module corresponding to the high-frequency display partition is controlled to be turned on, the second switch module corresponding to the high-frequency display partition is controlled to be turned off, the level transmission module corresponding to the high-frequency display partition transmits the scanning signal output by the shifting unit to the signal output end of the scanning circuit, the first switch module corresponding to the intermediate-frequency display partition and the low-frequency display partition is controlled to be turned off, the second switch module corresponding to the intermediate-frequency display partition and the low-frequency display partition is controlled to be turned on, and the level transmission module corresponding to the intermediate-frequency display partition and the low-frequency display partition transmits the first level to the signal output end of the scanning circuit, so that the frequency of the pulse signal transmitted to the signal output end of the scanning circuit is regulated;
In the third display frame, the first switch module corresponding to the high-frequency display partition and the intermediate-frequency display partition is controlled to be turned on, the second switch module corresponding to the high-frequency display partition and the intermediate-frequency display partition is controlled to be turned off, the level transmission module corresponding to the high-frequency display partition and the intermediate-frequency display partition transmits scanning signals output by the shifting unit to the signal output end of the scanning circuit, the first switch module corresponding to the low-frequency display partition is controlled to be turned off, the second switch module corresponding to the low-frequency display partition is controlled to be turned on, and the level transmission module corresponding to the low-frequency display partition transmits the first level to the signal output end of the scanning circuit, so that the frequency of pulse signals transmitted to the signal output end of the scanning circuit is adjusted;
the magnitude relation of the refresh frequencies of the first display partition, the second display partition, and the third display partition includes one or more of the following: low medium high, low high medium, high low medium, high medium low, medium high low and medium low;
preferably, in the second display frame, supply of data voltages to the pixel circuits driving the intermediate frequency display section and the low frequency display section is stopped;
Continuously supplying data voltages to the pixel circuits driving the high-frequency display section and the intermediate-frequency display section in the third display frame; stopping supplying a data voltage to the pixel circuits driving the low frequency display section;
preferably, the duration of the third display frame is equal to the refresh period corresponding to the partition with the largest refresh frequency in the display area.
13. The display driving method according to claim 10 or 11, wherein the level transmission module includes a first switching unit and a second switching unit; the first end of the first switch unit is connected with the output end of the shift unit, the second end of the first switch unit is connected with the signal output end of the scanning circuit, and the first switch unit is used for switching on or switching off the output end of the shift unit and the signal output end of the scanning circuit; the first end of the second switch unit is connected with a first level signal line, the second end of the second switch unit is connected with the signal output end of the scanning circuit, and the second switch unit is used for switching on or switching off the first level signal line and the signal output end of the scanning circuit; the display driving method further includes:
For the same level transmission module, the first switch unit connected with the output end of the shift unit is turned on, and the second switch unit is turned off, so that the scanning signal output by the shift unit is transmitted to the signal output end of the scanning circuit;
and for the same level transmission module, the first switch unit connected with the output end of the shift unit is turned off, and the second switch unit is turned on, so that the first level is transmitted to the signal output end of the scanning circuit.
14. The display driving method according to claim 10, wherein the level transmission modules are arranged in one-to-one correspondence with the shift units, and the output ends of the shift units are connected with the signal output ends of the corresponding scanning circuits; the first end of the ith level transmission module is connected with the output end of the ith shifting unit, the second end of the ith level transmission module is connected with the output end of the (i+1) th shifting unit, the first end of the nth level transmission module is connected with the output end of the nth shifting unit, and the second end of the nth level transmission module is connected with a first level signal line; wherein i is more than or equal to 1 and less than or equal to n-1, i is an integer, and n is the total number of the level transmission modules;
The display driving method further includes:
in the first display frame, the first switch module is controlled to be turned on, and the level transmission module is controlled to be turned off;
in the second display frame, the first switch module connected with the output end of the shifting unit of the first m stages is turned on, and the first switch module connected with the output end of the shifting unit of at least the (m+1) th stage is turned off; the level transmission module connected with the output end of the shifting unit of the previous m+1 level is controlled to be turned off, and the rest level transmission modules are controlled to be turned on; wherein m is more than or equal to 0 and less than or equal to n-2, and m is an integer;
preferably, the display area includes at least three display partitions, the first display period includes at least one first display frame and a plurality of second display frames, and m in at least part of the second display frames in the same first display period are different in value.
15. The display driving method according to claim 10, wherein a first end of the level transmission module is connected to the output end of the corresponding shift unit and the signal output end of the scan circuit, and a second end of the level transmission module is connected to a first level signal line;
the display driving method further includes:
In the first display frame, the first switch module is controlled to be turned on, and the level transmission module is controlled to be turned off;
in the second display frame, the first switch module connected with the output end of the first w-stage shift unit is turned on, and the first switch module connected with the output end of the at least w+1th-stage shift unit is turned off; the level transmission module connected with the output end of the shifting unit of the previous w+1 level is controlled to be turned off, and the rest level transmission modules are controlled to be turned on; wherein w is more than or equal to 0 and less than or equal to n-2,w, n is an integer, and the total number of the shifting units is n;
preferably, the display area includes at least three display partitions, the first display period includes at least one first display frame and a plurality of second display frames, and w in at least part of the second display frames in the same first display period has different values.
16. The display driving method according to claim 10, wherein the display panel further comprises: the clock signal line is connected with the shift unit, and the number of pulses transmitted by the clock signal line in the first display frame is larger than that of pulses transmitted by the clock signal line in the second display frame.
CN202310362007.7A 2023-04-06 2023-04-06 Scanning circuit, display panel and display driving method Pending CN116363991A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117423310A (en) * 2023-12-19 2024-01-19 维信诺科技股份有限公司 Display device and driving method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117423310A (en) * 2023-12-19 2024-01-19 维信诺科技股份有限公司 Display device and driving method thereof
CN117423310B (en) * 2023-12-19 2024-04-26 维信诺科技股份有限公司 Display device and driving method thereof

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