CN116346665B

CN116346665B - Signal transmission quality assessment method and device

Info

Publication number: CN116346665B
Application number: CN202310603757.9A
Authority: CN
Inventors: 周潇; 程畅; 李堃; 蒋广成
Original assignee: Core Microelectronics Technology Zhuhai Co ltd
Current assignee: Core Microelectronics Technology Zhuhai Co ltd
Priority date: 2023-05-26
Filing date: 2023-05-26
Publication date: 2023-08-15
Anticipated expiration: 2043-05-26
Also published as: CN116346665A

Abstract

The invention provides a signal transmission quality evaluation method and device; the method comprises the following steps: receiving a drawing instruction sent by a signal sending end, and analyzing the drawing instruction to obtain attribute information of at least one data channel associated with a receiving link of a signal receiving end; configuring registers associated with each data channel based on attribute information of each data channel, and checking signals on each data channel based on each configured register to obtain error code information corresponding to each data channel; transmitting error code information corresponding to each data channel to a signal transmitting end so that the signal transmitting end performs eye diagram drawing based on the error code information to generate a target eye diagram corresponding to each data channel; the target eye diagram is used for evaluating the signal transmission quality on the data channel. The invention can improve the accuracy and efficiency of evaluating the signal transmission quality.

Description

Signal transmission quality assessment method and device

Technical Field

The present invention relates to the field of integrated circuit technologies, and in particular, to a method and an apparatus for evaluating signal transmission quality.

Background

With the continuous development of SERDES (SERializer/DESerializer) technology, the link transmission speed is gradually increased, for example, PCIe from GEN1 to GEN5, and the speed is increased from 2.5Gbps to 32Gbps. For the signal integrity of each adaptive different platform, the signal can be directly observed by a high-speed oscilloscope in the TX aspect of a transmission link in a communication link, and the debugging mode is visual; however, the receiving link RX side cannot directly determine whether the internal receiving performance of the chip is sufficiently strong through the oscilloscope.

In the related art, in order to determine the signal receiving performance in the chip, the number of errors is often counted based on the bottom hardware, so that the obtained number of errors is poor in accuracy, the signal receiving performance evaluating mode is not intuitive, and the signal quality evaluating efficiency is low.

Disclosure of Invention

The invention provides a signal transmission quality evaluation method, a device, equipment and a computer readable storage medium, which can improve the accuracy and efficiency of signal transmission quality evaluation.

The technical scheme of the invention is realized as follows:

the invention provides a signal transmission quality evaluation method, which is applied to a signal receiving end and comprises the following steps:

Receiving a drawing instruction sent by a signal sending end, and analyzing the drawing instruction to obtain attribute information of at least one data channel associated with a receiving link of the signal receiving end;

configuring registers associated with each data channel based on attribute information of each data channel, and checking signals on each data channel based on each configured register to obtain error code information corresponding to each data channel;

transmitting error code information corresponding to each data channel to the signal transmitting end, so that the signal transmitting end performs eye diagram drawing based on the error code information to generate a target eye diagram corresponding to each data channel;

the target eye diagram is used for evaluating the signal transmission quality on the data channel.

The invention provides an evaluation device of signal transmission quality, which is applied to a signal receiving end and comprises:

the first receiving module is used for receiving a drawing instruction sent by a signal sending end and analyzing the drawing instruction to obtain attribute information of at least one data channel associated with a receiving link of the signal receiving end;

The first acquisition module is used for configuring registers associated with each data channel based on attribute information of each data channel, and checking signals on each data channel based on each configured register to obtain error code information corresponding to each data channel;

the first sending module is used for sending error code information corresponding to each data channel to the signal sending end so that the signal sending end can draw an eye pattern based on the error code information and generate a target eye pattern corresponding to each data channel; the target eye diagram is used for evaluating the signal transmission quality on the data channel.

The invention provides a signal transmission quality evaluation method, which is applied to a signal transmitting end and comprises the following steps:

transmitting a drawing instruction to a signal receiving end, so that the signal receiving end determines error code information corresponding to at least one data channel associated with a receiving link of the signal receiving end based on the drawing instruction;

receiving error code information corresponding to each data channel reported by the signal receiving end;

drawing an eye pattern based on each bit error information to generate a target eye pattern corresponding to each data channel;

The invention provides an evaluation device of signal transmission quality, which is applied to a signal transmitting end and comprises:

the second sending module is used for sending a drawing instruction to the signal receiving end so that the signal receiving end can determine error code information corresponding to at least one data channel associated with a receiving link of the signal receiving end based on the drawing instruction;

the second receiving module is used for receiving error code information corresponding to each data channel reported by the signal receiving end;

the first drawing module is used for drawing an eye pattern based on each bit error information and generating a target eye pattern corresponding to each data channel; the target eye diagram is used for evaluating the signal transmission quality on the data channel.

invoking a second drawing interface, and sending parameter information of a signal detection point of a target data channel on a receiving link of a signal receiving end to the signal receiving end, so that the signal receiving end configures a register associated with the receiving link based on the parameter information of each signal detection point, and determines error code information corresponding to the target data channel through the configured register;

Reading error code information corresponding to the target data channel, and calling the second drawing interface to generate target error code information conforming to a target format;

drawing an eye pattern based on the target error code information to obtain a target eye pattern corresponding to the target data channel;

the third sending module is used for calling the second drawing interface, sending parameter information of signal detection points of a target data channel on a receiving link of a signal receiving end to the signal receiving end, so that the signal receiving end configures a register associated with the receiving link based on the parameter information of each signal detection point, and determining error code information corresponding to the target data channel through the configured register;

the information generation module is used for reading error code information corresponding to the target data channel, calling the second drawing interface and generating target error code information conforming to a target format;

the second drawing module is used for drawing an eye pattern based on the target error code information to obtain a target eye pattern corresponding to the target data channel; the target eye diagram is used for evaluating the signal transmission quality on the data channel.

receiving parameter information of a plurality of detection points of a data channel associated with a receiving link of a signal receiving end, wherein the parameter information is sent by a signal sending end;

configuring a register associated with the receiving link based on the parameter information, and determining error code information corresponding to the target data channel through the configured register;

storing error code information corresponding to the target data channel into the register so that a signal transmitting end accesses the register and reads the error code information of the target data channel to generate a target eye diagram corresponding to the target data channel;

the target eye diagram is used for evaluating the signal transmission quality on the target data channel.

the third receiving module is used for receiving parameter information of a plurality of detection points of a data channel associated with a receiving link of the signal receiving end, which is sent by the signal sending end;

the information acquisition module is used for configuring a register associated with the receiving link based on the parameter information and determining error code information corresponding to the target data channel through the configured register;

The third drawing module is used for storing error code information corresponding to the target data channel into the register so that a signal sending end can access the register and read the error code information of the target data channel to generate a target eye diagram corresponding to the target data channel; the target eye diagram is used for evaluating the signal transmission quality on the target data channel.

The present invention provides an electronic device including:

a memory for storing executable instructions;

and the processor is used for realizing the signal transmission quality evaluation method provided by the invention when executing the executable instructions stored in the memory.

The present invention provides a computer readable storage medium storing executable instructions for causing a processor to perform the method for evaluating signal transmission quality provided by the present invention.

Compared with the prior art, the invention has the following beneficial effects:

according to the invention, the signal receiving end obtains the attribute information of one or more data channels corresponding to the receiving link associated with the signal sending end by analyzing the drawing instruction sent by the signal sending end, configures the register associated with the data channels according to the corresponding attribute information, and determines the error code information corresponding to each data channel based on the configured register, so that the accuracy and the obtaining efficiency of the error code information can be improved; and then transmitting the error code information to a signal transmitting end so that the signal transmitting end generates a target eye diagram corresponding to each data channel and used for evaluating the signal transmission quality based on the corresponding error code information, and thus, the accuracy and the efficiency of evaluating the signal transmission quality can be improved through the target eye diagram.

Drawings

Fig. 1 is a schematic architecture diagram of an evaluation system for signal transmission quality according to an embodiment of the present invention;

fig. 2 is a schematic structural diagram of an electronic device according to an embodiment of the present invention;

fig. 3 is a flow chart of a method for evaluating signal transmission quality according to an embodiment of the present invention;

FIG. 4 is a flowchart of a method for configuring registers according to an embodiment of the present invention;

fig. 5 is a flow chart of another method for evaluating signal transmission quality according to an embodiment of the present invention;

fig. 6 is a flow chart of another method for evaluating signal transmission quality according to an embodiment of the present invention;

fig. 7 is a schematic flow chart of an evaluation method for implementing signal transmission quality at a signal receiving end according to an embodiment of the present invention;

FIG. 8 is a topology diagram of PCIe receive performance debug provided by an embodiment of the present invention;

FIG. 9 is a schematic diagram of a real-time drawn eye diagram provided by an embodiment of the present invention;

fig. 10 is a flowchart of an eye diagram drawing mode corresponding to the IIC Master provided in the embodiment of the present invention.

Detailed Description

The present invention will be further described in detail with reference to the accompanying drawings, for the purpose of making the objects, technical solutions and advantages of the present invention more apparent, and the described embodiments should not be construed as limiting the present invention, and all other embodiments obtained by those skilled in the art without making any inventive effort are within the scope of the present invention.

In the following description, reference is made to "some embodiments" which describe a subset of all possible embodiments, but it is to be understood that "some embodiments" can be the same subset or different subsets of all possible embodiments and can be combined with one another without conflict.

If a similar description of "first, second" appears in the application, the following description is added, in which the terms "first, second, third" merely distinguish similar objects and do not represent a specific ordering of the objects, it being understood that the "first, second, third" may, where allowed, interchange a specific order or precedence, so that the embodiments of the invention described herein can be practiced otherwise than as illustrated or described herein.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein is for the purpose of describing embodiments of the invention only and is not intended to be limiting of the invention.

Before describing embodiments of the present invention in further detail, the terms and terminology involved in the embodiments of the present invention will be described, and the terms and terminology involved in the embodiments of the present invention will be used in the following explanation.

1) PCle bus: the PCIe bus uses a high-speed differential bus and adopts an end-to-end connection mode, so that only one device can be connected to each of two ends of one PCIe link, and the two devices are data transmitting ends and data receiving ends.

2) Integrated circuit bus (IIC, inter-Integrated Circuit): IICBus is abbreviated as serial communication bus, and uses a multi-Master-Slave architecture.

3) RISC-V instruction set: is an open Instruction Set Architecture (ISA) built on the principle of Reduced Instruction Set Computing (RISC). The RISC-V instruction set, in contrast to most instruction sets, is freely available for any purpose, allowing anyone to design, manufacture, and sell RISC-V chips and software.

4) I2C (IIC) belongs to a two-wire serial bus, a bus used for communication between a Microcontroller (MCU) and peripheral devices (Slave devices), and belongs to a bus structure of one Master and multiple Slave devices (Master, slave devices), wherein each device on the bus has a specific device address so as to distinguish other devices on the same I2C bus. The physical I2C interface is composed of two bidirectional lines, a Serial Clock Line (SCL) and a serial data line (SDA), and can be used for transmitting and receiving data, but communication is initiated by a master device, and a slave device passively responds to realize data transmission.

5) Link, which refers to a Link of two PCIe components, is typically composed of ports and lanes (typically multiple lanes). Such as an X2 link, means that the link is made up of two lanes for a total of 8 physical links. Transmitted over the link is encoded data, such as the 8b/10b code used by Gen1/Gen2, and Gen3 is followed by a 128b/130b code. Link initialization and Link establishment procedures (otherwise known as Link Training) occur when the device is powered up or the Link reestablishes a Link.

Lane refers to the combination of a set of differential signals, including transmission and reception. The differential signal for one transmit direction includes both TX + and TX-lines and vice versa for reception. So a lane has four physical links. The transmission and reception are simultaneous and thus a full duplex data channel (lane): the duplex communication path between the two components of the link is called link; a set of combinations of lane differential signals, one differential pair being responsible for transmission and the other differential pair being responsible for reception. For example, PCIe links are X4, X8 in the sense that a link has 4 lanes, known as xN link, indicating how many lanes the link has. Lane refers to each path of data channel in link. And the link formed by a plurality of lanes effectively expands the bandwidth of the link.

6) Bit error rate: in digital circuitry, a transmitting end transmits multiple bits of data, and a receiving end may receive some erroneous bits (i.e., bit errors) due to various factors. The Ratio of the number of erroneous bits to the total number of bits is called Bit Error rate, bit Error Ratio, BER for short. Bit error rate is the most important parameter describing the performance of digital circuitry. In GHz bit rate communications circuitry (e.g., PCIe, SONET, SATA), BER is typically required to be less than or equal to. When the error rate is large, the communication system has low efficiency and unstable performance. Factors affecting the bit error rate include jitter, noise, loss of the channel, bit rate of the signal, etc.

7) Eye diagram: an eye diagram refers to a pattern observed on an oscilloscope when experimentally estimating and improving (by adjusting) the performance of a transmission system. The method for observing the eye pattern is as follows: an oscilloscope is used to bridge the output of the receiving filter, and then the oscilloscope scanning period is adjusted to synchronize the oscilloscope horizontal scanning period with the period of the received symbol, so that the image seen on the oscilloscope screen is like the eyes of a person, and is called an "eye pattern". The influence of inter-code crosstalk and noise can be observed from an eye diagram, so that the system quality is estimated.

8) Universal asynchronous receiver Transmitter (UART TX/RX, universal Asynchronous Receiver/Transmitter): is a universal serial data bus for asynchronous communication, and UART is an interface mode on hardware. Is also part of the computer hardware, and transmits data via serial communication. UARTs are commonly used in connection with other communication interfaces, such as EIA RS-232.

The inventor finds that in the high-speed serial port communication process, the signal integrity corresponding to the transmission link between two devices can directly observe the signal through the high-speed oscilloscope, the debugging mode is visual, however, the signal receiving performance on the receiving link of the signal receiving device is poor in intuitiveness of analysis, and the debugging mode is complex.

Based on the above, the embodiment of the invention provides a signal transmission quality evaluation method, a device, an electronic device and a computer readable storage medium, which can improve the accuracy of acquiring error code information and the efficiency of evaluating the signal transmission quality based on the error code information.

Referring to fig. 1, fig. 1 is a schematic diagram of an architecture of a signal transmission quality evaluation system 100 according to an embodiment of the present invention, where a server 200 supports a high-speed serial interface (e.g. PCIe interface) and is used as an upstream PCI Bridge in the entire topology to implement an end-to-end communication link with a signal transmitting end 300 and a signal receiving end 400. The operating system of the signal transmitting end can select a windows system, and simultaneously, a target application program for realizing eye diagram drawing is installed to realize a serial port command transmitting function. The signal transmitting end can access the register in the signal receiving end in real time based on the mode of USB-to-serial port URAT, and acquire error code information on any data channel in a receiving link of the signal receiving end in real time, so that the whole flow of eye diagram drawing and real-time online configuration for simulation parameters can be realized efficiently. In addition, in the serial communication process based on a Master multi-Slave bus structure (such as IIC), the signal transmitting end is driven by installing IIC Master hardware, and can be used as a Master device to realize the function related to the IIC Master, the signal receiving end can also be used as a Slave device to realize the function related to the IIC Slave, the signal transmitting end accesses an internal register in the signal receiving end, error code information in any data channel is stored into a file in a target format, and then the error code information on each data channel in a receiving link in the signal receiving end is obtained by reading the file in the target format, so that a target eye diagram is generated.

The signal receiving end 400 is configured to receive a drawing instruction sent by the signal sending end, and parse the drawing instruction to obtain attribute information of at least one data channel associated with a receiving link of the signal receiving end; configuring registers associated with each data channel based on attribute information of each data channel, and checking signals on each data channel based on each configured register to obtain error code information corresponding to each data channel; and transmitting error code information corresponding to each data channel to a signal transmitting end.

The signal transmitting end 300 is configured to transmit a drawing instruction to the signal receiving end 400, and receive error code information corresponding to one or more data channels reported by the signal receiving end; and drawing an eye pattern based on the error code information corresponding to each data channel, and generating a target eye pattern corresponding to each data channel.

Next, referring to fig. 2, fig. 2 is a schematic structural diagram of an electronic device 500 according to an embodiment of the present invention, where in practical application, the electronic device 500 may be implemented as the signal receiving end 400 or the signal transmitting end 300 in fig. 1, and the electronic device is taken as the signal receiving end 400 shown in fig. 1 as an example, and an electronic device implementing the method for evaluating signal transmission quality according to the embodiment of the present invention is described. The electronic device 500 shown in fig. 2 includes: at least one processor 510, a memory 550, at least one network interface 520, and a user interface 530. The various components in electronic device 500 are coupled together by bus system 540. It is to be appreciated that the bus system 540 is employed to facilitate connective communication between these components. The bus system 540 includes a power bus, a control bus, and a status signal bus in addition to the data bus. The various buses are labeled as bus system 540 in fig. 2 for clarity of illustration.

The processor 510 may be an integrated circuit chip with signal processing capabilities such as a general purpose processor, such as a microprocessor or any conventional processor, or the like, a digital signal processor (DSP, digital Signal Processor), or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or the like.

The user interface 530 includes one or more output devices 531 that enable presentation of media content, including one or more speakers and/or one or more visual displays. The user interface 530 also includes one or more input devices 532, including user interface components that facilitate user input, such as a keyboard, mouse, microphone, touch screen display, camera, other input buttons and controls.

The memory 550 may be removable, non-removable, or a combination thereof. Exemplary hardware devices include solid state memory, hard drives, optical drives, and the like. Memory 550 may optionally include one or more storage devices physically located remote from processor 510.

Memory 550 includes volatile memory or nonvolatile memory, and may also include both volatile and nonvolatile memory. The nonvolatile Memory may be a Read Only Memory (ROM), and the volatile Memory may be a random access Memory (RAM, random Access Memory). The memory 550 described in embodiments of the present invention is intended to comprise any suitable type of memory.

In some embodiments, memory 550 is capable of storing data to support various operations, examples of which include programs, modules and data structures, or subsets or supersets thereof, as exemplified below.

An operating system 551 including system programs for handling various basic system services and performing hardware-related tasks, such as a framework layer, a core library layer, a driver layer, etc., for implementing various basic services and handling hardware-based tasks;

network communication module 552 is used to reach other computing devices via one or more (wired or wireless) network interfaces 520, exemplary network interfaces 520 include: bluetooth, wireless compatibility authentication (WiFi), and universal serial bus (USB, universal Serial Bus), etc.;

a presentation module 553 for enabling presentation of information (e.g., a user interface for operating a peripheral device and displaying content and information) via one or more output devices 531 (e.g., a display screen, speakers, etc.) associated with the user interface 530;

the input processing module 554 is configured to detect one or more user inputs or interactions from one of the one or more input devices 532 and translate the detected inputs or interactions.

In some embodiments, the signal transmission quality evaluation device provided in the embodiments of the present invention may be implemented in software, and fig. 2 shows a signal transmission quality evaluation device 555 stored in a memory 550, where the device is typically a signal, and may be software in the form of a program, a plug-in, or the like, and includes the following software modules: the first receiving module 5551, the first obtaining module 5552 and the first transmitting module 5553 are logical, and thus may be arbitrarily combined or further split according to the implemented functions. The functions of the respective modules will be described hereinafter.

Based on the above description of the system and the device for evaluating signal transmission quality, the method for evaluating signal transmission quality provided by the embodiment of the invention is described below. Referring to fig. 3, fig. 3 is a flow chart of a signal transmission quality evaluation method according to an embodiment of the present invention, and in some embodiments, the method is implemented by a signal receiving end or a signal transmitting end that performs serial port communication, or implemented by the signal receiving end and the signal transmitting end cooperatively, and can be applied to an application scenario of evaluating signal transmission quality on a receiving link of the signal receiving end. Taking a signal receiving end as an example, the signal transmission quality evaluation method provided by the embodiment of the invention comprises the following steps:

In step 101, a signal receiving end receives a drawing instruction sent by a signal sending end, and analyzes the drawing instruction to obtain attribute information of at least one data channel associated with a receiving link of the signal receiving end.

In some embodiments, in the process of data transmission based on the high-speed serial bus, in order to ensure signal integrity and data consistency of a signal transmitting end and a signal receiving end which are connected on the high-speed serial bus, the signal quality on a transmitting link of the signal transmitting end is generally directly observed by a high-speed oscilloscope for the signal transmitting end; in addition, for signal integrity evaluation of the signal receiving end, the signal transmitting end can generate an eye diagram corresponding to the receiving link by receiving error code information on one or more data channels associated with the receiving link of the signal receiving end, so as to evaluate signal quality of the signal receiving end.

In a communication system based on a high-speed serial bus, a target application is deployed in a signal transmitting end, and the target application can be used for drawing an eye diagram corresponding to a receiving link of a signal receiving end based on real-time acquisition of error code information on one or more data channels in a corresponding receiving link of the signal receiving end. The signal transmitting end can support a serial port function, that is, when the signal transmitting end is a windows system and the signal receiving end is an embedded system, the signal transmitting end is usually required to support a serial port conversion function, such as USB-to-URAT, in order to monitor the signal receiving condition of the signal receiving end through the signal transmitting end. Or when the high-speed serial bus is an IIC serial bus, the signal transmitting end can be used as a Master device (Master) in a Master-multi-slave bus structure (such as IIC), and the signal transmitting end can access an internal register of the signal receiving end. When the signal transmitting end can support the serial port function, the signal receiving end can be an internal integrated CPU (such as RISC-V CPU); when the signal transmitting end can be used as a master device in a master-multi-Slave bus structure (e.g., IIC), the signal receiving end can also be used as a Slave device (Slave) in a master-multi-Slave bus structure (e.g., IIC), and the processor of the signal receiving end can access the registers related to the control and status in the physical layer in the data link.

In the communication process, after receiving a drawing instruction sent by a signal sending end, a signal receiving end analyzes the drawing instruction to obtain attribute information of a target data channel to be tested in a receiving link, wherein the attribute information corresponding to the data channel at least comprises an index (which can be represented by Lane_sel), a quadrant index (which can be represented by quater_sel), coordinate information (x_offset, y_offset) of one or more detection points in the data channel, and the like.

In some embodiments, the signal receiving end may obtain attribute information of the data channel by: starting a first drawing interface for drawing an eye pattern based on the drawing instruction; and analyzing the drawing instruction based on the first drawing interface to obtain attribute information of at least one data channel associated with a receiving link of the signal receiving end.

In some embodiments, after receiving a correct drawing instruction, a CPU in the signal receiving end starts a corresponding first drawing interface, where the first drawing interface is used for drawing an eye diagram; then, continuing to analyze the drawing instruction to obtain the number of data channels to be tested (which can be represented by Lane_num), the coordinate information of the detection point corresponding to each data channel, and the corresponding quadrant selection information.

In step 102, registers associated with each data channel are configured based on attribute information of each data channel, and signals on each data channel are checked based on each configured register to obtain error code information corresponding to each data channel.

In some embodiments, the signal receiving end performs corresponding configuration on internal registers associated with one or more data channels in the receiving link based on the attribute information obtained by parsing the drawing instruction, so that the signal receiving end automatically counts error code information corresponding to each data channel based on the configured registers.

In some embodiments, referring to fig. 4, fig. 4 is a flowchart of a method for configuring registers according to an embodiment of the present invention, and is described with reference to steps shown in fig. 4.

In step 1021, the signal receiving end performs unit analysis on the attribute information of each data channel according to the target type, so as to obtain a plurality of unit attribute data.

In practical implementation, after a serial port of a CPU of a signal receiving end receives a drawing command sent by a signal sending end, the command is regarded as data of a target type, the target type can be a character string type, and different unit attribute data are obtained by unit analysis of the data of the target type.

Step 1022, selecting at least two target unit attribute data from the plurality of unit attribute data, and combining to obtain combined data.

In practical implementation, the signal receiving end combines a plurality of unit attribute data to obtain combined data. For example, with the target type as the string type, the signal receiving end parses each bit of the string type data to obtain unit attribute data corresponding to each character index, and then detects 1125 a different definition of a specific bit composition, for example [3:0], to indicate that a correct drawing instruction is received, and at this time, the signal receiving end continues parsing the correct drawing instruction.

Step 1023, determining the channel attribute matched with the combined data, and taking the combined data as the attribute value of the channel attribute.

In the above example, [6:5] is used as the index (Lane_sel) of the data channel to be tested, and [9:8] is used as the quadrant index quaddrantsel, … …, etc.

Step 1024, performing adaptive read-write configuration on the registers associated with each data channel based on the attribute values of the attributes of each channel.

In some embodiments, according to the attribute value of each channel attribute, the register of the target address is configured in a read-write manner, so that the register can count the error code information corresponding to each data channel.

Illustratively, the pseudocode for retrieving error information on each data channel in the pyhton scripting language is shown in the following code segment (1):

{

fun wr_addr (addr, data)// register with internal address addr is configured as data

fun data=rd_addr (addr); data on registers with addr internal address is/are returned

fun get_error_per_lane_point(lane_sel, quadrant_sel, x_offset, y_offset):

wr_addr(addr1, quadrant_sel)；

wr_addr(addr2, x_offset)；

wr_addr(addr3,y_offset)；

return rd_addr(addr4)；

The data at the address addr4 is the error code information returned by the signal receiving end.

}

The function get_error_per_lane_point is to obtain error code information on a data channel, locate the data channel to be tested according to lane_sel, then determine a quadrant index on the data channel indicated by lane_sel according to the quater_sel, and then locate a specific detection point (x_offset, y_offset).

In step 103, the error code information corresponding to each data channel is sent to the signal sending end, so that the signal sending end performs eye diagram drawing based on the error code information, and a target eye diagram corresponding to each data channel is generated.

In actual implementation, the signal receiving end sends error code information corresponding to each monitoring point of the data channel to the signal sending end through the CPU serial port. The signal transmitting end stores error code information, draws eye patterns corresponding to all data channels in real time through target application, and different data channels are presented in different color gradient modes.

In combination with the embodiment of the present invention, there is also a preferred implementation manner, which can make the corresponding data transmission more efficient, and the method further includes:

acquiring an independent locking display operation of a signal receiving end side on a local area in a presented eye diagram;

generating outline coordinate information of a corresponding window according to the independent locking display operation, and obtaining all coordinate information in the window;

according to all coordinate information in the window, updating the register configuration parameters associated with each data channel in a signal transmitting end, so that the corresponding registers associated with all coordinate information in the window are configured to be transmitted in time, and the corresponding registers not associated with all coordinate information in the window are locally cached at the transmitting end by taking a round of eye diagram to display required register data as a caching object;

capturing the position and/or control focus of a mouse at a transmitting end, and acquiring a request message of register data required by a round of eye diagram display which is cached at present from the transmitting end when the position and/or control focus of the mouse touches an eye diagram display area; the register data required by the current cached round of eye diagram display is different from the local eye diagram data displayed in the current independent locking display window by preset time. The preset time is determined according to the time required by the register data required by one round of eye diagram display, and in the most ideal case, when the request message is acquired, the local eye diagram data displayed in the current independent locking display window reaches the last time enough to generate the register data required by one round of eye diagram display, and the time difference is 0.

Preferably, the current display area is adjusted again (may be adjusted to other areas or reverted to the original global), and the corresponding execution process further includes executing the above steps again: according to all coordinate information in the window, updating the register configuration parameters associated with each data channel in the signal transmitting end, so that the corresponding registers associated with all coordinate information in the window are configured to be transmitted in time, and the corresponding registers not associated with all coordinate information in the window are cached in the transmitting end by taking a round of eye diagram to display the needed register data as a cache object (wherein if the original global display is reverted, the executing action of caching the register data as the cache object in the transmitting end is not existed, because the global data can be transmitted to the receiving end in time).

The method for evaluating signal transmission quality provided by the embodiment of the invention is described below. Referring to fig. 5, fig. 5 is a flowchart of a signal transmission quality evaluation method according to an embodiment of the present invention, and in some embodiments, a signal transmitting end is used as an example, where the signal transmission quality evaluation method according to the embodiment of the present invention includes:

In step 201, the signal transmitting end transmits a drawing command to the signal receiving end, so that the signal receiving end determines error code information corresponding to at least one data channel associated with a receiving link of the signal receiving end based on the drawing command.

In practical implementation, the signal transmitting end may transmit the drawing instruction to the signal receiving end by assembling serial port data, where the assembling serial port data may be realized by calling a host USB to UART.

In step 202, error code information corresponding to each data channel reported by the signal receiving end is received.

In practical implementation, after the signal transmitting end transmits the drawing instruction, error code information corresponding to one or more data channels reported by the signal receiving end is received.

In step 203, an eye diagram is drawn based on each bit error information, and a target eye diagram corresponding to each data channel is generated.

The target eye diagram is used for evaluating the signal transmission quality on the data channel. In practical implementation, the signal transmitting end performs an eye diagram drawing operation of each data channel based on error code information of each data channel, so as to generate a corresponding target eye diagram.

The signal transmitting end may display the obtained error code information on the coordinate axis corresponding to the eye diagram drawing area according to the self-defined gradient of the color level through a third party library (such as qtgart) to form a scatter diagram, and finally generate the required eye diagram.

In some embodiments, the signal receiving end may generate the target eye pattern by: the signal receiving end determines the color gradation gradient of each bit error information and the position point of each bit error information corresponding to the eye diagram drawing area. Drawing the position points based on the color gradation gradient to obtain a scatter diagram of the target data channel; and drawing an eye pattern based on the scatter diagram, and generating a target eye pattern corresponding to each data channel.

In some embodiments, the signal receiving end obtains the gradient of the color level corresponding to the error code information of each data channel, and the corresponding position point in the eye diagram drawing area, fills the corresponding data to each position point according to the obtained gradient of the color level, and draws each position point in the eye diagram drawing area, thereby generating a corresponding scatter diagram, and finally, drawing an eye diagram based on the scatter diagram, and generating a target eye diagram corresponding to each data channel.

Illustratively, in the pyhton scripting language, pseudocode for an eye pattern is generated based on error code information acquired in real time by a serial port function, as shown in the following code segment (2):

begin:

connecting a serial port;

selecting a lane;

total data;

selecting a color category;

color list color

Color gradient color_power

Initializing coordinates;

initializing series:

for index in [len(color)]:

the size and color of the associated current series point;

series[“series_ index”] = series_c

n = 0

for q in quadrant list:

for y in [ y axis list ]:

for x in [ x axis list ]:

n += 1;

msg=1125 lane q x y;// assembling commands sent by serial ports

do acquires error code data through a uart protocol;

plot (n, x, y, data);

in the drawing function plot (n, x, y, data), n represents the error code information on which data channel is acquired, x represents the x-axis coordinate data in the eye diagram, y represents the y-axis coordinate data in the eye diagram, and data represents a specific value. In addition, pseudo code for implementing a drawing function plot in the pyhton script language is shown in the following code segment (3):

fun plot(n,x,y, data):

index = get_color_power (data)

filling data into corresponding series according to the obtained color level index, and displaying in a coordinate graph

series[“series_index”].append(x,y)

if n == total：

End;

Wherein, get_color_power (data) realizes the function of obtaining the gradient of the color through data, and pseudo code for realizing get_color_power (data) in the pyhton script language is shown as the following code segment (4):

fun get_color_power(data):

for i in [len(color_power)]:

if color_power[i]>= data:

return i

in some embodiments, after generating the target eye pattern corresponding to each data channel, the signal transmitting end may further update the eye pattern corresponding to the data channel by: when the bit error rate of the target data channel is higher than the bit error rate threshold value according to the target eye diagram, adjusting the parameter information of a register associated with a signal receiving end; re-reading error code information stored in the adjusted register, and re-drawing an eye pattern based on the new error code information to generate a target eye pattern with eye pattern parameters conforming to preset parameter standards; wherein the eye pattern parameters include at least one of: eye height, eye width, jitter, etc.

According to the mode of acquiring the error code information on each data channel of the signal receiving end through real-time serial port interaction, eye diagram drawing is realized, the eye diagram drawing speed is high, and the accuracy is high. And the eye diagram drawing mode can cut the eye diagram size, can self-define color weights, supports the switching of various color types of the eye diagram, is convenient for debugging and improves user experience.

The method for evaluating signal transmission quality provided by the embodiment of the invention is described below. In the process of communication based on a Master-multi-Slave bus structure, the signal transmitting end is used as a Master device (Master) in a Master-multi-Slave bus structure (e.g. IIC), the signal receiving end is used as a Slave device (Slave) in a Master-multi-Slave bus structure (e.g. IIC), the method for evaluating signal receiving performance of the signal receiving end can refer to fig. 6, fig. 6 is a flow chart of the method for evaluating signal transmission quality provided by the embodiment of the invention, and the method for evaluating signal transmission quality provided by the embodiment of the invention includes:

in step 301, the signal transmitting end invokes the second drawing interface, and transmits the parameter information of the signal detection point of the target data channel on the receiving link of the signal receiving end to the signal receiving end, so that the signal receiving end configures the register associated with the receiving link based on the parameter information of each signal detection point, and determines the error code information corresponding to the target data channel through the configured register.

In practical implementation, the signal transmitting end is used as a main device in the IIC bus-based communication link, a corresponding software and hardware driver (such as an IIC Master software and hardware driver) is deployed, and then the corresponding second drawing interface transmits the parameter information of the signal detection point of the target data channel on the receiving link of the signal receiving end to be detected to the signal receiving end through the hardware driver.

In some embodiments, the signal transmitting end is used as a master device, and the transmitting function of the parameter information and the storing function of the error code information can be realized by combining software and hardware. Illustratively, taking IIC serial communication as an example, this functionality may be implemented using a generic FT232 serial chip and a software driver adapted for the target drawing application. Illustratively, taking the example that the high-speed serial bus is IIC, the pyhton script language implements pseudo code for sending parameter information to the signal receiving end as shown in the following code segment (5):

{

funiic_wr_addr (addr, data);// IIC Master bottom write function

Fundata=iic_rd_addr (addr);// IIC Master bottom read function

fun get_error_per_lane_point(lane_sel, quadrant_sel, x_offset, y_offset)；

iic_wr_addr(addr1, quadrant_sel)；

iic_wr_addr(addr2, x_offset)；

iic_wr_addr(addr3,y_offset)；

return iic_rd_addr(addr4)；}

The function iic_rd_addr (addr 4) is used for indicating that the data on the address addr4 is the error code test result returned by the PCIe chip, and how the error code is calculated is different according to the chip to be tested.

In step 302, the error code information corresponding to the target data channel is read, and the second drawing interface is called to generate target error code information conforming to the target format.

In practical implementation, after the signal transmitting end returns the error code information corresponding to each target data channel at the signal receiving end, the signal transmitting end reads the error code information corresponding to the target data channel and stores the error code information in a target format (such as JSON, txt form, etc.). Illustratively, taking the pyhton scripting language as an example for implementing the function of saving error information, the corresponding pseudo code is shown in the following code segment (6): {

fun save_eye_test_result:

for lane_sel in [ list of lane num to be measured ]:

for quadrant_sel in quadrant list:

for x_offset in [ y-axis list ]:

for y_offset in [ x-axis list ]:

export get_error_per_lane_point(lane_sel, quadrant_sel, x_offset, y_offset)>>eye.txt}

the function get_error_per_lane_point represents error code information of the corresponding data channel, and is stored in txt format, namely, is stored as a eye. Txt file. Note that, the implementation of deriving the error code information is related to the code language used, for example, c#, and wr.

In step 303, based on the target error code information, an eye diagram is drawn, so as to obtain a target eye diagram corresponding to the target data channel.

In some embodiments, a target application (drawing interface software) deployed at the signal transmitting end performs tone matching according to the error code information of the target format, and eye pattern image presentation. The signal transmitting end reads target error code information from the file in the target format, and then the eye diagram drawing function is realized through target application of the signal transmitting end. In the above example, the error code information is stored in the eye. Txt file, and the eye drawing function is implemented by using the pyhton script language as an example, and the corresponding pseudo code is as shown in the following code segment (7):

begin:

selecting an eye. Txt file;

selecting a lane; data channel to be measured

Total data;

selecting a color category;

color list color

Color gradient color_power

Initializing coordinates;

initializing series:

for index in [len(color)]:

the size and color of the associated current series point;

series[“series_ index”] = series_c；

opening the uploaded file as f:

lines=f.readlines ()// line-by-line read file

for line in lines:

n += 1

y = res [3]

x = res [2]

data = res[4]

plot(n, x,y,data)

In the drawing function plot (n, x, y, data), n represents which piece of data x represents x-axis coordinate data, y represents y-axis coordinate data, and data represents a specific value. Pseudo code for implementing the drawing function in the pyhton scripting language is shown in the aforementioned code segment (3).

It should be noted that, in the communication system with a master multi-slave bus structure, the method of drawing the target eye pattern is applicable to a scenario in which the signal receiving end does not have an integrated CPU, but is configured with an IIC slave, by reading a file of the error code information with the target format stored in advance.

The method for evaluating signal transmission quality provided by the embodiment of the invention is described below. In the process of communication based on a Master-multi-Slave bus structure, the signal transmitting end is used as a Master device (Master) in the Master-multi-Slave bus structure (e.g. IIC), the signal receiving end is used as a Slave device (Slave) in the Master-multi-Slave bus structure (e.g. IIC), the method for evaluating signal receiving performance of the signal receiving end can refer to fig. 7, fig. 7 is a schematic flow diagram of the method for evaluating signal transmission quality implemented by the signal receiving end according to the embodiment of the invention, and in some implementations, taking the embodiment of the signal receiving end as an example, the method for evaluating signal transmission quality according to the embodiment of the invention includes:

in step 401, a signal receiving end receives parameter information of a plurality of detection points for a data channel associated with a receiving link of the signal receiving end, which is transmitted by a signal transmitting end.

In step 402, a register associated with the receiving link is configured based on the parameter information, and error code information corresponding to the target data channel is determined by the configured register.

In step 403, the error code information corresponding to the target data channel is stored in the register, so that the signal transmitting end accesses the register and reads the error code information of the target data channel, and a target eye diagram corresponding to the target data channel is generated.

In summary, the signal quality evaluation of the receiving link of the signal receiving end can be achieved by applying the embodiment of the invention, the universality of the signal quality evaluation under different projects, platforms and configuration environments can be achieved, and the process of finding, positioning and solving the problems by professional technicians can be accelerated. The mode of acquiring error code information on each data channel of the signal receiving end through real-time serial port interaction realizes eye diagram drawing, and the eye diagram drawing speed can be high, and the accuracy is high. The eye diagram size can be cut in the eye diagram drawing process, the color weight can be customized, the switching of various color types of the eye diagram is supported, the debugging is convenient, and the user experience is improved.

In the following, an exemplary application of the embodiment of the present invention in an actual application scenario, where the scenario is a PCIe receive link (PCIe RX) reception performance evaluation scenario, and an apparatus for performing a high-speed serial port communication system in the application scenario mainly includes: PCIe interface of PC or server; the upper computer (namely the signal transmitting end in the foregoing, namely the main equipment in serial port communication) provided with the matched software supports serial ports or IIC masters; PCIe chip to be tested (i.e. signal receiving end in the foregoing, i.e. slave device IIC slave in serial port communication).

In some embodiments, referring to fig. 8, fig. 8 is a topology structure diagram of PCIe receiving performance debugging provided by the embodiment of the present invention, where a PCIe interface on a PC or a server is used as an upstream PCI Bridge in the entire topology structure, to implement a point-to-point communication link with a downstream device (an upper computer and a PCIe chip to be tested shown in the figure). The upper computer as the signal transmitting end can select a windows system, and simultaneously, a target application program for realizing eye diagram drawing is installed to realize a serial port command transmitting function or an IIC Master function so as to be convenient for accessing an PHY (physical layer) internal register of a PCIe chip to be tested to realize the whole flow of eye diagram drawing and real-time online configuration of simulation parameters. The PCIe chip to be tested as the signal receiving end (it should be noted that the signal receiving end may also be an internal integrated CPU, such as a RISC-V CPU, or an electronic device of IIC slave) can access the PHY internal control and status related registers.

In some embodiments, based on the topology structure shown in fig. 8, in the figure, between the upper computer and the PCIe chip to be tested, the receiving performance of the PCIe chip to be tested for the signal sent by the upper computer may be tested by drawing an eye pattern. When a CPU (e.g., RISC-V CPU) is disposed in the signal receiving end, fig. 9 is a schematic diagram of drawing an eye diagram in real time provided by the embodiment of the present invention, and explaining with reference to the steps shown in fig. 9, step 1, the host computer calls the host USB to UART to send an instruction, step 2, the CPU of the PCIe system to be tested receives the serial port instruction and enters a drawing function, step 3, the drawing function analyzes the lan num, coordinate points, quadrant selection information to be tested according to quality; step 4, the function configures RX link related registers of corresponding lanes in PCIe according to the analysis information, step 5, the drawing function configures drawing functions in PCIe, thereby automatically completing error code number statistics; step 6, the drawing function sends out the error code number of the current Lane coordinate point through the CPU serial port; and 7, recording error code information and displaying in a color gradient mode in real time through a drawing interface.

It can be understood that, based on the mode shown in fig. 9, the upper computer acquires the number of error codes by assembling serial port data, and displays the acquired number of error codes on a coordinate axis according to a custom color gradation by a third party library qthart to form a scatter diagram, so as to finally generate a required eye diagram. PCIe system software to be tested: and the command receiving, analyzing, function jumping, PCIe register configuration and error code number reporting functions of the upper computer are realized through a CPU in the system. After receiving the command sent by the upper computer, the serial port of the CPU is regarded as character string type data, different definitions are defined by carrying out algorithm analysis on each bit of data of the character string, for example [3:0] is detected as 1125, which indicates that a correct drawing command is received, the function continues to analyze, and [6:5] is taken as a to-be-detected lane_sel, and [9:8] is taken as a value given by the combinations after the function is taken as a numeric_sel … …, so that different read-write configurations are executed.

The pseudo code used by the error code number of the X/Y offset coordinate point in a certain quadrant is obtained by using the pyhton script language, and the pseudo code is shown in the code segment (1). Pseudo code for generating a target eye pattern in a pyhton scripting language implementation is shown in code segment (2) above.

It should be noted that, the error code number returned by the drawing function can be sent to the upper computer through the serial port of the chip to be tested CPU by the printing function, and then the upper computer software matches the logic drawing according to the color gradation. When the debugger finds that the current test result is not good enough, the configuration of analog circuit parameters in PCIe can be carried out by calling wr_addr, and then drawing is carried out again until the drawn eye height, eye width, jitter and the like meet the expectations.

In some embodiments, the upper computer is used as an IIC Master to directly access a register in the PCIe system to be tested as an IIC Slave to obtain error code information of one or more data channels associated with the corresponding data link, and then draws an eye diagram corresponding to each data channel by using corresponding drawing interface software. Specifically, referring to fig. 10, fig. 10 is a flowchart of an eye diagram drawing mode corresponding to the IIC Master provided in the embodiment of the present invention, and a specific processing procedure is as follows: step 1, installing an IIC Master software and hardware driver on an upper computer; step 2, the drawing function issues coordinate point configuration of the PCIe system to be tested through the IIC Master; step 3, the IIC Slave configures parameters into an internal register through an internal bus, step 4, the internal part of the PCIe system to be tested stores the counted error code result into the register, step 5, the IIC Master reads the error code counting related register of the system to be tested, and stores the position error code result in a txt form; step 6, adopting for circulation, and circularly calling a drawing function until the error code number of all coordinate points is traversed; step 7, outputting txt containing the error code numbers under all lane num, quadrant, x or y offsets, step 8, performing tone matching by the graphic interface software (target graphic application) according to the content of the txt file, and displaying the eye pattern.

The IIC Master function and the configuration of the PCIe system to be tested are issued, and error code results and coordinate information are stored. The IIC Master function can be realized by using a FT232 series chip and a matched software driver which are common in the market. Pseudocode for implementing configuration delivery in the pyhton scripting language is shown in the code segment (5) above, and pseudocode for implementing bit error result preservation in the pyhton scripting language is shown in the code segment (6) above. The pseudo code for generating the target eye pattern is shown in the aforementioned code segment (7) based on the error code information stored in the target format.

It should be noted that, because the speed of IIC is slower, the drawing process takes longer time than the first mode, and the drawing process is suitable for a scene in which the PCIe system to be tested has no integrated CPU, but is configured with IIC slave.

By applying the embodiment of the invention, the universality of PCIe RX link debugging in different projects, platforms and configuration environments can be realized, the process of finding, positioning and solving the problems by professional technicians is accelerated, the two implementation schemes for drawing the eye pattern of the receiving link according to the error code information returned by the PHY are realized to adapt to special scenes, and when the link speed is higher than GEN3, the problem of error of link transmission data which is easy to occur is solved. The designer can make fine adjustments to the analog parameters to reduce the bit error to zero. Has the following beneficial effects:

(1) RISC-V master is supported, serial port real-time interaction is realized through self-development suite software driving and hardware, SERDES internal error code condition is obtained, eye diagram drawing speed is high, and accuracy is high;

(2) The IIC master is supported, the full-image-limited eye diagram drawing data are saved through self-lapping and matching software driving and hardware, and the full-image-limited eye diagram drawing data can be finally imported into an upper layer for application drawing, the eye diagram drawing speed is slower than that of the first mode, but a special scene can only depend on the mode;

(3) The matched upper software application supports UART TX/RX, supports automatic command transmission, introduces original data, displays error codes of all coordinate points, performs 0 error code statistics, draws a full eye diagram, can cut eye diagram sizes, self-defines color weights, supports switching of various color types and is convenient to debug;

(4) The method can realize that on different PC/server platforms, on the basis of not influencing the communication of the main link, the receiving performance under the current link speed is reflected in real time, and online debugging simulation parameters are supported;

(5) And long-time error code number statistics is supported, and the corresponding relation with the error code rate is displayed.

Continuing with the description below of an exemplary structure of the signal transmission quality evaluation device 555 according to the embodiment of the present invention implemented as a software module, in some embodiments, as shown in fig. 2, the software module in the signal transmission quality evaluation device 555 stored in the memory 550 inside the signal receiving terminal may include:

In some embodiments, the first receiving module is further configured to start a first drawing interface for drawing an eye pattern based on the drawing instruction; and analyzing the drawing instruction based on the first drawing interface to obtain attribute information of at least one data channel associated with a receiving link of the signal receiving end.

In some embodiments, the first obtaining module is further configured to perform unit analysis on the attribute information of each data channel according to a target type to obtain a plurality of unit attribute data; selecting at least two target unit attribute data from the plurality of unit attribute data to be combined to obtain combined data; determining channel attributes matched with the combined data, and taking the combined data as attribute values of the channel attributes; and performing adaptive read-write configuration on registers associated with each data channel based on the attribute value of each channel attribute.

In some embodiments, the software module stored in the evaluation device of the signal transmission quality of the memory storage inside the signal transmitting end may further include:

In some embodiments, the first drawing module is further configured to determine a gradient of a color level adapted to each piece of error code information, and a location point corresponding to each piece of error code information in the eye diagram drawing area; drawing the position points based on the color gradation gradient to obtain a scatter diagram of the target data channel; and drawing an eye pattern based on the scatter diagram, and generating a target eye pattern corresponding to each data channel.

In some embodiments, the first drawing module is further configured to adjust parameter information of a register associated with the signal receiving end when it is determined that the bit error rate of the target data channel is higher than a bit error rate threshold according to the target eye diagram; re-reading error code information stored in the adjusted register, and re-drawing an eye pattern based on the new error code information to generate a target eye pattern with eye pattern parameters conforming to preset parameter standards; wherein the eye pattern parameters include at least one of: eye height, eye width, shake.

In some embodiments, the software module stored in the evaluation device of signal transmission quality of the memory of the signal receiving end may further include:

In some embodiments, the second drawing module is further configured to perform tone matching on the target error code information to obtain tone information matched with each of the target error code information; and drawing an eye pattern on the target error code information based on the color level information matched with the target error code information, and obtaining a target eye pattern corresponding to the target data channel.

In some embodiments, the second drawing module is further configured to parse the target error code information to obtain a channel attribute corresponding to the target data channel; acquiring a third drawing interface, and initializing parameter information of the second drawing interface based on the channel attribute; determining the corresponding color gradation gradient of each detection point in the target data channel and the corresponding position point of each detection point in the eye drawing area; and calling the third drawing interface to draw each position point in the eye diagram drawing area based on the color gradation gradient to obtain a target eye diagram corresponding to the target data channel.

Embodiments of the present invention provide a computer program product or computer program comprising computer instructions stored in a computer readable storage medium. The processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device executes the signal transmission quality evaluation method according to the embodiment of the present invention.

Embodiments of the present invention provide a computer-readable storage medium storing executable instructions that, when executed by a processor, cause the processor to perform a method of evaluating signal transmission quality provided by embodiments of the present invention, for example, as shown in fig. 3.

In some implementations, the computer readable storage medium may be FRAM, ROM, PROM, EPROM, EEPROM, flash memory, magnetic surface memory, optical disk, or CD-ROM; but may be a variety of devices including one or any combination of the above memories.

In some implementations, the executable instructions may be in the form of programs, software modules, scripts, or code, written in any form of programming language (including compiled or interpreted languages, or declarative or procedural languages), and they may be deployed in any form, including as stand-alone programs or as modules, components, subroutines, or other units suitable for use in a computing environment.

As an example, the executable instructions may, but need not, correspond to files in a file system, may be stored as part of a file that holds other programs or data, for example, in one or more scripts in a hypertext markup language (HTML, hyper Text Markup Language) document, in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub-programs, or portions of code).

As an example, executable instructions may be deployed to be executed on one computing device or on multiple computing devices located at one site or, alternatively, distributed across multiple sites and interconnected by a communication network.

The foregoing is merely exemplary embodiments of the present invention and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and scope of the present invention are included in the protection scope of the present invention.

Claims

1. A method for evaluating signal transmission quality, applied to a signal receiving end, the method comprising:

2. The method for evaluating signal transmission quality according to claim 1, wherein said parsing the drawing command to obtain attribute information of at least one data channel associated with a receiving link of the signal receiving terminal includes:

starting a first drawing interface for drawing an eye diagram based on the drawing instruction;

And analyzing the drawing instruction based on the first drawing interface to obtain attribute information of at least one data channel associated with a receiving link of the signal receiving end.

3. The method for evaluating signal transmission quality according to claim 1, wherein configuring the register associated with each of the data channels based on the attribute information of each of the data channels comprises:

carrying out unit analysis on the attribute information of each data channel according to the target type to obtain a plurality of unit attribute data;

selecting at least two target unit attribute data from the plurality of unit attribute data to be combined to obtain combined data;

determining channel attributes matched with the combined data, and taking the combined data as attribute values of the channel attributes;

and performing adaptive read-write configuration on registers associated with each data channel based on the attribute value of each channel attribute.

4. The method for evaluating signal transmission quality according to claim 1, wherein the method further comprises:

capturing the position and/or control focus of a mouse at a transmitting end, and acquiring a request message of register data required by a round of eye diagram display which is cached at present from the transmitting end when the position and/or control focus of the mouse touches an eye diagram display area; the register data required by the current cached round of eye diagram display is different from the local eye diagram data displayed in the current independent locking display window by preset time.

5. A method for evaluating signal transmission quality, applied to a signal transmitting end, the method comprising:

the target eye diagram is used for evaluating the signal transmission quality on the data channel;

the signal receiving end obtains attribute information of one or more data channels corresponding to a receiving link associated with the signal sending end through analyzing a drawing instruction sent by the signal sending end, configures a register associated with the data channels through the corresponding attribute information, and determines error code information corresponding to each data channel based on the configured register.

6. The method of evaluating signal transmission quality according to claim 5, wherein said performing an eye diagram drawing based on each of the error code information, generating a target eye diagram corresponding to each of the data channels, comprises:

determining the color gradation gradient matched with each piece of error code information and the position point corresponding to each piece of error code information in the eye diagram drawing area;

drawing the position points based on the color gradation gradient to obtain a scatter diagram of a target data channel;

And drawing an eye pattern based on the scatter diagram, and generating a target eye pattern corresponding to each data channel.

7. The method for evaluating signal transmission quality according to claim 5, further comprising, after said generating a target eye pattern for each of said data channels:

when the bit error rate of the target data channel is higher than the bit error rate threshold value according to the target eye diagram, adjusting the parameter information of a register associated with the signal receiving end;

re-reading error code information stored in the adjusted register, and re-drawing an eye pattern based on the new error code information to generate a target eye pattern with eye pattern parameters conforming to preset parameter standards;

wherein the eye pattern parameters include at least one of: eye height, eye width, shake.

8. A method for evaluating signal transmission quality, applied to a signal transmitting end, the method comprising:

9. The method for evaluating signal transmission quality according to claim 8, wherein said performing an eye diagram drawing based on said target error information to obtain a target eye diagram corresponding to said target data channel comprises:

analyzing the target error code information to obtain channel attributes corresponding to the target data channel;

acquiring a third drawing interface, and initializing parameter information of the second drawing interface based on the channel attribute;

determining the corresponding color gradation gradient of each detection point in the target data channel and the corresponding position point of each detection point in the eye drawing area;

and calling the third drawing interface to draw each position point in the eye diagram drawing area based on the color gradation gradient to obtain a target eye diagram corresponding to the target data channel.

10. An evaluation device of signal transmission quality, characterized by comprising:

a memory for storing executable instructions;

a processor for implementing the method for evaluating signal transmission quality according to any one of claims 1-9 when executing the executable instructions stored in said memory.