CN116247929A - Cascaded H-bridge converter, parallel branch circuit modulation method thereof and precharge method - Google Patents

Cascaded H-bridge converter, parallel branch circuit modulation method thereof and precharge method Download PDF

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Publication number
CN116247929A
CN116247929A CN202211657287.6A CN202211657287A CN116247929A CN 116247929 A CN116247929 A CN 116247929A CN 202211657287 A CN202211657287 A CN 202211657287A CN 116247929 A CN116247929 A CN 116247929A
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parallel
bridge
positive
negative
parallel branch
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王顺亮
张芮
马俊鹏
李金铭
刘天琪
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Sichuan University
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Sichuan University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
    • H02J7/0014—Circuits for equalisation of charge between batteries
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

The invention discloses a cascade H-bridge converter, a parallel branch circuit modulation method and a pre-charging method thereof, wherein on the basis of the traditional cascade H-bridge converter, the parallel branch circuit connects positive ends and/or negative ends of capacitors of adjacent H-bridge modules; the positive parallel branch is connected to the positive end of the capacitor, and the non-negative parallel branch is connected to the negative end of the capacitor; the parallel branch is formed by a two-way switch. The parallel branch is utilized to connect the positive and negative ends of the capacitors of each sub-module, and the sequential equalization among the capacitors of the H-bridge modules is realized by conducting the parallel branch in the zero state of the traditional cascade H-bridge converter; the topology avoids the sampling of direct current voltage of each module, high-speed data transmission and high-calculation resource consumption of a capacitor voltage balance control algorithm, and has the advantages of simple circuit structure and control system, low cost, small volume, good voltage balancing effect, easy expansion and the like.

Description

Cascaded H-bridge converter, parallel branch circuit modulation method thereof and precharge method
Technical Field
The invention relates to the technical field, in particular to a cascade H-bridge converter, a parallel branch circuit modulation method and a precharge method.
Background
The cascade H-bridge Converter (CHBC) has the advantages of high modularization and expansibility, high reliability, low harmonic wave, flexible control and the like, is widely applied to occasions such as active filters, synchronous reactive compensators, solid-state transformers and the like, and is one of the preferred main circuit topologies of power electronics in the current medium-low voltage system. Because the CHBC has a plurality of mutually independent direct current capacitors, the unbalanced problem exists in each capacitor voltage due to the influence of factors such as the loss among modules, modulation degree, element parameters, signal delay and the like, the output waveform quality, the switch voltage and current stress and the dynamic response speed of the converter are directly influenced, and the extreme unbalance can even cause system locking or damage. Therefore, maintaining the sub-module capacitance voltage balance of CHBC is critical to its stable operation.
The capacitance and voltage equalization method of the submodule of the CHBC can be mainly divided into two types, namely a software method and a hardware method. The centralized control method based on the multisampler is the software type capacitor voltage method which is most widely used and mature in technology at present. The basic technical route is as follows: the direct current capacitor of each module is collected, high-bandwidth data is transmitted to a top layer controller, and the modulation wave or switching signal of each module is calculated by adopting control methods such as capacitor voltage sequencing, bias voltage compensation or power distribution and the like and is transmitted to each sub-module. The method has the advantages of simple structure and stable control, but the complexity of the communication system and the calculation pressure of the top-level controller are increased dramatically with the increase of the number of modules. With the development of sampling technology, in recent years, a learner proposes a method for repeatedly sampling CHBC output step wave with high precision, and further identifying dc capacitor voltage of each module, so as to avoid using a large number of dc samplers. However, as the number of modules increases, it becomes more difficult to identify the step wave, and the method still cannot solve the problem of high calculation pressure of the top-level controller.
The basic idea of the capacitor voltage self-balancing method based on hardware is as follows: and equalization of capacitance and voltage is realized by constructing a capacitance parallel path among the modules. The method has the advantages of simple structure, no need of complicated sampler and communication system, no pressure equalizing calculation, etc. The earliest double H-bridge topology constructs parallel paths among modules, so that the two H-bridge modules have local parallel balancing capability. The subsequent full-bridge type, asymmetric half-bridge type and symmetric half-bridge type H-bridge parallel topology enables parallel connection of all sub-modules by introducing additional parallel states beyond the serial state and bypass state of the traditional CHBC. However, the implementation of the series of topological parallel states requires the help of additional switching devices, which leads to increased system cost and complicated driving logic; in order to reduce the number of the parallel CHBC switches, on one hand, a diode part may be used to replace the IGBT switches, but the equalization capability may be degraded due to the unidirectional conduction characteristics of the diode; on the other hand the number of switches can be reduced by eliminating duplicate switch states.
The magnitude of the parallel balancing rush current and the resulting losses are important indicators in view of the applicability of the parallel CHBC topology. In order to reduce the impact current, methods of reasonably designing a current limiting inductance, adding a snubber circuit and the like can be adopted. However, current limiting inductors are not always effective in suppressing the surge current, because resonance may be formed between numerous LCs, resulting in an increase in parallel surge current, poor equalization, or even no operation. The modulation scheme of the parallel CHBC determines the state of each switch in the parallel process. In most of the existing modulation methods, the input (charge or discharge) of the capacitor and the parallel connection with the adjacent capacitor may occur at the same time. This will result in a superposition of normal operating current and balanced surge current exceeding the maximum current stress of the switch. In addition, because the wiring mode of the parallel topology is complex, the hardware self-balancing method is difficult to expand and upgrade on the traditional HB-MMC and FB-MMC topologies.
Disclosure of Invention
Aiming at the problems, the invention aims to provide a cascade H-bridge converter, a parallel branch modulation method and a precharge method thereof, which can avoid sampling of direct current voltage of each module, high-speed data transmission and high-calculation resource consumption of a capacitor voltage balance control algorithm and have the advantages of simple circuit structure and control system, low cost, small volume, good voltage equalizing effect, easy expansion and the like. The technical proposal is as follows:
on the basis of the traditional cascade H-bridge converter, parallel branches connect positive ends and/or negative ends of capacitors of adjacent H-bridge modules; the positive parallel branch is connected to the positive end of the capacitor, and the non-negative parallel branch is connected to the negative end of the capacitor; the parallel branch is formed by a two-way switch.
Further, the bidirectional switch comprises two IGBTs connected in reverse series, a diode is connected in parallel between the collector and the emitter of each IGBT, and the anode of the diode is connected to the collector of the IGBT.
Still further, the bi-directional switch includes two anti-parallel IGBTs.
Further, the bidirectional switch comprises one IGBT and four diodes which are connected in a mixed mode; the cathodes of the two diodes are simultaneously connected to the IGBT emitters, and the anodes of the two diodes are respectively connected to the capacitors of the adjacent H bridge modules; the anodes of the other two diodes are simultaneously connected to the collector of the IGBT, and the cathodes of the two diodes are respectively connected with the capacitance of the adjacent H-bridge modules.
Furthermore, the parallel branches are connected in a double-end forward parallel manner, namely N-1 positive parallel branches and N-1 negative parallel branches are simultaneously connected to the positive and negative ends of N H bridge module capacitors;
or the parallel branches are connected in a single-ended forward parallel manner, namely N-1 positive parallel branches are connected to the positive ends of N H bridge module capacitors, or N-1 negative parallel branches are connected to the negative ends of N H bridge module capacitors;
or the parallel branches are connected in a staggered parallel manner, namely, the positive pole parallel branch and the negative pole parallel branch are alternately connected with the positive end and the negative end of the capacitor;
a parallel branch modulation method of cascade H-bridge converter with hardware parallel voltage equalizing capability includes that adjacent two H-bridge modules are in PZ state at the same time, namely when two upper switches are conducted, a negative parallel branch is conducted; the adjacent two H bridge modules are in NZ state at the same time, namely when the two lower switches are conducted, the positive parallel branch is conducted; i.e.
S NPBi ＝S i1 &S i3 &S (i+1)1 &S (i+1)3
S PPBi ＝S i2 &S i4 &S (i+1)2 &S (i+1)4
Wherein S is NPBi A modulation signal of a negative parallel branch; s is S i1 、S i3 、S (i+1)1 、S (i+1)3 Modulating signals of two upper switches of two adjacent H bridge modules; s is S PPBi Modulated signals which are positive parallel branches; s is S i2 、S i4 、S (i+1)2 、S (i+1)4 Modulated signals for two lower switches of two adjacent H bridge modules.
A method of pre-charging a cascaded H-bridge converter, comprising the steps of:
s1: constructing a path of all capacitors connected in parallel simultaneously;
s2: selecting the positive and negative terminals of any capacitor to be connected with a direct-current voltage source;
s3: the output voltage of the direct-current voltage source is slowly increased from 0 to the rated voltage of the capacitor;
s4: all switches are locked and a start-up instruction is waited for.
Further, in step S1,
when the cascade H-bridge converter with two parallel ends in the forward direction constructs a parallel path: closing all switches of the H bridge modules, and closing all positive and negative parallel branches;
when the cascade H-bridge converter with single-ended forward parallel connection constructs a parallel path: all H bridge modules output a PZ state, namely, the two upper switches are conducted, and all negative parallel branches are closed; or all H bridge modules output NZ states, namely, the two lower switches are conducted, and all positive pole parallel branches are closed.
Staggered parallel cascade H-bridge converterWhen constructing parallel paths: switch S for closing two adjacent H-bridge modules i4 、S (i+1)2 Positive parallel branch PPB i And closing switch S (i+1)3 、S (i+2)1 Negative parallel branch NPB (i+1) The remaining switches of the H-bridge module are all blocked.
The beneficial effects of the invention are as follows: the invention provides a cascade H-bridge converter with a hardware parallel self-voltage equalizing capability, which utilizes parallel branches to connect positive and negative ends of capacitors of all sub-modules, and realizes sequential equalization among capacitors of H-bridge modules by conducting the parallel branches in a zero state of the traditional cascade H-bridge converter; the topology avoids the sampling of direct current voltage of each module, high-speed data transmission and high-calculation resource consumption of a capacitor voltage balance control algorithm, and has the advantages of simple circuit structure and control system, low cost, small volume, good voltage balancing effect, easy expansion and the like.
Drawings
Fig. 1 is a schematic diagram of a conventional cascaded H-bridge converter.
Fig. 2 shows a cascaded H-bridge converter of the invention connected in parallel in the forward direction.
Fig. 3 shows a cascade H-bridge converter of the invention connected in parallel with each other.
FIG. 4 is a topology of the components of parallel branches; (a) reverse series IGBT/D; (b) antiparallel IGBTs; (c) hybrid IGBT/D.
Fig. 5 is an equivalent circuit diagram when the parallel branch is on; (a) the negative parallel branch is in the PZ state; (b) the positive parallel branch is in the NZ state.
Fig. 6 is a modulation scheme.
FIG. 7 is a schematic diagram of a parallel path construction method for IP-CHBC precharge.
Detailed Description
The invention will now be described in further detail with reference to the drawings and to specific examples. The invention provides a cascade H-bridge converter with a hardware parallel self-voltage equalizing capability, which utilizes parallel branches to connect positive and negative ends of capacitors of all sub-modules, and realizes sequential equalization among capacitors of H-bridge modules by conducting the parallel branches in a zero state of the traditional cascade H-bridge converter. The method comprises the following steps:
1. topology description
The conventional cascaded H-bridge converter consists of a series of H-bridge converters connected end to end as shown in fig. 1. The single H-bridge module (Half Bridge Module, HBM) can output three levels of +/-1 and 0 through switching action, and the whole CHBC outputs a high-frequency step waveform. Because the capacitors of all HBMs only have bypass and series states, the voltage equalizing problem exists among the capacitors. In order to provide the CHBC with parallel voltage balancing capability, the positive and negative capacitance terminals of adjacent HBMs may be connected by parallel branches. As shown in fig. 2, a positive parallel branch (Positive Parallel Branch, PPB) is used to connect the positive terminal of the capacitor and a negative parallel branch (Negative Parallel Branch, NPB) is used to connect the negative terminal of the capacitor. The parallel branch may be formed by a class 3 bi-directional switch as shown in fig. 4. The connection patterns of the parallel branches are varied, and three typical types of connection patterns are given herein: (1) The double-end forward parallel connection (Double Straight Forward Parallel, DSFP) is that N-1 PPB and N-1 NPB are simultaneously connected with the positive and negative ends of all HBM capacitors, as shown in figure 2; (2) Single-ended forward parallel connection (Single Straight Forward Parallel, SSFP) with N-1 PPBs connected to the positive terminal of the capacitor, or N-1 NPBs connected to the negative terminal of the capacitor; (3) staggered parallel (Interleaving Parallel, IP): the PPB and NPB are alternately connected to the positive and negative terminals of the capacitor as shown in FIG. 3.
2. Principle of operation
Since the upper and lower switches of each HBM are complementarily turned on, there are 4 switching states in total, namely (1) P-State (Positive State): s1=1, s3=0; (2) N State (Negative State): s1=0, s3=1; (3) NZ state (Negative Zero State): s1=0, s3=0; (4) PZ state (Positive Zero State): s1=1, s3=1.
HBM outputs +V in P, N state c 、-V c And the HBM outputs 0 voltage in the zero state. For HBM under phase-shifting carrier modulation, the modulated wave phases of the modules differ by pi/N, and there is one PZ state and one NZ state in one carrier period. In order to achieve parallel connection between module capacitors under the condition that normal output voltage of the modules is not affected, NPB may be turned on when two adjacent modules simultaneously present PZ state, as shown in fig. 5 (a), and/or PPB may be turned on when two adjacent modules simultaneously present NZ state, as shown in fig. 5 (b), that is:
Figure BDA0004011927290000041
an equivalent circuit when PB is on is shown in fig. 5.
It can be seen that the zero state switch of the HBM provides a flow path for the two capacitor parallel balancing currents in addition to the flow path for the normal operating current. Since the two HBMs are in zero state, the output voltage is zero, and the conduction of the parallel branch circuit does not affect the original output voltage. When PB is in the off state, according to the switch state combination of two HBMs, the voltage born by PB may be: v (V) ci 、±V c(i+1) 、±(V ci -V c(i+1) ) 0. Therefore, the selection of the withstand voltage value of the switching tube in the PB branch is consistent with HBM.
3. Comparison of the three topologies presented
Taking 4-module CHBC as an example for analysis, when reference is made to the modulated wave V mref The switching signal of each PB when=0.4 is shown in fig. 6. It can be found that: with V mref Approach to 0,S PPB1 ～S PPB3 Or S NPB1 ～S NPB3 Overlapping will occur. In particular, when V mref When=0, three PPB branches and three NPB branches are all turned on simultaneously, and the output voltage of the whole CHBC is 0. Because a tiny voltage difference exists between the HBM capacitors, when a plurality of capacitors are connected in parallel for voltage equalizing, equalizing current flows through each parallel branch, and therefore switching-on loss in the equalizing process is increased.
Therefore, for DSFP-CHBC, the loss caused by balanced impact current is the largest, the number of parallel branches is the largest (2N-2), but the voltage balancing effect is the best, because the balancing process occurs in the PZ and NZ states simultaneously; for SSFP-CHBC, the balance impact current causes less loss, the number of parallel branches is less (N-1), the voltage balance effect is good, and the balance process only occurs in a PZ or NZ state. As can be seen from FIG. 4, adjacent S PPB And S is equal to NPB There is no overlap between the capacitors, i.e. IP-CHBC will not have multiple capacitors connected in parallel for equalizing voltageIn this case, the parallel process occurs alternately between two adjacent HBMs. Therefore, the balance impact current has the advantages of minimum loss, fewer parallel branches (N-1), good voltage balance effect and only alternating in PZ and NZ states in the balance process.
4. Pre-charge strategy
When a large voltage difference exists between the HBM capacitors, PB conduction can cause large balanced current surge. In theory, an inductor can be connected in series in the parallel equalization branch to limit current impact, but the voltage equalization effect between the capacitors can be reduced to a certain extent (the smaller the current flowing through PB is, the smaller the energy exchanged between the capacitors is, the worse the equalization effect is), and the cost and the volume of the system are increased. It is noted that for parallel CHBC in steady state operation, the voltage deviation between the capacitors is small, and the actual balanced surge current is small due to the internal resistances of the IGBTs and diodes themselves and the forward conduction voltage drop. In addition, the voltage deviation between the capacitors generally only occurs at the initial running time of the system, and if the initial capacitor voltage is basically balanced, the use of a current-limiting inductor can be avoided.
For conventional CHBC, the precharge strategy is complex. The precharge method of the parallel CHBC becomes particularly simple due to the addition of the parallel branch, and the basic method is as follows: (1) constructing a path for all capacitors to be connected in parallel simultaneously; (2) Selecting the positive and negative terminals of any capacitor to be connected with a direct-current voltage source; (3) The output voltage of the direct-current voltage source is slowly increased from 0 to the rated voltage of the capacitor; and (4) locking all the switches and waiting for a start command.
The method for constructing the parallel path by using the DSFP-CHBC comprises the following steps: closing all switches of the HBM and closing all PPBs and NPBs; the method for constructing the parallel path by SSFP-CHBC comprises the following steps: all HBMs output PZ states and close all NPBs, or all HBMs output NZ states and close all PPBs; the method for constructing the parallel path by the IP-CHBC comprises the following steps: closure S i4 、S (i+1)2 、PPB i And closing S (i+1)3 、S (i+2)1 、NPB (i+1) The remaining switches of the HBM are all latched as shown in fig. 7.

Claims (8)

1. The cascade H-bridge converter is characterized in that on the basis of a traditional cascade H-bridge converter, parallel branches connect positive ends and/or negative ends of capacitors of adjacent H-bridge modules; the positive parallel branch is connected to the positive end of the capacitor, and the non-negative parallel branch is connected to the negative end of the capacitor; the parallel branch is formed by a two-way switch.
2. The cascaded H-bridge converter of claim 1, wherein the bi-directional switch comprises two IGBTs connected in anti-series, a diode connected in parallel between the collector and emitter of each IGBT, and the anode of the diode is connected to the collector of the IGBT.
3. The cascaded H-bridge converter of claim 1, wherein the bi-directional switch comprises two anti-parallel IGBTs.
4. The cascaded H-bridge converter of claim 1, wherein the bi-directional switch comprises one IGBT and four diodes in a mixed connection; the cathodes of the two diodes are simultaneously connected to the IGBT emitters, and the anodes of the two diodes are respectively connected to the capacitors of the adjacent H bridge modules; the anodes of the other two diodes are simultaneously connected to the collector of the IGBT, and the cathodes of the two diodes are respectively connected with the capacitance of the adjacent H-bridge modules.
5. The cascaded H-bridge converter of claim 1, wherein the parallel branches are connected in parallel in a double-ended forward direction, i.e., N-1 positive parallel branches and N-1 negative parallel branches are simultaneously connected to the positive and negative ends of the N H-bridge module capacitors;
or the parallel branches are connected in a single-ended forward parallel manner, namely N-1 positive parallel branches are connected to the positive ends of N H bridge module capacitors, or N-1 negative parallel branches are connected to the negative ends of N H bridge module capacitors;
or the parallel branches are connected in a staggered parallel manner, namely the positive pole parallel branches and the negative pole parallel branches are alternately connected with the positive end and the negative end of the capacitor.
6. A parallel branch modulation method of a cascade H-bridge converter as in claim 5, wherein adjacent two H-bridge modules are in PZ state at the same time, namely when two upper switches are conducted, a negative parallel branch is conducted; the adjacent two H bridge modules are in NZ state at the same time, namely when the two lower switches are conducted, the positive parallel branch is conducted; i.e.
S NPBi ＝S i1 &S i3 &S (i+1)1 &S (i+1)3
S PPBi ＝S i2 &S i4 &S (i+1)2 &S (i+1)4
Wherein S is NPBi A modulation signal of a negative parallel branch; s is S i1 、S i3 、S (i+1)1 、S (i+1)3 Modulating signals of two upper switches of two adjacent H bridge modules; s is S PPBi Modulated signals which are positive parallel branches; s is S i2 、S i4 、S (i+1)2 、S (i+1)4 Modulated signals for two lower switches of two adjacent H bridge modules.
7. A method of pre-charging a cascaded H-bridge converter as in claim 5, comprising the steps of:
s1: constructing a path of all capacitors connected in parallel simultaneously;
s2: selecting the positive and negative terminals of any capacitor to be connected with a direct-current voltage source;
s3: the output voltage of the direct-current voltage source is slowly increased from 0 to the rated voltage of the capacitor;
s4: all switches are locked and a start-up instruction is waited for.
8. The method of precharge as claimed in claim 7, wherein, in step S1,
when the cascade H-bridge converter with two parallel ends in the forward direction constructs a parallel path: closing all switches of the H bridge modules, and closing all positive and negative parallel branches;
when the cascade H-bridge converter with single-ended forward parallel connection constructs a parallel path: all H bridge modules output a PZ state, namely, the two upper switches are conducted, and all negative parallel branches are closed; or all H bridge modules output NZ states, namely, the two lower switches are conducted, and all positive pole parallel branches are closed.
When the cascade H-bridge converters connected in parallel in a staggered way construct a parallel path: switch S for closing two adjacent H-bridge modules i4 、S (i+1)2 Positive parallel branch PPB i And closing switch S (i+1)3 、S (i+2)1 Negative parallel branch NPB (i+1) The remaining switches of the H-bridge module are all blocked.
CN202211657287.6A 2022-12-22 2022-12-22 Cascaded H-bridge converter, parallel branch circuit modulation method thereof and precharge method Pending CN116247929A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116937999A (en) * 2023-09-18 2023-10-24 深圳市德兰明海新能源股份有限公司 Converter bridge arm circuit, converter device and precharge control method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116937999A (en) * 2023-09-18 2023-10-24 深圳市德兰明海新能源股份有限公司 Converter bridge arm circuit, converter device and precharge control method
CN116937999B (en) * 2023-09-18 2024-02-13 深圳市德兰明海新能源股份有限公司 Converter bridge arm circuit, converter device and precharge control method

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