CN116155252A - IGBT grid driving circuit - Google Patents
IGBT grid driving circuit Download PDFInfo
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- CN116155252A CN116155252A CN202211446027.4A CN202211446027A CN116155252A CN 116155252 A CN116155252 A CN 116155252A CN 202211446027 A CN202211446027 A CN 202211446027A CN 116155252 A CN116155252 A CN 116155252A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/567—Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0036—Means reducing energy consumption
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
- H03K2217/0081—Power supply means, e.g. to the switch driver
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention discloses an IGBT gate driving circuit, which comprises a driving control signal module and a gate driving module; the driving control signal module is connected with the grid driving module and used for providing driving signals for the grid driving module; the grid driving signal is connected with the IGBT and is used for processing and outputting driving voltage and driving current according to the driving signal so as to drive the IGBT to be turned on or turned off. Compared with the traditional single-tube driving and push-pull driving, the grid driving module can not generate voltage drop after the IGBT is turned on or off, so that the driving voltage is equal to the design voltage, stronger current output capability is provided, and the switching loss is reduced. The invention has the advantages of strong NMOS current output capability and the PMOS can realize rail-to-rail output, and solves the pressure-resistant safety problem of using NMOS as a conductive driving tube.
Description
Technical Field
The invention belongs to the technical field of power electronic devices, and particularly relates to an IGBT gate driving circuit.
Background
As an interface between a control signal of a processor and an IGBT device, the IGBT driving and protecting circuit plays a vital role in efficient and safe operation of the IGBT, and an excellent driving and protecting circuit can enable the IGBT to work in an optimal working state, reduce switching loss, inhibit current peaks in the opening process and the like.
The turn-on of the IGBT is divided into several phases: (1) Gate-emitter voltage V GE Rising but not reaching the turn-on threshold voltage V GE(th) The voltage applied to the gate starts to give the gate capacitance C GE Charging to V GE Ascending; (2) Gate-emitter voltage V GE Greater than the turn-on threshold voltage V GE(th) Collector current I C Rapidly increasing excessive di/dt will form an overshoot current, I C Will generate current peak, V CE Slightly lower; (3) Collector current I C Peak value is reached and then the load current I is reduced L The IGBT is positioned in the active area at the moment; gate-emitter voltage V GE Maintained at Miller voltage V GE(m) The IGBT is in the Miller stage, and the gate current I is G With a steady current to the miller capacitance C GC Charging, collector-emitter voltage V CE Decreasing to saturation conduction voltage; (4) Gate-emitter voltage V GE When the active region breaks through to the saturation region, the driving voltage value is increased, and the collector-emitter voltage V CE Eventually drop to saturation conduction voltage drop V CE(sat) The IGBT is fully on so far.
The turn-on speed of the IGBT determines the magnitude of the switching loss, and the faster the turn-on speed of the IGBT, the smaller the switching loss, and the magnitude of the peak current generated by the IGBT driving can determine the turn-on time of the IGBT from the above description.
In the conventional single-tube IGBT driving scheme (see Tang Kai Yi in the literature of high-voltage high-power IGBT driving protection Circuit and application research, university of Hunan, shuoshi, 2014), as shown in fig. 1 (a), PMOS is used as the on driving tube when the gate electrode of the IGBT driving is turned on, and since the carrier mobility of PMOS is about half that of NMOS, the current driving capability of PMOS is weaker than that of NMOS.
A common IGBT driving circuit also has a push-pull driving scheme (see document Xie Jiaming, university of kunming university of field treatise, 2021) as shown in fig. 1 (b), however, the scheme of push-pull driving has a voltage drop Vgs of gate-source conduction when NMOS and PMOS are conducted, so that the output is not strictly rail-to-rail, the conduction voltage drop will affect the on-off performance of the IGBT to a great extent, and meanwhile, the problem of driving the gate-source withstand voltage of the transistor also exists. The grid electrode of the IGBT is normally biased at 12-20V, and the grid electrode and the source electrode of the MOS tube cannot endure the high voltage under the conventional process; therefore, although the NMOS is adopted as the upper tube of the circuit, the problem of weak current driving capability of the PMOS tube is solved, but the problems of new voltage resistance and non-rail-to-rail conduction are introduced.
Disclosure of Invention
In view of the above, the invention provides an IGBT gate driving circuit, which can not generate voltage drop after the IGBT is turned on or off, and can provide stronger current output capability and reduce switching loss.
An IGBT gate driving circuit comprises a driving control signal module and a gate driving module;
the driving control signal module is connected with the grid driving module and is used for providing driving signals for the grid driving module, and the driving signals comprise a conduction control signal and a disconnection control signal;
and the grid driving module is connected with the grid of the IGBT and is used for processing the driving signal and outputting driving voltage and driving current to drive the on-off of the IGBT.
Further, the gate driving module includes a voltage control module, on-power transistors M3 and M4, off-power transistor M5, and off-chip gate resistor R G The voltage control module controls the on-off of the on-state power tube M3 according to the change of the driving signal, wherein the drain electrode of the M3 is connected with the drain electrode of the M4 and is connected with the power supply voltage VDD, and the grid electrode of the M3 is connected with the voltage control moduleA supplied gate voltage signal, a gate of M4 connected to the on control signal, a source of M3 and a source of M4, a drain of M5, and R G Is connected with one end of the control circuit, the grid electrode of M5 is connected with a turn-off control signal, the source electrode of M5 is connected with negative power supply voltages VEE, R G The other end of the (d) is connected to the gate of the IGBT.
Further, the voltage control module includes a PMOS transistor M1, an NMOS transistor M2, diodes D1 and D2, and a resistor R1, where a source of M1 is connected to a positive power supply voltage VDD, a gate of M1 is connected to a turn-on control signal, a drain of M1 is connected to a drain of M2, one end of R1, a cathode of D2, and a gate of M3, another end of R1 is connected to an anode of D1, a cathode of D1 is connected to an anode of D2 and a source of M3, a gate of M2 is connected to a turn-off control signal, and a source of M2 is connected to a negative power supply voltage VEE.
Further, the on power tube M3 and the off power tube M5 are NMOS tubes, and the on power tube M4 is a PMOS tube.
Further, the high level of the conduction control signal is positive power supply voltage VDD, and the low level is square wave 5V lower than VDD; the high level of the turn-off control signal is a square wave 5V higher than the negative power supply voltage VEE, and the low level is VEE.
Further, the positive power supply voltage VDD and the negative power supply voltage VEE are supplied from an external power supply.
Further, the on control signal is time-synchronized with the high and low level of the off control signal.
Further, the positive power supply voltage VDD is 15V, and the negative power supply voltage VEE is 0V.
Further, when the driving signal is at a high level, the gate signal of the IGBT is at a low level; when the drive signal is low, the gate signal of the IGBT is high.
Further, the diodes D1 and D2 may be replaced by an NMOS transistor M6 and a PMOS transistor M7, which are connected by diodes, respectively.
In the invention, the on control signal and the off control signal are signals for driving M1, M4, M2 and M5 respectively, and the two signals protect the maximum voltage difference between the grid electrodes and the source electrodes of the four MOS tubes of M1, M4, M2 and M5 to be 5V, so that the MOS tubes can work under normal voltage. Meanwhile, M1 and M2 generate a driving signal of the M3 tube, the high level value of the signal is 15V, the low level value of the signal is 0V, the signal ensures the normal operation of the driving tube M3, and the gate source voltage of the driving tube M3 is consistent after the IGBT is completely turned on and off, so that the driving tube is protected to operate in a normal environment. The PMOS and the NMOS are simultaneously used as the conducting tube in the circuit, when the voltage difference between the output signal and the power supply signal is smaller than the gate-source threshold voltage of the NMOS, the M3 tube is turned off, the M4 tube is still turned on at the moment, and finally the output signal is pulled to the power supply voltage, so that rail-to-rail output is realized. Meanwhile, in order to prevent the voltage of the gate of the driving tube M3 from being changed but the voltage of the source (namely the gate of the IGBT) cannot be responded quickly in the switching-on and switching-off processes of the IGBT, the invention designs a voltage clamping function module consisting of M6 and M7, and realizes that the gate of M3 is always clamped near the voltage of the source when the IGBT is switched on and off through the NMOS tube M6 and the PMOS tube M7 by a diode connection method, thereby preventing the voltage withstand problem possibly occurring. Meanwhile, in order to quickly turn on, when the IGBT is turned on, the gate-source voltage of the M3 tube can be increased by adjusting the resistor R1, so that in the turn-on process, the M3 tube has enough gate voltage to provide enough current driving capability.
The invention designs an IGBT driving circuit, which has good current output capability, keeps rail-to-rail output and solves the problem of gate-source voltage resistance when the traditional NMOS is used as an upper tube for driving. The invention improves the problem of weak on-current capability of the existing single-tube IGBT drive, and simultaneously provides a scheme for realizing rail-to-rail output and enabling the drive tube to work in a safe environment for push-pull driving of the NMOS as the on-drive tube, thereby improving the problem that the existing scheme cannot realize rail-to-rail drive and solving the withstand voltage problem encountered in the process of driving the IGBT.
According to the IGBT gate driving circuit, PMOS and NMOS are adopted as the driving circuits for conducting the driving tubes, so that the current driving capability is improved, and the switching loss of the IGBT is reduced. Meanwhile, the invention avoids the voltage drop of the driving voltage in the IGBT grid driving circuit and ensures that the IGBT driving voltage and the design voltage value are the same.
Compared with the prior art, the invention provides the drive circuit which can work under the safety voltage and drives the IGBT grid by using the PMOS and NMOS double drive tubes, and the drive circuit is characterized by having the advantages of strong NMOS current output capability and the advantages that the PMOS can realize rail-to-rail output, solving the withstand voltage safety problem of using the NMOS as the on drive tube and solving the defects of the traditional circuit.
Drawings
Fig. 1 (a) is a schematic diagram of a conventional single-tube IGBT driving circuit.
Fig. 1 (b) is a schematic diagram of the structure of a push-pull IGBT driving circuit.
Fig. 2 is a schematic diagram of high and low levels of an IGBT gate signal, an on control signal, and an off control signal in the circuit of the present invention.
Fig. 3 is a schematic diagram of the structure of the IGBT gate driving circuit according to the present invention.
Detailed Description
In order to more particularly describe the present invention, the following detailed description of the technical scheme of the present invention is provided with reference to the accompanying drawings and the specific embodiments.
IGBT (Insulated Gate Bipolar Transistor), which is called an insulated gate bipolar transistor, in the embodiment of the present invention, an IGBT gate driving circuit is provided, which includes a driving control signal module and a gate driving module.
The driving control signal module is connected with the grid driving module and used for providing driving signals for the grid driving module; the grid driving module is connected with the IGBT and used for processing according to the driving signal and outputting driving voltage and driving current to drive the IGBT to be turned on or turned off.
As shown in fig. 2, the on control signal of the driving control signal is a square wave with a high level of the first positive power supply voltage VDD and a low level of 5V lower than VDD; the high level of the turn-off control signal of the driving control signal is a square wave which is 5V higher than VEE, and the low level is VEE, and the high level time corresponds to the high level of the turn-on control signal. The difference value of the high and low levels of the on signal and the off signal output by the drive control signal module is 5V, so that the PMOS tube and the NMOS tube which are controlled by the signals can work under the withstand voltage that the PMOS tube and the NMOS tube can work normally.
The gate driving module comprises a first voltage control module, a first on-power tube M3, a second on-power tube M4, a first off-power tube M5, a first positive power supply VDD, a first negative power supply VEE and a first gate-level resistor R G 。
As shown in fig. 3, the conduction control signal output of the driving control signal module is respectively connected with the first voltage control module and the second conduction power tube M4, and provides a conduction control signal for the first voltage control module and the second conduction power tube to control the first voltage control module to output a conduction signal to conduct the first conduction power tube M3, and to enable the first conduction power tube M3 and the second conduction power tube M4 to conduct so as to control the IGBT to conduct.
The turn-off control signal output of the drive control signal module is respectively connected with the first turn-off power tube M5 and the first voltage control module, and provides turn-off control signals for the first voltage control module and the first turn-off power tube so as to control the first voltage control module to output the turn-off signal to safely turn off the first turn-on power tube M3 and enable the first turn-off power tube M5 to be turned on so as to control the turn-off of the IGBT.
The grid electrode of the first conduction power tube M3 is connected with a first voltage control module, and the first voltage control module provides proper grid voltage to safely turn on and off the first conduction power tube M3; the drain electrode of the first conduction power tube M3 is connected with a first positive power supply VDD; source electrode of first power tube M3 and first gate resistor R G And the switching-on circuit is connected with the IGBT and used for controlling the switching-on of the IGBT.
The grid electrode of the second conduction power tube M4 is connected with the conduction control signal output of the driving control signal; the source electrode of the second conduction power tube M4 is connected with a first positive power supply VDD; the drain electrode of the second conduction power tube M4 is connected with the first gate-level resistor and used for controlling the conduction of the IGBT; and no voltage drop is generated, so that the conduction driving voltage is equal to the design voltage.
The grid electrode of the first turn-off power tube M5 is connected with the turn-off control signal output of the drive control signal module; the source electrode of the first turn-off power tube M5 is connected with a first negative power supply VEE; the drain electrode of the first turn-off power tube M5 is connected with the first gate-level resistor and used for controlling the turn-off of the IGBT.
The first voltage control module comprises a first PMOS tube M1, a first diode D1, a first NMOS tube M2, a second diode D2 and a second resistor R1.
The grid electrode of the first PMOS tube M1 is connected with the conduction control signal output of the driving control signal; the source electrode of the first PMOS tube M1 is connected with a first positive power supply VDD; the drain electrode of the first PMOS tube M1 is connected with the grid electrode of the first conduction power tube M3.
The grid electrode of the first NMOS tube M2 is connected with the turn-off control signal output of the drive control signal; the source electrode of the first NMOS tube M2 is connected with a first negative power supply VEE; the drain electrode of the first NMOS tube M2 is connected with the grid electrode of the first conduction power tube M3.
The positive electrode of the first diode D1 is connected with a second resistor R1, and the other end of the second resistor R1 is connected with the grid electrode of the first conduction power tube M3; negative electrode of first diode D1 and first gate resistor R G Are connected.
The cathode of the second diode D2 is connected with the grid electrode of the first conduction power tube M3; the anode of the second diode D2 and the first gate resistor R G Are connected.
In the IGBT conduction stage, the drive control signal module outputs conduction control signals to M1 and M4; m1 is conducted, and the grid potential of M3 is raised to VDD; in the conducting process, the source potential of M3, namely the output potential of the grid driving module is raised from low, and M3 is always started before the grid source voltage of M3 is raised to be smaller than the conducting threshold voltage of M3; in order to avoid that the grid potential of the M3 is close to the first positive power supply VDD when just conducted, and the source potential of the M3 still needs a period of time to conduct, the grid source voltage of the M3 is overlarge, a diode D1 is connected between the grid sources of the M3 to protect the grid of the M3 from being changed too quickly and exceeds the highest voltage which can be born by the grid source of the M3; meanwhile, in order to ensure that M3 has enough gate-source voltage in the conducting process, a second resistor R1 is added, and the voltage drop at two ends of the resistor and the conducting voltage drop of a diode D1 form a gate-source voltage value of M3; m3 is used as NMOS and has stronger current driving capability than PMOS, so that the IGBT can be helped to be quickly conducted; when the source potential of the M3 is continuously increased, and the gate-source voltage of the M3 reaches the threshold voltage of the M3 gate-source voltage, the M3 cannot provide further assistance for the source potential increase; and the second conduction power tube M4 is always in an on state in the IGBT conduction process, and finally the output voltage of the gate driving module is raised to the first positive power supply voltage VDD, so that the gate driving module realizes rail-to-rail output.
In the IGBT turn-off stage, the drive control signal module outputs turn-off control signals to M2 and M5; m2 is conducted, and the grid potential of M3 is pulled down to a first negative power supply voltage VEE; in the turn-off process, the source potential of M3, i.e. the output potential of the gate driving module is reduced from high, in order to avoid that the gate potential of M3 is close to the first negative power VEE just before turn-off, and the source potential of M3 still needs a period of time to be turned off, so that the reverse voltage of the gate source of M3 is too large, and a diode D2 is connected between the gate sources of M3 to protect the gate of M3 from being changed too fast, exceeding the highest reverse voltage that the gate source of M3 can bear; at this time, the power transistors M3 and M4 are turned off, and M5 is turned on to pull down the output voltage of the gate driving module to the first negative power voltage VEE.
Of course, the diodes D1 and D2 may be replaced by a diode-connected NMOS transistor M6 and a diode-connected PMOS transistor M7. At this time, the first voltage control module includes a first PMOS transistor M1, a second PMOS transistor M7, a first NMOS transistor M2, a second NMOS transistor M6, and a second resistor R1.
The grid electrode of the first PMOS tube M1 is connected with the conduction control signal output of the driving control signal; the source electrode of the first PMOS tube M1 is connected with a first positive power supply VDD; the drain electrode of the first PMOS tube M1 is connected with the grid electrode of the first conduction power tube M3.
The grid electrode of the second PMOS tube M7 is connected with the source electrode of the second PMOS tube M7 and is connected with the grid electrode of the first conduction power tube M3; the drain electrode of the second PMOS tube M7 and the first gate resistor R G Are connected.
The grid electrode of the first NMOS tube M2 is connected with the turn-off control signal output of the drive control signal; the source electrode of the first NMOS tube M2 is connected with a first negative power supply VEE; the drain electrode of the first NMOS tube M2 is connected with the grid electrode of the first conduction power tube M3.
The grid electrode of the second NMOS tube M6 is connected with the source electrode of the second NMOS tube M6 and is connected with a second resistor R1, and the other end of the second resistor R1 is connected with the grid electrode of the first conduction power tube M3; drain electrode of the second NMOS transistor M6First gate resistor R G Are connected.
The IGBT grid driving circuit simultaneously uses NMOS and PMOS as the conduction driving tubes, designs a circuit and a bias signal which can bias the NMOS under proper grid source voltage so that the NMOS can normally work as the conduction driving tubes, and simultaneously provides a voltage clamping protection circuit aiming at the voltage withstand problem possibly occurring when the NMOS tubes are conducted.
The embodiments described above are described in order to facilitate the understanding and application of the present invention to those skilled in the art, and it will be apparent to those skilled in the art that various modifications may be made to the embodiments described above and that the general principles described herein may be applied to other embodiments without the need for inventive faculty. Therefore, the present invention is not limited to the above-described embodiments, and those skilled in the art, based on the present disclosure, should make improvements and modifications within the scope of the present invention.
Claims (10)
1. An IGBT gate driving circuit is characterized by comprising a driving control signal module and a gate driving module;
the driving control signal module is connected with the grid driving module and is used for providing driving signals for the grid driving module, and the driving signals comprise a conduction control signal and a disconnection control signal;
and the grid driving module is connected with the grid of the IGBT and is used for processing the driving signal and outputting driving voltage and driving current to drive the on-off of the IGBT.
2. The IGBT gate drive circuit according to claim 1, wherein: the gate driving module comprises a voltage control module, on-power transistors M3 and M4, off-power transistor M5 and off-chip gate resistor R G The voltage control module controls the on-off of the on-state power tube M3 according to the change of the driving signal, wherein the drain electrode of the M3 is connected with the drain electrode of the M4 and is connected with the power supply voltage VDD, the grid electrode of the M3 is connected with the grid voltage signal provided by the voltage control module, the grid electrode of the M4 is connected with the on-state control signal, and the source electrode of the M3 is connected with the power supply voltage VDDM4 source electrode, M5 drain electrode and R G Is connected with one end of the control circuit, the grid electrode of M5 is connected with a turn-off control signal, the source electrode of M5 is connected with negative power supply voltages VEE, R G The other end of the (d) is connected to the gate of the IGBT.
3. The IGBT gate drive circuit according to claim 2, wherein: the voltage control module comprises a PMOS tube M1, an NMOS tube M2, diodes D1 and D2 and a resistor R1, wherein the source electrode of the M1 is connected with a positive power supply voltage VDD, the grid electrode of the M1 is connected with a conduction control signal, the drain electrode of the M1 is connected with the drain electrode of the M2, one end of the R1, the cathode of the D2 and the grid electrode of the M3, the other end of the R1 is connected with the anode of the D1, the cathode of the D1 is connected with the anode of the D2 and the source electrode of the M3, the grid electrode of the M2 is connected with a turn-off control signal, and the source electrode of the M2 is connected with a negative power supply voltage VEE.
4. The IGBT gate drive circuit according to claim 2, wherein: the on power tube M3 and the off power tube M5 are NMOS tubes, and the on power tube M4 is a PMOS tube.
5. The IGBT gate drive circuit according to claim 2, wherein: the high level of the conduction control signal is positive power supply voltage VDD, and the low level is square wave which is 5V lower than VDD; the high level of the turn-off control signal is a square wave 5V higher than the negative power supply voltage VEE, and the low level is VEE.
6. The IGBT gate drive circuit according to claim 2, wherein: the positive power supply voltage VDD and the negative power supply voltage VEE are supplied from an external power supply.
7. The IGBT gate drive circuit according to claim 1, wherein: the on control signal is time-synchronized with the high and low levels of the off control signal.
8. The IGBT gate drive circuit according to claim 2, wherein: the positive power supply voltage VDD is 15V and the negative power supply voltage VEE is 0V.
9. The IGBT gate drive circuit according to claim 1, wherein: when the driving signal is at a high level, the gate signal of the IGBT is at a low level; when the drive signal is low, the gate signal of the IGBT is high.
10. The IGBT gate drive circuit according to claim 3, wherein: the diodes D1 and D2 can be replaced by an NMOS tube M6 and a PMOS tube M7 which are connected by diodes respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211446027.4A CN116155252A (en) | 2022-11-18 | 2022-11-18 | IGBT grid driving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211446027.4A CN116155252A (en) | 2022-11-18 | 2022-11-18 | IGBT grid driving circuit |
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| CN116155252A true CN116155252A (en) | 2023-05-23 |
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| CN202211446027.4A Pending CN116155252A (en) | 2022-11-18 | 2022-11-18 | IGBT grid driving circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117155082A (en) * | 2023-10-30 | 2023-12-01 | 浙江大学杭州国际科创中心 | Driving circuit |
| CN117498854A (en) * | 2023-09-20 | 2024-02-02 | 北京芯可鉴科技有限公司 | IGBT driving circuit and chip |
-
2022
- 2022-11-18 CN CN202211446027.4A patent/CN116155252A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117498854A (en) * | 2023-09-20 | 2024-02-02 | 北京芯可鉴科技有限公司 | IGBT driving circuit and chip |
| CN117155082A (en) * | 2023-10-30 | 2023-12-01 | 浙江大学杭州国际科创中心 | Driving circuit |
| CN117155082B (en) * | 2023-10-30 | 2024-02-27 | 浙江大学杭州国际科创中心 | Driving circuit |
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