CN116155113B - ZVS control type module power supply for electromagnetic interference suppression - Google Patents

ZVS control type module power supply for electromagnetic interference suppression Download PDF

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Publication number
CN116155113B
CN116155113B CN202310395343.1A CN202310395343A CN116155113B CN 116155113 B CN116155113 B CN 116155113B CN 202310395343 A CN202310395343 A CN 202310395343A CN 116155113 B CN116155113 B CN 116155113B
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circuit
resistor
capacitor
voltage
pin
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CN116155113A (en
Inventor
王柯
王小兰
张朝阳
杜琛
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Shaanxi Zhongke Tiandi Aviation Module Co ltd
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Shaanxi Zhongke Tiandi Aviation Module Co ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/14Arrangements for reducing ripples from dc input or output
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/44Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention discloses an electromagnetic interference suppressed ZVS control type module power supply, which comprises an input EMI filter circuit, a voltage and current spike suppression circuit, a power-down holding circuit, a flyback active clamping power conversion circuit, a planar power transformer, a synchronous rectification circuit, an output filter circuit, a signal sampling circuit, a flyback ZVS control circuit, a half-bridge driving circuit, an input voltage isolation sampling circuit and an auxiliary power supply circuit, wherein the input EMI filter circuit, the voltage and current spike suppression circuit, the power-down holding circuit, the flyback active clamping power conversion circuit, the planar power transformer, the synchronous rectification circuit, the output filter circuit, the signal sampling circuit and the flyback ZVS control circuit are sequentially connected; the flyback active clamp power conversion circuit, the flyback ZVS control circuit and the half-bridge driving circuit are sequentially connected end to form a loop; the power supply of the invention realizes ZVS soft switch control, satisfies special power supply characteristics, improves electromagnetic compatibility characteristics and improves power density.

Description

ZVS control type module power supply for electromagnetic interference suppression
Technical Field
The invention belongs to the technical field of electromagnetic compatibility and soft switching power conversion, and particularly relates to a ZVS control type module power supply for electromagnetic interference suppression.
Background
The current DC-DC power supply module is widely applied to the fields of national defense, aerospace, weapons and the like, and along with the upgrading and upgrading of the development of weaponry, higher and more complex requirements are put forward on the electromagnetic compatibility, the power supply characteristic and the power density of the power supply module.
At present, most of power modules used by the weapon equipment have single power conversion function, low power density and no integrated peripheral electromagnetic interference suppression component, the special power supply characteristic requirements cannot be met, the requirements of the weapon equipment on small size and excellent electromagnetic compatibility characteristics cannot be completely met, meanwhile, the electromagnetic compatibility management technology taking the power module as a core, the high power density technology and the foreign technology are relatively backward, the outstanding problems of electromagnetic compatibility, space size limitation and the like in combination with practical application are combined, and particularly, the product proposal integrating the electromagnetic interference suppression, voltage and current spike suppression, topology control suppression, the power supply characteristics and the high power density power supply technology as cores is few. In order to meet the application of actual scenes, the feedback requirements of users are met, and the research situation is quite urgent.
Disclosure of Invention
The invention aims to provide a ZVS control type module power supply for electromagnetic interference suppression, which aims to solve the problem that a non-integrated peripheral electromagnetic interference suppression component in the prior art cannot meet the special power supply characteristic requirement.
In order to achieve the above purpose, the technical scheme adopted by the invention comprises the following steps:
The ZVS control type module power supply comprises an input EMI filter circuit, a voltage-current spike suppression circuit, a power-down holding circuit, a flyback active clamp power conversion circuit, a planar power transformer, a synchronous rectification circuit, an output filter circuit, a signal sampling circuit, a flyback ZVS control circuit, a half-bridge driving circuit, an input voltage isolation sampling circuit and an auxiliary power supply circuit, wherein the input EMI filter circuit, the voltage-current spike suppression circuit, the power-down holding circuit, the flyback active clamp power conversion circuit, the planar power transformer, the synchronous rectification circuit, the output filter circuit, the signal sampling circuit and the flyback ZVS control circuit are sequentially connected; the flyback active clamp power conversion circuit, the flyback ZVS control circuit and the half-bridge driving circuit are sequentially connected end to form a loop; the power-down holding circuit is also connected with an input voltage isolation sampling circuit; the auxiliary power circuit is respectively connected with the input voltage isolation sampling circuit, the flyback ZVS control circuit and the half-bridge driving circuit.
Further, the input EMI filter circuit includes a bidirectional transient suppression diode Z4, a differential mode inductance XL8, a common mode inductance COML1, a common mode capacitance C75, a differential mode capacitance C76, a differential mode capacitance C77, a differential mode capacitance C78, and a common mode capacitance C79; the bidirectional transient suppression diode Z4, the differential mode capacitor C78, the common mode inductor COML1, the differential mode capacitor C76, a series circuit formed by the common mode capacitor C75 and the common mode capacitor C79, and the differential mode capacitor C77 are sequentially connected in parallel to the two input ends +vin0 and PGND0 of the input EMI filter circuit, and the two output ends of the input EMI filter circuit are +vin1 and PGND1; meanwhile, a differential-mode inductance XL8 is provided between the differential-mode capacitance C77 and the series circuit composed of the common-mode capacitance C75 and the common-mode capacitance C79.
Further, the voltage-current spike suppression circuit comprises a diode Z10, a fuse FS1, a power field tube Q12, a resistor R77, a resistor R78, a capacitor C86, a diode Z11, a resistor R79, a resistor R80, a capacitor C84, a capacitor C85 and a capacitor C83; the driving delay network consists of a resistor R77, a resistor R78, a capacitor C86 and a diode Z11; the diode Z10, the capacitor C84, the capacitor C85 and the driving delay network are sequentially connected in parallel to two output ends +VIN1 and PGND1 of the input EMI filter circuit, one end of the resistor R77 and one end of the resistor R78 are respectively connected with the output end +VIN1 of the input EMI filter circuit, the other ends of the resistor R77 and the resistor R78 are commonly connected with the diode Z11, the capacitor C86 and the grid electrode of the power field tube Q12, and the other end of the capacitor C86 and the other end of the diode Z11 are both connected with the output end PGND1 of the voltage and current peak suppression circuit and the drain electrode of the power field tube Q12; the resistor R79 and the resistor R80 are respectively connected in parallel between two ends of the drain electrode and the source electrode of the power field tube Q12; a fuse FSI is arranged between the diode Z10 and the capacitor C84; one end of the capacitor C83 is connected with the output end +VIN2 of the voltage and current spike suppression circuit, the other end of the capacitor C83 is connected with the public end PGND2 and the drain electrode of the power field tube Q12, and the output ends of the voltage and current spike suppression circuit and the power failure holding circuit are both connected with the public end PGND2.
Further, the power-down holding circuit comprises a power diode D27, an energy storage capacitor C100, an energy storage capacitor C101 and an energy storage capacitor C102; the power diode D27, one end of the energy storage capacitor C100, one end of the energy storage capacitor C101 and one end of the energy storage capacitor C102 are sequentially connected between the output end +vin2 of the voltage-current spike suppression circuit and the output end +vin3 of the power failure holding circuit, and the other end of the energy storage capacitor C100, the other end of the energy storage capacitor C101 and the other end of the energy storage capacitor C102 are all connected with the common end PGND2.
Further, the flyback active clamp power conversion circuit comprises a power field tube Q1, a diode DQ1, a capacitor CQ1, a power field tube Qc, a diode DQc, a capacitor CQc, a resonance capacitor Cc, a transformer primary leakage inductance Lr, a transformer primary excitation inductance Lm and a capacitor C01; the drain electrode of the power field tube Qc is commonly connected with one end of the resonance capacitor Cc, one end of the diode DQc and one end of the capacitor CQc; the source electrode of the power field tube Qc is commonly connected with the other end of the diode DQc, the other end of the resonance capacitor Cc, the drain electrode of the power field tube Q1, one end of the primary exciting inductance Lm of the transformer, one end of the diode DQ1 and one end of the capacitor CQ1, and the connection point is used as the input end G2 end of the flyback active clamp power conversion circuit to be connected with the half-bridge driving circuit; the grid electrode of the power field tube Qc is connected with the G1 end, and the G1 end is used as one input end of the flyback active clamping power conversion circuit and is connected with the half-bridge driving circuit; the other end of the resonance capacitor Cc is commonly connected with one end of a primary leakage inductance Lr of the transformer and one end of a capacitor C01, one input end of the common connection end serving as a flyback active clamping power conversion circuit is connected with an output end +VIN3 of a power failure holding circuit, and the other end of the capacitor C01 is connected with a common end PGND 2; the source electrode of the power field tube Q1 is commonly connected with the other end of the diode DQ1, the other end of the capacitor CQ1, one end of the current sampling resistor RS1 and one end of the current sampling resistor RS2, the connecting point is used as an output end P-CS end of the flyback active clamping power conversion circuit to be connected with the flyback ZVS control circuit, and the other end of the current sampling resistor RS1 and the other end of the current sampling resistor RS2 are connected with the public end PGND 2; the grid electrode of the power field tube Q1 is connected with the end G3, and the end G3 is used as one input end of the flyback active clamping power conversion circuit and is connected with the half-bridge driving circuit.
Further, the synchronous rectification circuit comprises a power field tube Q10, a synchronous rectification driving chip IC1, a field tube driving circuit resistor R4, a field tube driving circuit resistor R5, a power supply pin capacitor C7, and a resistor R3, a resistor R7 and a resistor R8 in a peripheral control circuit of the synchronous rectification driving chip; the 1 pin of the synchronous rectification chip IC1 is connected with one end of a field tube driving circuit resistor R4, the other end of the field tube driving circuit resistor R4 is commonly connected with one end of a field tube driving circuit resistor R5 and the grid electrode of a power field tube Q10, the other end of the field tube driving circuit resistor R5 is connected with an output ground SGND end, the 2 pin of the synchronous rectification chip IC1 is commonly connected with one end of a power supply pin capacitor C7 and the source electrode of the power field tube Q10, and the connecting point is used as the output end of the synchronous rectification circuit to be connected with an output filter circuit; the 3 pin of the synchronous rectification chip IC1 is connected with the drain electrode of the power field tube Q10, and the connection point is used as an input end of synchronous rectification and is connected with an output end VDS of the planar power transformer; the 4 pin of the synchronous rectification chip IC1 is connected with one end of a resistor R7; the 5 pin of the synchronous rectification chip IC1 is connected with one end of a resistor R8, the other end of the resistor R8 is connected with the other end of the resistor R7 to the SGND end of the output ground; the 6 pin of the synchronous rectification chip IC1 is commonly connected with the other end of the power supply pin capacitor C7 and one end of the resistor R3, and the other end of the resistor R3 is connected with the output filter circuit;
The output filter circuit comprises a filter capacitor C1, a filter capacitor C2, a filter capacitor C3 and an inductor XL1, wherein one end of the filter capacitor C2, one end of the filter capacitor C3, one end of the filter capacitor C1 and one end of the inductor XL1 are commonly connected, and the connection point is used as one input end +VO1 of the output filter circuit to be connected with an output end VDS of the planar power transformer; the other end of the filter capacitor C2, the other end of the filter capacitor C3 and the other end of the filter capacitor C1 are commonly connected, the connecting point is used as the other input end VS of the output filter circuit to be connected with the output end of the synchronous rectification circuit, and meanwhile, the connecting point is also used as the output ground SGND end of the output filter circuit; the other end of the inductor XL1 is commonly connected with the other end of the filter capacitor C1, and the connection point is used as an output end VOUT+ of the output filter circuit to be connected with the signal sampling circuit.
Further, the signal sampling circuit comprises a voltage division sampling resistor R27 and a resistor R32, wherein one end of the resistor R27 is connected with an output end VOUT+ of the output filter circuit, the other end of the resistor R27 and one end of the resistor R32 are commonly connected with a common end RE, and the common end RE is used as an output end of the signal sampling circuit to be connected with a flyback ZVS control circuit; the other end of the resistor R32 is connected with the SGND end of the output ground.
Further, the flyback ZVS control circuit includes a control chip IC6, a filter capacitor C20, a filter capacitor C21, a filter capacitor C23, a filter capacitor C24, a filter capacitor C25, a filter capacitor C26, a voltage dividing resistor R35, a voltage dividing resistor R36, a resistor R37, a resistor R38, a resistor R40, a resistor R41, and a resistor R42; the control chip IC6 is characterized in that a pin 1 is an input power supply pin, the pin 1 is connected with one end of a filter capacitor C21, and the connection point is used as an input power supply end VCC of a flyback ZVS control circuit to be connected with an auxiliary power supply module; the pin 2 is a grounding pin, and the pin 2 is commonly connected with the other end of the filter capacitor C21 and one end of the filter capacitor C24 and is grounded to the PGND end; the 3 pin is a current signal feedback pin, the 3 pin is connected with the other end of the filter capacitor C24, one end of the resistor R40 and one end of the resistor R41 together, the other end of the resistor R40 is used as the input end of the flyback ZVS control circuit to be connected with the P-CS end of the output end of the flyback active clamp power conversion circuit, and the other end of the resistor R41 is connected with the +VIN3 end of the power-down holding circuit; the 4 pin and the 5 pin are driving signal ends, and the driving signal ends are respectively connected with a half-bridge driving circuit as output ends of a flyback ZVS control circuit; the 6-pin is connected with an optocoupler feedback pin RUN;7, connecting a low-voltage driving SWS by a pin; the 8-pin is connected with a high-voltage driving HVG and externally connected with a filter capacitor C26 to the end of the ground PGND; the 9 pins are connected with an auxiliary winding of the planar power transformer and externally connected with a voltage detection resistor R42 to the end PGND; the 10 pin is connected with a 5V voltage reference REF end; 11 feet are connected with a switch EN; the 12 pins are connected with the voltage reference REF end of the filter capacitor C25 to 5V, and the voltage reference REF end is used as the input end of the flyback ZVS control circuit and is connected with the public end RE of the signal sampling circuit; 13 pins are connected with the resistor R38 to the end of the ground PGND; the 14 pin is connected with the resistor R37 to the ground PGND end; the 15 pin is commonly connected with one end of the filter capacitor C23, one end of the divider resistor R35 and one end of the divider resistor R36; the 16 pin and one end of the filter capacitor C20 and the other end of the divider resistor R35 are commonly connected to the 5V voltage reference REF end; the other end of the divider resistor R36 is connected with the other end of the filter capacitor C20 to the ground PGND end.
Further, the half-bridge driving circuit comprises a half-bridge driving chip IC2, a bootstrap capacitor C9 and a filter capacitor C11, wherein a pin 1 of the half-bridge driving chip IC2 is connected with one end of the filter capacitor C11 to a VCC end, VCC is used as an input power supply end of the half-bridge driving circuit to be connected with an auxiliary power supply module, and the other end of the filter capacitor C11 is grounded to a PGND end; the 2 pin is connected with one end of the bootstrap capacitor C9; the 3 pin is connected with the G1 end of the input end of the flyback active clamp power conversion circuit to control the on and off of the power field tube Qc; the 4 pin is connected with the input end G2 end of the flyback active clamp power conversion circuit and the other end of the bootstrap capacitor C9; the 5 feet and the 6 feet are suspended in the air; the 7 pin is used as an input end PWMH end of the half-bridge driving circuit and is connected with an output end of the feedback ZVS control circuit; the 8 pin is used as an input end PWML end of the half-bridge driving circuit and is connected with an output end of the feedback ZVS control circuit; the 9 pin is grounded to the PGND end; the 10 pin is connected with the G3 end of the input end of the flyback active clamp power conversion circuit, and controls the on and off of the power field tube Q1; the 7 th pin and the 8 th pin of the half-bridge driving circuit control chip IC2 are connected with the output end of the flyback ZVS control circuit.
Further, the input voltage isolation sampling circuit comprises an isolation chip IC10, a filter capacitor C68, a filter capacitor C69, a power supply capacitor C-FG, a filter capacitor C-FG1, a resistor R55, a resistor R83, a resistor R56, a resistor R85, a resistor R81, a resistor R91, a resistor R97, a resistor R93, a resistor R94 and a voltage stabilizing tube Z3; the control chip IC10 selects an AMC1311B chip, a pin 1 of the control chip IC10 is a power supply end of a high-voltage side power supply, the pin 1 is commonly connected with one end of a resistor R97, one end of a voltage stabilizing tube Z3 and one end of a filter capacitor C68, the other end of the resistor R97 is connected with an output VCC end of an auxiliary power supply circuit, and the other end of the voltage stabilizing tube Z3 is grounded to a PGND end; the pin 2 of the control chip IC10 is an analog input end, the pin 2 is commonly connected with one end of a filter capacitor C69 and one end of a resistor R91, the other end of the resistor R91 is commonly connected with one end of a resistor R85 and one end of a resistor R56, the other end of the resistor R56 is connected with one end of a resistor R83, the other end of the resistor R83 is connected with the ends of resistors R55 and +VIN3, and the other end of the resistor R85 is connected with one end of a resistor R81; the 3 pin of the control chip IC10 is a closed input end, the 4 pin of the control chip IC10 is a high-voltage side analog ground end, the 3 pin and the 4 pin are in short circuit, and are commonly connected with the other end of the filter capacitor C68, the other end of the filter capacitor C69 and the other end of the resistor R81, and the connecting point is grounded to the PGND end; the 5 pin of the control chip IC10 is a low-voltage side analog grounding end and is grounded to a signal ground SGND end; the 6 pin of the control chip IC10 is a reverse analog output end, one end of a resistor R94 is connected, and the other end of the resistor R94 is connected with one end of a filter capacitor C-FG1 to the detection end of the ZVS control type module power supply for electromagnetic interference suppression; the pin 7 of the control chip IC10 is a non-reverse analog output end, one end of a resistor R93 is connected, and the other end of the resistor R93 is connected with the other end of a filter capacitor C-FG1 to the detection plus end of the ZVS control type module power supply for electromagnetic interference suppression; the 8 pin of the control chip IC10 is a low-voltage side power supply end, and is connected with one end of a power supply capacitor C-FG, and the other end of the power supply capacitor C-FG is connected with an output ground SGND end.
Compared with the prior art, the invention has the following technical effects:
And (I) the input EMI filter circuit, the voltage and current peak suppression circuit, the power-down holding circuit and the flyback active clamp power conversion circuit are in cascade connection, so that the suppression attenuation of the power supply module to electromagnetic interference is improved, the input voltage and current peak is suppressed, the normal output voltage maintenance time under the condition of input power down is ensured, and the electromagnetic compatibility and the power supply characteristic of the power supply module are improved.
And (II) a UCC28780 flyback active clamp ZVS control chip is adopted, the chip is VQFN-16 packaged, the packaging size is small, the functions are complete, the active ZVS soft switch control can be realized, and the ZVS soft switch control circuit is simplified.
And (III) a planar power transformer is adopted, so that the efficiency of the transformer is improved, the heating of the transformer is reduced, the higher winding current density is realized, the better electromagnetic property is realized, and the process consistency is higher.
And (IV) flyback active clamp ZVS soft switch control is adopted, so that the heating of a power field tube is reduced, the stress of a power device is reduced, higher working frequency is realized, the volume of a power module is reduced, the power density is improved, higher efficiency is realized, and the reliability of the power module is improved.
In conclusion, the power supply can realize electromagnetic interference suppression, current spike suppression and topology control suppression, can realize ZVS soft switching control, meets special power supply characteristics, improves electromagnetic compatibility characteristics and improves power density.
Drawings
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate the invention and together with the description serve to explain the invention:
fig. 1 is a circuit configuration diagram of the ZVS control type module power supply of the electromagnetic interference suppression of the present invention.
Fig. 2 is a circuit diagram of an input EMI filter circuit.
Fig. 3 is a circuit diagram of a voltage-current spike suppression circuit.
Fig. 4 is a circuit diagram of a power down holding circuit.
Fig. 5 is a circuit diagram of a flyback active clamp power conversion circuit.
Fig. 6 is a circuit diagram showing the connection of the synchronous rectifier circuit and the output filter circuit.
Fig. 7 is a circuit diagram of a signal sampling circuit.
Fig. 8 is a circuit diagram of a flyback ZVS control circuit.
Fig. 9 is a circuit diagram of a half-bridge drive circuit.
Fig. 10 is a circuit diagram of an input voltage isolated sampling circuit.
Detailed Description
The following specific embodiments of the present application are provided, and it should be noted that the present application is not limited to the following specific embodiments, and all equivalent changes made on the basis of the technical scheme of the present application fall within the protection scope of the present application.
The embodiment provides a ZVS control type module power supply for electromagnetic interference suppression, which comprises an input EMI filter circuit, a voltage-current spike suppression circuit, a power-down holding circuit, a flyback active clamp power conversion circuit, a planar power transformer, a synchronous rectification circuit, an output filter circuit, a signal sampling circuit, a flyback ZVS control circuit, a half-bridge driving circuit, an input voltage isolation sampling circuit and an auxiliary power supply circuit, wherein the input EMI filter circuit, the voltage-current spike suppression circuit, the power-down holding circuit, the flyback active clamp power conversion circuit, the planar power transformer, the synchronous rectification circuit, the output filter circuit, the signal sampling circuit and the flyback ZVS control circuit are sequentially connected; the flyback active clamp power conversion circuit, the flyback ZVS control circuit and the half-bridge driving circuit are sequentially connected end to form a loop; the power-down holding circuit is also connected with an input voltage isolation sampling circuit; the auxiliary power circuit is respectively connected with the input voltage isolation sampling circuit, the flyback ZVS control circuit and the half-bridge driving circuit.
The technical scheme is as follows:
the input EMI filter circuit is used for filtering and attenuating interference components in the input direct-current voltage and sending the filtered input direct-current voltage to the voltage-current peak suppression circuit;
The voltage and current peak suppression circuit is used for suppressing the peak of the filtered input direct current voltage output by the input EMI filter circuit and sending the suppressed direct current and direct current voltage to the power-down holding circuit;
the power-down maintaining circuit is used for outputting stable direct-current voltage when the input direct-current voltage is powered down so as to maintain the normal operation of the flyback active clamp power conversion circuit behind the power-down maintaining circuit; the input voltage isolation sampling circuit is also used for outputting stable direct-current voltage to the input voltage isolation sampling circuit;
The flyback active clamp power conversion circuit is used for chopping the direct-current voltage output by the power-down maintaining circuit into high-frequency alternating-current square-wave voltage, sending the high-frequency alternating-current square-wave voltage to the planar power transformer, sending a state signal to the flyback ZVS control circuit, and simultaneously, working in a ZVS soft switch working state according to the PWM signal sent by the half-bridge driving circuit.
The planar power transformer is used for coupling the high-frequency alternating-current square-wave voltage output by the flyback active clamp power conversion circuit into the high-frequency alternating-current square-wave voltage of the secondary side according to the turn ratio of 1/n, and sending the high-frequency alternating-current square-wave voltage to the synchronous rectification circuit;
the synchronous rectification circuit is used for rectifying the high-frequency alternating-current square-wave voltage of the secondary side output by the planar power transformer into high-frequency direct-current square-wave voltage and sending the high-frequency direct-current square-wave voltage to the output filter circuit;
the output filter circuit is used for filtering the high-frequency direct-current square wave voltage output by the synchronous rectification circuit into stable direct-current output voltage and outputting the stable direct-current output voltage to the signal sampling circuit;
the signal sampling circuit is used for converting direct-current output voltage samples output by the output filter circuit into voltage signals suitable for being collected by the flyback ZVS control circuit and sending the voltage signals to the flyback ZVS control circuit;
The flyback ZVS control circuit is used for sending PWM driving signals with different duty ratios and time sequences to the half-bridge driving circuit according to the state signals fed back by the flyback active clamp power conversion circuit and the voltage signals of the signal sampling circuit.
The half-bridge driving circuit is used for amplifying a driving time sequence signal (namely a PWM signal) sent by the flyback ZVS control circuit and then sending the driving time sequence signal to the flyback active clamp power conversion circuit so as to control the flyback active clamp power conversion circuit to work in a ZVS soft switch working state;
The auxiliary power supply circuit is used for converting input voltage into voltage required by the primary and secondary side chips and circuits and respectively supplies power for the flyback ZVS control circuit, the half-bridge driving circuit and the input voltage isolation sampling circuit.
The input voltage isolation sampling circuit is used for isolating and outputting the direct-current voltage signal output by the power-down maintaining circuit through the voltage division ratio of 1/K, and the isolated and output signal is a differential TTL level for an external singlechip or an upper computer to monitor the input voltage.
In this embodiment, as shown in fig. 2, the input EMI filter circuit includes a bidirectional transient suppression diode Z4, a differential mode inductance XL8, a common mode inductance COML1, a common mode capacitance C75, a differential mode capacitance C76, a differential mode capacitance C77, a differential mode capacitance C78, and a common mode capacitance C79; the bidirectional transient suppression diode Z4, the differential mode capacitor C78, the common mode inductor COML1, the differential mode capacitor C76, a series circuit formed by the common mode capacitor C75 and the common mode capacitor C79, and the differential mode capacitor C77 are sequentially connected in parallel to the two input ends +vin0 and PGND0 of the input EMI filter circuit, and the two output ends of the input EMI filter circuit are +vin1 and PGND1; meanwhile, a differential-mode inductance XL8 is provided between the differential-mode capacitance C77 and the series circuit composed of the common-mode capacitance C75 and the common-mode capacitance C79. According to the technical scheme, the two-way transient suppression diode Z4, the differential mode inductor XL8 and the common mode inductor COML1 can respectively provide peak suppression, differential mode impedance and common mode impedance, and the high-low frequency noise suppression capability in electromagnetic interference is improved, so that noise interference in input voltage and interference generated by a power supply module can be filtered, input high-voltage peaks are suppressed, other components are prevented from being damaged by surge high voltage, and fluctuation of the input voltage caused by abrupt change of an input source and a load can be effectively reduced. Specifically, in the circuit, the model of the bidirectional transient suppression diode Z4 is BYT16P-400, the values of the differential mode capacitors C76, C77 and C78 are all 4.7uF/50V, the value of the common mode inductor COML1 is 280uH, the value of the differential mode inductor XL8 is 4.7uH, and the values of the common mode capacitors C75 and C79 are all 4700pF/50V.
As shown in fig. 3, in the present embodiment, the voltage-current spike suppression circuit includes a diode Z10, a fuse FS1, a power field tube Q12, a resistor R77, a resistor R78, a capacitor C86, a diode Z11, a resistor R79, a resistor R80, a capacitor C84, a capacitor C85, and a capacitor C83. The driving delay network consists of a resistor R77, a resistor R78, a capacitor C86 and a diode Z11; the diode Z10, the capacitor C84, the capacitor C85 and the driving delay network are sequentially connected in parallel to two output ends +VIN1 and PGND1 of the input EMI filter circuit, one end of the resistor R77 and one end of the resistor R78 are respectively connected with the output end +VIN1 of the input EMI filter circuit, the other ends of the resistor R77 and the resistor R78 are commonly connected with the diode Z11, the capacitor C86 and the grid electrode of the power field tube Q12, and the other end of the capacitor C86 and the other end of the diode Z11 are both connected with the output end PGND1 of the voltage and current peak suppression circuit and the drain electrode of the power field tube Q12; the resistor R79 and the resistor R80 are respectively connected in parallel between two ends of the drain electrode and the source electrode of the power field tube Q12; a fuse FSI is arranged between the diode Z10 and the capacitor C84; one end of the capacitor C83 is connected with the output end +VIN2 of the voltage and current spike suppression circuit, the other end of the capacitor C83 is connected with the public end PGND2 and the drain electrode of the power field tube Q12, and the output ends of the voltage and current spike suppression circuit and the power failure holding circuit are both connected with the public end PGND2. In the above technical scheme, the diode Z10 is preferably a high-power bidirectional transient suppression diode, and the slow turn-on of the power field tube Q12 is controlled by setting the bidirectional transient suppression diode (i.e., Z10) and the driving delay network at the input end of the circuit, so as to effectively suppress the input voltage spike and the input current spike, and simultaneously, when the rear-stage short circuit or the load is abnormal, the recoverable fusing protection can be provided, and the safe and reliable operation of the rear-stage circuit is effectively protected. Specifically, in the circuit, the model of the diode Z10 is BYT16P-400, the model of the fuse FS1 is S6125-F, the model of the power field tube Q12 is BSC014N04LS, the value of the resistor R77 is 10KΩ, the value of the resistor R78 is 2KΩ, the value of the capacitor C86 is 1uF/50V, the model of the diode Z11 is STTH SB, the value of the resistor R79 is 10KΩ, the value of the resistor R80 is 5.1Ω, and the values of the capacitor C84, the capacitor C85 and the capacitor C83 are all 4.7uF/50V.
In this embodiment, as shown in fig. 4, the power-down holding circuit includes a power diode D27, an energy storage capacitor C100, an energy storage capacitor C101, and an energy storage capacitor C102; the power diode D27, one end of the energy storage capacitor C100, one end of the energy storage capacitor C101 and one end of the energy storage capacitor C102 are sequentially connected between the output end +vin2 of the voltage-current spike suppression circuit and the output end +vin3 of the power-down holding circuit, and the other end of the energy storage capacitor C100, the other end of the energy storage capacitor C101 and the other end of the energy storage capacitor C102 are all connected to the common end PGND2. In the above technical scheme, due to the unidirectional conductivity of the power diode D27, during normal power supply, the energy storage capacitor is charged to the input voltage, and when the input voltage is lost or fails, the voltage maintained on the energy storage capacitor only supplies power to the rear stage, so that the rear stage power and the control circuit can be normally maintained to work normally according to the set maintenance time, and the power supply characteristic requirement under the special environment is met. Specifically, in the circuit, the model number of the diode D27 is TZMB-GS 08, and the values of the energy storage capacitor C100, the energy storage capacitor C101 and the energy storage capacitor C102 are all 10uF/16V.
In this embodiment, as shown in fig. 5, the flyback active clamp power conversion circuit includes a power field transistor Q1, a diode DQ1, a capacitor CQ1, a power field transistor Qc, a diode DQc, a capacitor CQc, a resonant capacitor Cc, a transformer primary leakage inductance Lr, a transformer primary excitation inductance Lm, and a capacitor C01. The drain electrode of the power field tube Qc is commonly connected with one end of the resonance capacitor Cc, one end of the diode DQc and one end of the capacitor CQc; the source electrode of the power field tube Qc is commonly connected with the other end of the diode DQc, the other end of the resonance capacitor Cc, the drain electrode of the power field tube Q1, one end of the primary exciting inductance Lm of the transformer, one end of the diode DQ1 and one end of the capacitor CQ1, and the connection point is used as the input end G2 end of the flyback active clamp power conversion circuit to be connected with the half-bridge driving circuit; the grid electrode of the power field tube Qc is connected with the G1 end, and the G1 end is used as one input end of the flyback active clamping power conversion circuit and is connected with the half-bridge driving circuit; the other end of the resonance capacitor Cc is commonly connected with one end of a primary leakage inductance Lr of the transformer and one end of a capacitor C01, one input end of the common connection end serving as a flyback active clamping power conversion circuit is connected with an output end +VIN3 of a power failure holding circuit, and the other end of the capacitor C01 is connected with a common end PGND 2; the source electrode of the power field tube Q1 is commonly connected with the other end of the diode DQ1, the other end of the capacitor CQ1, one end of the current sampling resistor RS1 and one end of the current sampling resistor RS2, and the connecting point is used as an output end P-CS end of the flyback active clamp power conversion circuit to be connected with the flyback ZVS control circuit, and the other end of the current sampling resistor RS1 and the other end of the current sampling resistor RS2 are connected with the public end PGND 2; the grid electrode of the power field tube Q1 is connected with the end G3, and the end G3 is used as one input end of the flyback active clamping power conversion circuit and is connected with the half-bridge driving circuit. In the above technical scheme, the power field tube Q1, the diode DQ1 and the capacitor CQ1 form an excitation loop, the power field tube Qc, the diode DQc and the capacitor CQc form a demagnetizing loop, and the resonant capacitor Cc, the primary leakage inductance Lr of the transformer and the primary excitation inductance Lm of the transformer form a resonant network. The PWM signals with variable duty ratio sent by the flyback ZVS control circuit are transmitted to the power field tube Q1 and the power field tube Qc through the input end G3 end and the input end G1 end of the flyback active clamping power conversion circuit respectively by the half-bridge driving circuit, and the power field tube Q1 and the power field tube Qc chop the direct-current voltage input by the output end +VIN3 of the power failure holding circuit into high-frequency alternating-current square wave voltage and transmit the high-frequency alternating-current square wave voltage to the planar power transformer T. Specifically, in the circuit, the model of Qc is LY10N017LJ, the value of the capacitor C01 is 1uF/50V, the value of the resonance capacitor Cc is 0.1uF/50V, the models of the diode DQc and DQ1 are STPS30H100JF, the values of the capacitor CQc and CQ1 are 0.22uF/35V, and the values of the current sampling resistor RS1 and the current sampling resistor RS2 are 0.1R.
The planar power transformer includes a magnetic core, a primary winding, a secondary winding, and an auxiliary winding. In this embodiment, a planar transformer process is used to draw coils of a primary winding, a secondary winding and an auxiliary winding on a multi-layer PCB board to obtain a planar power transformer. The planar power transformer T receives the high-frequency alternating-current square-wave voltage of the flyback active clamp power conversion circuit and transfers energy to the secondary side of the planar power transformer. Specifically, in the circuit, an incoming line of a primary winding is used as one input end of a planar power transformer to be connected with a drain electrode of a power field tube Q1 of a flyback active clamp power conversion circuit, and an outgoing line of the primary winding is used as the other input end of the planar power transformer to be connected with the other end of a primary excitation inductance Lm of the transformer; the inlet wire end of the secondary winding is +VO1, the outlet wire end of the secondary winding is VDS, and the VDS is used as the output end of the planar power transformer and connected with the synchronous rectification circuit.
The planar power transformer has eight layers, and the transformation ratio n is 3:4, wherein the first layer is a secondary winding, and a first turn of the secondary is placed; the second layer is a primary winding, and a primary first turn is placed; the third layer is a secondary winding, and a secondary second turn is placed; the fourth layer is a primary winding, and a secondary turn of the primary is placed; the fifth layer is a secondary winding, and a third turn of the secondary is placed; the sixth layer is a primary winding, and a third turn of the primary winding is placed; the seventh layer is a secondary winding, and a fourth turn of the secondary is placed; the eighth layer is an auxiliary winding, and the number of turns is 7; the final inductance was 4.5uH. Wherein, the magnetic core adopts the EC19.6C magnetic core of PEI452 material of the peak, the area of the window of the magnetic core is large, which is favorable for winding wiring, reduces copper loss and improves efficiency; meanwhile, the magnetic core has larger sectional area, so that the magnetic loss can be reduced, and the efficiency can be improved; the primary leakage inductance Lr of the transformer has a value of 3.3uH, and the primary excitation inductance Lm of the transformer has a value of 0.47uH.
In this embodiment, as shown in fig. 6, the synchronous rectification circuit includes a power field tube Q10, a synchronous rectification driving chip IC1, a field tube driving circuit resistor R4, a field tube driving circuit resistor R5, a power supply pin capacitor C7, and resistors R3, R7, and R8 in a peripheral control circuit of the synchronous rectification driving chip. The 1 pin of the synchronous rectification chip IC1 is connected with one end of a field tube driving circuit resistor R4, the other end of the field tube driving circuit resistor R4 is commonly connected with one end of a field tube driving circuit resistor R5 and the grid electrode of a power field tube Q10, the other end of the field tube driving circuit resistor R5 is connected with an output ground SGND end, the 2 pin of the synchronous rectification chip IC1 is commonly connected with one end of a power supply pin capacitor C7 and the source electrode of the power field tube Q10, and the connection point is used as the output end of the synchronous rectification circuit to be connected with an output filter circuit; the 3 pin of the synchronous rectification chip IC1 is connected with the drain electrode of the power field tube Q10, and the connection point is used as an input end of synchronous rectification and is connected with an output end VDS of the planar power transformer; the 4 pin of the synchronous rectification chip IC1 is connected with one end of a resistor R7; the 5 pin of the synchronous rectification chip IC1 is connected with one end of a resistor R8, the other end of the resistor R8 is connected with the other end of the resistor R7 to the SGND end of the output ground; the 6 pin of the synchronous rectification chip IC1 is commonly connected with the other end of the power supply pin capacitor C7 and one end of the resistor R3, and the other end of the resistor R3 is connected with the output filter circuit. In the above technical solution, the power field tube Q10 is controlled by the self-detection control of the synchronous rectification driving chip IC1, and the chip IC1 controls the power field tube Q10 to operate in a rectification working state with only lower loss by detecting the voltage threshold change of the drain-source voltage Vds of the power field tube Q10. Specifically, in the circuit, the model of the power field tube Q10 is BSC014N04LS, the model of the synchronous rectification driving chip IC1 is UCC24612, the values of the field tube driving circuit resistors R4 and R5 are 5.1Ω and 10KΩ respectively, the values of the resistors R7, R8 and R3 are 2KΩ, 2KΩ and 10KΩ respectively, and the value of the power supply pin capacitor C7 is 1uF/50V.
The output filter circuit comprises a filter capacitor C1, a filter capacitor C2, a filter capacitor C3 and an inductor XL1, wherein one end of the filter capacitor C2, one end of the filter capacitor C3, one end of the filter capacitor C1 and one end of the inductor XL1 are commonly connected, and the connection point is used as one input end +VO1 of the output filter circuit to be connected with an output end VDS of the planar power transformer; the other end of the filter capacitor C2, the other end of the filter capacitor C3 and the other end of the filter capacitor C1 are commonly connected, the connecting point is used as the other input end VS of the output filter circuit to be connected with the output end of the synchronous rectification circuit, and meanwhile, the connecting point is also used as the output ground SGND end of the output filter circuit; the other end of the inductor XL1 is commonly connected with the other end of the filter capacitor C1, and the connection point is used as an output end VOUT+ of the output filter circuit to be connected with the signal sampling circuit. Specifically, in the circuit, the values of the filter capacitors C2, C3 and C1 are all 100uF/50V, and the value of the inductor XL1 is 0.47uH.
In this embodiment, as shown in fig. 7, the signal sampling circuit includes a voltage division sampling resistor R27 and a resistor R32, where one end of the resistor R27 is connected to an output terminal vout+ of the output filter circuit, and the other end of the resistor R27 and one end of the resistor R32 are connected to a common terminal RE, and the common terminal RE is used as an output terminal of the signal sampling circuit and connected to a flyback ZVS control circuit; the other end of the resistor R32 is connected with the SGND end of the output ground. Specifically, in this circuit, the voltage division sampling resistor R27 and the resistor R32 have values of 38kΩ and 10kΩ, respectively.
In this embodiment, the flyback ZVS control circuit is formed by a flyback active clamp ZVS control chip UCC28780RTE and a peripheral circuit. As shown in fig. 8, the flyback ZVS control circuit includes a control chip IC6, a filter capacitor C20, a filter capacitor C21, a filter capacitor C23, a filter capacitor C24, a filter capacitor C25, a filter capacitor C26, a voltage dividing resistor R35, a voltage dividing resistor R36, a resistor R37, a resistor R38, a resistor R40, a resistor R41, and a resistor R42. The UCC28780RTE flyback active clamp ZVS control chip is selected by the control chip IC6, the 1 pin of the control chip IC6 is used as an input power supply pin, the 1 pin is connected with one end of the filter capacitor C21, and the connection point is used as an input power supply end VCC of the flyback ZVS control circuit to be connected with an auxiliary power supply module; the pin 2 is a grounding pin, and the pin 2 is commonly connected with the other end of the filter capacitor C21 and one end of the filter capacitor C24 and is grounded to the PGND end; the 3 pin is a current signal feedback pin, the 3 pin is commonly connected with the other end of the filter capacitor C24, one end of the resistor R40 and one end of the resistor R41, the other end of the resistor R40 is used as the input end of the flyback ZVS control circuit to be connected with the P-CS end of the output end of the flyback active clamp power conversion circuit, and the other end of the resistor R41 is used as the +VIN3 end of the power-down holding circuit; the 4 pin and the 5 pin are driving signal ends, and the driving signal ends are respectively connected with a half-bridge driving circuit as output ends of a flyback ZVS control circuit; the 6-pin is connected with an optocoupler feedback pin RUN;7, connecting a low-voltage driving SWS by a pin; the 8-pin is connected with a high-voltage driving HVG and externally connected with a filter capacitor C26 to the end of the ground PGND; the 9 pins are connected with an auxiliary winding of the planar power transformer and externally connected with a voltage detection resistor R42 to the end PGND; the 10 pin is connected with a 5V voltage reference REF end; 11 feet are connected with a switch EN; the 12 pins are connected with the voltage reference REF end of the filter capacitor C25 to 5V, and the voltage reference REF end is used as the input end of the flyback ZVS control circuit and is connected with the public end RE of the signal sampling circuit; 13 pins are connected with the resistor R38 to the end of the ground PGND; the 14 pin is connected with the resistor R37 to the ground PGND end; the 15 pin is commonly connected with one end of the filter capacitor C23, one end of the divider resistor R35 and one end of the divider resistor R36; the 16 pin and one end of the filter capacitor C20 and the other end of the divider resistor R35 are commonly connected to the 5V voltage reference REF end; the other end of the divider resistor R36 is connected with the other end of the filter capacitor C20 to the ground PGND end. In the technical scheme, the flyback active clamp ZVS control chip sends PWM driving signals with different duty ratios and time sequences according to the state signals fed back by the flyback active clamp power conversion circuit and the feedback voltage signals of the signal sampling circuit, and controls the working states of the power field tube Q10 and the resonant network of the flyback active clamp power conversion circuit, so that the flyback active clamp power conversion circuit works in the ZVS soft switch working state. And the flyback ZVS control circuit sends PWM signals to the half-bridge driving circuit from pins 4 and 5 of the flyback ZVS control chip IC6 according to the output voltage signals sampled by the signal sampling circuit. Specifically, in the circuit, the filter capacitor C20 has a value of 0.1uF/50V, C21 has a value of 0.22uF/35V, C23 has a value of 220pF/50V, C24 and C25 have a value of 100pF/10V, and C26 has a value of 2.2nF/10V; the value of the parameter setting resistor R35 is 270KΩ, the value of R36 is 51KΩ, the value of R37 is 200KΩ, the value of R38 is 120KΩ, the value of R40 is 2.2KΩ, the value of R41 is 33KΩ, and the value of R42 is 47KΩ.
In this embodiment, as shown in fig. 9, the half-bridge driving circuit includes a half-bridge driving chip IC2, a bootstrap capacitor C9 and a filter capacitor C11, where pin 1 of the half-bridge driving chip IC2 is connected to one end of the filter capacitor C11 to VCC, VCC is used as an input power supply terminal of the half-bridge driving circuit and connected to an auxiliary power module, and the other end of the filter capacitor C11 is grounded to a PGND terminal; the 2 pin is connected with one end of the bootstrap capacitor C9; the 3 pin is connected with the G1 end of the input end of the flyback active clamp power conversion circuit to control the on and off of the power field tube Qc; the 4 pin is connected with the input end G2 end of the flyback active clamp power conversion circuit and the other end of the bootstrap capacitor C9; the 5 feet and the 6 feet are suspended in the air; the 7 pin is used as an input end PWMH end of the half-bridge driving circuit and is connected with an output end of the feedback ZVS control circuit; the 8 pin is used as an input end PWML end of the half-bridge driving circuit and is connected with an output end of the feedback ZVS control circuit; the 9 pin is grounded to the PGND end; the 10 pin is connected with the G3 end of the input end of the flyback active clamp power conversion circuit, and controls the on and off of the power field tube Q1; the 7 th pin and the 8 th pin of the half-bridge driving circuit control chip IC2 are connected with the output end of the flyback ZVS control circuit. Specifically, in the circuit, the model of the half-bridge driving chip IC2 is UCC27212DPR, the value of the bootstrap capacitor C9 is 47nF/50V, and the value of the filter capacitor C11 is 0.47uF/50V.
In this embodiment, as shown in fig. 10, the input voltage isolation sampling circuit includes an isolation chip IC10, a filter capacitor C68, a filter capacitor C69, a power supply capacitor C-FG, a filter capacitor C-FG1, a resistor R55, a resistor R83, a resistor R56, a resistor R85, a resistor R81, a resistor R91, a resistor R97, a resistor R93, a resistor R94, and a regulator Z3. The control chip IC10 selects an AMC1311B chip, a pin 1 of the control chip IC10 is a power supply end of a high-voltage side power supply, the pin 1 is commonly connected with one end of a resistor R97, one end of a voltage stabilizing tube Z3 and one end of a filter capacitor C68, the other end of the resistor R97 is connected with an output VCC end of an auxiliary power supply circuit, and the other end of the voltage stabilizing tube Z3 is grounded to a PGND end; the pin 2 of the control chip IC10 is an analog input end, the pin 2 is commonly connected with one end of a filter capacitor C69 and one end of a resistor R91, the other end of the resistor R91 is commonly connected with one end of a resistor R85 and one end of a resistor R56, the other end of the resistor R56 is connected with one end of a resistor R83, the other end of the resistor R83 is connected with the ends of resistors R55 and +VIN3, and the other end of the resistor R85 is connected with one end of a resistor R81; the 3 pin of the control chip IC10 is a closed input end, the 4 pin of the control chip IC10 is a high-voltage side analog ground end, the 3 pin and the 4 pin are in short circuit, and are commonly connected with the other end of the filter capacitor C68, the other end of the filter capacitor C69 and the other end of the resistor R81, and the connecting point is grounded to the PGND end; the 5 pin of the control chip IC10 is a low-voltage side analog grounding end and is grounded to a signal ground SGND end; the 6 pin of the control chip IC10 is a reverse analog output end, one end of a resistor R94 is connected, and the other end of the resistor R94 is connected with one end of a filter capacitor C-FG1 to the detection-end of the ZVS control type module power supply for electromagnetic interference suppression; the pin 7 of the control chip IC10 is a non-reverse analog output end, one end of a resistor R93 is connected, and the other end of the resistor R93 is connected with the other end of a filter capacitor C-FG1 to the detection plus end of the ZVS control type module power supply for electromagnetic interference suppression; the 8 pin of the control chip IC10 is a low-voltage side power supply end, and is connected with one end of a power supply capacitor C-FG, and the other end of the power supply capacitor C-FG is connected with an output ground SGND end. Specifically, in the circuit, the values of the resistor R55 and the resistor R83 are 10 omega, the value of the resistor R56 is 39KΩ, the value of the resistor R85 is 270 Ω, the value of the resistor R81 is 51KΩ, the value of the resistor R91 is 10KΩ, the value of the resistor R97 is 20 Ω, the value of the resistor R93 is 22 Ω, the value of the resistor R94 is 15KΩ, the value of the filter capacitor C68 is 10nF/10V, the value of the filter capacitor C6 is 0.1uF/50V, the value of the capacitor C-FG is 0.47uF/50V, and the value of the capacitor C-FG1 is 10nF/10V.
In this embodiment, the auxiliary power circuit is a flyback topology, and is a conventional circuit well known in the art, including a power transformer, a power tube, a PWM controller, an optocoupler, and a reference.
In summary, the ZVS control module power supply with electromagnetic interference suppression provided by the invention adopts a cascade connection mode of an input EMI filter circuit, a voltage-current peak suppression circuit, a power-down holding circuit and a flyback active clamp power conversion circuit, so that the suppression attenuation of the module power supply to electromagnetic interference is improved, the input voltage-current peak is suppressed, the normal output voltage maintenance time under input power-down condition is ensured, and the electromagnetic compatibility and the power supply characteristic of the module power supply are improved. The UCC28780 flyback active clamp ZVS control chip is VQFN-16 packaged, has small packaging size and complete functions, can realize active ZVS soft switch control, and simplifies a ZVS soft switch control circuit. The planar power transformer is adopted, the efficiency of the transformer is improved, the heating of the transformer is reduced, the higher winding current density is realized, the better electromagnetic property is realized, and the process consistency is higher. The flyback active clamp ZVS soft switch control is adopted, so that the heating of the power field tube is reduced, the stress of the power device is reduced, the higher working frequency is realized, the volume of the power module is reduced, the power density is improved, the higher efficiency is realized, and the reliability of the power module is improved.
While the invention has been described with respect to the preferred embodiments, it is to be understood that the invention is not limited thereto, but is intended to cover modifications and alternatives falling within the spirit and scope of the present invention as defined by the appended claims.

Claims (1)

1. The ZVS control type module power supply is characterized by comprising an input EMI filter circuit, a voltage and current spike suppression circuit, a power-down holding circuit, a flyback active clamp power conversion circuit, a planar power transformer, a synchronous rectification circuit, an output filter circuit, a signal sampling circuit, a flyback ZVS control circuit, a half-bridge driving circuit, an input voltage isolation sampling circuit and an auxiliary power supply circuit, wherein the input EMI filter circuit, the voltage and current spike suppression circuit, the power-down holding circuit, the flyback active clamp power conversion circuit, the planar power transformer, the synchronous rectification circuit, the output filter circuit, the signal sampling circuit and the flyback ZVS control circuit are sequentially connected; the flyback active clamp power conversion circuit, the flyback ZVS control circuit and the half-bridge driving circuit are sequentially connected end to form a loop; the power-down holding circuit is also connected with an input voltage isolation sampling circuit; the auxiliary power circuit is respectively connected with the input voltage isolation sampling circuit, the flyback ZVS control circuit and the half-bridge driving circuit; wherein:
The input EMI filter circuit is used for filtering and attenuating interference components in the input direct-current voltage and sending the filtered input direct-current voltage to the voltage-current peak suppression circuit;
The voltage and current peak suppression circuit is used for suppressing the peak of the filtered input direct current voltage output by the input EMI filter circuit and sending the suppressed direct current and direct current voltage to the power-down holding circuit;
The power-down maintaining circuit is used for outputting stable direct-current voltage when the input direct-current voltage is powered down so as to maintain the normal operation of the flyback active clamp power conversion circuit behind the power-down maintaining circuit; the input voltage isolation sampling circuit is also used for outputting stable direct-current voltage to the input voltage isolation sampling circuit;
The flyback active clamp power conversion circuit is used for chopping the direct-current voltage output by the power-down maintaining circuit into high-frequency alternating-current square-wave voltage, sending the high-frequency alternating-current square-wave voltage to the planar power transformer, sending a state signal to the flyback ZVS control circuit, and simultaneously, working in a ZVS soft switch working state according to the PWM signal sent by the half-bridge driving circuit;
The plane power transformer is used for coupling the high-frequency alternating-current square-wave voltage output by the flyback active clamp power conversion circuit into the high-frequency alternating-current square-wave voltage of the secondary side according to the turn ratio of 1/n, and sending the high-frequency alternating-current square-wave voltage to the synchronous rectification circuit;
The synchronous rectification circuit is used for rectifying the high-frequency alternating-current square-wave voltage of the secondary side output by the planar power transformer into high-frequency direct-current square-wave voltage and sending the high-frequency direct-current square-wave voltage to the output filter circuit;
the output filter circuit is used for filtering the high-frequency direct-current square wave voltage output by the synchronous rectification circuit into stable direct-current output voltage and outputting the stable direct-current output voltage to the signal sampling circuit;
The signal sampling circuit is used for converting direct-current output voltage samples output by the output filter circuit into voltage signals suitable for being collected by the flyback ZVS control circuit and sending the voltage signals to the flyback ZVS control circuit;
The flyback ZVS control circuit is used for sending PWM driving signals with different duty ratios and time sequences to the half-bridge driving circuit according to the state signals fed back by the flyback active clamp power conversion circuit and the voltage signals of the signal sampling circuit;
The half-bridge driving circuit is used for amplifying a PWM driving signal sent by the flyback ZVS control circuit and then sending the PWM driving signal to the flyback active clamping power conversion circuit so as to control the flyback active clamping power conversion circuit to work in a ZVS soft switch working state;
the auxiliary power circuit is used for converting input voltage into voltage required by the primary and secondary side chips and circuits and respectively supplying power for the flyback ZVS control circuit, the half-bridge driving circuit and the input voltage isolation sampling circuit;
The input voltage isolation sampling circuit is used for isolating and outputting the direct-current voltage signal output by the power-down maintaining circuit through the voltage division ratio of 1/K, and the isolated and output signal is a differential TTL level for an external singlechip or an upper computer to monitor the input voltage;
The input EMI filter circuit comprises a bidirectional transient suppression diode Z4, a differential mode inductance XL8, a common mode inductance COML1, a common mode capacitance C75, a differential mode capacitance C76, a differential mode capacitance C77, a differential mode capacitance C78 and a common mode capacitance C79; the bidirectional transient suppression diode Z4, the differential mode capacitor C78, the common mode inductor COML1, the differential mode capacitor C76, a series circuit formed by the common mode capacitor C75 and the common mode capacitor C79, and the differential mode capacitor C77 are sequentially connected in parallel to the two input ends +vin0 and PGND0 of the input EMI filter circuit, and the two output ends of the input EMI filter circuit are +vin1 and PGND1; meanwhile, a differential mode inductance XL8 is arranged between a series circuit consisting of a common mode capacitor C75 and a common mode capacitor C79 and the differential mode capacitor C77; the model of the bidirectional transient suppression diode Z4 is BYT16P-400; the values of the differential mode capacitor C76, the differential mode capacitor C77 and the differential mode capacitor C78 are 4.7uF/50V, the value of the common mode inductor COML1 is 280uH, the value of the differential mode inductor XL8 is 4.7uH, and the values of the common mode capacitor C75 and the common mode capacitor C79 are 4700pF/50V;
The voltage and current peak suppression circuit comprises a diode Z10, a fuse FS1, a power field tube Q12, a resistor R77, a resistor R78, a capacitor C86, a diode Z11, a resistor R79, a resistor R80, a capacitor C84, a capacitor C85 and a capacitor C83; the driving delay network consists of a resistor R77, a resistor R78, a capacitor C86 and a diode Z11; the diode Z10, the capacitor C84, the capacitor C85 and the driving delay network are sequentially connected in parallel to two output ends +VIN1 and PGND1 of the input EMI filter circuit, one end of the resistor R77 and one end of the resistor R78 are respectively connected with the output end +VIN1 of the input EMI filter circuit, the other end of the resistor R77 and the other end of the resistor R78 are jointly connected with the diode Z11, the capacitor C86 and the grid electrode of the power field tube Q12, and the other end of the capacitor C86 and the other end of the diode Z11 are respectively connected with the output end PGND1 of the input EMI filter circuit and the drain electrode of the power field tube Q12; the resistor R79 and the resistor R80 are respectively connected in parallel between two ends of the drain electrode and the source electrode of the power field tube Q12; a fuse FSI is arranged between the diode Z10 and the capacitor C84; one end of the capacitor C83 is connected with the output end +VIN2 of the voltage and current spike suppression circuit, the other end of the capacitor C83 is connected with the public end PGND2 and the source electrode of the power field tube Q12, and the output end of the voltage and current spike suppression circuit and the output end of the power failure holding circuit are both connected with the public end PGND2; the model of the diode Z10 is BYT16P-400, the model of the fuse tube FS1 is S6125-F, and the model of the power field tube Q12 is BSC014N04LS; the value of the resistor R77 is 10KΩ, the value of the resistor R78 is 2KΩ, the value of the capacitor C86 is 1uF/50V, the value of the resistor R79 is 10KΩ, the value of the resistor R80 is 5.1Ω, and the values of the capacitor C84, the capacitor C85 and the capacitor C83 are all 4.7uF/50V;
The power-down holding circuit comprises a power diode D27, an energy storage capacitor C100, an energy storage capacitor C101 and an energy storage capacitor C102; the power diode D27, one end of the energy storage capacitor C100, one end of the energy storage capacitor C101 and one end of the energy storage capacitor C102 are sequentially connected between the output end +VIN2 of the voltage and current spike suppression circuit and the output end +VIN3 of the power failure holding circuit, and the other end of the energy storage capacitor C100, the other end of the energy storage capacitor C101 and the other end of the energy storage capacitor C102 are all connected with the public end PGND2; the model number of the diode D27 is TZMB-GS 08; the values of the energy storage capacitor C100, the energy storage capacitor C101 and the energy storage capacitor C102 are 10uF/16V;
The flyback active clamp power conversion circuit comprises a power field tube Q1, a diode DQ1, a capacitor CQ1, a power field tube Qc, a diode DQc, a capacitor CQc, a resonant capacitor Cc, a transformer primary leakage inductance Lr, a transformer primary excitation inductance Lm and a capacitor C01; the drain electrode of the power field tube Qc is commonly connected with one end of the resonance capacitor Cc, one end of the diode DQc and one end of the capacitor CQc; the source electrode of the power field tube Qc is commonly connected with the other end of the diode DQc, the other end of the capacitor CQc, the drain electrode of the power field tube Q1, one end of the primary exciting inductance Lm of the transformer, one end of the diode DQ1 and one end of the capacitor CQ1, and the connection point is used as the input end G2 end of the flyback active clamping power conversion circuit to be connected with the half-bridge driving circuit; the grid electrode of the power field tube Qc is connected with the G1 end, and the G1 end is used as one input end of the flyback active clamping power conversion circuit and is connected with the half-bridge driving circuit; the other end of the resonance capacitor Cc is commonly connected with one end of a primary leakage inductance Lr of the transformer and one end of a capacitor C01, one input end of the common connection end serving as a flyback active clamping power conversion circuit is connected with an output end +VIN3 of a power failure holding circuit, and the other end of the capacitor C01 is connected with a common end PGND 2; the source electrode of the power field tube Q1 is commonly connected with the other end of the diode DQ1, the other end of the capacitor CQ1, one end of the current sampling resistor RS1 and one end of the current sampling resistor RS2, the connecting point is used as an output end P-CS end of the flyback active clamping power conversion circuit to be connected with the flyback ZVS control circuit, and the other end of the current sampling resistor RS1 and the current sampling resistor RS2 are connected with the other end public end PGND 2; the grid electrode of the power field tube Q1 is connected with the G3 end, and the G3 end is used as one input end of the flyback active clamping power conversion circuit and is connected with the half-bridge driving circuit; the model of the power field tube Qc is LY10N017LJ; the value of the capacitor C01 is 1uF/50V, the value of the resonance capacitor Cc is 0.1uF/50V, the values of the capacitor CQc and the CQ1 are 0.22uF/35V, and the values of the current sampling resistor RS1 and the current sampling resistor RS2 are 0.1R;
The planar power transformer comprises a magnetic core, a primary winding, a secondary winding and an auxiliary winding, wherein the primary winding, the secondary winding and the auxiliary winding are drawn on the multilayer PCB by adopting a planar transformer process to obtain the planar power transformer; an incoming line of the primary winding is used as a drain electrode of a power field tube Q1 of the flyback active clamp power conversion circuit, and an outgoing line of the primary winding is used as the other input end of the planar power transformer and is connected with the other end of a primary excitation inductance Lm of the transformer; the inlet end of the secondary winding is +VO1, the outlet end of the secondary winding is VDS, and the VDS is used as the output end of the planar power transformer and connected with the synchronous rectification circuit; the planar power transformer has eight layers, and the transformation ratio n is 3:4, wherein the first layer is a secondary winding, and a first turn of the secondary is placed; the second layer is a primary winding, and a primary first turn is placed; the third layer is a secondary winding, and a secondary second turn is placed; the fourth layer is a primary winding, and a secondary turn of the primary is placed; the fifth layer is a secondary winding, and a third turn of the secondary is placed; the sixth layer is a primary winding, and a third turn of the primary winding is placed; the seventh layer is a secondary winding, and a fourth turn of the secondary is placed; the eighth layer is an auxiliary winding, and the number of turns is 7; the final inductance was 4.5uH; wherein, the magnetic core adopts a EC19.6C magnetic core made of PEI452 material with the peak being the same; the primary leakage inductance Lr of the transformer has a value of 3.3uH, and the primary excitation inductance Lm of the transformer has a value of 0.47uH;
The flyback ZVS control circuit comprises a control chip IC6, a filter capacitor C20, a filter capacitor C21, a filter capacitor C23, a filter capacitor C24, a filter capacitor C25, a filter capacitor C26, a divider resistor R35, a divider resistor R36, a resistor R37, a resistor R38, a resistor R40, a resistor R41 and a resistor R42; the control chip IC6 is characterized in that a pin 1 is an input power supply pin, the pin 1 is connected with one end of a filter capacitor C21, and the connection point is used as an input power supply end VCC of a flyback ZVS control circuit to be connected with an auxiliary power supply module; the pin 2 is a grounding pin, and the pin 2 is commonly connected with the other end of the filter capacitor C21 and one end of the filter capacitor C24 and is grounded to the PGND end; the 3 pin is a current signal feedback pin, the 3 pin is connected with the other end of the filter capacitor C24, one end of the resistor R40 and one end of the resistor R41 together, the other end of the resistor R40 is used as the input end of the flyback ZVS control circuit to be connected with the P-CS end of the output end of the flyback active clamp power conversion circuit, and the other end of the resistor R41 is connected with the +VIN3 end of the power-down holding circuit; the 4 pin and the 5 pin are driving signal ends, and the driving signal ends are respectively connected with a half-bridge driving circuit as output ends of a flyback ZVS control circuit; the 6-pin is connected with an optocoupler feedback pin RUN;7, connecting a low-voltage driving SWS by a pin; the 8-pin is connected with a high-voltage driving HVG and externally connected with a filter capacitor C26 to the end of the ground PGND; the 9 pins are connected with an auxiliary winding of the planar power transformer and externally connected with a voltage detection resistor R42 to the end PGND; the 10 pin is connected with a 5V voltage reference REF end; 11 feet are connected with a switch EN; the 12 pins are connected with the voltage reference REF end of the filter capacitor C25 to 5V, and the voltage reference REF end is used as the input end of the flyback ZVS control circuit and is connected with the public end RE of the signal sampling circuit; 13 pins are connected with the resistor R38 to the end of the ground PGND; the 14 pin is connected with the resistor R37 to the ground PGND end; the 15 pin is commonly connected with one end of the filter capacitor C23, one end of the divider resistor R35 and one end of the divider resistor R36; the 16 pin and one end of the filter capacitor C20 and the other end of the divider resistor R35 are commonly connected to the 5V voltage reference REF end; the other end of the divider resistor R36 is connected with the other end of the filter capacitor C20 to the ground PGND end; the other end of the capacitor C23 is grounded to the PGND end; the value of the filter capacitor C20 is 0.1uF/50V, the value of the filter capacitor C21 is 0.22uF/35V, the value of the filter capacitor C23 is 220pF/50V, the values of the filter capacitor C24 and the filter capacitor C25 are 100pF/10V, and the value of the filter capacitor C26 is 2.2nF/10V; the value of the parameter setting voltage dividing resistor R35 is 270KΩ, the value of the voltage dividing resistor R36 is 51KΩ, the value of the resistor R37 is 200KΩ, the value of the resistor R38 is 120KΩ, the value of the resistor R40 is 2.2KΩ, the value of the resistor R41 is 33KΩ, and the value of the resistor R42 is 47KΩ;
The half-bridge driving circuit comprises a half-bridge driving chip IC2, a bootstrap capacitor C9 and a filter capacitor C11, wherein a pin 1 of the half-bridge driving chip IC2 is connected with one end of the filter capacitor C11 to a VCC end, VCC is used as an input power supply end of the half-bridge driving circuit to be connected with an auxiliary power supply module, and the other end of the filter capacitor C11 is grounded to a PGND end; the 2 pin is connected with one end of the bootstrap capacitor C9; the 3 pin is connected with the G1 end of the input end of the flyback active clamp power conversion circuit to control the on and off of the power field tube Qc; the 4 pin is connected with the input end G2 end of the flyback active clamp power conversion circuit and the other end of the bootstrap capacitor C9; the 5 feet and the 6 feet are suspended in the air; the 7 pin is used as an input end PWMH end of the half-bridge driving circuit and is connected with an output end of the feedback ZVS control circuit; the 8 pin is used as an input end PWML end of the half-bridge driving circuit and is connected with an output end of the feedback ZVS control circuit; the 9 pin is grounded to the PGND end; the 10 pin is connected with the G3 end of the input end of the flyback active clamp power conversion circuit, and controls the on and off of the power field tube Q1; the 7 th pin and the 8 th pin of the half-bridge driving circuit control chip IC2 are connected with the output end of the flyback ZVS control circuit; the model of the half-bridge driving chip IC2 is UCC27212DPR; the value of the bootstrap capacitor C9 is 47nF/50V, and the value of the filter capacitor C11 is 0.47uF/50V;
The synchronous rectification circuit comprises a power field tube Q10, a synchronous rectification driving chip IC1, a field tube driving circuit resistor R4, a field tube driving circuit resistor R5, a power supply pin capacitor C7 and resistors R3, R7 and R8 in a synchronous rectification driving chip peripheral control circuit; the 1 pin of the synchronous rectification chip IC1 is connected with one end of a field tube driving circuit resistor R4, the other end of the field tube driving circuit resistor R4 is commonly connected with one end of a field tube driving circuit resistor R5 and the grid electrode of a power field tube Q10, the other end of the field tube driving circuit resistor R5 is connected with an output ground SGND end, the 2 pin of the synchronous rectification chip IC1 is commonly connected with one end of a power supply pin capacitor C7 and the source electrode of the power field tube Q10, and the connecting point is used as the output end of the synchronous rectification circuit to be connected with an output filter circuit; the 3 pin of the synchronous rectification chip IC1 is connected with the drain electrode of the power field tube Q10, and the connection point is used as an input end of synchronous rectification and is connected with an output end VDS of the planar power transformer; the 4 pin of the synchronous rectification chip IC1 is connected with one end of a resistor R7; the 5 pin of the synchronous rectification chip IC1 is connected with one end of a resistor R8, the other end of the resistor R8 is connected with the other end of the resistor R7 to the SGND end of the output ground; the 6 pin of the synchronous rectification chip IC1 is commonly connected with the other end of the power supply pin capacitor C7 and one end of the resistor R3, and the other end of the resistor R3 is connected with the output filter circuit; the model of the power field tube Q10 is BSC014N04LS, and the model of the synchronous rectification driving chip IC1 is UCC24612; the values of the resistors R4 and R5 of the field tube driving circuit are 5.1Ω and 10KΩ respectively, the values of the resistor R7, the resistor R8 and the resistor R3 are 2KΩ, 2KΩ and 10KΩ respectively, and the value of the power supply pin capacitor C7 is 1uF/50V;
The output filter circuit comprises a filter capacitor C1, a filter capacitor C2, a filter capacitor C3 and an inductor XL1, wherein one end of the filter capacitor C2, one end of the filter capacitor C3 and one end of the inductor XL1 are commonly connected, and the connection point is used as one input end +VO1 of the output filter circuit to be connected with an output end VDS of the planar power transformer; the other end of the filter capacitor C2, the other end of the filter capacitor C3 and one end of the filter capacitor C1 are commonly connected, the connection point is used as the other input end VS of the output filter circuit to be connected with the output end of the synchronous rectification circuit, and meanwhile, the connection point is also used as the output ground SGND end of the output filter circuit; the other end of the inductor XL1 is commonly connected with the other end of the filter capacitor C1, and the connection point is used as an output end VOUT+ of the output filter circuit to be connected with the signal sampling circuit; the values of the filter capacitor C1, the filter capacitor C2 and the filter capacitor C3 are 100uF/50V, and the value of the inductor XL1 is 0.47uH;
The signal sampling circuit comprises a voltage division sampling resistor R27 and a resistor R32, wherein one end of the resistor R27 is connected with an output end VOUT+ of the output filter circuit, the other end of the resistor R27 and one end of the resistor R32 are commonly connected with a common end RE, and the common end RE is used as an output end of the signal sampling circuit and is connected with a flyback ZVS control circuit; the other end of the resistor R32 is connected with the SGND end of the output ground; the values of the voltage division sampling resistor R27 and the resistor R32 are 38KΩ and 10KΩ respectively;
The input voltage isolation sampling circuit comprises an isolation chip IC10, a filter capacitor C68, a filter capacitor C69, a power supply capacitor C-FG, a filter capacitor C-FG1, a resistor R55, a resistor R83, a resistor R56, a resistor R85, a resistor R81, a resistor R91, a resistor R97, a resistor R93, a resistor R94 and a voltage regulator tube Z3; the control chip IC10 selects an AMC1311B chip, a pin 1 of the control chip IC10 is a power supply end of a high-voltage side power supply, the pin 1 is commonly connected with one end of a resistor R97, one end of a voltage stabilizing tube Z3 and one end of a filter capacitor C68, the other end of the resistor R97 is connected with an output VCC end of an auxiliary power supply circuit, and the other end of the voltage stabilizing tube Z3 is grounded to a PGND end; the pin 2 of the control chip IC10 is an analog input end, the pin 2 is commonly connected with one end of a filter capacitor C69 and one end of a resistor R91, the other end of the resistor R91 is commonly connected with one end of a resistor R85 and one end of a resistor R56, the other end of the resistor R56 is connected with one end of a resistor R83, the other end of the resistor R83 is connected with the ends of resistors R55 and +VIN3, and the other end of the resistor R85 is connected with one end of a resistor R81; the 3 pin of the control chip IC10 is a closed input end, the 4 pin of the control chip IC10 is a high-voltage side analog ground end, the 3 pin and the 4 pin are in short circuit, and are commonly connected with the other end of the filter capacitor C68, the other end of the filter capacitor C69 and the other end of the resistor R81, and the connecting point is grounded to the PGND end; the 5 pin of the control chip IC10 is a low-voltage side analog grounding end and is grounded to a signal ground SGND end; the 6 pin of the control chip IC10 is a reverse analog output end, one end of a resistor R94 is connected, and the other end of the resistor R94 is connected with one end of a filter capacitor C-FG1 to the detection end of the ZVS control type module power supply for electromagnetic interference suppression; the pin 7 of the control chip IC10 is a non-reverse analog output end, one end of a resistor R93 is connected, and the other end of the resistor R93 is connected with the other end of a filter capacitor C-FG1 to the detection plus end of the ZVS control type module power supply for electromagnetic interference suppression; the 8 pin of the control chip IC10 is a low-voltage side power supply end, and is connected with one end of a power supply capacitor C-FG, and the other end of the power supply capacitor C-FG is connected with an output ground SGND end; the values of the resistor R55 and the resistor R83 are 10 omega, the resistor R56 is 39KΩ, the resistor R85 is 270 omega, the resistor R81 is 51KΩ, the resistor R91 is 10KΩ, the resistor R97 is 20 Ω, the resistor R93 is 22 Ω, the resistor R94 is 15KΩ, the filter capacitor C68 is 10nF/10V, the filter capacitor C69 is 0.1uF/50V, the capacitor C-FG is 0.47uF/50V, and the capacitor C-FG1 is 10nF/10V.
CN202310395343.1A 2023-04-14 2023-04-14 ZVS control type module power supply for electromagnetic interference suppression Active CN116155113B (en)

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