CN116129747A

CN116129747A - Display panel and display device

Info

Publication number: CN116129747A
Application number: CN202310088942.9A
Authority: CN
Inventors: 靳春明; 蔡可
Original assignee: Wuhan Tianma Microelectronics Co Ltd
Current assignee: Wuhan Tianma Microelectronics Co Ltd
Priority date: 2023-01-17
Filing date: 2023-01-17
Publication date: 2023-05-16
Anticipated expiration: 2043-01-17
Also published as: CN116129747B

Abstract

The invention relates to the technical field of display, in particular to a display panel and a display device. The display area comprises a plurality of signal lines extending along a first direction and arranged along a second direction, wherein each signal line comprises a first signal line, a second signal line and a third signal line, the first signal line is positioned in the second display area, the second signal line is positioned in the third display area, and the third signal line is positioned in the first display area; the first signal line is electrically connected to the conductive pad through a first connection line located in the display area, the second signal line is electrically connected to the conductive pad through a first fanout line located in the non-display area, and the third signal line is electrically connected to the conductive pad through a second fanout line located in the non-display area. According to the invention, the signal wire at the most edge is electrically connected with the bonding pad through the fanout wire, and the signal wire at the next edge is electrically connected with the bonding pad through the FIAA, so that a larger resistance-capacitance load caused by introducing a longer connecting wire is avoided, and the narrowing of the frame is facilitated.

Description

Display panel and display device

Technical Field

The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.

Background

Along with the development of display technology, consumers have higher requirements on the display effect of display products, the narrow frame becomes a new trend of the development of the display products, and FIAA (Fanout in AA) technology is adopted in the related technology, and signal lines positioned in the edge area of the display area are correspondingly connected with bonding pads of the binding area through connecting lines in a FIAA mode. Because no fan-shaped oblique lines are required to be arranged in the binding area, the width of the fan-out area is reduced, and the width of the lower frame is effectively reduced; but this solution brings load related problems.

Disclosure of Invention

In view of the above, the present invention provides a display panel and a display device.

In a first aspect, the present invention provides a display panel, including a display area and a non-display area surrounding the display area, the non-display area including a bonding area located at one side of the display area along a first direction, the bonding area including a plurality of conductive pads;

the display area comprises a plurality of signal lines extending along the first direction and arranged along a second direction, and the first direction and the second direction are intersected;

the display area comprises a first display area, a second display area and a third display area, the second display area is positioned between the first display area and the third display area along the second direction, and the third display area is positioned between the second display area and the non-display area;

the signal lines comprise a first signal line, a second signal line and a third signal line, the first signal line is positioned in the second display area, the second signal line is positioned in the third display area, and the third signal line is positioned in the first display area; the first signal line is electrically connected with the conductive pad through a first connection line located in the display area, the second signal line is electrically connected with the conductive pad through a first fanout line located in the non-display area, and the third signal line is electrically connected with the conductive pad through a second fanout line located in the non-display area.

In a second aspect, based on the same inventive concept, the present invention provides a display device including the display panel provided in the first aspect of the present invention.

Compared with the related art, the display panel and the display device provided by the invention have the advantages that at least the following effects are realized:

the display panel provided by the invention is characterized in that a display area is divided into a first display area, a second display area and a third display area, wherein the second display area is positioned between the first display area and the third display area, and the third display area is positioned between the second display area and the non-display area; in the leading-out mode of the signal lines of each display area to the conductive bonding pad of the binding area, electrically connecting a first signal line positioned in a second display area with the conductive bonding pad through a first connecting line positioned in the display area, and electrically connecting a second signal line positioned in a third display area with the conductive bonding pad through a first fanout line positioned in a non-display area; namely, the second signal line at the most edge is electrically connected with the conductive bonding pad through the first fanout line, and the first signal line at the next edge is electrically connected with the conductive bonding pad through the first connecting line, so that the phenomenon that part of signal connecting lines are overlong due to the fact that the signal lines of the second display area and the third display area are all in a FIAA mode is avoided, and the resistance-capacitance load of the signal connecting lines is effectively reduced.

Of course, it is not necessary for any one product embodying the invention to achieve all of the technical effects described above at the same time.

Other features of the present invention and its advantages will become apparent from the following detailed description of exemplary embodiments of the invention, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.

FIG. 1 is a schematic diagram of a display panel according to the related art;

fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the invention;

FIG. 3 is a schematic diagram of a display panel according to an embodiment of the invention;

FIG. 4 is a schematic diagram showing a layout of a shift register of a display panel according to the present invention;

FIG. 5 is a diagram showing the structure of the film layer at A-A in FIG. 4;

FIG. 6 is a view showing another construction of the membrane layer at A-A in FIG. 4;

FIG. 7 is a schematic diagram showing a partial connection structure of a shift register according to an embodiment of the present invention;

FIG. 8 is a schematic diagram showing a partial connection structure of a shift register according to the related art;

fig. 9 is a schematic structural diagram of a display device according to an embodiment of the invention.

Detailed Description

Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless it is specifically stated otherwise.

The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the invention, its application, or uses.

Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail, but are intended to be part of the specification where appropriate.

In all examples shown and discussed herein, any specific values should be construed as merely illustrative, and not a limitation. Thus, other examples of exemplary embodiments may have different values.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Accordingly, it is intended that the present invention covers the modifications and variations of this invention provided they come within the scope of the appended claims (the claims) and their equivalents. The embodiments provided by the embodiments of the present invention may be combined with each other without contradiction.

It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further discussion thereof is necessary in subsequent figures.

A display panel comprises a display area and a non-display area surrounding the display area, wherein the non-display area comprises a binding area positioned on one side of the display area along a first direction, and the binding area comprises a plurality of conductive bonding pads; the display area comprises a plurality of signal lines extending along the first direction and arranged along the second direction, and the first direction is intersected with the second direction; the display area comprises a first display area, a second display area and a third display area, the second display area is positioned between the first display area and the third display area along the second direction, and the third display area is positioned between the second display area and the non-display area; the signal wire comprises a first signal wire, a second signal wire and a third signal wire, the first signal wire is positioned in the second display area, the second signal wire is positioned in the third display area, and the third signal wire is positioned in the first display area; the first signal line is electrically connected to the conductive pad through a first connection line located in the display area, the second signal line is electrically connected to the conductive pad through a first fanout line located in the non-display area, and the third signal line is electrically connected to the conductive pad through a second fanout line located in the non-display area.

The foregoing is the core idea of the present invention, and the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments that may be obtained by a person of ordinary skill in the art without making any inventive effort are within the scope of the embodiments of the present invention.

Fig. 1 is a schematic structural view of a display panel in the related art, and fig. 1 is a schematic structural view of a display panel in the related art, wherein the display panel includes a display area AA and a non-display area BA surrounding the display area, the non-display area BA includes a bonding area BD located at one side of the display area along a first direction Y, and the bonding area BD includes a plurality of conductive pads CA; the display area AA comprises a plurality of signal lines extending along a first direction Y and arranged along a second direction X, and the first direction Y and the second direction X are intersected; the display area comprises a first display area A1 and a second display area A2, and the second display area A2 is positioned between the first display area A1 and the non-display area BA along the second direction X; the signal lines comprise a first signal line S1, a second signal line S2 and a third signal line S3, the first signal line S1 and the second signal line S2 are both positioned in a second display area A2, the first signal line S1 is arranged close to the first display area A1, the second signal line S2 is arranged close to a non-display area BA, and the third signal line S3 is positioned in the first display area A1; the first signal line S1 is introduced into the first display area A1 through a first section of the first connection line J1 and is connected to the conductive pad CA through a second section of the first connection line J1; the second signal line S2 is introduced into the first display area A1 through a first section of the second connection line J2 and is connected to the conductive pad CA through a second section of the second connection line J2; the third signal line S3 is connected directly to the conductive pad CA through the fanout line.

In the scheme shown in fig. 1, all signal lines in the second display area A2 are connected with the conductive pad CA by way of FIAA, and although the width of the fan-out area is reduced and the width of the lower frame is reduced by this structural form, as can be seen from the schematic diagram of fig. 1, the wiring length of the first connection line J2 is too long on the path that the second signal line S2 is connected with the conductive pad CA through the first connection line J1, thereby generating the problem of increasing the resistance-capacitance load (RC Loading).

In view of the above, the present invention provides a display panel, and fig. 2 is a schematic structural diagram of the display panel provided by the present invention.

The display panel of the present invention includes a display area AA ' and a non-display area BA ' surrounding the display area, the non-display area BA ' including a bonding area BD ' located at one side of the display area AA ' along a first direction Y, the bonding area BD ' including a plurality of conductive pads CA '; the display area AA' comprises a plurality of signal lines extending along a first direction Y and arranged along a second direction X, and the first direction Y and the second direction X are intersected; the display area AA 'includes a first display area A1', a second display area A2 'and a third display area A3', the second display area A2 'is located between the first display area A1' and the third display area A3 'along the second direction X, and the third display area A3' is located between the second display area A2 'and the non-display area BA'; the signal lines include a first signal line S1', a second signal line S2', and a third signal line S3', the first signal line S1' is located in the second display area A2', the second signal line S2' is located in the third display area A3', and the third signal line S3' is located in the first display area A1'; the first signal line S1 'is electrically connected to the conductive pad CA' through a first connection line J1 'located in the display area AA', the second signal line S2 'is electrically connected to the conductive pad CA' through a first fanout line J2 'located in the non-display area BA', and the third signal line S3 'is electrically connected to the conductive pad CA' through a second fanout line J3 'located in the non-display area BA'.

With continued reference to fig. 2, the first signal line S1 'of the present invention is electrically connected to the conductive pad CA' through the first connection line J1 'located in the display area AA', the second signal line S2 'is electrically connected to the conductive pad CA' through the first fanout line J2 'located in the non-display area BA', and the third signal line S3 'is electrically connected to the conductive pad CA' through the second fanout line J3 'located in the non-display area BA'. By such a layout structure, the wiring length of the second signal line S2' connected to the conductive pad CA ' is greatly reduced, so that the resistance-capacitance load (RC Loading) is reduced, and the first signal line S1' is connected to the conductive pad CA ' through the first connection line J1' located in the display area, which contributes to the reduction of the width of the fan-out area.

Alternatively, the first signal line S1', the second signal line S2', and the third signal line S3' mentioned in the embodiments of the present invention include data lines for transmitting data signals to the subpixels in the display panel.

Although only a few signal lines are shown in fig. 1 and 2, for example, only one first signal line S1 'is shown in the second display area A2' in fig. 2, the signal lines in fig. 1 and 2 are merely illustrative for the connection structure between the signal lines and the conductive pads in the display areas, which do not represent the only signal lines shown in the respective display areas.

It should be further noted that fig. 2 of the present embodiment is only an exemplary structure of a display panel, and the structure of the display panel includes, but is not limited to, but may also include other structures, such as a film structure, a pixel circuit, a driving circuit, etc. of the display panel, which are not described herein, and the structure of the display panel in the related art may be specifically understood. Moreover, fig. 2 illustrates this embodiment by taking a rounded rectangular shape of the display panel as an example, and in some other embodiments of the present invention, the shape of the display panel may also be embodied as other shapes, such as a circle, an ellipse, or any other feasible shape.

Fig. 3 is a schematic view of a portion of a display panel according to an embodiment of the present invention, please refer to fig. 3, in some alternative embodiments of the present invention, a non-display area BA 'of the present invention includes a special-shaped area DA', and the special-shaped area DA 'is located on at least one side of a binding area BD' along a second direction; the shaped area DA ' includes a first arc-shaped edge D1' adjacent to the display area, and at least a portion of the line segments in the first fanout line J2' are located in the shaped area DA ' and routed along the first arc-shaped edge D1 '.

Specifically, the first signal line S1 'located in the second display area A2' is connected to the conductive pad CA 'through the first connection line J1' located in the display area, and the fanning line between the first connection line J1 'and the conductive pad may not occupy the space of the special-shaped area DA' (R corner frame) any more, so that the routing manner can save the routing space of the lower frame, especially the special-shaped area DA ', and realize the narrow frame design of the area corresponding to the special-shaped area DA'. In addition, the manner that the first fanout line J2' is close to and routed along the first arc edge D1' is also beneficial to reducing the frame width of the area corresponding to the special-shaped area DA ', and is also beneficial to realizing narrow frame design. Therefore, the present invention reduces the resistance-capacitance load (RC Loading) by connecting the first signal line S1 'with the conductive pad electric CA' through the first connection line J1 'located in the display area, simultaneously electrically connecting the second signal line S2' located in the third display area A3 'with the conductive pad CA' through the first fanout line J2 'located in the non-display area BA', and causing a partial line segment of the first fanout line J2 'to be located in the abnormal area DA' and routed along the first arc edge D1', thus reducing the R-angle frame width while also contributing to the reduction of the routing length of the first fanout line J2'.

Fig. 4 is a schematic diagram of a display panel according to the present invention, referring to fig. 4, in some alternative embodiments of the present invention, the display panel further includes a plurality of cascaded shift registers 10 'located in the non-display area BA', at least a portion of the shift registers 10 'being located in the special-shaped area DA'; in the profile area DA ', at least part of the first fanout line J2' overlaps the shift register 10' in a third direction, which is a thickness direction of the display panel.

Referring to fig. 4, in some alternative embodiments of the present invention, a plurality of cascaded shift registers 10 'are located in a left frame, a right frame, and two left and right profiled areas DA' of the display panel, and a first fanout line J2 'overlaps the shift registers 10'; as can be seen from fig. 4, the second signal line S2' extends out of the third display area A3' along the first direction, and is then connected to the conductive pad CA ' through the first fanout line J2', where the first fanout line J2' overlaps the shift register 10' during the routing process, so that the routing length of the first fanout line J2' can be further reduced, the resistance-capacitance load (RC Loading) can be reduced, and the frame width can be reduced.

Note that, in fig. 4, only the arrangement of the shift registers is illustrated, and the connection relationship between the different shift registers is not shown, and actually, the shift registers located on the same side of the display area are in a cascade relationship.

Referring to fig. 5, fig. 5 shows a film structure diagram at A-A in fig. 4, and as shown in fig. 5, in the special-shaped area DA', the display panel includes a substrate 00, a buffer layer 01, an active layer P, a first metal layer M1, a second metal layer M2, a third metal layer M3, a fourth metal layer M4, a fifth metal layer M5, and further includes a first insulating layer J1, a second insulating layer J2, a third insulating layer J3, a fourth insulating layer J4, and a fifth insulating layer J5; the first insulating layer J1 is located between the first metal layer M1 and the active layer p, the second insulating layer J2 is located between the first metal layer M1 and the second metal layer M2, the third insulating layer J3 is located between the second metal layer M2 and the third metal layer M3, the fourth insulating layer J4 is located between the third metal layer M3 and the fourth metal layer M4, and the fifth insulating layer J5 is located between the fourth metal layer M4 and the fifth metal layer M5.

With reference to fig. 5, the shift register 10 'is a circuit formed by combining a plurality of TFTs and metal traces, and in fig. 5, the first metal layer M1, the second metal layer M2, the third metal layer M3, and the fourth metal layer M4 can be used as signal traces of the shift register 10' by punching; in fig. 5, a TFT with a gate capacitor (the second metal layer M2 forms a capacitor with the first metal layer M1) is shown in a dashed line box V, and is an integral part of the shift register 10'; the fifth metal layer M5 in fig. 5 serves as a wiring layer of the first fanout line J2', and thus, the first fanout line J2' overlaps the shift register 10 '.

In some alternative embodiments of the present invention, as shown in fig. 4, in the profile area DA ', the shift registers 10' are arranged along the first arc-shaped edge D1 '. When the shift registers 10' are not arranged along the first arc-shaped edge D1', the shift registers 10' located in the abnormal region are expanded outwardly in a direction away from the display region with respect to the first arc-shaped edge D1', which will definitely increase the frame width of the abnormal region DA '. In this embodiment, when the shift registers in the special-shaped area DA 'are arranged along the first arc edge D1', the distance between the shift registers 10 'and the first arc edge D1' is greatly reduced, which is beneficial to saving the layout space of the special-shaped area DA ', and thus, is also beneficial to reducing the frame width of the special-shaped area DA'.

In some alternative embodiments of the present invention, a signal shielding layer M6 is disposed between the first fanout line J2 'and the shift register 10' in the third direction.

Specifically, in consideration of the fact that a plurality of signal lines and a plurality of transistors are provided in the shift register 10', when there is overlap between the first fanout line J2' and the shift register 10' in the third direction, coupling capacitance may occur between the first fanout line J2' and the signal lines or transistors in the shift register 10', and signals may interfere with each other. Referring to fig. 6, fig. 6 is a diagram illustrating another film structure at A-A in fig. 4, and the structure shown in fig. 6 is different from the structure shown in fig. 5 in that a signal shielding layer M6 and a sixth insulating layer J6 are added between a fourth metal layer M4 and a fifth insulating layer J5, and the signal shielding layer M6 is a metal shielding layer. In this embodiment, the signal shielding layer M6 is disposed between the first fanout line J2 'and the shift register 10', so that the signal shielding layer M6 is used to block the interference of the shift register 10 'to the signal on the first fanout line J2', and also can block the interference of the signal on the first fanout line J2 'to the signal on the shift register 10', thereby being beneficial to improving the accuracy and stability of the signals transmitted by the first fanout line J2 'and the shift register 10'.

In some alternative embodiments of the present invention, at least some of the segments of the first fanout line J2 'and the first connecting line J1' are arranged in the same layer.

Specifically, referring to fig. 2, in some alternative embodiments of the present invention, the first connecting line J1' includes a second line segment J1' -2 extending along the second direction X and a first line segment J1' -1 extending along the first direction Y, wherein the first line segment J1' -1 and the second line segment J1' -2 may be located in different film layers; referring to fig. 6, for example, the second line segment J1' -2 of the first connecting line J1' may be located in the third metal layer M3 or the fourth metal layer M4, the first line segment J1' -1 of the first connecting line J1' may be located in the fifth metal layer M5, and the first fanout line J2' may also be located in the fifth metal layer M5; the first signal line S1', the second signal line S2', and the third signal line S3' may be located at the fifth metal layer M5, or at the third metal layer M3 and the fourth metal layer M4.

In addition, the fifth metal layer M5 may be a new metal layer, the first signal line S1 'is routed in the display area through the first connection line J1', and the two special-shaped areas DA 'corresponding to the fifth metal layer M5 are not utilized, so that the first fanout line J2' and the first line segment J1'-1 of the first connection line J1' may be arranged on the same layer, so that the first fanout line J2 'is routed in the two special-shaped areas DA' of the fifth metal layer, thereby fully utilizing the layout space of the fifth metal layer M5, not increasing the frame area, and reducing the RC loading of the signal line.

The first fanout line J2' and the first line segment J1' -1 of the first connecting line J1' are arranged in the same layer, so that the film structure can be simplified on one hand; on the other hand, the first fanout line J2 'can be manufactured in the same process with the first line segment J1' -1, and the manufacturing process is also beneficial to simplification.

Fig. 7 is a schematic diagram showing a partial connection structure of a shift register according to an embodiment of the present invention, referring to fig. 7, in some alternative embodiments of the present invention, a display area AA ' further includes a plurality of scan lines 11', wherein the scan lines 11' extend along a second direction and are arranged along a first direction; the shift registers 10' located in the shaped area DA ' are each connected to at least one scan line 11 '.

Specifically, the shift registers 10 'located in the special-shaped area DA' are all connected to at least one scan line 11', that is, the shift registers 10' in the special-shaped area DA 'are all valid, and no invalid shift registers 10' exist, so that the number of shift registers in the non-display area can be reduced, which is beneficial to frame compression.

Referring to fig. 7, in some alternative embodiments of the present invention, the scan line 11' connected to the shift register 10' of the shaped area DA ' of the present invention includes a first scan line 111' and at least one second scan line 112', the first scan line 111' is electrically connected to the shift register 10' after extending to the first arc edge D1', and the second scan line 112' is electrically connected to the shift register 10' through a scan connection line 113' located in the display area.

FIG. 8 is a schematic diagram showing a partial connection structure of a shift register according to the related art; referring to fig. 4 and 8, in the non-display area BA ', the shift registers 10' are designed and arranged along the corner areas (the special-shaped area DA ') between the left frame, the right frame, the left frame and the lower frame and the corner areas (the special-shaped area DA') between the right frame and the lower frame, an array of the shift registers 10 'is generated during the design process, then the shift register 10' closest to the pixel row is selected to access the scan line 11 'according to the position of the pixel row in the display panel, and the rest are the ineffective shift registers 10'; as shown in fig. 8, shift register VSR1 is an active shift register, and shift register VSR2 is an inactive shift register. Since the shift register VSR2 is not effective in the array of the shift register 10', the array length of the shift register 10' is long, and the shift registers 10 arranged in the profile area DA ' are also more.

With continued reference to fig. 7, in the present invention, during the design arrangement of the shift registers 10', each shift register 10' is connected to the scan line 11', and no invalid shift registers 10' exist, so that the overall number of shift registers 10 'is reduced, the array length of the shift registers 10' is shortened, and the number of shift registers 10 'arranged in the special-shaped area DA' is reduced, so that the probability of overlapping the first fanout line J2 'and the shift registers 10' is reduced, and mutual signal interference when the first fanout line J2 'overlaps the shift registers 10' is avoided.

With continued reference to fig. 7, since the shift registers 10' are arranged in the left frame, the right frame and the corner regions (the special-shaped region DA '), but it cannot be guaranteed that each shift register 10' is located in the extending direction of the scan line 11', the scan line 11' connected to the shift register 10' in the special-shaped region DA ' of the present invention includes a first scan line 111' and at least one second scan line 112', the first scan line 111' is electrically connected to the shift register 10' after extending to the first arc edge D1', and the second scan line 112' is electrically connected to the shift register 10' through the scan connection line 113' located in the display region.

Referring to fig. 5 and fig. 7, in some alternative embodiments of the present invention, at least a portion of the scan lines 113 'and 112' are arranged in different layers.

Specifically, since the wiring space is limited, when the wiring space is insufficient, the scan line 113' may be wired through another metal layer or a newly added metal layer, and the scan line 113' may be connected to the scan line 112' through a connection hole. In addition, the different layer arrangement of the scan connection line 113 'and the second scan line 112' can increase the interval between the signal lines to a certain extent, and reduce the generation of coupling capacitance. For example, the scan signal line 112 'is located on the first metal layer M1, and the scan connection line 113' may be located on another metal layer, such as the second metal layer M2 or the third metal layer M3.

In some alternative embodiments of the present invention, the scan connection line 113 'of the present invention is disposed at least partially in the same layer as the first connection line J1'.

Referring to fig. 4 and fig. 7, specifically, the scan connection line 113' and the second line segment J1' -2 of the first connection line J1' may be arranged in the same layer, so that the film structure may be simplified; on the other hand, the scan connection line 113' and the second line segment J1' -2 of the first connection line J1' are manufactured in the same process, which is beneficial to simplifying the manufacturing process.

With continued reference to fig. 5, in some alternative embodiments of the present invention, the first connection line J1 'is disposed at a different layer from the first signal line S1'. Specifically, the signal line of the present invention may be a data signal line, the data signal line is located in the third metal layer M3 or the fourth metal layer M4, the first connection line J1 'may be located in the fifth metal layer M5, and the scan signal line 112' is located in the first metal layer M1 or the second metal layer M2. Thus, the inter-metal parasitic capacitance can be reduced.

With continued reference to fig. 2, in some alternative embodiments of the present invention, the first connection line J1' of the present invention includes a first line segment J1' -1 and a second line segment J1' -2 electrically connected to each other, wherein the first line segment J1' -1 extends along the first direction Y, the second line segment J1' -2 extends along the second direction X, the second line segment J1' -2 is electrically connected to the first signal line S1', and the first line segment J1' -1 is electrically connected to the conductive pad CA '.

Based on the same inventive concept, the present invention also provides a display device, please refer to fig. 9, fig. 9 is a schematic structural diagram of a display device provided in an embodiment of the present invention, and the display device 200 provided in the embodiment includes the display panel 100 provided in any of the above embodiments of the present invention.

It should be understood that the display device 200 provided in the embodiment of the present invention may be a computer, a mobile phone, a tablet, or other display devices with display functions, which is not limited in this way. The display device provided by the embodiment of the present invention has the beneficial effects of the display panel provided by the embodiment of the present invention, and the specific description of the display panel in the above embodiments may be referred to specifically, and this embodiment is not repeated here.

In summary, the display panel and the display device provided by the invention at least realize the following beneficial effects:

first, the first signal line S1' of the present invention is electrically connected to the conductive pad CA ' through the first connection line J1' located in the display area, the second signal line S2' is electrically connected to the conductive pad CA ' through the first fanout line J2' located in the non-display area BA ', and the third signal line S3' is electrically connected to the conductive pad CA ' through the second fanout line J3' located in the non-display area BA '. The layout structure greatly reduces the wiring length of the second signal line S2' connected to the conductive pad CA ', so that the resistance-capacitance load (RC Loading) is reduced, and meanwhile, the first signal line S1' is connected with the conductive pad CA ' through the first connecting line J1' in the display area, thereby being beneficial to reducing the width of the fan-out area; next, the present invention reduces a resistance-capacitance load (RC Loading) by electrically connecting the first signal line S1 'with the conductive pad electrical CA' through the first connection line J1 'located in the display area, and simultaneously electrically connecting the second signal line S2' located in the third display area A3 'with the conductive pad CA' through the first fanout line J2 'located in the non-display area BA', and causing a partial line segment of the first fanout line J2 'to be located in the abnormal area DA' and routed along the first arc edge D1', thus reducing the R-angle frame width while also contributing to the reduction of the routing length of the first fanout line J2'. Again, the first fanout line J2' of the present invention overlaps the shift register 10' during the wiring process, so that the wiring length of the first fanout line J2' can be further reduced, the resistance-capacitance load (RC Loading) is reduced, and the frame width is also reduced; in addition, in the design arrangement of the shift registers 10', each shift register 10' is connected to the scanning line 11', and no invalid shift registers 10' exist, so that the overall number of the shift registers 10 'is reduced, the array length of the shift registers 10' is shortened, the number of the shift registers 10 'arranged in the special-shaped area DA' is reduced, the overlapping probability of the first fanout line J2 'and the shift registers 10' is reduced, and mutual signal interference when the first fanout line J2 'and the shift registers 10' overlap is avoided. Finally, the first connection line J1 'and the first signal line S1' are arranged in different layers, so that parasitic capacitance between metal layers can be reduced.

While certain specific embodiments of the invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. A display panel comprising a display area and a non-display area surrounding the display area, wherein the non-display area comprises a binding area positioned on one side of the display area along a first direction, and the binding area comprises a plurality of conductive pads;

2. The display panel of claim 1, wherein the non-display region comprises a shaped region, the shaped region being located on at least one side of the binding region along the second direction; the special-shaped area comprises a first arc-shaped edge adjacent to the display area, and at least part of line segments in the first fanout line are positioned in the special-shaped area and are distributed along the first arc-shaped edge.

3. The display panel of claim 2, further comprising a plurality of cascaded shift registers located in a non-display region, at least a portion of the shift registers being located in the profiled region;

and in the special-shaped area, at least part of the first fanout lines are overlapped with the shift register along a third direction, wherein the third direction is the thickness direction of the display panel.

4. A display panel as claimed in claim 3, characterized in that in the profiled region the shift registers are arranged along the first arcuate edge.

5. A display panel according to claim 3, wherein a signal shielding layer is provided between the first fanout line and the shift register along the third direction.

6. A display panel according to claim 3, wherein the first fanout line is arranged at least partially in the same layer as the first connection line.

7. A display panel according to claim 3, wherein the display area further comprises a plurality of scan lines extending in the second direction and arranged in the first direction; and the shift registers positioned in the special-shaped area are connected with at least one scanning line.

8. The display panel of claim 7, wherein the scan lines connected to the shift register of the shaped region include a first scan line and at least one second scan line, the first scan line extending to the first arcuate edge and electrically connected to the shift register, the second scan line electrically connected to the shift register through a scan connection line located in the display region.

9. The display panel of claim 8, wherein the scan lines and the second scan lines are at least partially arranged in a different layer.

10. The display panel of claim 8, wherein the scan lines are at least partially co-layered with the first lines.

11. The display panel according to claim 1, wherein the first connection line is provided different from the first signal line.

12. The display panel of claim 1, wherein the first connection line includes a first line segment and a second line segment electrically connected to each other, wherein the first line segment extends in the first direction, the second line segment extends in the second direction, the second line segment is electrically connected to the first signal line, and the first line segment is electrically connected to the conductive pad.

13. A display device comprising the display panel according to any one of claims 1 to 12.