CN115985954A - Manufacturing method for improving polycrystalline morphology of SGT product - Google Patents

Manufacturing method for improving polycrystalline morphology of SGT product Download PDF

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Publication number
CN115985954A
CN115985954A CN202310015042.1A CN202310015042A CN115985954A CN 115985954 A CN115985954 A CN 115985954A CN 202310015042 A CN202310015042 A CN 202310015042A CN 115985954 A CN115985954 A CN 115985954A
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China
Prior art keywords
polycrystalline
sgt
polycrystal
inflection point
groove
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Pending
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CN202310015042.1A
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Chinese (zh)
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张熠鑫
贾国
苏晓山
王大明
卢昂
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Shenzhen Jihua Weite Electronic Co ltd
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Shenzhen Jihua Weite Electronic Co ltd
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Priority to CN202310015042.1A priority Critical patent/CN115985954A/en
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Abstract

The application discloses a manufacturing method for improving polycrystalline morphology of an SGT product, which comprises the following steps: etching a groove, wherein the groove is provided with an inflection point, the lower part of the inflection point is used for accommodating polycrystal, and the width of the groove at the upper part of the inflection point is larger than that of the groove at the lower part of the inflection point; oxidizing and carrying out polycrystalline precipitation on the groove in sequence, and then carrying out annealing treatment; carrying out polycrystal etching to form a polycrystal expected appearance; and (3) oxidizing the integral structure to completely oxidize the abnormal part of the polycrystal, and taking out the generated oxide layer to obtain the final appearance of the polycrystal. The technical scheme of the application solves the problem that the existing polycrystalline surface of the SGT MOSFET is uneven to cause product failure.

Description

Manufacturing method for improving polycrystalline morphology of SGT product
Technical Field
The application relates to the technical field of semiconductors, in particular to a manufacturing method for improving polycrystalline morphology of an SGT product.
Background
An SGT (Shielded Gate Transistor) MOSFET is a new type of power semiconductor device. The SGT process is simpler than a common trench and has less switching loss. In addition, the SGT is 3-5 times deeper than the conventional trench process, and more epitaxial volume can be used to block voltage, which also makes the internal resistance of the SGT more than 2 times lower than that of the conventional MOSFET.
In the prior art, in the manufacturing process of the SGT MOSFET, due to defects of a manufacturing process, polycrystalline edge abnormality occurs after etching due to uneven surface after polycrystalline deposition, and the structure can cause gate-source breakdown failure.
Disclosure of Invention
The application provides a manufacturing method for improving polycrystalline morphology of an SGT product, and solves the problem that the existing polycrystalline surface of an SGT MOSFET is uneven, so that the product fails.
The embodiment of the application provides a manufacturing method for improving polycrystalline morphology of an SGT product, which comprises the following steps:
s1: etching a groove, wherein the groove is provided with an inflection point, the lower part of the inflection point is used for accommodating polycrystal, and the width of the groove at the upper part of the inflection point is larger than that of the groove at the lower part of the inflection point;
s2: oxidizing and carrying out polycrystalline precipitation on the groove in sequence, and then carrying out annealing treatment;
s3: carrying out polycrystal etching to form a polycrystal expected shape;
s4: and (3) oxidizing the whole structure to completely oxidize the abnormal part of the polycrystal, and taking out the generated oxide layer to obtain the final shape of the polycrystal.
In some embodiments, in step S1, the trench width at the upper portion of the inflection point gradually increases from the inflection point.
In some embodiments, the inside of the trench above the inflection point is disposed in a slope structure.
In some embodiments, the grooves are arranged in a Y-shaped structure as a whole.
In some embodiments, in step S2, after the poly deposition, poly fills the trench.
In some embodiments, the poly is taller than the trench.
In some embodiments, the height of the polycrystalline desired morphology is higher than the height of the polycrystalline final morphology.
Compared with the prior art, the beneficial effects of this application are: the manufacturing process of the existing SGT product is improved, the process structure and the process conditions are adjusted, and the problem that the chip fails due to abnormal polycrystalline morphology of the SGT product is effectively solved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art according to the structures shown in the drawings without creative efforts.
FIG. 1 is a diagram of an SGT product obtained by a conventional manufacturing process;
FIG. 2 is an enlarged view of FIG. 1 at A;
fig. 3 is a diagram of an SGT product corresponding to step S1 in the present application;
fig. 4 is a diagram of an SGT product corresponding to step S2 in the present application;
FIG. 5 is an enlarged view at C of FIG. 4;
fig. 6 is a diagram of an SGT product corresponding to step S3 in the present application;
fig. 7 is a diagram of an SGT product corresponding to step S4 in the present application;
the implementation, functional features and advantages of the objectives of the present application will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
In the prior art, the appearance of a groove, an oxidation process, a polycrystal deposition process and an etching process mainly affect the appearance of a polycrystal, and due to the difference of the processes, the appearance of the polycrystal is abnormal as shown in a position B in fig. 1 for an SGT product, and meanwhile, the internal gap of the polycrystal is large, which can refer to fig. 2; the abnormal appearance of the polycrystal can cause electric field concentration in the chip testing and application processes, so that the breakdown failure of a grid source electrode is caused.
Therefore, the manufacturing method for improving the polycrystalline morphology of the SGT product, proposed by this embodiment, includes the following steps:
s1: performing trench etching, referring to fig. 3, the trench is provided with an inflection point, the lower part of the inflection point is used for accommodating polycrystalline, and the width of the trench at the upper part of the inflection point is greater than that of the trench at the lower part of the inflection point;
it should be noted that, in step S1, the trench width at the upper portion of the inflection point gradually increases from the inflection point. In this embodiment, the inner side of the trench at the upper portion of the inflection point is in an inclined plane structure, and the trench is integrally in a Y-shaped structure, so that subsequent polycrystalline precipitation, etching and oxidation treatment are facilitated. Further, the specific position of the inflection point can be set according to the actual polycrystal height so as to meet the requirements of different polycrystal heights.
S2: sequentially carrying out oxidation and polycrystalline precipitation on the groove, and then carrying out annealing treatment;
referring to fig. 4, in step S2, the trench is oxidized to cover the entire trench interior and the trench outer edge, and in the poly deposition process, the poly fills the entire trench and has a height higher than the trench and extends to the region where the trench outer is oxidized; meanwhile, after the oxidation and polycrystal precipitation processes, the return treatment is carried out, so that the polycrystal grains are reconstructed, the surface of the polycrystal grains is smoother, and the density problem of cavities in the deposition process is reduced. Reference may be made to FIG. 5;
s3: carrying out polycrystal etching to form a polycrystal expected appearance; referring to fig. 6, the extra poly outside and inside the trench is etched, and the recess caused by the previous poly deposition process cannot be completely removed, so that the desired morphology of the poly is obtained in this step, and a certain recess still exists.
S4: referring to fig. 7, the whole structure is oxidized to completely oxidize the abnormal portion of the polycrystal, and the generated oxide layer is taken out to obtain the final morphology of the polycrystal.
The above description is only a preferred embodiment of the present application, and not intended to limit the scope of the present application, and all the equivalent structures or equivalent processes that can be directly or indirectly applied to other related technical fields by using the contents of the specification and the drawings of the present application are also included in the scope of the present application.

Claims (7)

1. A manufacturing method for improving polycrystalline morphology of SGT products is characterized by comprising the following steps:
s1: performing groove etching, wherein the groove is provided with an inflection point, the lower part of the inflection point is used for accommodating polycrystal, and the width of the groove at the upper part of the inflection point is larger than that of the groove at the lower part of the inflection point;
s2: oxidizing and carrying out polycrystalline precipitation on the groove in sequence, and then carrying out annealing treatment;
s3: carrying out polycrystal etching to form a polycrystal expected shape;
s4: and (3) oxidizing the whole structure to completely oxidize the abnormal part of the polycrystal, and taking out the generated oxide layer to obtain the final shape of the polycrystal.
2. The manufacturing method for improving the polycrystalline morphology of an SGT product according to claim 1, wherein in step S1, the width of the groove above the inflection point is gradually increased from the inflection point.
3. The manufacturing method for improving polycrystalline morphology of an SGT product according to claim 2, wherein the inside of the groove above the inflection point is provided with a slope structure.
4. The manufacturing method for improving the polycrystalline morphology of an SGT product according to claim 3, wherein the grooves are arranged in a Y-shaped structure as a whole.
5. The manufacturing method for improving the polycrystalline morphology of an SGT product according to claim 1, wherein in step S2, after the precipitation of the polycrystalline, the polycrystalline fills the trenches.
6. The manufacturing method for improving the polycrystalline morphology of an SGT product according to claim 5, wherein the polycrystalline height is higher than the trench.
7. The manufacturing process for improving the polycrystalline morphology of an SGT product according to claim 1, wherein the polycrystalline desired morphology has a height greater than the final morphology of the polycrystalline.
CN202310015042.1A 2023-01-04 2023-01-04 Manufacturing method for improving polycrystalline morphology of SGT product Pending CN115985954A (en)

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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6326293B1 (en) * 1997-12-19 2001-12-04 Texas Instruments Incorporated Formation of recessed polysilicon plugs using chemical-mechanical-polishing (CMP) and selective oxidation
US20130224919A1 (en) * 2012-02-28 2013-08-29 Yongping Ding Method for making gate-oxide with step-graded thickness in trenched dmos device for reduced gate-to-drain capacitance
US20150221734A1 (en) * 2009-08-31 2015-08-06 Yeeheng Lee Thicker bottom oxide for reduced miller capacitance in trench metal oxide semiconductor field effect transistor (mosfet)
CN108400094A (en) * 2018-04-19 2018-08-14 张帅 Shielded gate field effect transistor and its manufacturing method(Capitate)
CN111785619A (en) * 2020-06-30 2020-10-16 上海华虹宏力半导体制造有限公司 Process method for shielding trench of gate trench type MOSFET
CN114937600A (en) * 2022-06-01 2022-08-23 捷捷微电(南通)科技有限公司 SGT device and manufacturing method thereof
CN114999916A (en) * 2022-05-05 2022-09-02 上海朕芯微电子科技有限公司 Manufacturing method of shielded gate MOSFET (SGT)
CN115241070A (en) * 2022-07-28 2022-10-25 华虹半导体(无锡)有限公司 Manufacturing method of groove type MOS device

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6326293B1 (en) * 1997-12-19 2001-12-04 Texas Instruments Incorporated Formation of recessed polysilicon plugs using chemical-mechanical-polishing (CMP) and selective oxidation
US20150221734A1 (en) * 2009-08-31 2015-08-06 Yeeheng Lee Thicker bottom oxide for reduced miller capacitance in trench metal oxide semiconductor field effect transistor (mosfet)
US20130224919A1 (en) * 2012-02-28 2013-08-29 Yongping Ding Method for making gate-oxide with step-graded thickness in trenched dmos device for reduced gate-to-drain capacitance
CN108400094A (en) * 2018-04-19 2018-08-14 张帅 Shielded gate field effect transistor and its manufacturing method(Capitate)
CN111785619A (en) * 2020-06-30 2020-10-16 上海华虹宏力半导体制造有限公司 Process method for shielding trench of gate trench type MOSFET
CN114999916A (en) * 2022-05-05 2022-09-02 上海朕芯微电子科技有限公司 Manufacturing method of shielded gate MOSFET (SGT)
CN114937600A (en) * 2022-06-01 2022-08-23 捷捷微电(南通)科技有限公司 SGT device and manufacturing method thereof
CN115241070A (en) * 2022-07-28 2022-10-25 华虹半导体(无锡)有限公司 Manufacturing method of groove type MOS device

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Application publication date: 20230418