CN115776576A - Video processing method and device, computer readable storage medium and processor - Google Patents

Video processing method and device, computer readable storage medium and processor Download PDF

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Publication number
CN115776576A
CN115776576A CN202111052500.6A CN202111052500A CN115776576A CN 115776576 A CN115776576 A CN 115776576A CN 202111052500 A CN202111052500 A CN 202111052500A CN 115776576 A CN115776576 A CN 115776576A
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image
field
field signal
field frequency
frequency time
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吕京梅
褚建平
韦桂锋
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Xian Novastar Electronic Technology Co Ltd
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Xian Novastar Electronic Technology Co Ltd
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Abstract

The invention discloses a video processing method, a video processing device, a computer readable storage medium and a processor. Wherein, the method comprises the following steps: receiving video source data; analyzing video source data to obtain a first image, a first field signal corresponding to the first image and a first field frequency time of the first field signal; generating a first delayed field signal according to the first field signal and the first field frequency time, wherein the first delayed field signal is delayed from the first field signal; and outputting the first image and the first delayed field signal to a display screen receiving card, wherein the first image and the first delayed field signal are synchronously output in time sequence. The invention solves the technical problem that the screen display is blurred or flickered due to the inconsistency of the image data and the image field frequency of the video stream.

Description

Video processing method and device, computer readable storage medium and processor
Technical Field
The present invention relates to the field of image processing, and in particular, to a video processing method, an apparatus, a computer-readable storage medium, and a processor.
Background
In the existing LED display screen control system, the video source may be from a computer, a video processor, a media player or a camera in a cinema, etc., and these video sources may use different refresh rates, and the same video source may also use different refresh rates, and the common video sources are 24hz, 30hz, 60hz, 120hz, and 144hz. Generally, high field rate video is suitable for displaying fighting scenes or high speed motion scenes, and low field rate video is used for displaying slow motion scenes or conversation scenes. Since the high-field-frequency video source is relatively high in manufacturing cost, and the bandwidth of a video source interface required under the same resolution is large, a plurality of field frequencies can be contained in one video source under the condition that the cost and the feeling of audiences are considered when the video source is manufactured.
However, when the LED display screen control system plays video sources with various field frequencies, the problems of black screen, flashing screen, and screen splash can occur on the picture, seamless switching of the field frequencies cannot be achieved, and the viewing effect is very poor. The above problems are mainly caused by that when the field frequency of the video source is switched, the response time of the sending card, the receiving card and the LED display screen to the field frequency change is limited by the detection time of the field frequency and the reading time of the drive IC parameters, and the synchronous switching between the hardware and the video field frequency cannot be realized.
In view of the above problems, no effective solution has been proposed.
Disclosure of Invention
The embodiment of the invention provides a video processing method, a video processing device, a computer readable storage medium and a processor, which at least solve the technical problem that the screen splash or screen splash of a display screen is caused by the inconsistency of image data and image field frequency of a video stream.
According to an aspect of an embodiment of the present invention, there is provided a video processing method, including: receiving video source data; analyzing the video source data to obtain a first image, a first field signal corresponding to the first image and a first field frequency time of the first field signal; generating a first delayed field signal according to the first field signal and the first field frequency time, wherein the first delayed field signal is delayed from the first field signal; and outputting the first image and the first delayed field signal to a display screen receiving card, wherein the first image and the first delayed field signal are synchronously output in time sequence.
Optionally, the method further includes: analyzing the video source data to obtain at least one frame of second image, a second field signal corresponding to the second image and second field frequency time of the second field signal, wherein the second image is a continuous image behind the first image; generating a second delayed field signal according to the second field signal and the second field frequency time, wherein the second delayed field signal is delayed from the second field signal; and outputting the second image and the second delayed field signal to the display screen receiving card, wherein the second image and the second delayed field signal are synchronously output in time sequence.
Optionally, the method further includes: opening up at least one address space according to the video source data, wherein each address space is used for storing one frame of image data; after analyzing the video source data, the method further comprises: sending the first image to the address space for storage; and/or sending the second image to the address space for storage.
Optionally, opening up at least one address space according to the video source data, including: acquiring a highest field frequency time value and a lowest field frequency time value which are included in the video source data; and opening n address spaces according to the highest field frequency time value and the lowest field frequency time value, wherein n is greater than or equal to the ratio of the highest field frequency time value to the lowest field frequency time value.
Optionally, the sending the second image to the address space for storage includes: under the condition that the first field frequency time is greater than the second field frequency time, determining the number m of the second images according to the first field frequency time and the second field frequency time, wherein m is greater than or equal to the ratio of the first field frequency time to the second field frequency time; and sequentially storing m frames of second images into the address space, wherein the m frames of second images are continuous m frames of images behind the first image.
Optionally, the sending the second image to the address space for storage further includes: monitoring a state of writing the second picture in the address space in a case where the first field frequency time is less than the second field frequency time; and under the condition that the second image is completely written into the address space, outputting the second image and the second delayed field signal to the display screen receiving card.
Optionally, the method further includes: opening up at least one address space, comprising: opening up the address space in a synchronous dynamic random access memory; outputting the second image to the display screen receiving card, comprising: reading the address space to obtain the second image; and sending the second image to the display screen receiving card.
According to another aspect of the embodiments of the present invention, there is also provided a video processing apparatus, including: the receiving module is used for receiving video source data; the analysis module is used for analyzing the video source data to obtain a first image, a first field signal corresponding to the first image and a first field frequency time of the first field signal; a generating module, configured to generate a second field signal according to the first field signal and the first field frequency time, where the second field signal is delayed from the first field signal; and the output module is used for outputting the first image and the second field signal to a display screen receiving card, wherein the first image and the second field signal are synchronous in time sequence.
According to still another aspect of the embodiments of the present invention, there is also provided a computer-readable storage medium, which includes a stored program, wherein when the program runs, the apparatus on which the computer-readable storage medium is located is controlled to execute any one of the above-mentioned video processing methods.
According to still another aspect of the embodiments of the present invention, there is further provided a processor, configured to execute a program, where the program executes the video processing method according to any one of the above methods.
In the embodiment of the invention, a mode of delaying a field signal and a video image is adopted, a first image, a first field signal corresponding to the first image and a first field frequency time of the first field signal are obtained by analyzing video source data, the first delayed field signal is generated according to the first field signal and the first field frequency time, and then the first image and the first delayed field signal are synchronously output in time sequence, so that the aim of delaying the display screen receiving card for a certain time and then receiving the image and the field signal of the video stream is achieved, the technical effect of ensuring that the parameter of the display screen receiving card is consistent with the image data and the image field frequency of the video stream is achieved, and the technical problem that the display screen is lost or flickers due to the inconsistency of the image data and the image field frequency of the video stream is solved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention and do not constitute a limitation of the invention. In the drawings:
fig. 1 is a timing chart of a change of a field signal when a frame frequency is changed according to a related art;
fig. 2 is a schematic flow chart of a video processing method according to an embodiment of the present invention;
FIG. 3 is a timing diagram of field signals for a slow field frequency to fast field frequency switch in accordance with an alternative embodiment of the present invention;
FIG. 4 is a timing diagram of field signals for switching from a fast field frequency to a slow field frequency in accordance with an alternative embodiment of the present invention;
fig. 5 is a block diagram of a video processing apparatus according to an embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in other sequences than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
In accordance with an embodiment of the present invention, there is provided an embodiment of a video processing method, it should be noted that the steps illustrated in the flowchart of the figure may be performed in a computer system such as a set of computer executable instructions, and that while a logical order is illustrated in the flowchart, in some cases the steps illustrated or described may be performed in an order different than here.
In the related art, since it takes a certain time to detect the video source field video change and read the IC parameter, the display of the video image may be affected, and the following description is made briefly.
The LED display screen control system can comprise a video source, a sending card, a receiving card and an LED lamp panel. When the video source comprises video materials of various field frequencies, the sending card receives the video source and detects the field frequencies, the detection of the field frequencies can adopt the three-frame average number of stable field frequencies as the field frequency of the video source, and the receiving card is informed to display after the field frequencies are detected; in addition, the current field frequency of the video source can be determined by detecting the time interval between the rising edges of two continuous field signals of the video source, and the method can occupy one frame time to complete field frequency detection. Therefore, the detection of the video source field typically takes from one to three frames.
In addition, after the receiving card receives the field frequency, the driving IC parameters corresponding to the field frequency need to be read from the Flash of the receiving card, and then the driving IC parameters are sent to the receiving card, and then the LED display screen can normally display the image, and the process of reading and receiving the IC parameters by the receiving card also needs a frame time. Therefore, the process is delayed by 4 frames at most from the time when the field frequency of the input video source changes to the time when the hardware is adjusted to be suitable for outputting the video corresponding to the new field frequency.
Fig. 1 is a timing diagram of field signal change when a frame frequency changes according to the related art, and as shown in fig. 1, taking a method for detecting an average field frequency of three frames of a video source by using a transmitting card as an example, when a field frequency of an input video source is changed from 30hz to 60hz, a field signal of an image output by the transmitting card is sent to a receiving card according to the input source field signal, but a field frequency parameter of an actual video source detected by the transmitting card is sent to the receiving card after three frames are stabilized, that is, a position of the first 60hz in a frame frequency waveform is detected by an intermediate "transmitting card". Given to the receiving card, the receiving card needs a frame time to read the IC parameters, so the receiving card needs to delay the use of the 60hz parameter for one frame. And from the first 60hz waveform in the frame frequency of the input video source to the fourth 60hz waveform, the receiving card uses the IC parameter of 30hz for 4 frames of images, but the image received by the receiving card is already the 60hz image, and the image and the field frequency parameter are not matched, thereby causing the problem that the image in the LED display screen has a splash screen or a splash screen.
Fig. 2 is a schematic flowchart of a video processing method according to an embodiment of the present invention, and as shown in fig. 2, the method includes the following steps:
in step S202, video source data is received. Alternatively, the video source data received by the transmitting card may include a plurality of field frequencies, that is, the field frequencies in a single video source are varied, and this characteristic of the video source may cause the technical problem of the splash screen or the splash screen when the display screen displays the video.
Step S204, analyzing the video source data to obtain the first image, the first field signal corresponding to the first image, and the first field frequency time of the first field signal. Optionally, after a video source is input to the sending card through the video interface, a decoding chip on the sending card or an IP core inside the FPGA may analyze a field signal of the video source, that is, a first field signal; the frequency of the first field signal is detected by the sending card, and the detected period is the time period between the rising edges of the two field signals, and the unit is us, so that when the rising edge of the field signal corresponding to the next frame of image arrives, the sending card can acquire the field frequency time corresponding to the previous frame of image through detection.
Step S206 generates a first delayed field signal according to the first field signal and the first field frequency time, wherein the first delayed field signal is delayed from the first field signal. Alternatively, delaying the first field signal to obtain the first delayed field signal may be performed by delaying the first field signal by a first field frequency time, where the obtained first delayed field signal is slower than the first field signal by one signal period.
Step S208, outputting the first image and the first delayed field signal to the display screen receiving card, wherein the first image and the first delayed field signal are synchronously output in time sequence. It should be noted that, since the first image and the first delayed field signal are output in time synchronization, the first image is actually output after being delayed by a certain time from the image in the video source data. By the mode, the synchronous output of the image of the video source and the delayed field signal from the sending card end to the receiving card end can be ensured, the time of one frame can be reserved for the receiving card to receive the IC parameter corresponding to the field frequency of the delayed field signal, and the problems of screen flashing and screen splash of a display picture caused by the inconsistency of the image, the field signal and the IC parameter of the receiving card end of the display screen are avoided.
Through the steps, the first image, the first field signal corresponding to the first image and the first field frequency time of the first field signal are obtained by analyzing the video source data in a mode of delaying the field signal and the video image, the first delayed field signal is generated according to the first field signal and the first field frequency time, and then the first image and the first delayed field signal are synchronously output in time sequence, so that the aim of delaying the display screen receiving card for a certain time and then receiving the image and the field signal of the video stream is achieved, the technical effect of ensuring that the parameters of the display screen receiving card are consistent with the image data and the image field frequency of the video stream is achieved, and the technical problem that the display screen is lost or flickers due to the fact that the image data and the image field frequency of the video stream are inconsistent is solved.
As an optional embodiment, after the sending card end processes the first image, the sending card end may further analyze the video source data to obtain at least one frame of a second image, a second field signal corresponding to the second image, and a second field frequency time of the second field signal, where the second image is a continuous image after the first image; generating a second delayed field signal according to the second field signal and the second field frequency time, wherein the second delayed field signal is delayed from the second field signal; and outputting the second image and the second delayed field signal to a display screen receiving card, wherein the second image and the second delayed field signal are synchronously output in time sequence.
It should be noted that the at least one second image may be a next frame image of the first image, or may be a plurality of consecutive frame images after the first image. The first field frequency time and the second field frequency time can be the same or different, and when the two field frequency times are different, the field frequency switching of the video source occurs between the first image and the second image. On the basis of synchronous output of the first image and the first delay field signal, the second delay field signal and the first delay field signal are adjacent in time sequence, and the second image and the second delay field signal are synchronously output, so that the aims of continuously outputting the first image and the second image in time sequence and outputting the first image and the second image by delaying one frame time are fulfilled.
As an alternative embodiment, for the purpose of implementing delayed output of images in the sending card, the images may be buffered as follows: opening up at least one address space according to video source data, wherein each address space is used for storing one frame of image data; after the video source data are analyzed, the first image can be sent to an address space to be stored; and/or sending the second image to an address space for storage. Alternatively, the address space may be opened up in the sending card, or in an auxiliary storage hardware external to the sending card, which implements storage and retrieval of the image by data communication with the sending card. The amount of the opened address space can be determined according to the characteristics of the video source data, for example, the amount of the images that need to be buffered when the field frequency of the video source data is switched.
As an alternative embodiment, the address space may be opened up in synchronous dynamic random access memory; outputting the second image to a display screen receiving card, and reading the address space to obtain a second image; and sending the second image to a display screen receiving card. The synchronous dynamic random access memory can comprise any one of SDRAM/DDR/DDR2/DDR3/DDR4, the memory is physically connected with a sending card, data communication is achieved, and external caching of images is achieved.
As an alternative embodiment, depending on the video source data, at least one address space may be opened up by: acquiring a highest field frequency time value and a lowest field frequency time value which are included in video source data; and opening n address spaces according to the highest field frequency time value and the lowest field frequency time value, wherein n is greater than or equal to the ratio of the highest field frequency time value to the lowest field frequency time value. When the video source is switched from the slow field frequency to the fast field frequency, the sending card outputs the slow field frequency image after delaying the field frequency time of one frame of slow field frequency image, and outputs the fast field frequency image, so that at least two frames of fast field frequency images are cached in the process of outputting the slow field frequency image by the sending card.
Fig. 3 is a timing diagram of field signals switching from a slow field frequency to a fast field frequency according to an alternative embodiment of the present invention, as shown in fig. 3, the upper half of the diagram is a timing diagram of a video source image and a field signal input to a transmitting card by a video source, and the lower half of the diagram is a timing diagram of a video source image and a delayed field signal output to a receiving card by a transmitting card, where Vsync in the diagram represents a field signal, a rectangle 1 represents an image 1 corresponding to a slow field frequency, and a rectangle 2 represents an image 2 corresponding to a fast field frequency. Obviously, when all the fast field frequency images 2 in the video source enter the sending card, the sending card does not finish outputting the slow field frequency images, and at this moment, the multi-frame fast field frequency images need to be cached in a plurality of address spaces, so that the loss or the mutual coverage is avoided.
Alternatively, for example, when the field frequency of a video source is 24hz at the lowest and 144hz at the highest, when the video source data is switched from the lowest field frequency (i.e. slow field frequency) to the highest field frequency (i.e. fast field frequency), a frame of low field frequency image corresponds to 41.6ms, a frame of high field frequency image corresponds to 6.9ms, and the time multiple of the two is about 6.02 times, so when the low field frequency image is sent by delaying one frame, the time for outputting one frame of low field frequency image is the time for outputting more than 6 frames of high field frequency images, and at least 7 address spaces for storing images need to be opened to prevent the image data from being covered.
As an alternative embodiment, in the case that the first field frequency time is greater than the second field frequency time, the second image is stored in the address space in the following manner: determining the number m of second images according to the first field frequency time and the second field frequency time, wherein m is larger than or equal to the ratio of the first field frequency time to the second field frequency time; and sequentially storing m frames of second images into the address space, wherein the m frames of second images are continuous m frames of images behind the first image. When the video source data is switched from the field frequency to the fast field frequency and the slow field frequency is switched from the fast field frequency to the fast field frequency, the m frames of images in the second image of the fast field frequency are required to be stored in the address space, so that the m frames of images are prevented from being lost or mutually covered. The size of m may be determined according to the first field frequency time and the second field frequency time, for example, when the first field frequency time is 41.6ms and the second field frequency time is 10.4ms, since the division of 41.6 by 10.4 is equal to 4, m may be an integer greater than or equal to 4 at this time, that is, m may be 4 as the minimum value that can be taken, and at this time, 4 consecutive frames of images after the first image may be stored in the address space at the time of field frequency switching.
As an alternative embodiment, in the case that the first field frequency time is smaller than the second field frequency time, the second image may be processed in the following manner: monitoring a state of writing the second image in the address space while storing the second image in the address space; and in the case that the second image is completely written into the address space, outputting the second image and a second delayed field signal to the display screen receiving card. According to the optional embodiment, when the video source data is switched from the fast field frequency to the slow field frequency, before outputting the second image in the address space, it may be determined whether the second image has been completely written into the address space, so as to avoid a problem of picture tearing caused by that a frame of slow field frequency image cannot be completely transmitted in a fast field frequency period.
Fig. 4 is a timing diagram of field signals for switching from a fast field frequency to a slow field frequency according to an alternative embodiment of the present invention, as shown in fig. 4, in which most of the contents are the same as those of fig. 3, except that a rectangle 1 in fig. 4 represents a picture 1 corresponding to the fast field frequency and a rectangle 2 represents a picture 2 corresponding to the slow field frequency. When video source data is switched from fast field frequency to slow field frequency, because the parameters of the fast field frequency are still adopted, but one frame of slow field frequency image cannot be transmitted in one fast field frequency period, the problem of image tearing may be caused in the related technology.
Example 2
According to an embodiment of the present invention, there is further provided a video processing apparatus for implementing the video processing method, and fig. 5 is a block diagram of a structure of the video processing apparatus according to the embodiment of the present invention, as shown in fig. 5, the video processing apparatus includes: the receiving module 52, the analyzing module 54, the generating module 56, and the output module 58, which will be described below.
A receiving module 52 for receiving video source data;
an analyzing module 54, connected to the receiving module 52, for analyzing the video source data to obtain a first image, a first field signal corresponding to the first image, and a first field frequency time of the first field signal;
a generating module 56, connected to the analyzing module 54, for generating a second field signal according to the first field signal and the first field frequency time, wherein the second field signal is delayed from the first field signal;
and an output module 58, connected to the generating module 56, for outputting the first image and the second field signal to the display screen receiving card, wherein the first image and the second field signal are synchronized in time sequence.
It should be noted here that the receiving module 52, the parsing module 54, the generating module 56 and the output module 58 correspond to steps S202 to S208 in embodiment 1, and the modules are the same as the corresponding steps in the implementation example and application scenarios, but are not limited to the disclosure in embodiment 1.
Example 3
An embodiment of the present invention may provide a computer device, and optionally, in this embodiment, the computer device may be located in at least one network device of a plurality of network devices of a computer network. The computer device includes a memory and a processor.
The memory may be configured to store software programs and modules, such as program instructions/modules corresponding to the video processing method and apparatus in the embodiments of the present invention, and the processor executes various functional applications and data processing by running the software programs and modules stored in the memory, so as to implement the video processing method. The memory may include high speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory may further include memory remotely located from the processor, which may be connected to the computer terminal over a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The processor can call the information and application program stored in the memory through the transmission device to execute the following steps: receiving video source data; analyzing video source data to obtain a first image, a first field signal corresponding to the first image and a first field frequency time of the first field signal; generating a first delayed field signal according to the first field signal and the first field frequency time, wherein the first delayed field signal is delayed from the first field signal; and outputting the first image and the first delayed field signal to a display screen receiving card, wherein the first image and the first delayed field signal are synchronously output in time sequence.
Optionally, the processor may further execute the program code of the following steps: analyzing the video source data to obtain at least one frame of second image, a second field signal corresponding to the second image and second field frequency time of the second field signal, wherein the second image is a continuous image behind the first image; generating a second delayed field signal according to the second field signal and the second field frequency time, wherein the second delayed field signal is delayed from the second field signal; and outputting the second image and the second delayed field signal to a display screen receiving card, wherein the second image and the second delayed field signal are synchronously output in time sequence.
Optionally, the processor may further execute the program code of the following steps: opening up at least one address space according to video source data, wherein each address space is used for storing one frame of image data; after analyzing the video source data, the method further comprises: sending the first image to an address space for storage; and/or sending the second image to an address space for storage.
Optionally, the processor may further execute the program code of the following steps: tunneling at least one address space based on video source data, comprising: acquiring a highest field frequency time value and a lowest field frequency time value which are included in video source data; and opening n address spaces according to the highest field frequency time value and the lowest field frequency time value, wherein n is greater than or equal to the ratio of the highest field frequency time value to the lowest field frequency time value.
Optionally, the processor may further execute the program code of the following steps: sending the second image to the address space for storage comprises: under the condition that the first field frequency time is greater than the second field frequency time, determining the number m of the second images according to the first field frequency time and the second field frequency time, wherein m is greater than or equal to the ratio of the first field frequency time to the second field frequency time; and sequentially storing m frames of second images into the address space, wherein the m frames of second images are continuous m frames of images behind the first image.
Optionally, the processor may further execute the program code of the following steps: sending the second image to the address space for storage further comprises: monitoring a state of writing a second picture in the address space under the condition that the first field frequency time is less than the second field frequency time; and in the case that the second image is completely written into the address space, outputting the second image and a second delayed field signal to the display screen receiving card.
Optionally, the processor may further execute the program code of the following steps: opening up at least one address space, comprising: opening up an address space in a synchronous dynamic random access memory; outputting a second image to a display screen receiving card, comprising: reading the address space to obtain a second image; and sending the second image to a display screen receiving card.
Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by a program instructing hardware associated with the terminal device, where the program may be stored in a computer-readable storage medium, and the storage medium may include: flash disks, read-Only memories (ROMs), random Access Memories (RAMs), magnetic or optical disks, and the like.
Example 4
Embodiments of the present invention also provide a computer-readable storage medium. Alternatively, in this embodiment, the computer-readable storage medium may be used to store the program code executed by the video processing method provided in embodiment 1.
Optionally, in this embodiment, the computer-readable storage medium may be located in any one of a group of computer terminals in a computer network, or in any one of a group of mobile terminals.
Optionally, in this embodiment, the computer readable storage medium is configured to store program code for performing the following steps: receiving video source data; analyzing video source data to obtain a first image, a first field signal corresponding to the first image and a first field frequency time of the first field signal; generating a first delayed field signal according to the first field signal and the first field frequency time, wherein the first delayed field signal is delayed from the first field signal; and outputting the first image and the first delayed field signal to a display screen receiving card, wherein the first image and the first delayed field signal are synchronously output in time sequence.
Optionally, in this embodiment, the computer readable storage medium is configured to store program code for performing the following steps: analyzing the video source data to obtain at least one frame of second image, a second field signal corresponding to the second image and second field frequency time of the second field signal, wherein the second image is a continuous image behind the first image; generating a second delayed field signal according to the second field signal and the second field frequency time, wherein the second delayed field signal is delayed from the second field signal; and outputting the second image and the second delayed field signal to a display screen receiving card, wherein the second image and the second delayed field signal are synchronously output in time sequence.
Optionally, in this embodiment, the computer readable storage medium is configured to store program code for performing the following steps: opening up at least one address space according to video source data, wherein each address space is used for storing one frame of image data; after analyzing the video source data, the method further comprises: sending the first image to an address space for storage; and/or sending the second image to an address space for storage.
Optionally, in this embodiment, a computer-readable storage medium is configured to store program code for performing the steps of: tunneling at least one address space based on video source data, comprising: acquiring a highest field frequency time value and a lowest field frequency time value which are included in video source data; and opening n address spaces according to the highest field frequency time value and the lowest field frequency time value, wherein n is greater than or equal to the ratio of the highest field frequency time value to the lowest field frequency time value.
Optionally, in this embodiment, the computer readable storage medium is configured to store program code for performing the following steps: sending the second image to the address space for storage comprises: under the condition that the first field frequency time is greater than the second field frequency time, determining the number m of second images according to the first field frequency time and the second field frequency time, wherein m is greater than or equal to the ratio of the first field frequency time to the second field frequency time; and sequentially storing m frames of second images into the address space, wherein the m frames of second images are continuous m frames of images behind the first image.
Optionally, in this embodiment, a computer-readable storage medium is configured to store program code for performing the steps of: sending the second image to the address space for storage further comprises: monitoring a state of writing a second picture in the address space under the condition that the first field frequency time is less than the second field frequency time; and under the condition that the second image is completely written into the address space, outputting the second image and a second delayed field signal to a display screen receiving card.
Optionally, in this embodiment, the computer readable storage medium is configured to store program code for performing the following steps: opening up at least one address space, comprising: opening up an address space in the synchronous dynamic random access memory; outputting a second image to a display screen receiving card, comprising: reading the address space to obtain a second image; and sending the second image to a display screen receiving card.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed technical content can be implemented in other manners. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic disk, or an optical disk, and various media capable of storing program codes.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (10)

1. A video processing method, comprising:
receiving video source data;
analyzing the video source data to obtain a first image, a first field signal corresponding to the first image and first field frequency time of the first field signal;
generating a first delayed field signal according to the first field signal and the first field frequency time, wherein the first delayed field signal is delayed from the first field signal;
and outputting the first image and the first delayed field signal to a display screen receiving card, wherein the first image and the first delayed field signal are synchronously output in time sequence.
2. The method of claim 1, further comprising:
analyzing the video source data to obtain at least one frame of second image, a second field signal corresponding to the second image and second field frequency time of the second field signal, wherein the second image is a continuous image behind the first image;
generating a second delayed field signal according to the second field signal and the second field frequency time, wherein the second delayed field signal is delayed from the second field signal;
and outputting the second image and the second delayed field signal to the display screen receiving card, wherein the second image and the second delayed field signal are synchronously output in time sequence.
3. The method of claim 2, further comprising: opening up at least one address space according to the video source data, wherein each address space is used for storing one frame of image data;
after analyzing the video source data, the method further comprises:
sending the first image to the address space for storage; and/or the presence of a gas in the gas,
and sending the second image to the address space for storage.
4. The method of claim 3, wherein tunneling at least one address space based on the video source data comprises:
acquiring a highest field frequency time value and a lowest field frequency time value which are included in the video source data;
and opening n address spaces according to the highest field frequency time value and the lowest field frequency time value, wherein n is greater than or equal to the ratio of the highest field frequency time value to the lowest field frequency time value.
5. The method of claim 3, wherein sending the second image to the address space for storage comprises:
under the condition that the first field frequency time is greater than the second field frequency time, determining the number m of the second images according to the first field frequency time and the second field frequency time, wherein m is greater than or equal to the ratio of the first field frequency time to the second field frequency time;
and sequentially storing m frames of the second images into the address space, wherein the m frames of the second images are continuous m frames of images behind the first images.
6. The method of claim 3, wherein sending the second image to the address space for storage further comprises:
monitoring a state of writing the second picture in the address space in a case where the first field frequency time is less than the second field frequency time;
and under the condition that the second image is completely written into the address space, outputting the second image and the second delayed field signal to the display screen receiving card.
7. The method of claim 3, wherein tunneling at least one address space comprises:
opening up the address space in a synchronous dynamic random access memory;
outputting the second image to the display screen receiving card, comprising:
reading the address space to obtain the second image;
and sending the second image to the display screen receiving card.
8. A video processing apparatus, comprising:
the receiving module is used for receiving video source data;
the analysis module is used for analyzing the video source data to obtain a first image, a first field signal corresponding to the first image and first field frequency time of the first field signal;
a generating module, configured to generate a second field signal according to the first field signal and the first field frequency time, where the second field signal is delayed from the first field signal;
and the output module is used for outputting the first image and the second field signal to a display screen receiving card, wherein the first image and the second field signal are synchronous in time sequence.
9. A computer-readable storage medium, comprising a stored program, wherein the program, when executed, controls an apparatus in which the computer-readable storage medium is located to perform the video processing method according to any one of claims 1 to 7.
10. A processor, characterized in that the processor is configured to run a program, wherein the program is configured to perform the video processing method according to any one of claims 1 to 7 when running.
CN202111052500.6A 2021-09-08 2021-09-08 Video processing method and device, computer readable storage medium and processor Pending CN115776576A (en)

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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111052500.6A CN115776576A (en) 2021-09-08 2021-09-08 Video processing method and device, computer readable storage medium and processor

Publications (1)

Publication Number Publication Date
CN115776576A true CN115776576A (en) 2023-03-10

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