CN115765724A - Crystal oscillator starting control circuit and method, crystal oscillator device and SOC chip - Google Patents
Crystal oscillator starting control circuit and method, crystal oscillator device and SOC chip Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L3/00—Starting of generators
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
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Abstract
The invention relates to a crystal oscillator starting control circuit and method, a crystal oscillator device and an SOC chip, wherein the circuit comprises: a logic circuit; the linear voltage stabilizer determines the voltage of a power supply signal output to the crystal oscillator according to the first signal output by the logic circuit, and the power supply signal is used as a power supply of the crystal oscillator; the logic circuit is further used for detecting a clock signal output by the crystal oscillator, if the logic circuit detects the clock signal output by the crystal oscillator within a preset time period after the first signal is output, the logic circuit changes the output first signal so that the voltage of the power signal output by the linear voltage regulator is reduced until the clock signal is not detected within the preset time period, and at the moment, the logic circuit changes the first signal for the first time so as to increase the voltage of the power signal and provide the increased voltage as a stable power signal for the crystal oscillator. The invention can flexibly adjust the output voltage of the LDO according to the oscillation starting condition of the crystal oscillator and reduce the power consumption of the crystal oscillator as much as possible.
Description
Technical Field
The present disclosure relates to a crystal oscillator, and more particularly, to a crystal oscillator start control circuit, a crystal oscillator start control method, a crystal oscillator device, and an SOC chip.
Background
With the progress of technology, crystal oscillators are more and more widely applied to integrated circuits. The crystal oscillator can provide a high-precision and stable clock signal for a Chip, and the clock signal is often an important input reference clock of key modules such as a phase-locked loop (PLL) in an SOC (System on Chip). When the SOC operates in a low power mode, an extremely low power consumption crystal oscillator is often required to provide a clock source. In order to reduce the power consumption of the crystal oscillator when the crystal oscillator is designed in a mature process, the voltage of the crystal oscillator is often reduced, but this may result in too long oscillation starting time of the crystal oscillator or even failure of oscillation starting, so that the structure of the crystal oscillator needs to be improved by comprehensively considering the power consumption and oscillation starting problems.
Disclosure of Invention
Accordingly, it is necessary to provide a crystal oscillator startup control circuit that can achieve both power consumption and reliability of crystal oscillator oscillation.
A crystal oscillator startup control circuit comprising: a logic circuit for outputting a first signal; the linear voltage stabilizer is connected with the logic circuit and used for determining the voltage of a power supply signal output to the crystal oscillator according to the first signal, and the power supply signal is used as a power supply of the crystal oscillator; the logic circuit is further configured to detect a clock signal output by the crystal oscillator, and if the logic circuit detects the clock signal output by the crystal oscillator within a preset time period after the first signal is output, the logic circuit changes the output first signal so that the voltage of the power signal output by the linear voltage regulator is reduced until the clock signal is not detected within the preset time period, and at this time, the logic circuit changes the output first signal again so as to increase the voltage of the power signal output by the linear voltage regulator, and then provides the voltage-stabilized first power signal to the crystal oscillator.
The crystal oscillator starting control circuit can flexibly reduce the output voltage (namely the voltage of the power supply signal) of the LDO according to the oscillation starting condition of the crystal oscillator, and reduces the power consumption of the crystal oscillator as much as possible.
In one embodiment, the logic circuit is configured to change the output first signal to increase the voltage of the power supply signal output by the linear regulator if the clock signal is not detected by the logic circuit within a preset time period after the first signal is output, until the clock signal is detected within the preset time period, at which time the first signal is kept stable so that the linear regulator provides a second power supply signal with stable voltage to the crystal oscillator.
In one embodiment, the logic circuit changes the first signal outputted once again to return the first signal to the state when the clock signal was detected once, so that the voltage of the power signal outputted by the linear regulator returns to the voltage of the previous time.
In one embodiment, the linear regulator has a power supply signal voltage step corresponding to the digital code of the first signal, and the voltage of the power supply signal output by the linear regulator is determined according to the digital code of the first signal.
In one embodiment, the changing the output first signal to decrease the voltage of the power signal output by the linear regulator is to decrease the power signal by one step.
In one embodiment, the changing the output first signal to increase the voltage of the power signal output by the linear regulator is to increase the power signal by one step.
In one embodiment, the power supply further comprises a memory coupled to the logic circuit for storing the digital code corresponding to the first power supply signal and the digital code corresponding to the second power supply signal; the logic circuit outputs a first signal corresponding to the digital code stored by the memory to the linear regulator when it is powered back up.
In one embodiment, the system further comprises an oscillator connected to the logic circuit for providing a clock signal to the logic circuit.
The present application correspondingly provides a crystal oscillator apparatus, which includes a crystal oscillator and further includes a crystal oscillator start-up control circuit according to any of the foregoing embodiments.
The application correspondingly provides an SOC chip, including aforementioned crystal oscillator device.
The application correspondingly provides a crystal oscillator starting control method.
A crystal oscillator startup control method, comprising: step A, outputting a power supply signal to a crystal oscillator as a power supply of the crystal oscillator; step B1, after the power supply signal is output, if the clock signal output by the crystal oscillator is detected within a preset time, reducing the voltage of the power supply signal and then outputting the reduced voltage to the crystal oscillator; and B2, repeatedly executing the step B1 until the clock signal is not detected within the preset time length, and increasing the voltage of the current power supply signal once and then supplying the increased voltage as a first power supply signal with stable voltage to the crystal oscillator.
The crystal oscillator starting control method can flexibly adjust the voltage of the power supply signal output to the crystal oscillator according to the oscillation starting condition of the crystal oscillator, and reduce the power consumption of the crystal oscillator as much as possible.
In one embodiment, the method further comprises: step C1, after the power supply signal is output in the step A, if the clock signal is not detected within a preset time, the voltage of the power supply signal is increased and then output to the crystal oscillator; and step C2, repeatedly executing the step C1 until the clock signal is detected within the preset time length, and at the moment, providing the current power supply signal serving as a second power supply signal with stable voltage for the crystal oscillator.
In one embodiment, the step B2 increases the voltage of the corresponding power signal once, and changes the power signal back to the voltage corresponding to the previous time when the clock signal was detected.
In one embodiment, the method further comprises: and when the power supply is powered on again, using the first power supply signal with the stable voltage in the step B2 or the second power supply signal with the stable voltage in the step C2 as the power supply signal in the step A.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the descriptions of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following descriptions are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic circuit diagram of a start-up control circuit of a crystal oscillator according to an embodiment of the present application;
FIG. 2 is a schematic circuit diagram of a crystal oscillator device according to an embodiment of the present application;
FIG. 3 is a flowchart illustrating a method for controlling the start-up of a crystal oscillator according to an embodiment of the present application;
FIG. 4 is a flowchart of a crystal oscillator startup control method according to another embodiment of the present application;
fig. 5 is a schematic circuit diagram of an exemplary low power crystal oscillator circuit.
Detailed Description
To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Embodiments of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It will be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to" or "coupled to" another element or layer, it can be directly on, adjacent, connected or coupled to the other element or layer or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and/or sections, these elements, components, regions, layers, doping types and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type or section from another element, component, region, layer, doping type or section. Thus, a first element, component, region, layer, doping type or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention; for example, the first doping type may be made the second doping type, and similarly, the second doping type may be made the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.
Spatially relative terms, such as "under," "below," "beneath," "under," "above," "over," and the like, may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "under" can encompass both an orientation of above and below. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations) and the spatial descriptors used herein interpreted accordingly.
As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" or "including," or "having," and the like, specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. Also, in this specification, the term "and/or" includes any and all combinations of the associated listed items.
An exemplary low power consumption crystal oscillator circuit is shown in fig. 5, wherein a linear regulator (LDO) is used to reduce the voltage VDDH to VDDL, which is supplied to the crystal oscillator circuit. In general, VDDL is significantly lower than VDDH, which can significantly reduce the power consumption of the crystal oscillator circuit. However, if VDDL is too low, the crystal oscillator circuit may not start oscillation or start oscillation for too long, which reduces the reliability of the crystal oscillator. Therefore, in order to ensure that the crystal oscillator can start oscillation smoothly under all process conditions and temperature and voltage conditions, only the VDDL output by the LDO can be fixed at a higher voltage, which limits the potential of further reducing the power consumption of the crystal oscillator and is not flexible to use. In order to exploit the potential of the crystal oscillator in low power consumption as much as possible without sacrificing the reliability of the crystal oscillator, the design of the crystal oscillator needs to be improved and expanded.
The EN signal in fig. 5 is an enable signal of the LDO and the crystal oscillator circuit, VDDH is an input original high-voltage power supply signal, VSSH is a ground potential, VDDL is a low-voltage power supply signal output by the LDO, XIN and XOUT are interfaces of the crystal oscillator circuit connecting the quartz crystal and the capacitor load CL, and the XC signal is a clock signal output by the crystal oscillator circuit.
The application provides a crystal oscillator starting control circuit capable of adaptively adjusting power consumption. Fig. 1 is a schematic circuit diagram of a crystal start-up control circuit in an embodiment of the present application, and the crystal start-up control circuit 120 includes a logic circuit 122 and a linear regulator (LDO) 124. The linear regulator 124 is coupled to the logic circuit 122. The linear regulator 124 outputs a power supply signal VDDL to the crystal oscillator 110 as a power supply of the crystal oscillator 110. The logic circuit 122 outputs a first signal to the linear regulator 124, and the linear regulator 124 determines the voltage level of the power supply signal VDDL output to the crystal oscillator 110 according to the first signal output by the logic circuit 122. The logic circuit 122 detects a clock signal XC output by the crystal oscillator 110 to determine whether the crystal oscillator 110 starts oscillating successfully. If the current VDDL voltage enables crystal oscillator 110 to start up smoothly, logic circuit 122 may decrease the voltage of supply signal VDDL to further decrease the power consumption of crystal oscillator 110.
Specifically, if the logic circuit 122 detects that the crystal oscillator 110 outputs the normal clock signal XC within a preset time period after the first signal is output, the logic circuit 122 changes the output first signal to decrease the voltage of the power signal VDDL output by the linear regulator 124, and repeatedly tries to further decrease the voltage — observing the start condition of the crystal oscillator until the clock signal XC is not detected within the preset time period. At this time, the logic circuit 122 changes the first signal once output to increase the voltage of the power supply signal VDDL, and then supplies the power supply signal to the crystal oscillator 110 as a voltage-stabilized power supply signal. In one embodiment of the present application, changing the first signal once again changes the first signal back to the state when the clock signal XC was detected once before, so that the voltage of the power supply signal VDDL output by the linear regulator 124 changes back to the voltage of the previous time.
The crystal oscillator start control circuit 120 can flexibly adjust the LDO output voltage (i.e., the voltage of the power signal VDDL) according to the oscillation starting condition of the crystal oscillator, and reduce the power consumption of the crystal oscillator as much as possible.
In one embodiment of the present application, if the logic circuit 122 does not detect the clock signal XC within a predetermined time period after outputting the first signal, the logic circuit 122 changes the output first signal to increase the voltage of the power supply signal VDDL output by the linear regulator 124, and repeats the process of attempting to further increase the voltage — observing the start-up condition of the crystal oscillator until the clock signal XC is detected within the predetermined time period. The first signal is kept stable at this time, so that the LDO provides a stable power supply signal to the crystal oscillator 110. When the crystal oscillator starting control circuit 120 is too long in starting time or cannot start oscillation, the LDO output voltage can be flexibly increased, so that the crystal oscillator can start oscillation smoothly, and the flexibility and the application range of the crystal oscillator are improved. When the crystal oscillator encounters a large change in working environment (e.g., a large change in temperature) during operation, which causes an abnormal operation of the crystal oscillator, the logic circuit 122 can increase the output voltage of the LDO in time to keep the crystal oscillator operating stably, thereby improving the reliability of the crystal oscillator circuit.
In one embodiment of the present application, linear regulator 124 has a supply signal voltage step that corresponds to the digital encoding of the first signal output by logic circuit 122, and thus the voltage of supply signal VDDL output by linear regulator 124 is determined based on the digital encoding of the first signal.
In one embodiment of the present application, if the logic circuit 122 detects the clock signal XC within a predetermined time period after the first signal is outputted, the digital code of the outputted first signal is changed to reduce the voltage of the power signal VDDL by one step.
In one embodiment of the present application, if the logic circuit 122 does not detect the clock signal XC within a predetermined time period after the first signal is output, the digital code of the output first signal is changed to increase the voltage of the power signal VDDL by one step.
In the embodiment shown in fig. 1, the crystal start-up control circuit 120 further includes a memory 126 connected to the logic circuit 122 for storing a digital code corresponding to the stabilized supply signal VDDL. Thus, when the subsequent logic circuit 122 is powered up again (i.e., the crystal start-up control circuit 120 is powered up again), the logic circuit 122 reads the stored digital code from the memory 126 and sends a corresponding first signal to the linear regulator 124. In one embodiment of the present application, the digital code stored in the memory 126 may be updated in real time, for example, the logic circuit 122 updates the code stored in the memory 126 each time the logic circuit 122 sends the first signal to the linear regulator 124, or the logic circuit 122 causes the memory 126 to update the stored digital code each time the logic circuit 122 detects the clock signal XC within the preset time period.
In the embodiment shown in fig. 1, the crystal start-up control circuit 120 further includes an Oscillator (OSC) 128 connected to the logic circuit 122 for providing a clock signal to the logic circuit 122. The oscillator 128 is a low precision oscillator and therefore requires a crystal oscillator to provide a high precision clock signal XC to the system.
The present application correspondingly provides a crystal oscillator device, which includes a crystal oscillator and further includes the crystal oscillator start-up control circuit according to any of the foregoing embodiments. Fig. 2 is a schematic circuit diagram of a crystal oscillator apparatus according to an embodiment of the present invention, which adds a logic circuit for adjusting the start-up time and power consumption of the crystal oscillator, a low-precision oscillator OSC, and a memory to the circuit shown in fig. 5. The basic principle is that the output voltage VDDL of the LDO is divided into a plurality of levels and is controlled by D0-Dn output by a logic circuit, if the current VDDL voltage can enable the crystal oscillator to start oscillation smoothly, the logic circuit can reduce the voltage value of the VDDL by adjusting digital codes D0-Dn so as to further reduce the power consumption of the crystal oscillator; when the VDDL voltage is too low to enable the crystal oscillator to start oscillation smoothly, the logic circuit raises the voltage of the VDDL by adjusting the code, so that the crystal oscillator can start oscillation smoothly, and the reliability of the circuit is ensured. In fig. 2, the EN signal is an enable signal of the logic circuit, the ENI signal is an enable signal of the LDO and the crystal oscillator circuit, VDDH is an input original high-voltage power supply signal, VSSH is a ground potential, XIN and XOUT are interfaces of the crystal oscillator circuit connecting the quartz crystal and the capacitive load CL, and the XC signal is a clock signal output by the crystal oscillator circuit.
The specific operation principle and flow of the circuit structure in fig. 2 are described in detail below by one embodiment. Assuming n =3, that is, the output of the logic circuit is 4-bit codes D0 to D3, the 4-bit codes can divide the voltage of the LDO output into 16 steps, and the specific correspondence is shown in table 1.
TABLE 1
Wherein the voltage values of VDDL0 to VDDL15 gradually increase. With the gradually increasing code values (from 0000 to 1111), the corresponding voltages of VDDL0 to VDDL15 are also going from low to high.
After the chip is powered on for the first time, when the logic circuit receives an EN signal, the logic circuit sends out an ENI signal to enable the LDO and the crystal oscillator circuit to start, and at the moment, the logic circuit outputs a set of default D0-D3 initial codes 1000 to the LDO. Assuming that the voltage of the LDO output is VDDL8, referring to table 1, this voltage is located in the middle of the voltage range VDDL0 to VDDL 15. At this time, if the voltage of VDDL8 is enough for the crystal oscillator to start oscillating in time, that is, the logic circuit can detect the clock signal XC within the expected start time, the logic circuit will reduce the output code from 1000 to 0111 at this time, so that the output voltage of the LDO is reduced from VDDL8 to VDDL7, and then the ENI signal is retransmitted to restart the crystal oscillator again. If the crystal oscillator can still be started in time at this moment, the logic circuit can continue to sequentially adjust down the codes and the VDDL voltage output by the LDO to repeatedly try the starting condition of the crystal oscillator until the crystal oscillator cannot be started in the expected time, and at this moment, the logic circuit can adjust up the codes D0-D3 by one bit to be used as the current determined value and write the codes into the memory to be used as the current default value. When the subsequent EN signal is restarted, the default value is retrieved directly from memory for operation. For example, when the code falls to 0100, the logic circuit detects that the crystal cannot start up normally, then automatically raises the bit code to 0101 and writes 0101 into the memory. Similarly, if VDDL8 corresponding to the initial code 1000 is found to be unable to start the crystal oscillator when the chip works for the first time, the logic circuit automatically and gradually increases the code to increase the voltage of VDDL until the crystal oscillator can start the crystal oscillator normally, and writes the current code into the memory. The low accuracy OSC is used to provide a less accurate clock signal for use by the logic circuit.
The present application correspondingly provides an SOC (System on Chip) Chip, including the crystal oscillation device described in any of the foregoing embodiments. For a typical SOC chip, the original memory and the original low-precision OSC are originally included, and an original large-scale logic circuit is also included, so that the added logic circuit, the low-precision OSC and the memory in the crystal oscillator device of fig. 2 can be additionally designed on the basis of the original large-scale logic circuit, the original low-precision OSC and the original memory of the SOC chip, no additional functional module is required to be added in the SOC chip, only few gate-level circuits are required to be added in the SOC chip, no additional functional module is required to be added, and the complexity of the SOC chip is not increased.
The application correspondingly provides a crystal oscillator starting control method. Fig. 3 is a flowchart of a crystal oscillator start-up control method according to an embodiment of the present application, including the following steps:
and S310, outputting a power supply signal to the crystal oscillator to serve as a power supply of the crystal oscillator.
A power supply signal with a default voltage value may be first output to the crystal oscillator.
And S320, if the clock signal is detected within the preset time length, reducing the voltage of the power supply signal.
And if the clock signal output by the crystal oscillator is detected within the preset time length, reducing the voltage of the power supply signal output to the crystal oscillator.
S330, judging whether a clock signal is detected within a preset time length, if so, returning to the step S320, otherwise, executing the step S340.
If the clock signal output by the crystal oscillator is detected within the preset time length, it indicates that the voltage of the current power supply signal can still enable the crystal oscillator to start oscillation smoothly, and the voltage can be tried to be reduced continuously.
And S340, increasing the voltage of the power supply signal once, and supplying the power supply signal as a power supply signal with stable voltage to the crystal oscillator.
In one embodiment of the present application, the power supply signal is adjusted to the voltage of the previous time the clock signal was detected.
The crystal oscillator starting control method can flexibly adjust the voltage of the power supply signal output to the crystal oscillator according to the oscillation starting condition of the crystal oscillator, and reduce the power consumption of the crystal oscillator as much as possible.
Fig. 4 is a flowchart of a crystal oscillator startup control method in another embodiment of the present application, including the following steps:
and S410, outputting a power supply signal to the crystal oscillator to serve as a power supply of the crystal oscillator.
A power supply signal with a default voltage value may be first output to the crystal oscillator.
S422, determine whether a clock signal is detected within a predetermined time duration, if so, perform step S424, otherwise, perform step S432.
And judging whether the crystal oscillator starts oscillation smoothly or not according to whether the clock signal output by the crystal oscillator is detected or not within the preset time length.
S424, the voltage of the power signal is decreased.
And if the clock signal output by the crystal oscillator is detected within the preset time length, reducing the voltage of the power supply signal output to the crystal oscillator.
S426, determining whether a clock signal is detected within a preset duration, if so, returning to S424, otherwise, executing S428.
If the clock signal output by the crystal oscillator is detected within the preset time length, it indicates that the voltage of the current power supply signal can still enable the crystal oscillator to start oscillation smoothly, and the voltage can be tried to be reduced continuously.
S428, the voltage of the power supply signal is increased once and then supplied to the crystal oscillator as a power supply signal with stable voltage.
In one embodiment of the present application, the power supply signal is adjusted to the voltage of the previous time the clock signal was detected.
S432, increasing the voltage of the power supply signal.
In step S422, if the clock signal output from the crystal oscillator is not detected within the preset time period, the voltage of the power signal output to the crystal oscillator is increased.
And S434, judging whether a clock signal is detected within a preset time length, if so, executing a step S436, otherwise, returning to the step S432.
If the clock signal output by the crystal oscillator is not detected within the preset time, it indicates that the voltage of the current power supply signal is too low, and the voltage of the power supply signal needs to be increased continuously.
S436, the power supply signal at this time is supplied to the crystal oscillator as a power supply signal with stable voltage.
In one embodiment of the present application, further comprising: the power signal with the stabilized voltage of step S428 or step S436 is used as the power signal of step S410 when the system is powered up (restarted). Namely, the voltage value of the stable power supply signal is used as the voltage default value of the power supply signal after restarting.
It should be understood that, although the steps in the flowcharts of the present application are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least a part of the steps in the flowchart of the present application may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of performing the steps or the stages is not necessarily sequential, but may be performed alternately or alternately with other steps or at least a part of the steps or the stages in other steps.
In the description herein, references to the description of "some embodiments," "other embodiments," "desired embodiments," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, a schematic description of the above terminology may not necessarily refer to the same embodiment or example.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features of the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the claims. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A crystal oscillator startup control circuit, comprising:
a logic circuit for outputting a first signal;
the linear voltage stabilizer is connected with the logic circuit and used for determining the voltage of a power supply signal output to the crystal oscillator according to the first signal, and the power supply signal is used as a power supply of the crystal oscillator;
the logic circuit is further configured to detect a clock signal output by the crystal oscillator, and if the logic circuit detects the clock signal output by the crystal oscillator within a preset time period after the first signal is output, the logic circuit changes the output first signal so that the voltage of the power signal output by the linear voltage regulator is reduced until the clock signal is not detected within the preset time period, and at this time, the logic circuit changes the output first signal again so as to increase the voltage of the power signal output by the linear voltage regulator, and then provides the voltage-stabilized first power signal to the crystal oscillator.
2. The crystal oscillator startup control circuit of claim 1, wherein the logic circuit is configured to change the output first signal if the clock signal is not detected by the logic circuit within a preset time period after the first signal is output, so as to increase the voltage of the power supply signal output by the linear voltage regulator until the clock signal is detected within the preset time period, at which time the first signal is kept stable, so that the linear voltage regulator provides a second power supply signal with stable voltage to the crystal oscillator.
3. The crystal oscillator startup control circuit according to claim 1 or 2, wherein the logic circuit changes the first signal again to be output in a state where the clock signal was detected last time, so that the voltage of the power supply signal output by the linear regulator is changed back to the voltage of the last time.
4. The crystal oscillator starting control circuit according to claim 2, wherein the linear voltage regulator has a power supply signal voltage step corresponding to the digital code of the first signal, and the voltage of the power supply signal output by the linear voltage regulator is determined according to the digital code of the first signal;
the changing of the output first signal to reduce the voltage of the power supply signal output by the linear voltage regulator is to reduce the power supply signal by one gear;
the changing of the output first signal to increase the voltage of the power signal output by the linear voltage regulator is to increase the power signal by one gear.
5. The crystal oscillator startup control circuit of claim 4, further comprising a memory coupled to the logic circuit for storing the digital code corresponding to the first power supply signal and the digital code corresponding to the second power supply signal; the logic circuit is configured to output a first signal corresponding to the digital code stored by the memory to the linear regulator upon a power-up reset.
6. The crystal oscillator startup control circuit of claim 1 or 2, further comprising an oscillator connected to the logic circuit for providing a clock signal to the logic circuit.
7. A crystal oscillator device comprising a crystal oscillator, characterized by further comprising a crystal oscillator startup control circuit according to any one of claims 1 to 6.
8. An SOC chip comprising the crystal oscillation device according to any one of claims 1 to 7.
9. A crystal oscillator startup control method, comprising:
step A, outputting a power supply signal to a crystal oscillator as a power supply of the crystal oscillator;
step B1, after the power supply signal is output, if the clock signal output by the crystal oscillator is detected within a preset time, reducing the voltage of the power supply signal and then outputting the reduced voltage to the crystal oscillator;
and B2, repeatedly executing the step B1 until the clock signal is not detected within the preset time length, and increasing the voltage of the current power supply signal once and then providing the increased voltage as a first power supply signal with stable voltage for the crystal oscillator.
10. The crystal oscillator startup control method according to claim 9, further comprising:
step C1, after the power supply signal is output in the step A, if the clock signal is not detected within a preset time period, increasing the voltage of the power supply signal and then outputting the increased voltage to the crystal oscillator;
and C2, repeatedly executing the step C1 until the clock signal is detected within the preset time length, and providing the current power supply signal serving as a second power supply signal with stable voltage to the crystal oscillator.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202211342322.5A CN115765724A (en) | 2022-10-31 | 2022-10-31 | Crystal oscillator starting control circuit and method, crystal oscillator device and SOC chip |
| PCT/CN2023/111570 WO2024093417A1 (en) | 2022-10-31 | 2023-08-07 | Crystal oscillator starting control circuit and method, crystal oscillator apparatus, and soc chip |
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| CN202211342322.5A CN115765724A (en) | 2022-10-31 | 2022-10-31 | Crystal oscillator starting control circuit and method, crystal oscillator device and SOC chip |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116248046A (en) * | 2023-05-08 | 2023-06-09 | 深圳市中科蓝讯科技股份有限公司 | Crystal oscillator starting circuit, integrated chip packaging method, integrated chip and electronic equipment |
| WO2024093417A1 (en) * | 2022-10-31 | 2024-05-10 | 无锡华润上华科技有限公司 | Crystal oscillator starting control circuit and method, crystal oscillator apparatus, and soc chip |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP3522209B2 (en) * | 2000-09-29 | 2004-04-26 | 松下電器産業株式会社 | Optimal voltage adjustment circuit |
| TW200524285A (en) * | 2004-01-09 | 2005-07-16 | Sunplus Technology Co Ltd | Crystal accelerated oscillator |
| WO2011063352A1 (en) * | 2009-11-20 | 2011-05-26 | Maxlinear, Inc. | Clock-out amplitude calibration scheme to ensure sine-wave clock-out signal |
| CN104270113B (en) * | 2014-09-01 | 2017-03-22 | 长沙景嘉微电子股份有限公司 | Rapid low-power-consumption crystal oscillator starting circuit |
| CN113037215A (en) * | 2019-12-24 | 2021-06-25 | 炬芯科技股份有限公司 | Crystal oscillator control circuit and electronic equipment |
| CN112511155B (en) * | 2020-11-06 | 2023-10-10 | 深圳市国微电子有限公司 | Power supply voltage self-adaptive crystal oscillator driving circuit and oscillator |
| CN115765724A (en) * | 2022-10-31 | 2023-03-07 | 无锡华润上华科技有限公司 | Crystal oscillator starting control circuit and method, crystal oscillator device and SOC chip |
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- 2022-10-31 CN CN202211342322.5A patent/CN115765724A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024093417A1 (en) * | 2022-10-31 | 2024-05-10 | 无锡华润上华科技有限公司 | Crystal oscillator starting control circuit and method, crystal oscillator apparatus, and soc chip |
| CN116248046A (en) * | 2023-05-08 | 2023-06-09 | 深圳市中科蓝讯科技股份有限公司 | Crystal oscillator starting circuit, integrated chip packaging method, integrated chip and electronic equipment |
| CN116248046B (en) * | 2023-05-08 | 2023-08-22 | 深圳市中科蓝讯科技股份有限公司 | Crystal oscillator starting circuit, integrated chip packaging method, integrated chip and electronic equipment |
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| WO2024093417A1 (en) | 2024-05-10 |
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