CN115732419A - 半导体装置、半导体装置的制造方法及电力转换装置 - Google Patents
半导体装置、半导体装置的制造方法及电力转换装置 Download PDFInfo
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Abstract
目的在于提供能够在通过加压接合工序安装半导体元件时抑制防水层产生裂纹、抑制半导体装置的耐压下降的技术。半导体装置具有:半导体基板,其规定有单元区域、分离区域及末端区域,单元区域是流过电流的有源区域,分离区域设置于比单元区域更靠外周侧,在耐压保持时限制电场的产生,末端区域具有设置于比分离区域更靠外周侧的保护环区域和设置于比保护环区域更靠外周侧且在耐压保持时限制耗尽层的延伸的剩余区域;绝缘层,其在分离区域和末端区域将半导体基板的上表面覆盖;表面电极,其在单元区域和分离区域设置于半导体基板的上表面和绝缘层的上表面的一部分;以及防水层,其将绝缘层的从表面电极露出的部分覆盖。防水层与表面电极分离地设置。
Description
技术领域
本发明涉及半导体装置、半导体装置的制造方法及电力转换装置。
背景技术
已确认到由于水分从安装于半导体装置的半导体元件的末端部向内部侵入而导致半导体装置的耐压下降。作为用于解决该问题的构造,例如在专利文献1中公开了如下构造,即,将水分穿透率低的硅氮化膜(相当于防水层)包覆于在半导体基板的末端区域设置的绝缘层和金属电极(相当于表面电极),防止由水分引起的金属电极的腐蚀。
专利文献1:日本特开2019-175937号公报
但是,就通过例如银烧结接合等伴随向半导体元件的按压的加压接合工序而安装半导体元件的半导体装置而言,在向半导体元件的按压时金属电极容易变形。如果金属电极变形,则在搭至金属电极之上的硅氮化膜的部分处,无法追随变形的薄的硅氮化膜产生裂纹,该裂纹扩展至将末端区域覆盖的绝缘层。因此,存在水分从扩展至绝缘层的裂纹处侵入而使半导体装置的耐压下降的问题。
发明内容
因此,本发明的目的在于,提供能够在通过加压接合工序安装半导体元件时抑制防水层产生裂纹、抑制半导体装置的耐压下降的技术。
本发明涉及的半导体装置具有:半导体基板,其规定有单元区域、分离区域及末端区域,所述单元区域是流过电流的有源区域,所述分离区域设置于比所述单元区域更靠外周侧,在耐压保持时限制电场的产生,所述末端区域具有保护环区域和剩余区域,所述保护环区域设置于比所述分离区域更靠外周侧,所述剩余区域设置于比所述保护环区域更靠外周侧,在所述耐压保持时限制耗尽层的延伸;绝缘层,其在所述分离区域和所述末端区域处将所述半导体基板的上表面覆盖;表面电极,其在所述单元区域和所述分离区域处设置于所述半导体基板的上表面和所述绝缘层的上表面的一部分;以及防水层,其将所述绝缘层的从所述表面电极露出的部分覆盖,所述防水层与所述表面电极分离地设置。
发明的效果
根据本发明,防水层与表面电极分离地设置,在防水层没有成为防水层的裂纹起点的搭至表面电极之上的部分,因此,在通过加压接合工序安装半导体元件时,能够抑制防水层产生裂纹。由此,能够抑制半导体装置的耐压下降。
附图说明
图1是示意性地示出实施方式1涉及的半导体装置所具有的半导体元件的末端构造的剖视图。
图2是表示与实施方式1涉及的半导体装置所具有的半导体元件的末端构造相关的电场分布的模拟结果的一个例子的图。
图3是示意性地示出实施方式1涉及的半导体装置的制造工序的剖视图。
图4是表示电力转换***的结构的框图,在该电力转换***中应用了实施方式2涉及的电力转换装置。
具体实施方式
以下,一边参照附图,一边对实施方式进行说明。以下的各实施方式中说明的特征是例示,并非全部的特征都是必须的。另外,在以下示出的说明中,在多个实施方式中对相同的结构要素标注相同或类似的标号,主要对不同的结构要素进行说明。另外,在以下所记载的说明中,“上”、“下”、“左”、“右”、“表”或“背”等特定的位置及方向也并非必须与实际实施时的位置及方向一致。
<实施方式1>
以下,使用附图对实施方式1进行说明。图1是示意性地示出实施方式1涉及的半导体装置50(参照图3(e))所具有的半导体元件10的末端构造的剖视图。图2是表示与实施方式1涉及的半导体装置50(参照图3(e))所具有的半导体元件10的末端构造相关的电场分布的模拟结果的一个例子的图。
如图1所示,半导体装置50(参照图3(e))所具有的半导体元件10具有半导体基板1、绝缘层11、表面电极12、防水层13和保护膜14。
半导体基板1是n型半导体基板,规定有单元区域2、分离区域3和末端区域6。单元区域2是流过电流的有源区域,在单元区域2设置有p型半导体部。分离区域3是在比单元区域2更靠外周侧处以与单元区域2相邻且将单元区域2覆盖的方式设置的,是在耐压保持时限制电场的产生的区域。另外,在分离区域3设置有p型半导体部。
末端区域6具有保护环区域4和剩余区域5。保护环区域4是在比分离区域3更靠外周侧处以与分离区域3相邻且将分离区域3覆盖的方式设置的,在保护环区域4设置有离散的多个p型半导体部。
剩余区域5是在比保护环区域4更靠外周侧处以与保护环区域4相邻且将保护环区域4覆盖的方式设置的。剩余区域5是由n型半导体构成,在耐压保持时限制耗尽层延伸的区域。
在单元区域2例如配置有内置有未图示的二极管的半导体开关元件及二极管的至少1者。以下,以在单元区域2配置有内置有二极管的半导体开关元件的结构为例进行说明。在这样的结构中,在半导体开关元件为接通状态时单元区域2通电,在半导体开关元件为断开状态时分离区域3和末端区域6对耐压进行保持。
半导体基板1由以碳化硅为主要材料而构成的n型半导体形成。p型半导体部例如是通过将铝向以碳化硅为主要材料而构成的半导体进行离子注入,使该铝扩散而形成的。
绝缘层11设置为在分离区域3和末端区域6将半导体基板1的上表面覆盖。具体地说,绝缘层11在俯视观察时在分离区域3及末端区域6的将端缘部分排除的区域设置于半导体基板1的上表面。
表面电极12在单元区域2和分离区域3设置于半导体基板1的上表面和绝缘层11的上表面的一部分。具体地说,表面电极12在单元区域2和分离区域3设置于半导体基板1的上表面的一部分,在分离区域3设置于绝缘层11的上表面的一部分。另外,表面电极12是以从半导体基板1的上表面涵盖至绝缘层11的上表面的一部分的方式而设置的。
防水层13以将绝缘层11的从表面电极12露出的部分覆盖的方式设置于绝缘层11的从表面电极12露出的部分的上表面。另外,防水层13以不搭至表面电极12之上的方式与表面电极12分离地设置。即,防水层13仅形成于在加压接合工序时半导体元件10受到按压时基本不变形的绝缘层11的上表面。
保护膜14以将表面电极12的一部分、防水层13和绝缘层11覆盖的方式在单元区域2的一部分、分离区域3和末端区域6设置于半导体基板1的上表面。
如图2所示,在对半导体元件10施加了电压时,耗尽层D从单元区域2朝向外周侧延伸,但此时在分离区域3没有产生电场,在设置有离散的多个p型半导体的保护环区域4产生电场。在相对于保护环区域4而位于更外周侧的剩余区域5,直至耗尽层D延伸到的区域为止产生电场。基本上,剩余区域5设置得比所设想的在实际的使用耐压下耗尽层D的延伸长度长。即,在剩余区域5从中途开始不再产生电场。
因此,只要能够在保护环区域4和剩余区域5中的至少耗尽层D延伸的区域抑制水分侵入,半导体元件10就能够发挥充分的效果。由此,即使使防水层13与表面电极12分离,半导体元件10也能够发挥充分的效果,因此,能够确保半导体元件10的可靠性。
绝缘层11例如以硅氧化膜为主要材料而构成,保护膜14例如以聚酰亚胺或聚酰胺为主要材料而构成。另外,防水层13例如以硅氮化膜为主要材料而构成。有时采用对硅氮化膜赋予一定程度导电性而使保护环区域4的电场分布均衡化的方法,但本实施方式中的以防水为目的的硅氮化膜优选不具有导电性。
在形成防水层13时,例如如果分为至少2次进行成膜,则能够进一步提高防水层13的防水功能。这是因为即使在第1次的成膜时产生了小孔,也会在第2次及之后的成膜时将小孔填埋。
如图1所示,防水层13的一端侧与在半导体基板1的分离区域3处从表面电极12分离的部位相对,防水层13的另一端侧与半导体基板1的剩余区域5相对。这样,防水层13通过将与包含耗尽层D所延伸的方向上的端部在内的区域相对的绝缘层11的部分覆盖,从而能够抑制水分侵入至高电场部,因此,能够提高THB(Temperature Humidity Bias)试验中的寿命。这里,耗尽层D延伸的方向是指图1中的右方向。此外,防水层13的一端侧能够在图2中在由双向的箭头15示出的范围内与表面电极12分离。
另外,防水层13是以在俯视观察时止于比绝缘层11的端缘更靠内侧的方式设置的。在防水层13在俯视观察时从绝缘层11的端缘伸出的情况下,防水层13搭至绝缘层11的端缘的台阶,由此局部地产生防水层13变薄的部位。在通过加压接合工序而安装半导体元件10时,防水层13变薄的部位成为裂纹的起点,但由于防水层13在俯视观察时止于比绝缘层11的端缘更靠内侧处,因此,不产生防水层13变薄的部位,能够避免产生防水层13的加压接合时的裂纹的起点。
接下来,使用图3对半导体装置50的制造工序进行说明。图3(a)~(e)是示意性地示出实施方式1涉及的半导体装置50的制造工序的剖视图。
为了针对半导体元件10而提高在高温下进行动作时的可靠性,考虑通过烧结接合将半导体元件10接合的情况。首先,如图3(a)所示,准备在绝缘层16a的背面和表面分别设置有电路图案16b、16c的绝缘基板16,在电路图案16c的上表面配置接合材料17。作为接合材料17,例如使用以银或铜为主要材料而构成的接合材料。
接下来,如图3(b)所示,在绝缘基板16之上经由接合材料17而载置半导体元件10,在之后的工序即加压接合工序中在高温环境下施加压力而进行烧结接合。
如图3(c)所示,在加压接合工序中为了防止半导体元件10的损伤,在加压工具18与半导体元件10之间设置特氟龙(注册商标)片材等缓冲材料19。
如图3(d)所示,当在加压接合工序中通过烧结接合而进行了绝缘基板16与半导体元件10之间的电连接及热连接之后,如图3(e)所示,通过将导线键合21连接于半导体元件10的表面的电极(未图示),从而能够进行大电流通电。
然后,将一体形成有用于进行与外部之间的电连接的端子(未图示)的壳体20与电路图案16c接合。在壳体20的内部填充凝胶等封装材料22,通过封装材料22将半导体元件10的周围包覆,由此完成提高了防污性的半导体装置50。
接下来,对防水层13搭至表面电极12的情况下的问题和实施方式1涉及的半导体装置50的效果进行说明。
当维持了针对半导体装置50在高湿的条件下施加有高偏置电压的状态时,有时在产生了电场的保护环区域4,水分穿透封装材料22而从外部环境到达半导体元件10的表面。
与以硅为主要材料而构成的半导体元件相比,以碳化硅为主要材料而构成的半导体元件10通常保护环区域4的宽度窄,在绝缘层11之上产生的电场峰值高。因此,在保护环区域4处水分容易移动,在产生了水分的穿透时容易在p型半导体部发生性质变化。存在以下问题,即,如果到达与保护环区域4相对的绝缘层11的部分的水分穿透了绝缘层11,则保护环区域4的p型半导体部发生性质变化,使半导体装置50的耐压下降。
为了解决该问题,存在通过以与硅氧化膜相比水分难以穿透的硅氮化膜为主要材料构成的防水层13对绝缘层11进行保护的方法。但是,当在加压接合工序中通过向半导体元件10的表面的按压而安装了半导体元件10的情况下,搭至表面电极12等容易压力变形的材料之上的防水层13产生裂纹,该裂纹扩展至将末端区域6覆盖的绝缘层11。因此,存在水分从扩展至绝缘层11的裂纹处侵入而使半导体装置50的耐压下降的问题。
与此相对,实施方式1涉及的半导体装置50具有:半导体基板1,其规定有单元区域2、分离区域3及末端区域6,该单元区域2是流过电流的有源区域,该分离区域3设置于比单元区域2更靠外周侧,在耐压保持时限制电场的产生,该末端区域具有保护环区域4和剩余区域5,该保护环区域4设置于比分离区域3更靠外周侧,该剩余区域5设置于比保护环区域4更靠外周侧,在耐压保持时限制耗尽层D的延伸;绝缘层11,其在分离区域3和末端区域6处将半导体基板1的上表面覆盖;表面电极12,其在单元区域2和分离区域3处设置于半导体基板1的上表面和绝缘层11的上表面的一部分;以及防水层13,其将绝缘层11的从表面电极12露出的部分覆盖,防水层13与表面电极12分离地设置。
因此,防水层13与表面电极12分离地设置,在防水层13没有成为防水层13的裂纹起点的搭至表面电极12之上的部分,因此,在通过加压接合工序安装半导体元件10时,能够抑制防水层13产生裂纹。由此,能够抑制半导体装置50的耐压下降。综上所述,能够提高半导体装置50的耐久性。
另外,防水层13是以在俯视观察时止于比绝缘层11的端缘更靠内侧处的方式设置的。因此,不产生防水层13变薄的部位,能够避免产生防水层13的加压接合时的裂纹的起点。由此,能够抑制防水层13以绝缘层11的台阶为起点而产生裂纹。
另外,半导体元件10在单元区域2、分离区域3和末端区域6处还具有将半导体基板1的上表面覆盖的保护膜14,保护膜14将表面电极12、防水层13和绝缘层11覆盖。因此,能够在加压接合工序时抑制防水层13及绝缘层11破损。
另外,防水层13包含硅氮化膜,因此,能够进一步提高防水层13的防水功能。
另外,保护膜14包含聚酰亚胺或聚酰胺,因此在加压接合工序时比防水层13及绝缘层11更容易变形,能够通过保护膜14的变形而吸收与向半导体元件10的按压相对应的应力。由此,能够抑制防水层13及绝缘层11产生裂纹。
另外,在形成防水层13时,至少分为2次进行成膜,因此,即使在第1次成膜时产生了小孔,也会在第2次及之后的成膜时将小孔填埋,所以,能够进一步提高防水层13的防水功能。
<实施方式2>
本实施方式是将上述实施方式1涉及的半导体装置50应用于电力转换装置。实施方式1涉及的半导体装置50的应用不限定于特定的电力转换装置,但以下,作为实施方式2,对将实施方式1涉及的半导体装置50应用于三相逆变器的情况进行说明。
图4是表示电力转换***的结构的框图,在该电力转换***中应用了实施方式2涉及的电力转换装置200。
图4所示的电力转换***由电源100、电力转换装置200、负载300构成。电源100是直流电源,向电力转换装置200供给直流电力。电源100能够由各种电源构成,例如,能够由直流***、太阳能电池、蓄电池构成,也可以由与交流***连接的整流电路、AC/DC转换器构成。另外,也可以使电源100由将从直流***输出的直流电力转换为规定的电力的DC/DC转换器构成。
电力转换装置200是连接在电源100与负载300之间的三相逆变器,将从电源100供给的直流电力转换为交流电力,向负载300供给交流电力。电力转换装置200如图4所示,具有:主转换电路201,其将直流电力转换为交流电力而输出;驱动电路202,其输出对主转换电路201的各开关元件进行驱动的驱动信号;以及控制电路203,其将对驱动电路202进行控制的控制信号输出至驱动电路202。
负载300是由从电力转换装置200供给的交流电力进行驱动的三相电动机。此外,负载300不限于特定的用途,是搭载于各种电气设备的电动机,例如,用作面向混合动力汽车、电动汽车、铁路车辆、电梯或空调设备的电动机。
以下,对电力转换装置200的详情进行说明。主转换电路201具有开关元件和续流二极管(未图示),通过开关元件的通断,从而将从电源100供给的直流电力转换为交流电力,向负载300供给。主转换电路201的具体的电路结构存在各种结构,但本实施方式涉及的主转换电路201是两电平的三相全桥电路,能够由6个开关元件和与各个开关元件逆并联的6个续流二极管构成。主转换电路201的各开关元件应用上述实施方式1涉及的半导体装置50。6个开关元件两个两个地串联连接而构成上下桥臂,各上下桥臂构成全桥电路的各相(U相、V相、W相)。并且,各上下桥臂的输出端子即主转换电路201的3个输出端子与负载300连接。
驱动电路202生成对主转换电路201的开关元件进行驱动的驱动信号,供给至主转换电路201的开关元件的控制电极。具体地说,按照来自后述的控制电路203的控制信号,向各开关元件的控制电极输出将开关元件设为接通状态的驱动信号和将开关元件设为断开状态的驱动信号。在将开关元件维持为接通状态的情况下,驱动信号是大于或等于开关元件的阈值电压的电压信号(接通信号),在将开关元件维持为断开状态的情况下,驱动信号成为小于或等于开关元件的阈值电压的电压信号(断开信号)。
控制电路203对主转换电路201的开关元件进行控制,以向负载300供给所期望的电力。具体地说,基于应向负载300供给的电力,对主转换电路201的各开关元件应成为接通状态的时间(接通时间)进行计算。例如,能够通过与应输出的电压相对应地对开关元件的接通时间进行调制的PWM控制,对主转换电路201进行控制。并且,向驱动电路202输出控制指令(控制信号),以在各时刻向应成为接通状态的开关元件输出接通信号,向应成为断开状态的开关元件输出断开信号。驱动电路202按照该控制信号,将接通信号或断开信号作为驱动信号而向各开关元件的控制电极输出。
在本实施方式涉及的电力转换装置200中,作为主转换电路201的开关元件而应用实施方式1涉及的半导体装置50,因此,即使在通过加压接合工序而安装了半导体元件10的情况下,也能够抑制水分穿透率低的防水层13产生裂纹,抑制半导体装置50的耐压下降。由此,能够抑制电力转换装置200的可靠性下降。
在本实施方式中,对在两电平的三相逆变器中应用实施方式1涉及的半导体装置50的例子进行了说明,但实施方式1涉及的半导体装置50的应用不限于此,能够应用于各种电力转换装置。在本实施方式中,采用了两电平的电力转换装置,但也可以是三电平或多电平的电力转换装置,在向单相负载供给电力的情况下,也可以向单相逆变器应用实施方式1涉及的半导体装置50。另外,在向直流负载等供给电力的情况下,也能够向DC/DC转换器、AC/DC转换器应用实施方式1涉及的半导体装置50。
另外,应用了实施方式1涉及的半导体装置50的电力转换装置不限定于上述的负载为电动机的情况,例如,还能够用作放电加工机、激光加工机、感应加热烹调器或非接触供电***的电源装置,并且也能够用作太阳能发电***、蓄电***等的功率调节器。
此外,能够对各实施方式自由地进行组合,或对各实施方式适当地进行变形、省略。
标号的说明
1半导体基板,2单元区域,3分离区域,4保护环区域,5剩余区域,6末端区域,11绝缘层,12表面电极,13防水层,14保护膜,50半导体装置,200电力转换装置,201主转换电路,202驱动电路,203控制电路,D耗尽层。
Claims (8)
1.一种半导体装置,其具有:
半导体基板,其规定有单元区域、分离区域及末端区域,所述单元区域是流过电流的有源区域,所述分离区域设置于比所述单元区域更靠外周侧,在耐压保持时限制电场的产生,所述末端区域具有保护环区域和剩余区域,所述保护环区域设置于比所述分离区域更靠外周侧,所述剩余区域设置于比所述保护环区域更靠外周侧,在所述耐压保持时限制耗尽层的延伸;
绝缘层,其在所述分离区域和所述末端区域处将所述半导体基板的上表面覆盖;
表面电极,其在所述单元区域和所述分离区域处设置于所述半导体基板的上表面和所述绝缘层的上表面的一部分;以及
防水层,其将所述绝缘层的从所述表面电极露出的部分覆盖,
所述防水层与所述表面电极分离地设置。
2.根据权利要求1所述的半导体装置,其中,
所述防水层是以在俯视观察时止于比所述绝缘层的端缘更靠内侧处的方式设置的。
3.根据权利要求1或2所述的半导体装置,其中,
还具有保护膜,所述保护膜在所述单元区域、所述分离区域和所述末端区域处将所述半导体基板的上表面覆盖,
所述保护膜将所述表面电极、所述防水层和所述绝缘层覆盖。
4.根据权利要求1至3中任一项所述的半导体装置,其中,
所述防水层包含硅氮化膜。
5.根据权利要求3所述的半导体装置,其中,
所述保护膜包含聚酰亚胺或聚酰胺。
6.根据权利要求1至5中任一项所述的半导体装置,其中,
所述半导体基板包含碳化硅。
7.一种半导体装置的制造方法,其制造权利要求1至6中任一项所述的半导体装置,
在形成所述防水层时,至少分为2次进行成膜。
8.一种电力转换装置,其具有:
主转换电路,其具有权利要求1至6中任一项所述的半导体装置,所述主转换电路对被输入进来的电力进行转换而输出;
驱动电路,其将对所述半导体装置进行驱动的驱动信号输出至所述半导体装置;以及
控制电路,其将对所述驱动电路进行控制的控制信号输出至所述驱动电路。
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JP4357753B2 (ja) * | 2001-01-26 | 2009-11-04 | 株式会社東芝 | 高耐圧半導体装置 |
US8093652B2 (en) * | 2002-08-28 | 2012-01-10 | Ixys Corporation | Breakdown voltage for power devices |
US8564088B2 (en) * | 2008-08-19 | 2013-10-22 | Infineon Technologies Austria Ag | Semiconductor device having variably laterally doped zone with decreasing concentration formed in an edge region |
JP5765251B2 (ja) * | 2012-01-24 | 2015-08-19 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
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