CN115697029A - Superconducting quantum chip and preparation method thereof - Google Patents
Superconducting quantum chip and preparation method thereof Download PDFInfo
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- CN115697029A CN115697029A CN202211716026.7A CN202211716026A CN115697029A CN 115697029 A CN115697029 A CN 115697029A CN 202211716026 A CN202211716026 A CN 202211716026A CN 115697029 A CN115697029 A CN 115697029A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The invention discloses a superconducting quantum chip and a preparation method thereof, which are applied to the technical field of superconducting quantum chips and comprise a substrate; a connecting bridge extending inside the substrate; one end of the connecting bridge extends from the surface of one side of the substrate to the inside of the substrate, and the other end of the connecting bridge extends from the surface of the same side of the substrate to the inside of the substrate; a plurality of sections of communicated channels are arranged in the substrate, and superconducting materials are filled in the channels to form a connecting bridge; a plurality of coplanar waveguide structures located on a surface of the substrate; one end of the coplanar waveguide structure is contacted with one end of the connecting bridge, and the other end of the coplanar waveguide structure is contacted with the other end of the connecting bridge. The connecting bridge is arranged in the substrate and is connected with the coplanar waveguide structure on the surface of the substrate through the connecting bridge in the substrate, and the connecting bridge is positioned in the substrate, so that the substrate has extremely high strength and is not easy to damage; meanwhile, the connection bridge arranged in the substrate can eliminate the limitation of device processing in the chip.
Description
Technical Field
The invention relates to the technical field of superconducting quantum chips, in particular to a superconducting quantum chip and a preparation method thereof.
Background
Superconducting quantum is one of the most chance to realize fault-tolerant computation in the current quantum computation schemes, and the bit number has broken through 100 bits. The superconducting quantum chip is usually prepared from superconducting materials on an insulating substrate by a micro-nano processing technology into required devices and circuits. The superconducting quantum utilizes a microwave circuit of the coplanar waveguide to carry out measurement and control and coupling, so that the superconducting quantum is easily influenced by a parasitic mode of a slot line, and meanwhile, when a multi-bit chip is measured, controlled and read, signals have obvious crosstalk effects, so that the signals are reduced, decoherence is caused, and the comprehensive performance of the chip is reduced. In this regard, an air bridge scheme is currently generally adopted to reconnect the ground plane divided by the coplanar waveguide, so as to achieve potential balance to reduce the influence. Generally, after other circuit devices are completed, firstly defining a pier region by utilizing a photoetching process, secondly forming an arc-shaped bridge support by utilizing a thermal reflux effect of photoresist, secondly cleaning a natural oxide layer in the pier region by utilizing Ar ions, then evaporating a superconducting metal layer with a certain thickness by utilizing an electron beam, secondly defining a bridge floor by utilizing the photoetching process for protection, and finally cleaning and removing the photoresist to form an air bridge after removing redundant superconducting metal layers by utilizing the etching process and leaving the bridge floor and the piers.
However, in the prior art, after the coplanar waveguide structure and the josephson junction are prepared, the air bridge is prepared by the processes of photoetching, coating and etching, and the risks of residual pollution and damage to the original device exist. High temperature processes such as photoetching baking and photoresist backflow have obvious influence on the characteristics of the Josephson junction, so that the overall performance of the chip is changed; because the air bridge forms a suspended structure through the bridge piers and the bridge floor, the air bridge has lower strength and is easy to damage and break in the processing and preparation process; if the air bridge is processed before the preparation of the Josephson junction, the existence of the air bridge obviously interferes with the preparation of the Josephson junction, and the whole processing technology of the device is limited. Therefore, how to provide a connecting bridge which can eliminate the limitation of device processing in a quantum chip and has high strength and is not easy to break is a problem which needs to be solved by the technical personnel in the field.
Disclosure of Invention
The invention aims to provide a superconducting quantum chip which can eliminate the limitation of device processing in the chip and has higher strength; another object of the present invention is to provide a method for manufacturing a superconducting quantum chip, which can eliminate the limitation of device processing in the chip, and the manufactured quantum chip has high strength.
In order to solve the above technical problems, the present invention provides a superconducting quantum chip, comprising:
a substrate;
a connecting bridge extending inside the substrate; one end of the connecting bridge extends from the surface of one side of the substrate to the inside of the substrate, and the other end of the connecting bridge extends from the surface of the same side of the substrate to the inside of the substrate; a plurality of sections of communicated channels are arranged in the substrate, and superconducting materials are filled in the channels to form the connecting bridge;
a coplanar waveguide structure located on the surface of the substrate; the coplanar waveguide structure comprises at least two end parts which are separated from each other on the surface of the substrate, one end part of the coplanar waveguide structure is contacted with one end of the connecting bridge, and the other end part of the coplanar waveguide structure is contacted with the other end of the connecting bridge.
Optionally, the substrate is provided with a first channel extending obliquely from the surface into the substrate, and a second channel extending obliquely from the surface into the substrate; the first channel communicates with an end of the second channel within the substrate;
and superconducting materials are filled in the first channel and the second channel to form the connecting bridge.
Optionally, the first channel and the second channel extend opposite within the substrate.
Optionally, a first inclined groove and a second inclined groove are formed in the surface of the substrate, the first channel extends from an inclined surface of the first inclined groove to the inside of the substrate, and the second channel extends from an inclined surface of the second inclined groove to the inside of the substrate.
Optionally, the first channel extends from an inclined surface of the first inclined surface groove, which is opposite to the second inclined surface groove, to one side of the second inclined surface groove;
the second channel extends from an inclined surface of the second inclined surface groove, which is opposite to the first inclined surface groove, to one side of the first inclined surface groove.
The invention also provides a preparation method of the superconducting quantum chip, which comprises the following steps:
a plurality of sections of channels extending towards the inside of the substrate are arranged on the surface of one side of the substrate; the multiple sections of the channels are communicated with each other;
providing a superconducting material within said channel, forming a connecting bridge extending within said substrate; the end parts of the connecting bridges are positioned on the same side surface of the substrate;
arranging a coplanar waveguide structure on the surface of the substrate to form the superconducting quantum chip; the coplanar waveguide structure comprises at least two end parts which are separated from each other on the surface of the substrate, one end part of the coplanar waveguide structure is contacted with one end of the connecting bridge, and the other end part of the coplanar waveguide structure is contacted with the other end of the connecting bridge.
Optionally, the providing, on a side surface of the substrate, a plurality of channels extending toward the inside of the substrate includes:
and based on a laser etching process, performing laser etching on the substrate on the surface of one side of the substrate to form a plurality of communicated channels.
Optionally, the providing, on a side surface of the substrate, a plurality of channels extending toward an inside of the substrate includes:
etching the surface of one side of the substrate to form a plurality of inclined plane grooves;
and etching the substrate on the inclined plane of the inclined plane groove based on an ICP (inductively coupled plasma) or IBE (ion beam etching) process to form a plurality of communicated channels.
Optionally, the forming, by etching, a plurality of inclined grooves on a surface of one side of the substrate includes:
and etching the surface of one side of the substrate by using an etching solution to form a plurality of inclined plane grooves.
Optionally, a superconducting material is disposed in the channel, and before forming the connecting bridge extending inside the substrate, the method further includes:
carrying out thermal oxidation on the channel to form an oxide layer;
and cleaning the oxide layer to smooth the inner wall of the channel.
Optionally, the disposing a superconducting material in the channel, and forming a connecting bridge extending inside the substrate includes:
filling the channel with a superconducting material melt, and carrying out ultrasonic treatment on the superconducting material melt.
The invention provides a superconducting quantum chip, comprising: a substrate; a connecting bridge extending inside the substrate; one end of the connecting bridge extends from the surface of one side of the substrate to the inside of the substrate, and the other end of the connecting bridge extends from the surface of the same side of the substrate to the inside of the substrate; a plurality of sections of communicated channels are arranged in the substrate, and superconducting materials are filled in the channels to form a connecting bridge; a coplanar waveguide structure located on the surface of the substrate; the coplanar waveguide structure includes at least two end portions separated from each other on a surface of the substrate, one end portion of the coplanar waveguide structure being in contact with one end of the connection bridge, and the other end portion of the coplanar waveguide structure being in contact with the other end of the connection bridge.
The connecting bridge is arranged in the substrate and is connected with the coplanar waveguide structure on the surface of the substrate through the connecting bridge in the substrate, and the connecting bridge is positioned in the substrate, so that the substrate has extremely high strength and is not easy to damage; meanwhile, the connecting bridge arranged in the substrate does not interfere with the coplanar waveguide structure arranged on the surface of the substrate, so that the limitation of device processing in a chip can be eliminated.
Another objective of the present invention is to provide a method for manufacturing a superconducting quantum chip, which also has the above beneficial effects, and will not be described herein again.
Drawings
In order to more clearly illustrate the embodiments or technical solutions of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a superconducting quantum chip according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a specific superconducting quantum chip according to an embodiment of the present invention;
fig. 3 to 9 are process flow diagrams of a method for manufacturing a superconducting quantum chip according to an embodiment of the present invention;
fig. 10 to 12 are process flow diagrams of a first specific superconducting quantum chip manufacturing method according to an embodiment of the present invention;
fig. 13 to 17 are process flow diagrams of a second specific method for manufacturing a superconducting quantum chip according to an embodiment of the present invention;
fig. 18 to 20 are process flow charts of a third specific method for manufacturing a superconducting quantum chip according to an embodiment of the present invention.
In the figure: 1. the structure comprises a substrate, 2 a connecting bridge, 3 a coplanar waveguide structure, 4 a bevel groove, 41 a first bevel groove, 42 a second bevel groove, 5 a channel, 51 a first channel, 52 a second channel and 6 an oxide layer.
Detailed Description
The core of the invention is to provide a superconducting quantum chip. In the prior art, after the preparation of the coplanar waveguide structure and the Josephson junction is finished, an air bridge is prepared by the processes of photoetching, coating and etching, and the risks of residual pollution and damage to the original device exist; the air bridge is of a suspended structure formed by the piers and the bridge floor, so that the air bridge is low in strength and easy to break in the processing and preparation process; if the air bridge is processed before the preparation of the Josephson junction, the existence of the air bridge obviously interferes with the preparation of the Josephson junction, and the whole processing technology of the device is limited.
The invention provides a superconducting quantum chip, comprising: a substrate; a connecting bridge extending inside the substrate; one end of the connecting bridge extends from the surface of one side of the substrate to the inside of the substrate, and the other end of the connecting bridge extends from the surface of the same side of the substrate to the inside of the substrate; a plurality of sections of communicated channels are arranged in the substrate, and superconducting materials are filled in the channels to form a connecting bridge; a plurality of coplanar waveguide structures located on a surface of the substrate; the coplanar waveguide structure includes at least two end portions separated from each other on a surface of the substrate, one end portion of the coplanar waveguide structure being in contact with one end of the connection bridge, and the other end portion of the coplanar waveguide structure being in contact with the other end of the connection bridge.
The connecting bridge is arranged in the substrate and connected with the coplanar waveguide structure on the surface of the substrate through the connecting bridge in the substrate, and the connecting bridge is positioned in the substrate, so that the substrate has extremely high strength and is not easy to damage; meanwhile, the connecting bridge arranged in the substrate does not interfere with the coplanar waveguide structure arranged on the surface of the substrate, so that the limitation of device processing in a chip can be eliminated.
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1 and fig. 2, fig. 1 is a schematic structural diagram of a superconducting quantum chip according to an embodiment of the present invention; fig. 2 is a schematic structural diagram of a specific superconducting quantum chip according to an embodiment of the present invention.
Referring to fig. 1, in an embodiment of the present invention, a superconducting quantum chip includes: a substrate 1; a connecting bridge 2 extending inside the substrate 1; one end of the connecting bridge 2 extends from the surface of one side of the substrate 1 to the inside of the substrate 1, and the other end of the connecting bridge 2 extends from the surface of the same side of the substrate 1 to the inside of the substrate 1; a plurality of sections of communicated channels 5 are arranged in the substrate 1, and superconducting materials are filled in the channels 5 to form the connecting bridge 2; a coplanar waveguide structure 3 positioned on the surface of the substrate 1; the coplanar waveguide structure 3 comprises at least two end parts which are separated from each other on the surface of the substrate 1, one end part of the coplanar waveguide structure 3 is contacted with one end of the connecting bridge 2, and the other end part of the coplanar waveguide structure 3 is contacted with the other end of the connecting bridge 2.
The substrate 1 may be a high-resistance silicon substrate 1 or a sapphire substrate 1, which is a carrying structure of a superconducting quantum chip. The substrate 1 is provided with a connecting bridge 2 extending inside the substrate 1, the connecting bridge 2 has at least two ends, and the ends of the connecting bridge 2 need to be located on the same surface of the substrate 1 so as to connect the coplanar waveguide structures 3 arranged on the same surface of the substrate 1. Whereas from either end, the connecting bridge 2 will extend from the surface of the substrate 1 towards the inside of the substrate 1 and finally towards the same surface of the substrate 1, so that in the present embodiment the connecting bridge 2 extends generally towards the inside of the substrate 1, in particular, one end of the connecting bridge 2 will extend from the surface of one side of the substrate 1 towards the inside of the substrate 1, and the other end will also extend from the surface of the same side of the substrate 1 towards the inside of the substrate 1, i.e. in the present embodiment the connecting bridge 2 will not protrude from the surface of the substrate 1, which would have an effect on the coplanar waveguide structure 3 prepared on the surface of the substrate 1.
The material of the connecting bridge 2 is superconducting material, and the connecting bridge 2 is aluminum bridge, indium bridge, tin bridge, titanium nitride bridge or niobium nitride bridge. Specifically, the material of the connecting bridge 2 may be aluminum (Al), indium (In), tiN (Sn), titanium nitride (TiN), niobium nitride (NbN), etc., and the specific material of the connecting bridge 2 is not particularly limited In the embodiment of the present invention. The connecting bridge 2 is specifically that a channel 5 is arranged in the substrate 1, two ends of the channel 5 need to be located on the same surface of the substrate 1, then a superconducting material is arranged in the channel 5 to form the connecting bridge 2, and the ends of the connecting bridge 2 are electrically connected with each other through the connecting bridge 2.
The surface of the substrate 1 is provided with coplanar waveguide structures 3 separated from each other, i.e. at the surface of the substrate 1, the coplanar waveguide structures 3 are separated from each other. The separated coplanar waveguide structures 3 are connected with each other through the connecting bridge 2, and the specific coplanar waveguide structure 3 is in contact with one end of the connecting bridge 2 for connection; another coplanar waveguide structure 3 is connected in contact with the other end of the connecting bridge 2, so that the two coplanar waveguide structures 3 are connected by the connecting bridge 2.
Specifically, in the embodiment of the present invention, a plurality of sections of communicated channels 5 are disposed in the substrate 1, and the channels 5 are filled with a superconducting material to form the connecting bridge 2. That is, in the embodiment of the present invention, a plurality of channels 5 are etched from the surface of the substrate 1 to the inside of the substrate 1, and the channels 5 are communicated with each other. Then, the passage 5 is filled with a superconducting material to form the connecting bridge 2.
In the embodiment of the present invention, the channel 5 filled with the superconducting material is specifically composed of two channels 5, which are a first channel 51 and a second channel 52. Specifically, the substrate 1 is provided with a first channel 51 extending obliquely from the surface into the substrate 1, and a second channel 52 extending obliquely from the surface into the substrate 1; the first passage 51 communicates with an end of the second passage 52 in the substrate 1; the first channel 51 and the second channel 52 are filled with superconducting material to form the connecting bridge 2.
A first port region corresponding to the first channel 51 and a second port region corresponding to the second channel 52 are pre-divided on the surface of the substrate 1, and the first channel 51 extends from the first port region to the inside of the substrate 1 at a predetermined inclination angle, and the second channel 52 extends from the second port region to the inside of the substrate 1 at a predetermined inclination angle. The two channels 5 are generally inclined at different angles so that the first channel 51 communicates with the second channel 52 at the end inside the substrate 1, generally forming a channel 5 resembling a V. The first channel 51 and the second channel 52 are filled with a superconducting material, and the connecting bridge 2 is formed. Specifically, the first channel 51 and the second channel 52 do not extend at a perpendicular angle to the substrate 1, but extend at an oblique angle within the substrate 1.
Further, in the embodiment of the present invention, the first channel 51 and the second channel 52 extend toward each other in the substrate 1. I.e. the first passages 51 will extend obliquely downwards from the surface of the substrate 1 in a direction directed towards the second passages 52, while the second passages 52 will extend obliquely downwards from the surface of the substrate 1 in a direction directed towards the first passages 51, i.e. the first passages 51 and the second passages 52 extend in an obliquely downwards direction towards each other in the substrate 1, thereby forming V-shaped passages 5. In this structure, the first channel 51 and the second channel 52 extend directly from the surface of the substrate 1 into the substrate 1.
Specifically, in the embodiment of the present invention, the surface of the substrate 1 is provided with a first bevel groove 41 and a second bevel groove 42, the first channel 51 extends from the bevel of the first bevel groove 41 toward the inside of the substrate 1, and the second channel 52 extends from the bevel of the second bevel groove 42 toward the inside of the substrate 1.
Referring to fig. 2, that is, in the embodiment of the present invention, a first inclined plane groove 41 may be first provided in the substrate 1 corresponding to the first port region of the first channel 51, and the first inclined plane groove 41 has at least one inclined plane; correspondingly, a second bevel recess 42 is provided in the region of the substrate 1 corresponding to the second end opening of the second channel 52, which second bevel recess 42 also has at least one bevel. Thereafter, a first passage 51 extending inward of the substrate 1 along an inclination angle may be provided based on the inclination of the above-described first inclined groove 41; accordingly, a second channel 52 extending toward the inside of the substrate 1 along an inclined angle may be provided based on the inclined surface of the second inclined groove 42, in which case the first channel 51 is communicated with the end of the second channel 52 in the substrate 1, and the channel 5 is filled with the superconducting material to form the connecting bridge 2. Because the etching process of some porous channels limits the etching angle of the porous channels and the surface angle of the substrate 1, in order to flexibly adjust the angle of the channel 5, in the embodiment of the invention, the inclined groove 4 can be etched on the surface of the substrate 1 firstly, and then the channel 5 can be flexibly etched based on the inclined angle of the inclined surface of the groove, so that the channel 5 can be conveniently arranged.
Further, in the present embodiment, the first passage 51 extends from the slope of the first slope groove 41, which is opposite to the second slope groove 42, to the second slope groove 42 side; the second channel 52 extends from the slope of the second slope groove 42 opposite to the first slope groove 41 toward the first slope groove 41 side.
Specifically, an inclined plane facing the second inclined plane groove 42 in the first inclined plane groove 41 is selected, and a first channel 51 extending obliquely downward toward the second inclined plane groove 42 is arranged on the basis of the inclined plane; meanwhile, a slope of the second slope groove 42 facing the first slope groove 41 is selected, and a second channel 52 extending obliquely downward toward the first slope groove 41 is provided based on the slope, thereby finally forming the connecting bridge 2.
It should be noted that, in addition to the above structure, the connecting bridge 2 only connecting two coplanar waveguide structures 3 may be a multi-segment channel 5 with more than two segments, and the multi-segment channels 5 are connected to each other to form a bent channel 5, so as to form the connecting bridge 2 after filling the superconducting material. And when more than two coplanar waveguide structures 3 need to be connected simultaneously, for example, three coplanar waveguide structures 3 need to be communicated with each other, at this time, besides that the coplanar waveguide structures 3 can be communicated with each other two by using the connecting bridge 2 of the above structure, a three-port connecting bridge 2 can be provided, that is, three channels 5 extending from the surface of the substrate 1 to the inside of the substrate 1 are provided, the ends of the three channels 5 in the substrate 1 are communicated with each other, then, a three-port connecting bridge 2 can be formed after the channels 5 are filled with superconducting materials, at this time, the connecting bridge 2 has three branches, and the connecting bridge 2 can simultaneously communicate the three coplanar waveguide structures 3 with each other. Of course, as the number of coplanar waveguide structures 3 to be connected increases, the number of branches of the connecting bridge 2 may further increase.
According to the superconducting quantum chip provided by the embodiment of the invention, the connecting bridge 2 is arranged in the substrate 1, the coplanar waveguide structure 3 on the surface of the substrate 1 is connected through the connecting bridge 2 in the substrate 1, and the connecting bridge 2 is positioned in the substrate 1, so that the superconducting quantum chip has extremely high strength and is not easy to damage; meanwhile, the connecting bridge 2 arranged in the substrate 1 does not interfere with the coplanar waveguide structure 3 arranged on the surface of the substrate 1, so that the limitation of device processing in a chip can be eliminated.
The following provides a method for preparing a superconducting quantum chip, and the specific contents of the preparation method can be referred to in correspondence with the structure of the superconducting quantum chip.
Referring to fig. 3 to 9, fig. 3 to 9 are process flow diagrams of a method for manufacturing a superconducting quantum chip according to an embodiment of the present invention.
Referring to fig. 3, in an embodiment of the present invention, a method for manufacturing a superconducting quantum chip includes:
s101: a plurality of channels extending toward the inside of the substrate are provided on one side surface of the substrate.
In the present embodiment a plurality of sections of said channels 5 are in communication with each other. Referring to fig. 4, in this step, the substrate 1 is first etched, and specifically, a plurality of channels 5 extending from the surface of the substrate 1 toward the inside of the substrate 1 are provided. The channel 5 may specifically include the first channel 51 and the second channel 52, and details about etching the channel 5 will be described in detail in the following embodiments of the present invention, which are not described herein again.
S102: a superconducting material is disposed within the channel, forming a connecting bridge extending within the substrate.
In the embodiment of the present invention, the ends of the connecting bridges 2 are located on the same side surface of the substrate 1, so as to connect coplanar waveguide structures 3 subsequently disposed on the same surface of the substrate 1 to each other.
Referring to fig. 5 and 6, in this step, a superconducting material is disposed in the channel 5, and after the channel 5 is filled with the superconducting material, a connecting bridge 2 is formed, and the end of the connecting bridge 2 does not protrude from the surface of the substrate 1. Depending on the superconducting material, the channel 5 may be filled with the superconducting material by different processes. For example, when a superconducting metal or a metal compound having a melting point lower than that of the substrate 1, such as aluminum, tin, indium, etc., is used, the superconducting metal or the metal compound having a lower melting point may be heated to a molten state to form a molten metal, and then the substrate 1 provided with the channel 5 may be immersed in the molten metal, and at this time, the ultrasonic function may be further turned on, so that the molten metal may be sufficiently immersed in the etched channel 5 by ultrasonic vibration. Namely, the step may specifically include: filling the channel 5 with a superconducting material melt, and performing ultrasonic treatment on the superconducting material melt. The function of the ultrasonic treatment is to eliminate bubbles in the channel 5 and ensure that the melt of superconducting material enters the channel 5 sufficiently. Then, the melt on the surface of the substrate 1 may be cooled by natural cooling or the like to form the connecting bridge 2; and finally, polishing and grinding the surface of the substrate 1 by using the processes of CMP (chemical mechanical polishing) and the like, removing redundant superconducting materials on the surface of the substrate 1 and cleaning the substrate to complete the preparation of the connecting bridge 2.
When a superconducting metal compound such as TiN or NbN is used as the superconducting material, the superconducting material in the channel 5 may be grown and filled by a CVD (chemical vapor deposition) or ALD (atomic layer deposition) process, or the superconducting material in the channel 5 may be filled by an evaporation apparatus capable of tilting the angle, and the specific filling method of the superconducting material is not particularly limited in the embodiment of the present invention. Of course, after the superconducting material is filled, the surface of the substrate 1 is usually polished and ground, and the excess superconducting material on the surface of the substrate 1 is removed and cleaned, so as to complete the preparation of the connecting bridge 2.
S103: and arranging a coplanar waveguide structure on the surface of the substrate to form the superconducting quantum chip.
In the embodiment of the present invention, the coplanar waveguide structure 3 includes at least two end portions separated from each other on the surface of the substrate 1, one end portion of the coplanar waveguide structure 3 is in contact with one end of the connection bridge 2, and the other end portion of the coplanar waveguide structure 3 is in contact with the other end of the connection bridge 2. Details of the coplanar waveguide structure 3 will be described in detail in the following embodiments of the invention, and will not be described herein.
Since the connecting bridge 2 does not protrude from the surface of the substrate 1, the surface of the substrate 1 is a flat surface at this time, and the arrangement may be performed by referring to a specific process for arranging the coplanar waveguide structure 3 in the prior art, which is not described herein again.
Specifically, the step may specifically include:
referring to fig. 7, 8 and 9, the sample after the above treatment is placed into a magnetron sputtering device, and Ar ions are used to clean the surface of the silicon wafer in a vacuum environment to remove natural oxide layers such as aluminum oxide and silicon oxide on the surface of the substrate 1, and then a layer of superconducting metal film such as Al/Nb/Ta is grown again to facilitate the subsequent preparation of the coplanar waveguide structure 3. Then, carrying out uniform photoresist photoetching on the surface of the processed sample, and defining a preparation area of the coplanar waveguide; and finally, processing the processed sample by using an etching process, and then removing the photoresist to complete the coplanar waveguide structure 3 connected in a different plane, thereby finally forming the superconducting quantum chip. The material of the superconducting metal film grown in this step may be the same as or different from the material of the connecting bridge 2, as the case may be.
According to the preparation method of the superconducting quantum chip provided by the embodiment of the invention, the prepared superconducting quantum chip is provided with the connecting bridge 2 in the substrate 1, the connecting bridge 2 in the substrate 1 is connected with the coplanar waveguide structure 3 on the surface of the substrate 1, and the connecting bridge 2 is positioned in the substrate 1, so that the superconducting quantum chip has extremely high strength and is not easy to damage; meanwhile, the connecting bridge 2 arranged in the substrate 1 does not interfere with the coplanar waveguide structure 3 arranged on the surface of the substrate 1, so that the limitation of device processing in a chip can be eliminated.
The details of the method for manufacturing a superconducting quantum chip according to the present invention will be described in detail in the following embodiments of the present invention.
Referring to fig. 10 to 12, fig. 10 to 12 are process flow charts of a first specific method for manufacturing a superconducting quantum chip according to an embodiment of the present invention.
Referring to fig. 10, in an embodiment of the present invention, a method for manufacturing a superconducting quantum chip includes:
s201: and based on a laser etching process, performing laser etching on the substrate on the surface of one side of the substrate to form a plurality of communicated channels.
Referring to fig. 11 and 12, in this step, a first channel 51 may be etched in the first port region of the substrate 1 by using a laser etching process, where an etching direction of the laser etching process forms an included angle with a surface of the substrate 1, so as to form the first channel 51 extending obliquely downward. Correspondingly, in this step, a laser etching process may be specifically used to etch the second channel 52 in the second port region of the substrate 1, where an etching direction of the laser etching process may form a certain included angle with the surface of the substrate 1, so as to form the second channel 52 extending obliquely downward. The detailed positional relationship between the first channel 51 and the second channel 52 has been described in detail in the above embodiments of the present invention, and will not be described herein again. The laser etching angle used for etching the first channel 51 is generally different from the laser etching angle used for etching the second channel 52, and the first channel 51 and the second channel 52 need to be communicated with each other.
S202: a superconducting material is disposed within the channel, forming a connecting bridge extending within the substrate.
S203: and arranging a coplanar waveguide structure on the surface of the substrate to form the superconducting quantum chip.
S202 to S203 are substantially the same as S102 to S103 in the above embodiment of the invention, and for details, reference is made to the above embodiment of the invention, which is not repeated herein.
The details of the method for manufacturing a superconducting quantum chip according to the present invention will be described in detail in the following embodiments of the present invention.
Referring to fig. 13 to 17, fig. 13 to 17 are process flow charts of a second specific method for manufacturing a superconducting quantum chip according to an embodiment of the present invention.
Referring to fig. 13, in an embodiment of the present invention, a method for manufacturing a superconducting quantum chip includes:
s301: and etching to form a plurality of inclined plane grooves on the surface of one side of the substrate.
In this step, specifically, the bevel grooves 4 may be etched in the first port region and the second port region of the substrate 1, and the bevel grooves 4 include the first bevel groove 41 and the second bevel groove 42, which have slopes inclined downward, so as to subsequently provide the channel 5 based on the slopes. The specific function of the inclined groove 5 is described in detail in the above embodiments of the invention, and will not be described herein. The step may specifically include: and etching the surface of one side of the substrate by using an etching solution to form a plurality of inclined plane grooves. The etching solution may be specifically a KOH solution.
Referring to fig. 14 and fig. 15, specifically, the etching process in this step specifically includes: defining areas needing to prepare the bevel groove 4, namely the first port area and the second port area by photoetching; and etching the photoetching defined area by using KOH solution to form the inclined groove 4. Other etching solutions than the KOH solution can be used for etching, and the specific type of the etching solution is not specifically limited herein as long as the inclined grooves 4 can be formed.
S302: and etching the substrate on the inclined plane of the inclined plane groove based on an ICP (inductively coupled plasma) or IBE (ion beam etching) process to form a plurality of communicated channels.
Referring to fig. 16 and 17, in this step, a deep hole area to be etched is defined on the inclined plane by using a photolithography process, and then a deep hole, i.e., the first via 51 and the second via 52, is etched in the deep hole area to be etched defined by using an ICP (inductively coupled plasma) or IBE (ion beam etching) etching process. Specifically, for the first channel 51, an ICP or IBE process may be used to etch a deep hole region to be etched defined by an inclined plane in the first port region, where the inclined plane needs to be kept perpendicular to the ion bombardment direction during etching; for the second channel 52, an ICP or IBE process may be used to etch a deep hole region defined by an inclined plane in the second port region, where the inclined plane needs to be kept perpendicular to the ion bombardment direction during etching, so as to form a first channel 51 and a second channel 52 that are communicated with each other.
S303: a superconducting material is disposed within the channel, forming a connecting bridge extending within the substrate.
S304: and arranging a coplanar waveguide structure on the surface of the substrate to form the superconducting quantum chip.
S303 to S304 are substantially the same as S102 to S103 in the above embodiment of the invention, and for details, reference is made to the above embodiment of the invention, which is not repeated herein.
The details of the method for manufacturing a superconducting quantum chip according to the present invention will be described in detail in the following embodiments of the present invention.
Referring to fig. 18 to 20, fig. 18 to 20 are process flow charts of a third specific method for manufacturing a superconducting quantum chip according to an embodiment of the present invention.
Referring to fig. 18, in an embodiment of the present invention, a method for manufacturing a superconducting quantum chip includes:
s401: a plurality of channels extending toward the inside of the substrate are provided on one side surface of the substrate.
This step is substantially the same as S101 in the above embodiment of the present invention, and for details, reference is made to the above embodiment of the present invention, which is not described herein again.
S402: and carrying out thermal oxidation on the channel to form an oxide layer.
Referring to fig. 19, in this step, the etched channel 5 is thermally oxidized to form an oxide layer 6 on the inner wall of the channel 5. Specifically, the step may specifically include: and carrying out thermal oxidation treatment on the punched sample by steam at the high temperature of 1100 ℃ for 30min to form an oxide layer 6, such as a silicon dioxide layer. The operating temperature and the processing time of the above-mentioned specific thermal oxidation can be set according to the actual situation, and are not particularly limited as long as the oxide layer 6 can be formed in the channel 5.
S403: and cleaning the oxide layer to smooth the inner wall of the channel.
Referring to fig. 20, in this step, the sample may be processed by BOE (Buffered Oxide Etch), for example, to clean the Oxide layer 6 generated in S402, so as to smooth the inner wall of the channel 5.
S404: superconducting material is disposed within the channel, forming a connecting bridge extending within the substrate.
S405: and arranging a coplanar waveguide structure on the surface of the substrate to form the superconducting quantum chip.
S404 to S405 are substantially the same as S102 to S103 in the above embodiment of the invention, and for details, reference is made to the above embodiment of the invention, which is not repeated herein.
According to the preparation method of the superconducting quantum chip provided by the embodiment of the invention, the inner wall of the channel 5 is oxidized to form the oxide layer 6, and then the oxide layer 6 is removed, so that the inner wall of the channel 5 can be smooth, and the preparation of the subsequent connecting bridge 2 is facilitated.
In the present specification, the embodiments are described in a progressive manner, and each embodiment focuses on differences from other embodiments, and the same or similar parts between the embodiments are referred to each other.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a," "8230," "8230," or "comprising" does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.
The superconducting quantum chip and the preparation method thereof provided by the invention are described in detail above. The principles and embodiments of the present invention have been described herein using specific examples, which are presented only to assist in understanding the method and its core concepts of the present invention. It should be noted that, for those skilled in the art, without departing from the principle of the present invention, it is possible to make various improvements and modifications to the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.
Claims (11)
1. A superconducting quantum chip, comprising:
a substrate;
a connecting bridge extending inside the substrate; one end of the connecting bridge extends from the surface of one side of the substrate to the inside of the substrate, and the other end of the connecting bridge extends from the surface of the same side of the substrate to the inside of the substrate; a plurality of sections of communicated channels are arranged in the substrate, and superconducting materials are filled in the channels to form the connecting bridge;
a coplanar waveguide structure located on the surface of the substrate; the coplanar waveguide structure comprises at least two end parts which are separated from each other on the surface of the substrate, one end part of the coplanar waveguide structure is contacted with one end of the connecting bridge, and the other end part of the coplanar waveguide structure is contacted with the other end of the connecting bridge.
2. A superconducting quantum chip according to claim 1 wherein the substrate is provided with a first channel extending obliquely from the surface into the substrate and a second channel extending obliquely from the surface into the substrate; the first channel communicates with an end of the second channel within the substrate;
and superconducting materials are filled in the first channel and the second channel to form the connecting bridge.
3. The superconducting quantum chip of claim 2, wherein the first channel and the second channel extend toward each other within the substrate.
4. The superconducting quantum chip of claim 2, wherein the surface of the substrate is provided with a first bevel groove and a second bevel groove, the first channel extending from a bevel of the first bevel groove inward of the substrate, the second channel extending from a bevel of the second bevel groove inward of the substrate.
5. The superconducting quantum chip of claim 4, wherein the first channel extends from a slope of the first slope groove opposite the second slope groove to a side of the second slope groove;
the second channel extends from an inclined surface of the second inclined surface groove, which is opposite to the first inclined surface groove, to one side of the first inclined surface groove.
6. A method for preparing a superconducting quantum chip is characterized by comprising the following steps:
arranging a plurality of sections of channels extending towards the inside of the substrate on one side surface of the substrate; the multiple sections of the channels are communicated with each other;
providing a superconducting material within said channel, forming a connecting bridge extending within said substrate; the end parts of the connecting bridges are positioned on the same side surface of the substrate;
arranging a coplanar waveguide structure on the surface of the substrate to form the superconducting quantum chip; the coplanar waveguide structure comprises at least two end parts which are separated from each other on the surface of the substrate, one end part of the coplanar waveguide structure is contacted with one end of the connecting bridge, and the other end part of the coplanar waveguide structure is contacted with the other end of the connecting bridge.
7. The method of claim 6, wherein providing a plurality of channels extending inward of the substrate on a side surface of the substrate comprises:
and based on a laser etching process, performing laser etching on the substrate on the surface of one side of the substrate to form a plurality of communicated channels.
8. The method of claim 6, wherein providing a plurality of channels extending inward of the substrate on a side surface of the substrate comprises:
etching the surface of one side of the substrate to form a plurality of inclined plane grooves;
and etching the substrate on the inclined plane of the inclined plane groove based on an ICP (inductively coupled plasma) or IBE (ion beam etching) process to form a plurality of communicated channels.
9. The method of claim 8, wherein the etching a plurality of bevel grooves in the substrate-side surface comprises:
and etching the surface of one side of the substrate by using an etching solution to form a plurality of inclined plane grooves.
10. The method of claim 6, wherein disposing a superconducting material within the channel further comprises, prior to forming a connecting bridge extending within the substrate:
carrying out thermal oxidation on the channel to form an oxide layer;
and cleaning the oxide layer to smooth the inner wall of the channel.
11. The method of claim 6, wherein the disposing a superconducting material within the channel, the forming a connecting bridge extending inside the substrate comprises:
filling the channel with a superconducting material melt, and carrying out ultrasonic treatment on the superconducting material melt.
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