CN115694145A

CN115694145A - Circuit for asymmetric half-bridge flyback power supply

Info

Publication number: CN115694145A
Application number: CN202211355682.9A
Authority: CN
Inventors: 方倩; 方烈义
Original assignee: On Bright Electronics Shanghai Co Ltd
Current assignee: On Bright Electronics Shanghai Co Ltd
Priority date: 2022-11-01
Filing date: 2022-11-01
Publication date: 2023-02-03
Also published as: TWI826228B

Abstract

The invention provides a circuit for an asymmetric half-bridge flyback power supply. Asymmetric half-bridge flyback power supply includes the primary inductance of first switch, second switch, transformer and the secondary inductance of transformer, and during first switch-on and second switch disconnection, the transformer passes through primary inductance and magnetizes, and during first switch disconnection and second switch-on the transformer passes through secondary inductance demagnetization for the circuit of asymmetric half-bridge flyback power supply includes: a first voltage detection unit configured to detect a feedback voltage of an output terminal of the asymmetric half-bridge flyback power supply, wherein the feedback voltage corresponds to an operating voltage of a load to which the asymmetric half-bridge flyback power supply is connected; and a switch control unit configured to turn on the first switch for a first period of time and turn on the second switch for a second period of time according to the feedback voltage during each duty cycle of the asymmetric half-bridge flyback power supply, wherein the first switch and the second switch are not in an on state at the same time.

Description

Circuit for asymmetric half-bridge flyback power supply

Technical Field

The invention relates to the field of power supplies, in particular to a circuit for an asymmetric half-bridge flyback power supply.

Background

The asymmetric half-bridge flyback power supply is widely applied due to the simple circuit structure and the small circuit occupation area. The asymmetric half-bridge flyback power supply can be connected to different loads to power the loads according to different operating voltages required by the different loads.

However, the asymmetric half-bridge flyback power supply generally has a fixed operation mode, which has a high operation efficiency only for a specific load, and the operation efficiency of the asymmetric half-bridge flyback power supply is reduced when the load varies.

Therefore, a way to improve the operating efficiency of asymmetric half-bridge flyback power supplies is needed.

Disclosure of Invention

According to an exemplary embodiment of the present invention, there is provided a circuit for an asymmetric half-bridge flyback power supply including a first switch, a second switch, a primary inductance of a transformer and a secondary inductance of the transformer, the transformer being magnetized by the primary inductance during a period in which the first switch is turned on and the second switch is turned off, the transformer being demagnetized by the secondary inductance during a period in which the first switch is turned off and the second switch is turned on, the circuit comprising: a first voltage detection unit configured to detect a feedback voltage of an output terminal of the asymmetric half-bridge flyback power supply, wherein the feedback voltage corresponds to an operating voltage of a load to which the asymmetric half-bridge flyback power supply is connected; and a switch control unit configured to turn on the first switch for a first period of time and turn on the second switch for a second period of time according to the feedback voltage during each duty cycle of the asymmetric half-bridge flyback power supply, wherein the first switch and the second switch are not in an on state at the same time.

According to the circuit for the asymmetric half-bridge flyback power supply, a first time period for switching on a first switch of the asymmetric half-bridge flyback power supply to perform magnetizing and a second time period for switching on a second switch of the asymmetric half-bridge flyback power supply to perform demagnetization can be adjusted according to the working voltage of a load connected with the asymmetric half-bridge flyback power supply, namely the working frequency of the asymmetric half-bridge flyback power supply can be adjusted, so that the asymmetric half-bridge flyback power supply can adapt to the working voltage of the connected load, and the working efficiency of the asymmetric half-bridge flyback power supply is improved.

Drawings

The invention may be better understood from the following description of specific embodiments thereof taken in conjunction with the accompanying drawings, in which:

fig. 1 shows a schematic circuit diagram of an asymmetric half-bridge flyback power supply according to an exemplary embodiment.

Fig. 2 shows a timing diagram of signals in the asymmetric half-bridge flyback power supply of fig. 1 according to an exemplary embodiment.

Fig. 3 shows a timing diagram of signals in the asymmetric half-bridge flyback power supply of fig. 1 according to another exemplary embodiment.

Fig. 4 is a block diagram illustrating a circuit for an asymmetric half-bridge flyback power supply according to an exemplary embodiment of the present invention.

Fig. 5 is a schematic circuit diagram showing a connection relationship between a circuit for an asymmetric half-bridge flyback power supply and an asymmetric half-bridge flyback power supply according to an exemplary embodiment of the present invention.

Fig. 6 shows a timing diagram of signals in the circuit of fig. 5 according to an exemplary embodiment of the invention.

Fig. 7 shows a timing diagram of signals in the circuit of fig. 5 according to another exemplary embodiment of the present invention.

Fig. 8 shows a schematic circuit diagram of a demagnetization detection module in the circuit of fig. 5 according to an exemplary embodiment of the invention.

Fig. 9 shows a timing diagram of signals corresponding to the circuit of fig. 8, according to an exemplary embodiment of the present invention.

Fig. 10 shows a schematic circuit diagram of a demagnetization detection module in the circuit of fig. 5 according to another exemplary embodiment of the invention.

Fig. 11 illustrates a timing diagram of signals corresponding to the circuit of fig. 10, according to an exemplary embodiment of the present invention.

Fig. 12 shows a schematic circuit diagram of a negative voltage detection module in the demagnetization detection module of fig. 8 or 10 according to an exemplary embodiment of the present invention.

Fig. 13 shows a schematic circuit diagram of a negative voltage detection module in the demagnetization detection module of fig. 8 or 10 according to another exemplary embodiment of the present invention.

Detailed Description

Features and exemplary embodiments of various aspects of the present invention will be described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention. The present invention is in no way limited to any specific configuration and algorithm set forth below, but rather covers any modification, replacement or improvement of elements, components or algorithms without departing from the spirit of the invention. In the drawings and the following description, well-known structures and techniques are not shown in order to avoid unnecessarily obscuring the present invention.

Fig. 1 shows a schematic circuit diagram of an asymmetric half-bridge flyback power supply 100 according to an exemplary embodiment.

As shown in fig. 1, the asymmetric half-bridge flyback power supply 100 includes a first switch Q1, a second switch Q2, a primary inductor Lp of a transformer, and a secondary inductor Ls of the transformer. The ratio of the number of turns Np of the primary inductor Lp to the number of turns Ns of the secondary inductor Ls is Np: ns = N. A node between the first switch Q1 and the second switch Q2 is HB.

The transformer is magnetized by the primary inductor Lp during the period when the first switch Q1 is turned on and the second switch Q2 is turned off, and is demagnetized by the secondary inductor Ls during the period when the first switch Q1 is turned off and the second switch Q2 is turned on.

Specifically, during the time when the first switch Q1 is on and the second switch Q2 is off, the transformer is magnetized by the input voltage Vin via the following magnetizing circuits: the first switch Q1, the resonant capacitor Cr, the leakage inductor Lr, the primary side inductor Lp and the current detection resistor Rcs are connected to the reference ground. At this time, there is no current in the secondary inductor Ls due to the limitation of the diode D1 in the secondary circuit of the transformer on the current flow direction.

During the period when the first switch Q1 is turned off and the second switch Q2 is turned on, the transformer is demagnetized to the secondary inductor Ls through the primary inductor Lp by the following demagnetization loop: the secondary switch Q2, the resonant capacitor Cr, the leakage inductance Lr, the primary side inductance Lp and the current detection resistor Rcs. At this time, the secondary inductor Ls has a current I _Do 。

A magnetizing process and a demagnetizing process of the transformer of the asymmetric half-bridge flyback power supply 100 shown in fig. 1 constitute a duty cycle. The asymmetric half-bridge flyback power supply 100 operates at a fixed operating frequency to repeat the above-described magnetizing and demagnetizing processes in each operating cycle, while providing an output voltage Vo at the output terminal to a connected load. The output voltage Vo corresponds to the operating voltage of the connected load, and the capacitor C2 is used to stabilize the output voltage Vo of the output terminal at the operating voltage of the load.

An example of the operation of the asymmetric half-bridge flyback power supply 100 of fig. 1 is described below with reference to fig. 2 and 3.

Fig. 2 shows a timing diagram of signals in the asymmetric half-bridge flyback power supply 100 of fig. 1 according to an exemplary embodiment.

Fig. 2 shows the operation of the asymmetric half-bridge flyback power supply 100 in critical continuous mode (CRM). This critical continuous mode is generally suitable for situations where the connected load is heavy (i.e. the operating voltage required by the load is large).

In fig. 2, Q1 gate represents a control signal of the first switch Q1, Q2 gate represents a control signal of the second switch Q2, and I _Lr Current, I, representing leakage inductance Lr _Do Current, V, representing secondary inductance Ls _HB Representing the voltage at node HB.

At time t0, the control signal Q1 gate turns on the first switch Q1, at which time the control signal Q2 gate turns off the second switch Q2.

During the time t0 to the time t1, the control signal Q1 gate keeps the first switch Q1 in the on state, and the control signal Q2 gate keeps the second switch Q2 in the off state. During this period, the input voltage Vin charges the primary inductor Lp of the transformer through the resonant capacitor Cr. Current in primary inductor LpI.e. the current I in the leakage inductance Lr _Lr The current I _Lr Increasing in the positive direction. Further, during this time, the voltage across the parasitic capacitance in the first switch Q1 is 0 volts (V), i.e., not charged. The voltage across the parasitic capacitance in the second switch Q2 is Vin.

At time t1, the control signal Q1 gate turns off the first switch Q1, and at this time, the control signal Q2 gate keeps the second switch Q2 in an off state. The current in the primary inductor Lp (i.e. the current I in the leakage inductor Lr in this case) _Lr ) A maximum value Ip is reached.

During the period from time t1 to time t2, the control signal Q1 gate keeps the first switch Q1 in an off state, the control signal Q2 gate keeps the second switch Q2 in an off state, and the input voltage Vin is disconnected from the charging loop of the primary inductor Lp. The current I of the primary inductor Lp in the forward direction cannot change suddenly _Lr The parasitic capacitance of the second switch Q2 is discharged and the parasitic capacitance of the first switch Q1 is charged, so that the voltage V at the node HB _HB Gradually decreases until it drops to 0V around time t 2. At this time, the voltage across the parasitic capacitor of the second switch Q2 is 0V, and the voltage across the parasitic capacitor of the first switch Q1 is Vin.

At time t2, i.e. at node HB, voltage V _HB At 0V, the control signal Q2 gate turns the second switch Q2 on at zero level (ZVS), and at this time, the control signal Q1 gate keeps the first switch Q1 off.

During the period from t2 to t3, the resonant capacitor Cr resonates with the leakage inductance Lr, and the current I of the leakage inductance Lr _Lr After the voltage drops to 0 ampere (A), the voltage increases negatively, and simultaneously the transformer is demagnetized through a secondary inductor Ls, and the exciting current I of a primary inductor Lp _Lm (as shown by the diagonally downward dashed line in fig. 2) decreases linearly. The secondary inductor Ls has a current I as shown in FIG. 2 _Do 。

At time t3, the current I of the leakage inductance Lr _Lr Excitation current I resonant to primary side inductance Lp _Lm Equally large. At this time, the demagnetization of the transformer is finished, and the current I of the secondary inductor Ls is _Do Is 0A.

During the period from time t3 to time t4, the resonant capacitor Vcr discharges to the primary inductor Lp of the transformer through the second switch Q2, and the current ILr resonated by the leakage inductor Lr increases negatively until the current ILr increases negatively to-In near time t 4.

At time t4, the control signal Q2 gate turns off the second switch Q2, and the resonant capacitor Vcr turns off the discharge loop of the primary inductor Lp of the transformer. At this time, the control signal Q1 gate still keeps the first switch Q1 in the off state.

During the time t4 to the time t5, the negative current I of the leakage inductor Lr cannot change abruptly _Lr The parasitic capacitance of the first switch Q1 is discharged and the parasitic capacitance of the second switch Q2 is charged, so that the voltage at the node HB gradually rises until Vin around time t 5. At this time, the voltage across the parasitic capacitor of the first switch Q1 is 0V, and the voltage across the parasitic capacitor of the second switch Q2 is Vin.

At time t5, the control signal Q1 gate turns the first switch Q1 on at zero level. Thereafter, the asymmetric half-bridge flyback power supply 100 repeats the above operation. That is, both time t5 and time t0 are the starting time of one duty cycle of the asymmetric half-bridge flyback power supply 100.

In the above operation, the current (load current) Io at the output terminal of the asymmetric half-bridge flyback power supply 100 is Io = [ (Ip-In)/2 ] × Np/Ns.

Fig. 3 shows a timing diagram of signals in the asymmetric half-bridge flyback power supply 100 of fig. 1 according to another exemplary embodiment.

Fig. 3 shows the operation of the asymmetric half-bridge flyback power supply 100 in discontinuous mode (DCM). This discontinuous mode is generally suitable for the case where the connected load is light load (i.e. the load requires less operating current).

Q1 gate, Q2 gate, I in FIG. 3 _Lr 、I _Do And V _HB Each having the same meaning as in fig. 2.

During the period from time t0 to time t4 in fig. 3, the operation of the asymmetric half-bridge flyback power supply 100 is similar to that in fig. 2, and will not be described again.

Fig. 3 differs from fig. 2 in a period after time t 4.

For example, during the period from time t4 to time t5, the parasitic capacitance of the first switch Q1 and the parasitic capacitance of the second switch Q2 are charged and discharged to generate the resonance with the primary inductor Lp as shown in fig. 3.

During the period from time t5 to time t6, the control signal Q2 gate makes the second switch Q2 switched on again, the resonant capacitor Vcr discharges the primary side inductance Lp of the transformer through the second switch Q2, and the current I _Lr Increasing negatively until increasing negatively to-In 1 around time t 6.

At time t6, the control signal Q2 gate turns off the second switch Q2, and the resonant capacitor Vcr turns off the primary inductor Lp discharge loop of the transformer.

During the period from time t6 to time t7, the current in the primary inductor Lp cannot change suddenly, so that the primary current I in the negative direction cannot change suddenly _Lr The parasitic capacitor of the first switch Q1 is discharged, and the parasitic capacitor of the second switch Q2 is charged, so that the voltage at the node HB gradually rises until reaching Vin near time t7, at this time, the voltage across the parasitic capacitor of the first switch Q1 is 0V, and the voltage across the parasitic capacitor of the second switch Q2 is Vin.

At time t7, the control signal Q1 gate turns the first switch Q1 on at zero level. Thereafter, the asymmetric half-bridge flyback power supply 100 repeats the above operation. That is, both time t7 and time t0 are the starting time of one duty cycle of the asymmetric half-bridge flyback power supply 100.

In the above working process, the current Io at the output terminal of the asymmetric half-bridge flyback power supply 100 is:

in the above equation (1), — In1 is the on current of the first switch shown In fig. 3 (corresponding to the current — In shown In fig. 2), -In2 is the off current of the second switch shown In fig. 3, ton1 is the duration of the period of time from time t0 to time t1 shown In fig. 3, ton2 is the duration of the period of time from time t2 to time t4 shown In fig. 3, and Ts is the duration of one duty cycle.

Referring to fig. 2 and 3, the asymmetric half-bridge flyback power supply 100 operates at a fixed operating frequency. When the connected load changes, e.g. from a heavy load to a light load, it only changes the operation mode from the critical continuous mode shown in fig. 2 to the discontinuous mode shown in fig. 3. In the discontinuous mode, in order to adapt to the decrease of Ton1 caused by the decrease of the load current Io, the magnitude of Ton2 needs to be decreased at the same time to decrease the negative current amplitude In2, and the currently common control mode adopts a fixed Ton2 time to make the negative current amplitude In2 very large, thereby hindering the increase of the duty cycle Ts. Thus, this approach may result in the operating frequency of the asymmetric half-bridge flyback power supply 100 not matching the size of the load, resulting in a lower efficiency of the asymmetric half-bridge flyback power supply 100.

In order to solve at least the above problems, a circuit for an asymmetric half-bridge flyback power supply is proposed according to an embodiment of the present disclosure.

Fig. 4 is a block diagram illustrating a circuit 200 for an asymmetric half-bridge flyback power supply in accordance with an exemplary embodiment of the present invention.

For example, the asymmetric half-bridge flyback power supply 100 may be similar to fig. 1, but with the turning on and off of the first and second switches Q1 and Q2 controlled by the circuit 200 for an asymmetric half-bridge flyback power supply according to an embodiment of the present disclosure. The circuit 200 includes a first voltage detection unit 210 and a switch control unit 220.

The first voltage detecting unit 210 is configured to detect an output voltage Vo of the output terminal of the asymmetric half-bridge flyback power supply 100, for example, detect a feedback voltage (at a node FB) generated by the output voltage Vo. The output voltage Vo corresponds to the operating voltage of the load to which the asymmetric half-bridge flyback power supply 100 is connected.

In one embodiment, the first voltage detection unit 210 may detect and control the output voltage by generating a feedback voltage (e.g., a voltage at a node FB in fig. 5 below) by detecting a divided voltage of the output voltage Vo of the output terminal.

The switch control unit 220 is configured to switch on the first switch Q1 for a first period of time and switch on the second switch Q2 for a second period of time during each duty cycle of the asymmetric half-bridge flyback power supply 100, according to the output voltage Vo, wherein the first switch Q1 and the second switch Q2 are not in an on-state at the same time.

Thus, the circuit 200 can adjust a first time period for turning on the first switch for magnetization and a second time period for turning on the second switch for demagnetization according to the operating voltage of the load connected to the asymmetric half-bridge flyback power supply 100. That is, the circuit 200 can adjust the operating frequency of the asymmetric half-bridge flyback power supply 100, so that it can adapt to the operating voltage of the connected load, thereby improving the operating efficiency of the asymmetric half-bridge flyback power supply.

In one embodiment, the circuit 200 may further include: the second voltage detecting unit 230. The second voltage detection unit 230 may be configured to be coupled with the primary inductance Lp and the secondary inductance Ls to detect the primary voltage of the primary inductance during the transformer magnetizing and detect the secondary voltage of the secondary inductance during the transformer demagnetizing.

In one embodiment, the circuit 200 may further include: and a third voltage detecting unit 240. The third voltage detecting unit 240 may be configured to detect a resistance voltage Vcs across a current detecting resistor Rcs on the magnetizing loop during the magnetizing of the transformer.

In this case, in one embodiment, the switch control unit 220 may be configured to: determining the duration Ton of the first time period according to the resistance voltage Vcs and the feedback voltage; and determining the duration of the second time period (Tdem + Tzvs) according to the feedback voltage, the primary voltage and the secondary voltage.

In one embodiment, the second time period may include a demagnetization time period (Tdem) and a primary inductor reverse charging time period (Tzvs). The switch control unit 220 may be configured to: determining the duration Tdem of a demagnetization time period according to the feedback voltage, the primary voltage and the secondary voltage; and determining the time duration Tzvs of the reverse charging time period of the primary side inductor according to the primary side voltage.

In one embodiment, to enable the first switch Q1 and the second switch Q2 to be turned on at zero voltage, the switch control unit 220 may be configured to: after a first dead time period (hereinafter, a time period between times t1-t2 in fig. 6 and 7) after the first time period ends, the second switch is turned on; the first switch is turned on after a second dead time period (hereinafter, a period between times t4-t5 in fig. 6, or a period between times t5-t6 in fig. 7) after the primary inductor reverse charging period.

Here, the first dead time period may be a time period required for the second switch to be turned on at a zero voltage, and the second dead time period may be a time period required for the first switch to be turned on at a zero voltage, which may be determined according to own characteristics of the first switch and the second switch.

The time when the first switch is turned on is the starting time of the working cycle of the asymmetric half-bridge flyback power supply.

Furthermore, in one embodiment, the circuit 200 according to the present disclosure may also operate the asymmetric half-bridge flyback power supply 100 in different operating modes in order to better accommodate the load. Specifically, the switch control unit 220 may be further configured to: comparing a divided voltage of a feedback voltage generated by detecting the divided voltage of the output voltage with a predetermined voltage threshold; under the condition that the divided voltage is greater than the preset voltage threshold value, determining that the load is a heavy load, and enabling the asymmetric half-bridge flyback power supply to work in a critical continuous mode; and under the condition that the divided voltage is less than or equal to a preset voltage threshold, determining that the load is a light load, and enabling the asymmetric half-bridge flyback power supply to work in an intermittent mode.

Accordingly, in the critical continuous mode, the switching control unit 220 may be configured to make the demagnetization time period and the primary inductance reverse charging time period a continuous time period.

In the discontinuous mode, the switch control unit 220 may be configured to separate a third period (hereinafter, a period between time t3 and time t4 in fig. 7) between the demagnetization period and the primary inductor reverse charging period to maintain both the first switch Q1 and the second switch Q2 in an off state during the third period.

In one embodiment, the switch control unit 220 may determine the duration of the third time period according to the feedback voltage (e.g., the divided voltage).

Examples of some implementations of a circuit 200 for an asymmetric half-bridge flyback power supply according to the present disclosure are described below with reference to fig. 5-13.

Fig. 5 is a schematic circuit diagram showing a connection relationship between a circuit 200 for an asymmetric half-bridge flyback power supply and an asymmetric half-bridge flyback power supply 100 according to an exemplary embodiment of the present invention.

The asymmetric half-bridge flyback power supply 100 shown in fig. 5 is similar to that shown in fig. 1, and also includes a first switch Q1, a second switch Q2, a primary inductor Lp of a transformer, and a secondary inductor Ls of the transformer, wherein the transformer is magnetized by the primary inductor Lp during the period when the first switch Q1 is turned on and the second switch Q2 is turned off, and the transformer is demagnetized by the secondary inductor Ls during the period when the first switch Q1 is turned off and the second switch Q2 is turned on.

Fig. 5 differs from fig. 1 in that: a signal gate _ up for controlling the turn-on and turn-off of the first switch Q1 and a signal gate _ up for controlling the turn-on and turn-off of the second switch Q2 are generated by the circuit 200 according to the embodiment of the present disclosure.

As shown in fig. 5, the first voltage detecting unit 210 detects a feedback voltage (hereinafter, also referred to as a feedback voltage for convenience of description) of the output voltage Vo at the node FB through the resistors R1 to R4, the capacitors C3 to C5, and the optical couplers OC and TL 431.

The second voltage detection unit 230 detects a divided voltage (hereinafter, referred to as a primary voltage or a secondary voltage for convenience of description) corresponding to the primary voltage or the secondary voltage at the node INV through the winding Naux coupled to the primary inductance Lp and the secondary inductance Ls and through the resistors R5 to R6. Here, since the voltage Vaux of the winding Naux corresponds to the primary voltage of the primary inductor Lp or corresponds to the secondary voltage of the secondary inductor Ls, the voltage at the node INV (the divided voltage of the voltage Vaux) also corresponds to the primary voltage of the primary inductor Lp or corresponds to the secondary voltage of the secondary inductor Ls. For example, during the turn-on of the first switch Q1, the voltage at the node INV corresponds to the primary voltage; during the turn-on of the second switch Q2, the voltage at the node INV corresponds to the secondary side voltage.

The third voltage detecting unit 240 detects a resistance voltage Vcs across the current detection resistance Rcs.

Each block in the switch control unit 220 will be described below.

A comparator (comp) shown at the upper left in the switch control unit 220 is used to compare the resistance voltage Vcs with the divided voltage at the node FB (the feedback voltage of the output voltage Vo) to generate a signal CV _ off for turning off the first switch when the resistance voltage Vcs is greater than the divided voltage at the node FB. For example, during the magnetizing period when the first switch Q1 is turned on, the resistance voltage Vcs gradually increases, and when it increases to be larger than the voltage divided at the node FB, it indicates that the degree of the magnetizing has been matched with the feedback voltage, that is, the voltage required by the load, and at this time, the first switch Q1 may be turned off.

The frequency modulation module (FRE) is used to determine an operation mode of the asymmetric half-bridge flyback power supply, for example, a critical continuous mode or a discontinuous mode, according to the voltage at the node FB, and to determine a time for turning on the second switch Q2 again in the discontinuous mode. For example, FRE may output a DCM _ on signal at a high level to indicate critical continuous mode; the FRE may output the DCM _ on signal of a low level to indicate the discontinuous mode, and the signal may be briefly high at a time point for turning on the second switch Q2 again.

And the comparator (comp) below the FRE is used for determining whether the load current is too low according to the voltage at the node FB, and if the load current is too low, the comparator (comp) outputs a burst signal which enables the first switch Q1 and the second switch Q2 to be disconnected and further enables the asymmetric half-bridge flyback power supply to stop working.

A demagnetization control unit (DEM control) determines whether demagnetization is finished according to the voltage at the node INV, and generates a DEM _ off signal capable of indicating whether demagnetization is finished.

The zero voltage turn-on module (ZVS) is configured to determine a primary inductor reverse charging time period (Tzvs) according to the voltage at the node INV, and generate a signal ZVS _ off capable of indicating whether the primary inductor reverse charging time period is over to turn off the second switch Q2.

A dead time control module (Deadtime control) is configured to generate a signal ZVS _ down _ on to turn on the second switch after a first dead time after the first switch is turned off and a signal ZVS _ up _ on to turn on the first switch after a second dead time after the primary inductor reverse charging period ends.

The first LOGIC block (LOGIC 1) is configured to generate a signal gate _ up for controlling the on and off of the first switch Q1 according to the signal CV _ off and the signal ZVS _ up _ on (and the signal burst).

The second LOGIC block (LOGIC 2) is configured to generate a signal gate _ down for controlling the on and off of the second switch Q2 according to the signals DCM _ on, burst, DEM _ off, ZVS _ off, and ZVS _ down _ on.

The specific operation of the circuit 200 is described below with reference to fig. 6 and 7.

Fig. 6 corresponds to the critical continuous mode. In the example in fig. 6, the operation principle of the asymmetric half-bridge flyback power supply is similar to that described with reference to fig. 1 and 2 during the time period Ton when the first switch Q1 is turned on and during the time period (Tdem and Tzvs) when the second switch Q2 is turned on, and will not be described again here.

Fig. 6 differs from fig. 2 in that: the period Ton during which the first switch Q1 is turned on and the periods (Tdem and Tzvs) during which the second switch Q2 is turned on are determined according to the detected feedback voltage (voltage at the node FB). That is, the times t0-t5 in fig. 6 may be varied according to the feedback voltage to adapt to the size of the load.

For example, the period during which the first switch Q1 is turned on (first period, that is, ton corresponding to time t0-t 1) is determined according to the result of comparing the detected voltage divided at the node FB with the resistance voltage Vcs. Since the voltage at node FB corresponds to the load current, ton is adapted to the size of the load.

The period of time during which the second switch Q2 is turned on (the second period of time, tdem corresponding to time t2-t3 and Tzvs corresponding to time t3-t 4) is determined by the demagnetization end time detected by the DEM control module (time t3 at which DEM _ off goes high) and the primary side inductance reverse charging period determined by the ZVS module (time t4 at which the ZVS _ off signal briefly goes high indicates its end time). This time period corresponds to the feedback voltage, and thus the time period during which the second switch Q2 is turned on is adapted to the load size.

The two dead time periods, i.e., the time periods t1-t2 and the time periods t4-t5 (the first dead time period and the second dead time period), respectively, may have fixed durations.

In addition, the signal DCM _ on of continuously high level shown in fig. 6 may indicate a continuous mode. The generated gate down signal may make Tdem and Tzvs continuous for a period of time in response to the signal DCM _ on having a high level.

Fig. 7 corresponds to the discontinuous mode. In the example in fig. 7, the operation principle of the asymmetric half-bridge flyback power supply is similar to that described with reference to fig. 1 and 3 during the time period Ton when the first switch Q1 is turned on and during the time period (Tdem and Tzvs) when the second switch Q2 is turned on, and will not be described again here.

Fig. 7 differs from fig. 3 in that: the period Ton during which the first switch Q1 is turned on, and the period (Tdem and Tzvs) during which the second switch Q2 is turned on are determined according to the detected feedback voltage (voltage at the node FB). That is, the times t0-t6 in fig. 7 may be varied according to the feedback voltage to adapt to the size of the load.

For example, the period Ton during which the first switch Q1 is turned on and the period (Tdem and Tzvs) during which the second switch Q2 is turned on may each be a period adapted to the load size similarly as described in fig. 6.

The two dead time periods, i.e., the period t1-t2 and the period t5-t6 (the first dead time period and the second dead time period), may have fixed durations, respectively.

In addition, the signal DCM _ on having a low level shown in fig. 7 may indicate the discontinuous mode. In response to the signal DCM _ on having a low level, the gate _ down signal may be generated such that Tdem and Tzvs are time periods separated by a time period (a third time period, i.e., time t3-t 4).

For example, in response to DEM _ off becoming high at time t3 (indicating the end of demagnetization), the gate _ down signal may immediately turn off the second switch Q2. Thereafter, at time t4, at which the signal DCM _ on briefly goes high, the gate _ down signal turns the second switch Q2 on again. Thereafter, at time t5, at which the signal ZVS _ off goes high briefly, the gate _ down signal turns off the second switch Q2 again. Then, after the dead time t5-t6 has elapsed, at the start t6 of the next duty cycle, the gate _ up signal makes the first switch Q1 zero voltage conductive, and so on.

By the mode, the working mode and the working frequency (namely the sizes of Ton, tdem, tzvs and the working period Ts) of the asymmetric half-bridge flyback power supply can be automatically adjusted under different input voltages, different output voltages and different output currents so as to adapt to different load sizes and improve the working efficiency.

Referring to fig. 5 to 7, zvs control may determine the size of Tzvs in fig. 6 and 7 as follows: it may detect the voltage at the node INV in a period before and after the time point t0 at which the first switch Q1 is turned on, the voltage at the node INV in this period may indicate the voltage at the node HB of fig. 5, that is, may indicate whether the first switch Q1 is turned on by the zero voltage; tzvs may be shortened when it is detected by the voltage at node INV that the voltage at node HB has reached the voltage Vin a longer time (e.g., greater than a first time threshold) before t 0; tzvs may be increased when it is detected by the voltage at the node INV that the voltage at the node HB reaches the voltage Vin after t 0; tzvs may be left unchanged when it is detected by the voltage at node INV that the voltage at node HB has reached the voltage Vin near t0 (e.g., between the first and second time thresholds).

Therefore, the first switch Q1 can be ensured to be switched on at zero voltage when the working frequency of the asymmetric half-bridge flyback power supply changes. It should be appreciated that zero voltage turn-on of the second switch Q2 is achieved over the dead time period t1-t 2.

Further, as can be seen from fig. 5 to 7 above, the time t3 at which demagnetization ends may be accurately indicated by the DEM _ off signal generated by the DEM control module.

Fig. 8 shows a schematic circuit diagram of a demagnetization detection module (DEM control) in the circuit of fig. 5 according to an exemplary embodiment of the invention. Fig. 9 shows a timing diagram of signals corresponding to the circuit of fig. 8, according to an exemplary embodiment of the present invention.

Referring to fig. 8 and 9, during the first switch Q1 is turned on according to the gate _ up signal, the switch SW1 of the demagnetization detection module (DEM control) may be turned on according to the gate _ up signal. During this time, the voltage Vaux at the node AUX indicates the voltage of the primary inductor Lp of fig. 5, but this time the voltage Vaux at the node AUX is a negative value. Since the voltage Vaux at the node AUX and further the voltage of the primary inductor Lp need to be detected by the node INV, a negative voltage can be converted into a corresponding positive voltage Vn by the negative voltage detection module connected to the node INV, so as to facilitate detection and subsequent processing. Then, the switch SW2 is turned on by the sample1 signal so that the converted positive voltage Vn is sampled by the capacitor C7, and then converted into a corresponding current by the voltage controlled current source VCCS1 (conversion ratio gm 1), and the capacitor C6 is charged with the current during the first switch Q1 is turned on according to the gate _ up signal. Therefore, the charging amount of the capacitor C6 corresponds to the charging amount of the primary side of the asymmetric half-bridge flyback power supply.

While the second switch Q2 is turned on according to the gate _ down signal, the switch SW3 may be turned on according to the gate _ down signal. During this time, the voltage at node INV indicates the voltage of the secondary inductance Ls of fig. 5, which has a positive voltage value. Then, the switch SW4 is turned on by the sample2 signal so that the voltage at the node INV is sampled by the capacitor C8, and then converted into a corresponding current by the voltage-controlled current source VCCS2 (conversion ratio gm 2), and the capacitor C6 is discharged by the current during the second switch Q2 is turned on according to the gate _ down signal. Therefore, the discharge amount of the capacitor C6 corresponds to the demagnetization amount of the asymmetric half-bridge flyback power supply through the secondary side.

Thus, the capacitor C6 can be just discharged at the end of demagnetization, that is, the voltage Vc of the capacitor C6 can be reduced to the initial voltage Vdc by appropriately setting parameters in the circuit (as described below with reference to fig. 12 and 13). Thus, the time when demagnetization ends can be indicated by the comparator comp generating a high DEM _ off signal at the end of the discharge of the capacitor C6. The switch SW5 in fig. 8 can be used to initialize the capacitor C6 to have the initial voltage Vdc after the discharge is finished.

Fig. 10 shows a schematic circuit diagram of a demagnetization detection module in the circuit of fig. 5 according to another exemplary embodiment of the invention. Fig. 11 shows a timing diagram of signals corresponding to the circuit of fig. 10, according to an exemplary embodiment of the invention.

Referring to fig. 8 to 11, fig. 10 is different from fig. 8 in that: in fig. 10, the switch SW1 is controlled by a charge _ on signal, which is a gate _ on signal in the case where the resistance voltage Vcs of fig. 5 is higher than a threshold voltage Vth (for example, the threshold voltage is a voltage indicating that the primary inductor Lp starts to be stably charged).

Thereby, the charging period of the capacitor C6 can be further made to correspond to the stable magnetizing period of the primary inductance Lp, and thus the accuracy of determining the demagnetization end time can be further improved.

As shown in FIG. 12, a "clamp" module in the negative voltage detection module may clamp the voltage at node INV at around 0V. Since the voltage Vaux is a negative voltage during the on period of the first switch Q1, the above clamp causes a first current corresponding to the voltage Vaux to flow through the resistor R5. The "current detection" module in the negative voltage detection module generates a second current proportional to the first current, K, which flows through the resistor R7 and the ground reference. Thus, the voltage Vn in fig. 12 corresponds to the second current flowing through the resistor R7, and thus to the first current flowing through the resistor R5, and thus to the voltage Vaux at the node AUX. In this way, the voltage Vaux of a negative value at the node AUX is converted to a voltage Vn of a corresponding positive value, the specific value of which is as follows.

When the first switch Q1 is switched on, the magnetizing voltage of the primary inductor Lp of the transformer is Vin-NVo, and a negative voltage Vaux proportional to Vin-NVo is provided at a node AUX of the winding Naux coupled with the magnetizing voltage. Therefore, the above voltage Vn can be represented by the following equation:

in the above equation (2), vin represents the input voltage of the asymmetric half-bridge flyback power supply, vo represents the output voltage of the asymmetric half-bridge flyback power supply, N is the turn ratio of the primary inductor Lp and the secondary inductor Ls, naux represents the number of turns of the winding Naux, np represents the number of turns of the primary inductor Lp, R7 represents the resistance value of the resistor R7, and R5 represents the resistance value of the resistor R5. Thus, the voltage Vn is a voltage related to the magnetizing voltage Vin-NVo.

Referring to fig. 12 and 8, the capacitor C6 can be just discharged at the end of demagnetization in fig. 8 by setting the resistance values of the resistors R5 to R7 and the conversion ratios gm1 and gm2 of the voltage-controlled current sources VCCS1 to VCCS2 for converting the voltage into the current.

For example, during the time period Ton when the first switch Q1 is on, the magnetization of the primary inductor satisfies the following volt-second equilibrium equation:

Lp×(Ip+In)＝(Vin-NVo)×Ton (3)

in the above equation (3), lp represents the inductance value of the primary side inductor, -In represents the current value of the primary side inductor when the first switch Q1 is turned on, and Ip represents the maximum current value of the primary side inductor.

During demagnetization, the current of the primary inductor is reduced from Ip to-In, and the demagnetization of the primary inductor satisfies the following volt-second balance equation (4):

Lp×(Ip+In)＝NVo×Tdem (4)

from the above two volt-second equilibrium equations (3) and (4), it can be derived that the demagnetization time period Tdem satisfies the following equation (5):

Tdem＝(Vin-NVo)×Ton/NVo (5)

referring to fig. 12, the voltage Vn in the magnetizing phase can make the charging current Ic1 of the capacitor C6 be:

in the above equation (6), gm1 represents a ratio of voltage to current of the voltage-controlled current source VCCS 1.

During the discharging process of the capacitor C6, the discharging current Ic2 is:

in equation (7) above, ns is the number of turns in secondary inductor Ls.

Combining equations (5) - (7) can be concluded that if it is desired to make the discharge time of the capacitor equal to the demagnetization time Tdem, the relevant parameters of the circuits of fig. 8 and 12 need to satisfy the following equation (8):

by setting the circuits of the modules shown in fig. 8 and 12 using the above parameters satisfying the above equation (8), accurate detection of the demagnetization time can be achieved.

As shown in fig. 13, the negative voltage at the node INV may be converted into a positive voltage Vn by the operational amplifier OP, where Vn can be represented by the following equation (9):

in this case, the charging current Ic1 of the capacitor C6 in fig. 8 can be represented by the following equation (10):

the discharge current Ic2 of the capacitor C6 is unchanged as shown in equation (7). Combining equation (5), equation (7), equation (9) and equation (10) can result in that if the capacitor discharge time is equal to the demagnetization time Tdem, the relevant parameters of the circuits of fig. 8 and 13 need to satisfy gm1= gm2.

It should be understood that the above figures only show and describe circuit elements relevant to the application of the circuit 200 of the present disclosure, and that the functions of other circuit elements not described in detail may be readily known to those skilled in the art from the examples of the present disclosure.

According to the circuit for the asymmetric half-bridge flyback power supply, the working mode and the working frequency of the asymmetric half-bridge flyback power supply can be adjusted according to the working voltage of the connected load, the demagnetization finishing time can be accurately detected, the zero-voltage connection of the switch can be accurately controlled, the asymmetric half-bridge flyback power supply can be adaptive to the size of the load, and the working efficiency is improved.

It is to be understood that this disclosure is not limited to the particular configurations and processes described above and shown in the drawings. A detailed description of known methods is omitted herein for the sake of brevity. In the above embodiments, several specific steps are described and shown as examples. However, the method processes of the present invention are not limited to the specific steps described and illustrated, and those skilled in the art can make various changes, modifications and additions or change the order between the steps after comprehending the spirit of the present invention.

The functional blocks shown in the above-described structural block diagrams may be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it may be, for example, an electronic circuit, an Application Specific Integrated Circuit (ASIC), suitable firmware, plug-in, function card, or the like. When implemented in software, the elements of the invention are the programs or code segments used to perform the required tasks. The program or code segments may be stored in a machine-readable medium or transmitted by a data signal carried in a carrier wave over a transmission medium or a communication link. A "machine-readable medium" may include any medium that can store or transfer information. Examples of a machine-readable medium include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio Frequency (RF) links, and so forth. The code segments may be downloaded via computer networks such as the internet, intranets, etc.

The present invention may be embodied in other specific forms without departing from its spirit or essential characteristics. For example, the algorithms described in the specific embodiments may be modified without departing from the basic spirit of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims

1. A circuit for an asymmetric half-bridge flyback power supply, the asymmetric half-bridge flyback power supply including a first switch, a second switch, a primary inductor of a transformer, and a secondary inductor of the transformer, the transformer being magnetized by the primary inductor during a time when the first switch is on and the second switch is off, the transformer being demagnetized by the secondary inductor during a time when the first switch is off and the second switch is on, the circuit comprising:

a first voltage detection unit configured to detect a feedback voltage of an output terminal of the asymmetric half-bridge flyback power supply, wherein the feedback voltage corresponds to an operating voltage of a load to which the asymmetric half-bridge flyback power supply is connected; and

a switch control unit configured to turn on the first switch for a first period of time and turn on the second switch for a second period of time according to the feedback voltage during each duty cycle of the asymmetric half-bridge flyback power supply, wherein the first switch and the second switch are not in an on state at the same time.

2. The circuit of claim 1, wherein the circuit further comprises:

a second voltage detection unit configured to couple with the primary inductor and the secondary inductor to detect a primary voltage of the primary inductor during magnetizing of the transformer and to detect a secondary voltage of the secondary inductor during demagnetizing of the transformer.

3. The circuit of claim 2, wherein the circuit further comprises:

a third voltage detection unit configured to detect a resistance voltage across a current detection resistance on a magnetizing loop during magnetizing of the transformer.

4. The circuit of claim 2, wherein the switch control unit is configured to:

determining the duration of the first time period according to the resistance voltage and the feedback voltage; and

and determining the duration of the second time period according to the feedback voltage, the primary side voltage and the secondary side voltage.

5. The circuit of claim 4, wherein the second time period comprises a demagnetization time period and a primary inductor reverse charging time period,

wherein the switch control unit is configured to:

determining the duration of the demagnetization time period according to the feedback voltage, the primary side voltage and the secondary side voltage; and

and determining the time length of the reverse charging time period of the primary side inductor according to the primary side voltage.

6. The circuit of claim 5, wherein the switch control unit is configured to:

turning on the second switch after a first dead time period after the first time period ends; and

turning on the first switch after a second dead-time period following the primary inductor reverse charging period,

wherein the first dead time period is a time period required for turning on the second switch with zero voltage, the second dead time period is a time period required for turning on the first switch with zero voltage,

wherein the time when the first switch is turned on is the start time of the duty cycle.

7. The circuit according to claim 5 or 6, wherein the first voltage detection unit detects the feedback voltage by detecting a divided voltage of the output terminal.

8. The circuit of claim 7, wherein the switch control unit is further configured to:

comparing the divided voltage to a predetermined voltage threshold;

under the condition that the divided voltage is larger than the preset voltage threshold value, determining that the load is a heavy load, and enabling the asymmetric half-bridge flyback power supply to work in a critical continuous mode; and

and under the condition that the divided voltage is less than or equal to the preset voltage threshold, determining that the load is a light load, and enabling the asymmetric half-bridge flyback power supply to work in an intermittent mode.

9. The circuit of claim 8, wherein the switch control unit is configured to:

in the critical continuous mode, the demagnetization time period and the primary side inductor reverse charging time period are continuous time periods;

and in the intermittent mode, a third time period is arranged between the demagnetization time period and the primary inductor reverse charging time period, so that the first switch and the second switch are both kept in an off state during the third time period.

10. The circuit of claim 9, wherein the switch control unit determines the duration of the third time period from the feedback voltage.