CN115639454A - Threshold voltage monitoring circuit for SiC MOSFET high-temperature reverse bias or high-temperature grid bias test - Google Patents
Threshold voltage monitoring circuit for SiC MOSFET high-temperature reverse bias or high-temperature grid bias test Download PDFInfo
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- 229910010271 silicon carbide Inorganic materials 0.000 description 137
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 136
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- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 230000032683 aging Effects 0.000 description 2
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Abstract
The application relates to a threshold voltage monitoring circuit for a SiC MOSFET high-temperature reverse bias or high-temperature gate bias test. The circuit comprises: the device comprises a target SiC MOSFET to be tested, a first test circuit, a second test circuit and a test circuit; the grid electrode of the target SiC MOSFET, the first test circuit and the source electrode of the target SiC MOSFET can form a first loop, and the drain electrode of the target SiC MOSFET, the second test circuit and the source electrode of the target SiC MOSFET can form a second loop, so that the target SiC MOSFET is subjected to a target test through the first loop and the second loop, wherein the target test comprises one of a high-temperature reverse bias test and a high-temperature gate bias test; the drain electrode and the grid electrode can form a short circuit loop, and the drain electrode, the test circuit and the source electrode can form a third loop, so that the test circuit can measure the threshold voltage of the target SiC MOSFET after the target test is finished under the condition that the short circuit loop and the third loop are conducted. According to the method and the device, different circuits are quickly switched on, so that the threshold voltage of the SiC MOSFET device can be monitored, and the threshold voltage of the SiC MOSFET device can be monitored more accurately.
Description
Technical Field
The application relates to the technical field of electrical parameter measurement of semiconductor devices, in particular to a threshold voltage monitoring circuit for a SiC MOSFET high-temperature reverse bias or high-temperature gate bias test.
Background
The SiC MOSFET has wide application prospect in the fields of high voltage, high frequency and high temperature, and can be widely applied to photovoltaic, electric automobiles, electric ships, airplanes and the like. However, siC MOSFETs have a problem of threshold voltage instability under stress such as voltage bias, temperature, and the like. Because of SiC/SiO 2 The threshold voltage drift of the SiC MOSFET is more severe than that of the Si-based MOSFET. Therefore, the threshold voltage is one of the important parameters characterizing the degradation of SiC MOSFET devices.
In a traditional high-temperature reverse bias/gate bias test, when the threshold voltage of a SiC MOSFET device is monitored, firstly, an aging test is carried out on the SiC MOSFET device under stress conditions of different voltage bias, temperature and the like. Then, the test device is disassembled after the test is finished, and the threshold voltage of the SiC MOSFET device is tested in an off-line monitoring mode.
However, for SiC MOSFETs, the threshold voltage drift recovers at an exponential rate after the stress is over, and the test interval time has a large effect on the threshold voltage test results. Therefore, the threshold voltage of the SiC MOSFET device cannot be accurately monitored in real time by using the conventional offline monitoring method.
Disclosure of Invention
In view of the above, it is necessary to provide a threshold voltage monitoring circuit capable of accurately monitoring a SiC MOSFET device in a high temperature reverse bias test or a high temperature gate bias test in real time.
In a first aspect, the application provides a threshold voltage monitoring circuit for a high-temperature reverse bias or high-temperature gate bias test of a SiC MOSFET. The threshold voltage monitoring circuit comprises a target SiC MOSFET to be tested, a first test circuit, a second test circuit and a test circuit;
the gate electrode of the target SiC MOSFET, the first test circuit and the source electrode of the target SiC MOSFET can form a first loop, and the drain electrode of the target SiC MOSFET, the second test circuit and the source electrode can form a second loop, so that the target test can be carried out on the target SiC MOSFET through the first loop and the second loop, wherein the target test comprises one of a high-temperature reverse bias test and a high-temperature gate bias test;
the drain and the gate may form a short circuit loop, and the drain, the test circuit and the source may form a third loop, so that the test circuit measures the threshold voltage of the target SiC MOSFET after the target test is completed, under the condition that the short circuit loop and the third loop are turned on.
In one embodiment, the target test is a high-temperature reverse bias test, the first test circuit includes a first power supply, the second test circuit includes a second power supply, the first power supply is used for outputting negative gate voltage, and the second power supply is used for outputting drain-source voltage.
In one embodiment, the threshold voltage monitoring circuit further comprises a first single-pole double-throw switch;
the fixed end binding post of the first single-pole double-throw switch is connected with the grid electrode, the movable end binding post of the first single-pole double-throw switch is connected with the drain electrode and one end of the first power supply, and the other end of the first power supply is connected with the source electrode.
In one embodiment, the threshold voltage monitoring circuit further comprises a second single pole double throw switch;
a fixed terminal of the second single-pole double-throw switch is connected with the drain electrode, and a movable terminal of the second single-pole double-throw switch is connected with one end of the test circuit and one end of the second power supply;
the other end of the test circuit and the other end of the second power supply are both connected with the source electrode.
In one embodiment, the target test is a high-temperature gate bias test, the first test circuit includes two power supply branches connected in parallel and a switching element, the second test circuit is a short circuit, the switching element is configured to control one of the two power supply branches to be turned on and the other to be turned off, one of the two power supply branches includes a third power supply, the other power supply branch includes a fourth power supply, the third power supply is configured to output a first gate-source voltage, and the fourth power supply is configured to output a second gate-source voltage.
In one embodiment, the threshold voltage monitoring circuit further comprises a third single-pole double-throw switch;
and a fixed end binding post of the third single-pole double-throw switch is connected with the grid electrode, and a movable end binding post of the third single-pole double-throw switch is connected with the drain electrode and the switch element.
In one embodiment, the switching element comprises a fourth single pole double throw switch;
and a fixed end binding post of the fourth single-pole double-throw switch is connected with a movable end binding post of the third single-pole double-throw switch, and the movable end binding post of the fourth single-pole double-throw switch is connected with the third power supply and the fourth power supply.
In one embodiment, the threshold voltage monitoring circuit further comprises a fifth single-pole double-throw switch;
a fixed terminal of the fifth single-pole double-throw switch is connected with the drain electrode, and a movable terminal of the fifth single-pole double-throw switch is connected with one end of the test circuit and the source electrode;
the other end of the test circuit is connected with the source electrode.
In one embodiment, the test circuit includes a current output element for outputting a preset test current, which includes a preset threshold current.
In one embodiment, the test circuit includes a voltage measurement element for measuring a threshold voltage of the target SiC MOSFET.
The threshold voltage monitoring circuit for the SiC MOSFET high-temperature reverse bias or high-temperature gate bias test comprises a target SiC MOSFET to be tested, a first test circuit, a second test circuit and a test circuit; the grid electrode of the target SiC MOSFET, the first test circuit and the source electrode of the target SiC MOSFET can form a first loop, and the drain electrode of the target SiC MOSFET, the second test circuit and the source electrode of the target SiC MOSFET can form a second loop so as to perform a target test on the target SiC MOSFET through the first loop and the second loop, wherein the target test comprises one of a high-temperature reverse bias test and a high-temperature gate bias test; the drain electrode and the grid electrode can form a short circuit loop, and the drain electrode, the test circuit and the source electrode can form a third loop, so that the test circuit can measure the threshold voltage of the target SiC MOSFET after the target test is finished under the condition that the short circuit loop and the third loop are conducted. According to the method, a first loop formed by a first test circuit and a second loop formed by a second test circuit are conducted, and a high-temperature reverse bias test or a high-temperature grid bias test is carried out on a target SiC MOSFET; and then, a third loop formed by turning on the short-circuit loop and the test circuit is used for monitoring the threshold voltage of the target SiC MOSFET in real time by using the test circuit. The threshold voltage of the SiC MOSFET device is monitored by rapidly switching on different circuits in the whole process, the test device does not need to be disassembled after the high-temperature reverse bias test or the high-temperature grid bias test is finished, the threshold voltage of the SiC MOSFET device is monitored in an off-line monitoring mode, the problem of inaccurate test caused by rapid recovery of threshold voltage drift after stress is removed is avoided, and the threshold voltage of the SiC MOSFET device in the high-temperature reverse bias test or the high-temperature grid bias test can be monitored more accurately.
Drawings
FIG. 1 is a schematic connection diagram of a threshold voltage monitoring circuit for a high temperature reverse bias or high temperature gate bias test of a SiC MOSFET in one embodiment;
FIG. 2 is a schematic diagram of the connection of the threshold voltage monitoring circuit when the target test is a high temperature reverse bias test according to one embodiment;
FIG. 3 is a schematic diagram of the connection of the threshold voltage monitoring circuit when the target test is a high temperature gate bias test according to one embodiment;
FIG. 4 is a schematic diagram of the connection of a threshold voltage monitoring circuit including a current output element in one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The SiC MOSFET has wide application prospect in the fields of high voltage, high frequency and high temperature, and can be widely applied to photovoltaic, electric automobiles, electric ships, airplanes and the like. However, siC MOSFETs have a problem of threshold voltage instability under stress such as voltage bias, temperature, and the like. Because of SiC/SiO 2 The threshold voltage drift of the SiC MOSFET is more severe than that of the Si-based MOSFET. Therefore, the threshold voltage is one of the important parameters characterizing the degradation of SiC MOSFET devices.
In a traditional high-temperature reverse bias/gate bias test, when the threshold voltage of a SiC MOSFET device is monitored, firstly, an aging test is carried out on the SiC MOSFET device under stress conditions of different voltage bias, temperature and the like. Then, the test device is disassembled after the test is finished, and the threshold voltage of the SiC MOSFET device is tested in an off-line monitoring mode.
However, for the SiC MOSFET, the threshold voltage drift may recover at an exponential rate after the stress is over, and the test interval may have a large influence on the test result of the threshold voltage. Therefore, the threshold voltage of the SiC MOSFET device cannot be accurately monitored in real time by using the conventional offline monitoring method.
Based on this, the threshold voltage monitoring circuit that can accurately monitor SiC MOSFET device in high temperature reverse bias or high temperature grid bias test in real time is provided.
In one embodiment, a threshold voltage monitoring circuit for a high-temperature reverse bias or high-temperature gate bias test of a SiC MOSFET is provided, wherein the threshold voltage monitoring circuit comprises a target SiC MOSFET to be tested, a first test circuit, a second test circuit and a test circuit;
the grid electrode of the target SiC MOSFET, the first test circuit and the source electrode of the target SiC MOSFET can form a first loop, and the drain electrode of the target SiC MOSFET, the second test circuit and the source electrode of the target SiC MOSFET can form a second loop, so that the target SiC MOSFET is subjected to a target test through the first loop and the second loop, wherein the target test comprises one of a high-temperature reverse bias test and a high-temperature gate bias test;
the drain electrode and the grid electrode can form a short circuit loop, and the drain electrode, the test circuit and the source electrode can form a third loop, so that the test circuit can measure the threshold voltage of the target SiC MOSFET after the target test is finished and under the condition that the short circuit loop and the third loop are conducted.
In the embodiment of the present application, as shown in fig. 1, the threshold voltage monitoring circuit 100 includes a target SiC MOSFET102 to be tested, a first test circuit 104, a second test circuit 106, and a test circuit 108. When a target test is performed on the target SiC MOSFET102, the gate G of the target SiC MOSFET102, the first test circuit 104, and the source S of the target SiC MOSFET102 are turned on, thereby forming a first loop; and the drain D of the target SiC MOSFET102, the second test circuit 106, and the source S of the target SiC MOSFET102 are turned on, thereby forming a second loop to perform the target test on the target SiC MOSFET102 through the first loop and the second loop.
The target SiC MOSFET102 to be measured is a SiC MOSFET device (silicon carbide metal oxide semiconductor field effect transistor). When the first loop and the second loop are conducted, the first loop can be conducted first, and then the second loop can be conducted; or for conducting the second loop first and then conducting the first loop; or both the first and second circuits. To prevent damage to the target SiC MOSFET102 device, a circuit with a lower voltage is typically first conducted and a circuit with a higher voltage is then conducted. Certainly, in the embodiment of the present application, the order of the step of turning on the first loop and the step of turning on the second loop is not limited. The target test includes one of a high temperature reverse bias test and a high temperature grid bias test. The High Temperature Reverse Bias test (HTRB) simulates a semiconductor device operating at High Temperature and High drain voltage for a long time to evaluate the defect or degradation of the edge structure and passivation layer of the device. The High Temperature Gate Bias test (HTGB) simulates the state of a semiconductor device operating under High Temperature and High Gate voltage stress for a long time to evaluate the endurance of the Gate oxide layer of the device against defects and degradation.
After a target test is performed for a preset period of time, the target SiC MOSFET102 is monitored for a threshold voltage. At this time, the drain D of the target SiC MOSFET102 and the gate G of the target SiC MOSFET102 are turned on to form a short circuit, and the drain D of the target SiC MOSFET102, the test circuit 108 and the source S of the target SiC MOSFET102 are turned on to form a third circuit, so that the test circuit 108 measures the threshold voltage of the target SiC MOSFET102 after the target test is completed, under the condition that the short circuit and the third circuit are turned on. In measuring the threshold voltage of the target SiC MOSFET102, the test circuit 108 in the embodiment of the present application includes a voltage measuring element for measuring the threshold voltage of the target SiC MOSFET 102. The voltage measuring element includes an oscilloscope, a multimeter, and the like, and when the voltage measuring element is an oscilloscope, the threshold voltage of the target SiC MOSFET102 can be monitored in real time by connecting the first end of the oscilloscope to the drain D of the target SiC MOSFET102, and connecting the second end of the oscilloscope to the source S of the target SiC MOSFET 102.
The threshold voltage monitoring circuit for the SiC MOSFET high-temperature reverse bias or high-temperature gate bias test comprises a target SiC MOSFET to be tested, a first test circuit, a second test circuit and a test circuit; the grid electrode of the target SiC MOSFET, the first test circuit and the source electrode of the target SiC MOSFET can form a first loop, and the drain electrode of the target SiC MOSFET, the second test circuit and the source electrode of the target SiC MOSFET can form a second loop so as to perform a target test on the target SiC MOSFET through the first loop and the second loop, wherein the target test comprises one of a high-temperature reverse bias test and a high-temperature gate bias test; the drain electrode and the grid electrode can form a short circuit loop, and the drain electrode, the test circuit and the source electrode can form a third loop, so that the test circuit can measure the threshold voltage of the target SiC MOSFET after the target test is finished and under the condition that the short circuit loop and the third loop are conducted. According to the method, a first loop formed by a first test circuit and a second loop formed by a second test circuit are conducted, and a high-temperature reverse bias test or a high-temperature grid bias test is carried out on a target SiC MOSFET; and then, a third loop formed by turning on the short-circuit loop and the test circuit is used for monitoring the threshold voltage of the target SiC MOSFET in real time by using the test circuit. In the whole process, different circuits are quickly switched on, so that the threshold voltage of the SiC MOSFET device is monitored, the test device does not need to be detached after the high-temperature reverse bias test or the high-temperature grid bias test is finished, the threshold voltage of the SiC MOSFET device is monitored in an off-line monitoring mode, and the problem of inaccurate test caused by rapid recovery of threshold voltage drift after stress is removed in the traditional method is solved. The threshold voltage of the SiC MOSFET device in a high-temperature reverse bias or high-temperature gate bias test can be monitored more accurately.
In one embodiment, the target test is a high temperature reverse bias test, the first test circuit includes a first power supply, the second test circuit includes a second power supply, the first power supply is used for outputting negative gate voltage, and the second power supply is used for outputting drain-source voltage.
In the embodiment of the present application, as shown in fig. 2, the target test in the embodiment is a high temperature reverse bias test, in this case, the first test circuit 104 includes a first power supply 202, the second test circuit 106 includes a second power supply 204, and the first power supply 202 is configured to output a negative gate voltage-V GS The second power supply 204 is used for outputting a drain-source voltage V DS,max . Wherein, the negative gate voltage-V GS Refers to a negative voltage applied between the gate G of the target SiC MOSFET102 and the source S of the target SiC MOSFET102, which can turn the SiC MOSFET device off. Drain source voltage V DS,max Is referred to as the gate source voltage V GS When the voltage is 0, the maximum drain-source voltage which can be borne by the field effect transistor in normal operation. The drain-source voltage refers to the voltage between the drain D of the target SiC MOSFET102 and the source S of the target SiC MOSFET 102. In this embodiment, the field effect transistor may be a SiC MOSFET device.
In this embodiment, when the target test is a high-temperature reverse bias test, the first test circuit includes a first power supply, the second test circuit includes a second power supply, the first power supply is configured to output a negative gate voltage, the second power supply is configured to output a drain-source voltage, and the performing condition of the high-temperature reverse bias test is formed by applying the negative gate voltage to the first power supply and applying the drain-source voltage to the second power supply.
In one embodiment, the threshold voltage monitoring circuit further comprises a first single pole double throw switch;
a fixed end binding post of the first single-pole double-throw switch is connected with the grid electrode, a movable end binding post of the first single-pole double-throw switch is connected with the drain electrode and one end of a first power supply, and the other end of the first power supply is connected with the source electrode.
In the embodiment of the present application, referring to fig. 2, when the target test is a high-temperature reverse bias test, the threshold voltage monitoring circuit 100 further includes a first single-pole double-throw switch S1, a fixed terminal of the first single-pole double-throw switch S1 is connected to the gate G of the target SiC MOSFET102, a movable terminal of the first single-pole double-throw switch S1 is connected to the drain D of the target SiC MOSFET102 and the negative terminal of the first power source 202, and the positive terminal of the first power source 202 is connected to the source S of the target SiC MOSFET 102. When a high-temperature reverse bias test is performed, the active terminal of the first single-pole double-throw switch S1 is connected to the negative electrode of the first power supply 202, and a negative gate voltage-V is applied between the gate G of the target SiC MOSFET102 and the source S of the target SiC MOSFET102 GS . When a voltage monitoring circuit corresponding to a high-temperature reverse bias test is carried out, the movable terminal of the first single-pole double-throw switch S1 is connected with the drain D of the target SiC MOSFET102, and the drain D of the target SiC MOSFET102 is in short circuit with the gate G of the target SiC MOSFET 102.
In this embodiment, the threshold voltage monitoring circuit further includes a first single-pole double-throw switch; a fixed end binding post of the first single-pole double-throw switch is connected with the grid electrode, a movable end binding post of the first single-pole double-throw switch is connected with the drain electrode and one end of a first power supply, and the other end of the first power supply is connected with the source electrode. The switching speed of the single-pole double-throw switch is controlled within millisecond level, and the rapid switching between the high-temperature reverse-bias test and the threshold voltage monitoring circuit corresponding to the high-temperature reverse-bias test can be realized through the switching of the movable end of the first single-pole double-throw switch.
In one embodiment, the threshold voltage monitoring circuit further comprises a second single pole double throw switch;
a fixed terminal of the second single-pole double-throw switch is connected with the drain electrode, and a movable terminal of the second single-pole double-throw switch is connected with one end of the test circuit and one end of the second power supply;
the other end of the test circuit and the other end of the second power supply are both connected with the source electrode.
In the embodiment of the present application, as shown in fig. 2, when the target test is a high-temperature reverse bias test, the threshold voltage monitoring circuit 100 further includes a second single-pole double-throw switch S2, a fixed terminal of the second single-pole double-throw switch S2 is connected to the drain D of the target SiC MOSFET102, a movable terminal of the second single-pole double-throw switch S2 is connected to one end of the test circuit 108 and the anode of the second power supply 204, and the other end of the test circuit 108 and the cathode of the second power supply 204 are both connected to the source S of the target SiC MOSFET 102. When a high-temperature reverse bias test is performed, the active terminal of the second single-pole double-throw switch S2 is connected to the positive electrode of the second power supply 204, and a drain-source voltage V is applied between the drain D of the target SiC MOSFET102 and the source S of the target SiC MOSFET102 DS,max . When a voltage monitoring circuit corresponding to the high-temperature reverse bias test is performed, the active terminal of the second single-pole double-throw switch S2 is connected to one end of the test circuit 108, so that a third loop is formed to monitor the threshold voltage of the target SiC MOSFET 102.
In this embodiment, the threshold voltage monitoring circuit further includes a second single-pole double-throw switch, a fixed terminal of the second single-pole double-throw switch is connected to the drain, and a movable terminal of the second single-pole double-throw switch is connected to one end of the test circuit and one end of the second power supply; the other end of the test circuit and the other end of the second power supply are both connected with the source electrode. The switching speed of the single-pole double-throw switch is controlled within millisecond level, and the rapid switching between the high-temperature reverse-bias test and the threshold voltage monitoring circuit corresponding to the high-temperature reverse-bias test can be realized through the switching of the movable end of the second single-pole double-throw switch.
In one embodiment, the target test is a high-temperature gate bias test, the first test circuit includes two power supply branches connected in parallel with each other and a switching element, the second test circuit is a short circuit, the switching element is configured to control one of the two power supply branches to be turned on and the other power supply branch to be turned off, one of the two power supply branches includes a third power supply, the other power supply branch includes a fourth power supply, the third power supply is configured to output a first gate-source voltage, and the fourth power supply is configured to output a second gate-source voltage.
In the embodiment of the present application, as shown in fig. 3, the target test in the embodiment is a high-temperature gate bias test, in this case, the first test circuit 104 includes two power branches and a switching element connected in parallel, and the second test circuit 106 is a short circuit. The switching element is used for controlling one of the two power supply branches to be turned on and the other power supply branch to be turned off, one of the two power supply branches comprises a third power supply 302, the other power supply branch comprises a fourth power supply 304, and the third power supply 302 is used for outputting a first gate-source voltage + V GS,max The fourth power supply 304 is used for outputting a second gate-source voltage-V GS,max . Wherein, the gate-source voltage V GS,max Is the highest voltage that can be withstood between the gate G of the target SiC MOSFET102 and the source S of the target SiC MOSFET 102. First gate-source voltage + V GS,max The highest forward voltage that can be withstood between the gate G of the target SiC MOSFET102 and the source S of the target SiC MOSFET 102; second gate-source voltage-V GS,max Is the highest negative voltage that can be withstood between the gate G of target SiC MOSFET102 and the source S of target SiC MOSFET 102.
In this embodiment, when the target test is a high-temperature gate bias test, the first test circuit includes two power supply branches and a switching element that are connected in parallel, the second test circuit is a short circuit, the switching element is configured to control one of the two power supply branches to be turned on, and the other power supply branch to be turned off, the one of the two power supply branches includes a third power supply, the other power supply branch includes a fourth power supply, the third power supply is configured to output a first gate-source voltage, the fourth power supply is configured to output a second gate-source voltage, and the first gate-source voltage is applied by the third power supply or the second gate-source voltage is applied by the fourth power supply, so as to form a condition for performing the high-temperature gate bias test.
In one embodiment, the threshold voltage monitoring circuit further comprises a third single pole double throw switch;
the fixed terminal of the third single-pole double-throw switch is connected with the grid, and the movable terminal of the third single-pole double-throw switch is connected with the drain and the switch element.
In the embodiment of the present application, referring to fig. 3, when the target test is a high-temperature gate bias test, the threshold voltage monitoring circuit 100 further includes a third single-pole double-throw switch S3, a fixed terminal of the third single-pole double-throw switch S3 is connected to the gate G of the target SiC MOSFET102, and a movable terminal of the third single-pole double-throw switch S3 is connected to the drain D of the target SiC MOSFET102 and the switch element. When a high-temperature gate bias test is performed, the active terminal of the third single-pole double-throw switch S3 is connected to the switching element, and a first gate-source voltage + V is applied between the gate G of the target SiC MOSFET102 and the source S of the target SiC MOSFET102 GS,max Or applying a second gate-source voltage-V GS,max . When a voltage monitoring circuit corresponding to a high-temperature gate bias test is performed, the active terminal of the third single-pole double-throw switch S3 is connected to the drain D of the target SiC MOSFET102, and the drain D of the target SiC MOSFET102 is conducted with the gate G of the target SiC MOSFET102, thereby forming a short circuit loop.
In this embodiment, the threshold voltage monitoring circuit further includes a third single-pole double-throw switch; the fixed terminal of the third single-pole double-throw switch is connected with the grid, and the movable terminal of the third single-pole double-throw switch is connected with the drain and the switch element. The switching speed of the single-pole double-throw switch is controlled within millisecond level, and the rapid switching between the high-temperature grid bias test and the threshold voltage monitoring circuit corresponding to the high-temperature grid bias test can be realized through the switching of the active end of the third single-pole double-throw switch.
In one embodiment, the switching element comprises a fourth single pole double throw switch;
and a fixed end binding post of the fourth single-pole double-throw switch is connected with a movable end binding post of the third single-pole double-throw switch, and the movable end binding post of the fourth single-pole double-throw switch is connected with a third power supply and a fourth power supply.
In the embodiment of the present application, refer to FIG. 3When the target test is a high-temperature gate bias test, the switch element includes a fourth single-pole double-throw switch S4, a fixed terminal of the fourth single-pole double-throw switch S4 is connected to a movable terminal of the third single-pole double-throw switch S3, and a movable terminal of the fourth single-pole double-throw switch S4 is connected to the third power supply 302 and the fourth power supply 304. When performing a high temperature gate bias test, the active terminal of the fourth SPDT switch S4 may be connected to the third power supply 302, applying a first gate-source voltage + V between the gate G of the target SiC MOSFET102 and the source S of the target SiC MOSFET102 GS,max (ii) a Alternatively, the active terminal of the fourth SPDT switch S4 may be connected to the fourth power supply 304, and the second gate-source voltage-V may be applied between the gate G of the target SiC MOSFET102 and the source S of the target SiC MOSFET102 GS,max 。
In this embodiment, the switching element includes a fourth single-pole double-throw switch; and a fixed end binding post of the fourth single-pole double-throw switch is connected with a movable end binding post of the third single-pole double-throw switch, and the movable end binding post of the fourth single-pole double-throw switch is connected with a third power supply and a fourth power supply. The switching speed of the single-pole double-throw switch is controlled within millisecond level, and the rapid switching between the application of the first grid-source voltage by the third power supply or the application of the second grid-source voltage by the fourth power supply can be realized through the switching of the active end of the fourth single-pole double-throw switch.
In one embodiment, the threshold voltage monitoring circuit further comprises a fifth single-pole double-throw switch;
a fixed terminal of the fifth single-pole double-throw switch is connected with the drain electrode, and a movable terminal of the fifth single-pole double-throw switch is connected with one end of the test circuit and the source electrode;
the other end of the test circuit is connected to the source.
In the embodiment of the present application, as shown in fig. 3, when the target test is a high-temperature gate bias test, the threshold voltage monitoring circuit 100 further includes a fifth single-pole double-throw switch S5, a fixed terminal of the fifth single-pole double-throw switch S5 is connected to the drain D of the target SiC MOSFET102, a movable terminal of the fifth single-pole double-throw switch S5 is connected to one end of the test circuit 108 and the source S of the target SiC MOSFET102, and the other end of the test circuit 108 is connected to the source S of the target SiC MOSFET 102. When a high-temperature gate bias test is performed, the active terminal of the fifth single-pole double-throw switch S5 is connected to the source S of the target SiC MOSFET102, and the drain D of the target SiC MOSFET102 is short-circuited with the source S of the target SiC MOSFET 102. When a voltage monitoring circuit corresponding to the high-temperature gate bias test is performed, the active terminal of the fifth single-pole double-throw switch S5 is connected to one end of the test circuit 108, so that a third loop is formed to monitor the threshold voltage of the target SiC MOSFET 102.
In this embodiment, the threshold voltage monitoring circuit further includes a fifth single-pole double-throw switch; a fixed terminal of the fifth single-pole double-throw switch is connected with the drain electrode, and a movable terminal of the fifth single-pole double-throw switch is connected with one end of the test circuit and the source electrode; the other end of the test circuit is connected to the source. The switching speed of the single-pole double-throw switch is controlled within millisecond level, and the rapid switching between the high-temperature grid bias test and the threshold voltage monitoring circuit corresponding to the high-temperature grid bias test can be realized through the switching of the active end of the fifth single-pole double-throw switch.
In one embodiment, the test circuit includes a current output element for outputting a predetermined test current, the predetermined test current including a predetermined threshold current.
In the embodiment of the present application, as shown in fig. 4, the test circuit 108 includes a current output element, and the test circuit 108 further includes a voltage measurement element. The current output element is configured to output a preset test current between the drain D of the target SiC MOSFET102 and the source S of the target SiC MOSFET102 when monitoring the threshold voltage of the target SiC MOSFET102, the preset test current including a preset threshold current. The preset test current may be a preset threshold current applied constantly, or a preset test current may also be a current applied variably, and it is required to satisfy that the applied preset test current includes the preset threshold current, and when the current between the drain D of the target SiC MOSFET102 and the source S of the target SiC MOSFET102 is the preset threshold current, the voltage between the drain D of the target SiC MOSFET102 and the source S of the target SiC MOSFET102 corresponding to this time is determined as the threshold voltage.
In this embodiment, the test circuit includes a current output element, where the current output element is configured to output a predetermined test current, and the predetermined test current includes a predetermined threshold current. The current output element outputs the preset test current comprising the preset threshold current, so that the threshold voltage can be accurately determined.
It should be understood that, although the steps in the flowcharts related to the embodiments are shown in sequence as indicated by the arrows, the steps are not necessarily executed in sequence as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least a part of the steps in the flowcharts related to the above embodiments may include multiple steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of performing the steps or stages is not necessarily sequential, but may be performed alternately or alternately with other steps or at least a part of the steps or stages in other steps.
It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) referred to in the present application are information and data authorized by the user or fully authorized by each party, and the collection, use and processing of the related data need to comply with the relevant laws and regulations and standards of the relevant countries and regions.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above examples only express several embodiments of the present application, and the description thereof is more specific and detailed, but not to be construed as limiting the scope of the present application. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.
Claims (10)
1. A threshold voltage monitoring circuit for a SiC MOSFET high-temperature reverse bias or high-temperature gate bias test is characterized in that the threshold voltage monitoring circuit comprises a target SiC MOSFET to be tested, a first test circuit, a second test circuit and a test circuit;
the gate electrode of the target SiC MOSFET, the first test circuit and the source electrode of the target SiC MOSFET can form a first loop, and the drain electrode of the target SiC MOSFET, the second test circuit and the source electrode can form a second loop, so that the target test can be carried out on the target SiC MOSFET through the first loop and the second loop, wherein the target test comprises one of a high-temperature reverse bias test and a high-temperature gate bias test;
the drain and the gate may form a short circuit loop, and the drain, the test circuit and the source may form a third loop, so that the test circuit measures the threshold voltage of the target SiC MOSFET after the target test is completed, under the condition that the short circuit loop and the third loop are turned on.
2. The threshold voltage monitoring circuit of claim 1, wherein the target test is a high temperature reverse bias test, the first test circuit comprises a first power supply, the second test circuit comprises a second power supply, the first power supply is configured to output a negative gate voltage, and the second power supply is configured to output a drain-source voltage.
3. The threshold voltage monitoring circuit of claim 2, further comprising a first single pole double throw switch;
the fixed end binding post of the first single-pole double-throw switch is connected with the grid electrode, the movable end binding post of the first single-pole double-throw switch is connected with the drain electrode and one end of the first power supply, and the other end of the first power supply is connected with the source electrode.
4. The threshold voltage monitoring circuit of claim 2, further comprising a second single pole double throw switch;
a fixed terminal of the second single-pole double-throw switch is connected with the drain electrode, and a movable terminal of the second single-pole double-throw switch is connected with one end of the test circuit and one end of the second power supply;
the other end of the test circuit and the other end of the second power supply are both connected with the source electrode.
5. The threshold voltage monitoring circuit according to claim 1, wherein the target test is a high-temperature gate bias test, the first test circuit comprises two power supply branches connected in parallel with each other and a switching element, the second test circuit is a short circuit, the switching element is configured to control one of the two power supply branches to be turned on and the other power supply branch to be turned off, one of the two power supply branches comprises a third power supply, the other power supply branch comprises a fourth power supply, the third power supply is configured to output a first gate-source voltage, and the fourth power supply is configured to output a second gate-source voltage.
6. The threshold voltage monitoring circuit of claim 5, further comprising a third single pole double throw switch;
and a fixed end binding post of the third single-pole double-throw switch is connected with the grid, and a movable end binding post of the third single-pole double-throw switch is connected with the drain and the switch element.
7. The threshold voltage monitoring circuit of claim 6, wherein the switching element comprises a fourth single-pole double-throw switch;
and a fixed end binding post of the fourth single-pole double-throw switch is connected with a movable end binding post of the third single-pole double-throw switch, and the movable end binding post of the fourth single-pole double-throw switch is connected with the third power supply and the fourth power supply.
8. The threshold voltage monitoring circuit of claim 5, further comprising a fifth single pole double throw switch;
a fixed terminal of the fifth single-pole double-throw switch is connected with the drain electrode, and a movable terminal of the fifth single-pole double-throw switch is connected with one end of the test circuit and the source electrode;
the other end of the test circuit is connected with the source electrode.
9. The threshold voltage monitoring circuit according to any one of claims 1 to 8, wherein the test circuit comprises a current output element for outputting a predetermined test current, the predetermined test current comprising a predetermined threshold current.
10. The threshold voltage monitoring circuit according to any one of claims 1 to 8, wherein the test circuit includes a voltage measuring element for measuring a threshold voltage of the target SiC MOSFET.
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