CN115629645A

CN115629645A - Current mode band gap reference voltage circuit and starting method thereof

Info

Publication number: CN115629645A
Application number: CN202211634613.1A
Authority: CN
Inventors: 刘荣亮; 陈炳杰
Original assignee: Beijing Tongxin Technology Co ltd; Jiangsu Runic Technology Co ltd
Current assignee: Beijing Tongxin Technology Co ltd; Jiangsu Runic Technology Co ltd
Priority date: 2022-12-19
Filing date: 2022-12-19
Publication date: 2023-01-20
Anticipated expiration: 2042-12-19
Also published as: CN115629645B

Abstract

The embodiment of the application provides a current mode band-gap reference voltage circuit and a starting method thereof, in the starting process of a band-gap reference core circuit, the current of MN5 is equal to the current of MP3, when MN5 works in a saturation region, the sum of the impedances of R2 paths is larger than the impedance of R1 path, the current of MP3 is equal to the current of MP4, and the voltage of the negative input end of OPAMP is larger than the voltage of the positive input end of OPAMP; and the voltage at the negative input of OPAMP remains greater than the voltage at the positive input of OPAMP until the turn-on voltage of Q1 and Q2 is reached to eliminate the zero degeneracy point and the non-ideal degeneracy point before Q1, Q2 turn-on.

Description

Current mode band gap reference voltage circuit and starting method thereof

Technical Field

The application relates to the technical field of microelectronics, in particular to a current mode band-gap reference voltage circuit and a starting method thereof.

Background

The reference voltage source is an indispensable unit in many analog circuits and digital-analog hybrid integrated circuits, and the normal operation and stable performance of a circuit system cannot be separated from the stable reference voltage independent of temperature and power supply change. When the reference voltage circuit starts to operate, two or more than two static operating points, i.e. degeneracy points, often occur, and then the start-up circuit needs to be designed to eliminate the unneeded degeneracy points, so that the circuit operates in a required state, i.e. at a specific voltage.

The prior art current mode bandgap start-up circuit is shown in fig. 1 and has many degeneracy points before transistors Q11 and Q12 turn on. In the starting process of the conventional starting circuit, the resistor is pulled up, the MN13 is conducted, the gates of the MP11, the MP12, the MP13 and the MP14 are pulled down, the MP11, the MP12, the MP13 and the MP14 are conducted, the MN11 and the MN12 are conducted after the MP11 is conducted, the starting process of pulling down the gate of the MN13 is finished, and the Vref1 is the output reference voltage. The starting process can only ensure that MP11, MP12, MP13 and MP14 get rid of zero current, and the positive and negative input ends of the operational amplifier are stabilized at I _MP12 *R12=I _MP13 * At the voltage point of R11, the required voltage is not reached. That is, the start-up circuit can only eliminate the degenerated point of zero current, but cannot eliminate other abnormal degenerated points, as shown in fig. 2, the line formed by the circles represents the voltage at the negative input terminal of the OPAMP1, the solid line represents the voltage at the positive input terminal of the OPAMP1, and as can be seen from fig. 2, the line formed by the solid line and the circles is overlapped at the front section, which indicates that many degenerated points exist. Conventional start-up circuits often fail to start up.

In the related art, an effective solution is not available at present for the problem that the current mode bandgap start-up circuit in the related art can only eliminate the zero-current degeneracy point but cannot eliminate other abnormal degeneracy points.

Disclosure of Invention

The embodiment of the application provides a current mode bandgap reference voltage circuit and a starting method thereof, so as to solve at least the problem that a current mode bandgap starting circuit in the related art can only eliminate a zero current degeneracy point but cannot eliminate other abnormal degeneracy points.

In an embodiment of the application, a current mode bandgap reference voltage circuit is provided, which includes a start-up circuit and a bandgap reference core circuit, wherein the start-up circuit includes NMOS transistors MN1, MN2, MN3, MN4 and MN5, and PMOS transistors MP1 and MP2, wherein a gate of MN1 is connected to a gate of MN2, a drain of MP1 is connected to a drain of MN1, a drain of MN2 is connected to a gate of MN3, a drain of MP2 is connected to a drain of MN4, a gate of MN4 is connected to a gate of MN5, and sources of MN1, MN2, MN3, MN4 and MN5 are all connected; the band-gap reference core circuit comprises PMOS (P-channel metal oxide semiconductor) tubes MP3, MP4 and MP5, transistors Q1 and Q2, resistors R1 and R2 and an operational amplifier OPAMP, wherein the Q1 and the R2 are connected in parallel, the R2 and the MN5 are connected in series, the Q2 and the R1 are connected in parallel, the Q1 is connected with the negative input end of the OPAMP, the Q2 is connected with the positive input end of the OPAMP, and the MP1, the MP2, the MP3, the MP4 and the MP5 are respectively connected in parallel; the band-gap reference core circuit is used for generating a reference voltage Vref; MP2 and MN4 form a current mirror structure, and provide bias current for MN5, before Q1 and Q2 are conducted, MN5 works in a saturation region to provide impedance, so that the voltage of the negative input end of OPAMP is kept larger than that of the positive input end of OPAMP, and a zero degeneracy point is eliminated.

In one embodiment, R1 and R2 are equal in resistance.

In an embodiment, during a start-up process of the bandgap reference core circuit, a current of MN5 is equal to a current of MP3, when MN5 operates in a saturation region, MN5 generates a certain impedance, since MN5 and R2 are connected in series, an impedance of the R2 path is greater than an impedance of the R1 path, the MP3 current and the MP4 current are equal, and a voltage of a negative input terminal of the OPAMP is greater than a voltage of a positive input terminal of the OPAMP.

In one embodiment, during the start-up of the bandgap reference core circuit, the voltage at the negative input of the OPAMP is maintained greater than the voltage at the positive input of the OPAMP until the turn-on voltage of Q1 and Q2 is reached, so as to eliminate the zero degeneracy point and the non-ideal degeneracy point before the turn-on of Q1 and Q2.

In one embodiment, after the on-state voltages of Q1 and Q2 are reached, Q1 and Q2 are turned on, the current of MN5 is smaller than that of MP3, MN5 enters a linear region, the impedance of R2 is equal to that of R1, so as to achieve symmetry of the bandgap reference core circuit, and when the voltage of the positive input terminal and the voltage of the negative input terminal of OPAMP are equal, the bandgap reference core circuit is activated to output a reference voltage Vref.

In one embodiment, the magnitude of the reference voltage Vref is adjusted by adjusting the ratio of Q1 and Q2 and the resistances of R1, R2, and R3.

In an embodiment of the present application, there is further provided a starting method of the current-mode bandgap reference voltage circuit, including: s1, in the starting process of the band-gap reference core circuit, the current of MN5 is equal to the current of MP3, when MN5 works in a saturation region, the sum of the impedances of R2 paths is larger than the impedance of R1 path, the currents of MP3 and MP4 are equal, and the voltage of the negative input end of OPAMP is larger than the voltage of the positive input end of OPAMP; s2, before the conducting voltage of the Q1 and the Q2 is reached, the voltage of the negative input end of the OPAMP is kept to be larger than that of the positive input end of the OPAMP, so that a zero degeneracy point and a non-ideal degeneracy point before the Q1 and the Q2 are conducted are eliminated; s3, after the conduction voltages of the Q1 and the Q2 are reached, the Q1 and the Q2 are conducted, the current of the MN5 is smaller than that of the MP3, the MN5 enters a linear region, and the impedance of the R2 path is equal to that of the R1 path, so that the symmetry of the band-gap reference core circuit is realized; and S4, when the voltage of the positive input end and the voltage of the negative input end of the OPAMP are equal, the band-gap reference core circuit is started, and the reference voltage Vref is output.

In an embodiment, the method further comprises: the magnitude of the reference voltage Vref is adjusted by adjusting the magnitudes of the on-voltages of Q1 and Q2.

In an embodiment of the present application, a computer-readable storage medium is also proposed, in which a computer program is stored, wherein the computer program is configured to perform the steps of any of the above-described method embodiments when executed.

In an embodiment of the present application, an electronic device is further proposed, which includes a memory and a processor, and is characterized in that the memory stores therein a computer program, and the processor is configured to execute the computer program to perform the steps in any one of the method embodiments described above.

Through the current mode bandgap reference voltage circuit provided by the embodiment of the application, in the starting process of the bandgap reference core circuit, the current of MN5 is equal to the current of MP3, when MN5 works in a saturation region, the sum of the impedances of R2 paths is greater than the impedance of R1 path, the current of MP3 is equal to the current of MP4, and the voltage of the negative input end of OPAMP is greater than the voltage of the positive input end of OPAMP; and the voltage at the negative input of OPAMP remains greater than the voltage at the positive input of OPAMP until the turn-on voltage of Q1 and Q2 is reached to eliminate the zero degeneracy point and the non-ideal degeneracy point before Q1, Q2 turn-on. The problem that a current mode band gap starting circuit in the related technology can only eliminate a zero current degeneracy point but cannot eliminate other abnormal degeneracy points is solved. By the method, the unnecessary degeneracy point is eliminated, so that the band-gap reference core circuit can be started under the preset working voltage.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:

FIG. 1 is a schematic diagram of a prior art bandgap reference voltage circuit in current mode;

FIG. 2 is a schematic diagram of degenerated points in a prior art bandgap reference voltage circuit structure for current mode;

FIG. 3 is a schematic diagram of a current mode bandgap reference voltage circuit according to an embodiment of the present application;

FIG. 4 is a schematic diagram of a degenerate point under a current-mode bandgap reference voltage circuit according to an embodiment of the present application;

fig. 5 is a flowchart of a start-up method of an alternative current mode bandgap reference voltage circuit according to an embodiment of the present application.

Detailed Description

The present application will be described in detail below with reference to the accompanying drawings in conjunction with embodiments. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.

It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the accompanying drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.

The embodiment of the application provides a current-mode band-gap reference voltage circuit. Fig. 3 is a schematic structural diagram of a current mode bandgap reference voltage circuit according to an embodiment of the present application, and as shown in fig. 3, the current mode bandgap reference voltage circuit includes a start-up circuit and a bandgap reference core circuit, where the start-up circuit includes 5 NMOS transistors MN1, MN2, MN3, MN4, and MN5, and 2 PMOS transistors MP1 and MP2, where a gate of MN1 is connected to a gate of MN2, a drain of MN2 is connected to a gate of MN3, and a gate of MN4 is connected to a gate of MN 5; the band-gap reference core circuit comprises 3 PMOS (P-channel metal oxide semiconductor) tubes MP3, MP4 and MP5,2 transistors Q1 and Q2,2 resistors R1 and R2 and 1 operational amplifier OPAMP, wherein the Q1 and the R2 are connected in parallel, the R2 and the MN5 are connected in series, the Q2 and the R1 are connected in parallel, the Q1 is connected with the negative input end of the OPAMP, the Q2 is connected with the positive input end of the OPAMP, and the MP1, the MP2, the MP3, the MP4 and the MP5 are respectively connected in parallel; the band-gap reference core circuit is used for generating a reference voltage Vref; MP2 and MN4 act as a current mirror to provide the bias current to MN5, and MN5 operates in saturation to provide impedance before Q1 and Q2 are turned on, so that the voltage at the negative input of OPAMP remains greater than the voltage at the positive input of OPAMP to eliminate the zero degeneracy point.

In one embodiment, R1 and R2 are set to be equal in resistance. In the starting process of the bandgap reference core circuit, the current of the MN5 is equal to the current of the MP3, when the MN5 operates in a saturation region, the MN5 generates a certain impedance, and since the MN5 and the R2 are connected in series, the impedance of the R2 path is greater than that of the R1 path, and the current of the MP3 is equal to that of the MP4, so that the voltage of the negative input terminal of the OPAMP is greater than the voltage of the positive input terminal of the OPAMP.

In an embodiment, after the turn-on voltage of Q1 and Q2 is reached, Q1 and Q2 are turned on, the current of MN5 is smaller than the current of MP3, MN5 enters a linear region, MN5 operates in the linear region and its operating state is equivalent to a switch, the on-resistance of MN5 is much smaller than the resistance of R2, the impedance of R2 and the impedance of R1 are nearly equal to realize the symmetry of the bandgap reference core circuit, and when the voltage of the positive input terminal and the voltage of the negative input terminal of op amp are equal, the bandgap reference core circuit is started to output the reference voltage Vref.

Since the voltage of the negative input terminal of the OPAMP is kept larger than the voltage of the positive input terminal of the OPAMP until the turn-on voltage of Q1 and Q2 is reached, and the bandgap reference core circuit is not activated when the voltage of the positive input terminal and the voltage of the negative input terminal of the OPAMP are asymmetric, the size of the reference voltage Vref can be adjusted by adjusting the size ratio of Q1 and Q2 and the resistance values of R1, R3 and R4, and the following formula can be specifically referred to:

Vref=[(Vbe1-Vbe2)/R3+Vbe1/R1]*R4;

vbe1-Vbe2= Vt × ln (n), where Vbe1 is the voltage of Q1, vbe2 is the voltage of Q2, vt is a constant, and n is the ratio of the number of Q1 and Q2. It should be noted that each Q1 can be regarded as an independent unit, a plurality of Q1 are equal units, and similarly, each Q2 can be regarded as an independent unit, and a plurality of Q2 are equal units. Adjusting the size ratio of Q1 and Q2 can be achieved by connecting different numbers of Q1 in parallel at the negative input terminal of OPAMP, or by connecting different numbers of Q2 in parallel at the positive input terminal of OPAMP.

Fig. 4 is a schematic diagram of degeneracy points under a current mode bandgap reference voltage circuit according to an embodiment of the present application, where as shown in fig. 4, a line formed by circles represents a voltage at a negative input terminal of an operational amplifier OPAMP, and a solid line represents a voltage at a positive input terminal of the operational amplifier OPAMP, and with the current mode bandgap reference voltage circuit provided in the embodiment of the present application, R1 and R2 connected in parallel on two sides of Q1 and Q2 have different on-resistances during a circuit start-up process through setting MN5, so that an undesirable degeneracy point in fig. 2 is eliminated, and the bandgap reference core circuit is left with only a degeneracy point of zero and a normal degeneracy point.

In an embodiment of the present application, a starting method of the above current-mode bandgap reference voltage circuit is further provided, as shown in fig. 5, including:

s1, in the starting process of the band-gap reference core circuit, the current of MN5 is equal to the current of MP3, when MN5 works in a saturation region, the sum of the impedances of R2 paths is larger than the impedance of R1 path, the currents of MP3 and MP4 are equal, and the voltage of the negative input end of OPAMP is larger than the voltage of the positive input end of OPAMP;

s2, before the conducting voltage of the Q1 and the Q2 is reached, the voltage of the negative input end of the OPAMP is kept to be larger than that of the positive input end of the OPAMP, so that a zero degeneracy point and a non-ideal degeneracy point before the Q1 and the Q2 are conducted are eliminated;

s3, after the conduction voltages of the Q1 and the Q2 are reached, the Q1 and the Q2 are conducted, the current of the MN5 is smaller than that of the MP3, the MN5 enters a linear area, and the impedance of the R2 path is equal to that of the R1 path, so that the symmetry of the band gap reference core circuit is realized;

and S4, when the voltage of the positive input end and the voltage of the negative input end of the OPAMP are equal, the band-gap reference core circuit is started, and the reference voltage Vref is output.

In an embodiment of the present application, a computer-readable storage medium is also proposed, in which a computer program is stored, wherein the computer program is configured to perform the steps of any of the above method embodiments when executed.

Through the current mode bandgap reference voltage circuit provided by the embodiment of the application, in the starting process of the bandgap reference core circuit, the current of MN5 is equal to the current of MP3, when MN5 works in a saturation region, the sum of the impedances of R2 paths is greater than the impedance of R1 path, the current of MP3 is equal to the current of MP4, and the voltage of the negative input end of OPAMP is greater than the voltage of the positive input end of OPAMP; and the voltage at the negative input of OPAMP remains greater than the voltage at the positive input of OPAMP until the turn-on voltage of Q1 and Q2 is reached to eliminate the zero degeneracy point and the non-ideal degeneracy point before Q1, Q2 turn-on. The problem that in the related art, a current mode band gap starting circuit can only eliminate a zero-current degeneracy point but cannot eliminate other abnormal degeneracy points is solved. By the method, the unnecessary degeneracy point is eliminated, so that the band-gap reference core circuit can be started under the preset working voltage.

Alternatively, in this embodiment, a person skilled in the art may understand that all or part of the steps in the methods of the foregoing embodiments may be implemented by a program instructing hardware associated with the terminal device, where the program may be stored in a computer-readable storage medium, and the storage medium may include: flash disks, read-Only memories (ROMs), random Access Memories (RAMs), magnetic or optical disks, and the like.

The above-mentioned serial numbers of the embodiments of the present application are merely for description and do not represent the merits of the embodiments.

The integrated unit in the above embodiments, if implemented in the form of a software functional unit and sold or used as a separate product, may be stored in the above computer-readable storage medium. Based on such understanding, the technical solutions of the present application, which are essential or part of the technical solutions contributing to the prior art, or all or part of the technical solutions, may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing one or more computer devices (which may be personal computers, servers, network devices, or the like) to execute all or part of the steps of the methods described in the embodiments of the present application.

In the embodiments of the present application, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to the related descriptions of other embodiments.

In the several embodiments provided in the present application, it should be understood that the disclosed client may be implemented in other manners. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one type of division of logical functions, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed coupling or direct coupling or communication connection between each other may be an indirect coupling or communication connection through some interfaces, units or modules, and may be electrical or in other forms.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The foregoing is only a preferred embodiment of the present application and it should be noted that, as will be apparent to those skilled in the art, numerous modifications and adaptations can be made without departing from the principles of the present application and such modifications and adaptations are intended to be considered within the scope of the present application.

Claims

1. A current mode bandgap reference voltage circuit comprises a start-up circuit and a bandgap reference core circuit, wherein,

the starting circuit comprises NMOS transistors MN1, MN2, MN3, MN4 and MN5 and PMOS transistors MP1 and MP2, wherein the grid electrode of the MN1 is connected with the grid electrode of the MN2, the drain electrode of the MP1 is connected with the drain electrode of the MN1, the drain electrode of the MN2 is connected with the grid electrode of the MN3, the drain electrode of the MP2 is connected with the drain electrode of the MN4, the grid electrode of the MN4 is connected with the grid electrode of the MN5, and the source electrodes of the MN1, the MN2, the MN3, the MN4 and the MN5 are all connected;

the band-gap reference core circuit comprises PMOS (P-channel metal oxide semiconductor) tubes MP3, MP4 and MP5, transistors Q1 and Q2, resistors R1 and R2 and an operational amplifier OPAMP, wherein the Q1 and the R2 are connected in parallel, the R2 and the MN5 are connected in series, the Q2 and the R1 are connected in parallel, the Q1 is connected with the negative input end of the OPAMP, the Q2 is connected with the positive input end of the OPAMP, the MP1, the MP2, the MP3, the MP4 and the MP5 are respectively connected in parallel, and the band-gap reference core circuit is used for generating a reference voltage Vref;

MP2 and MN4 form a current mirror structure to provide a bias current to MN5, and before Q1 and Q2 are turned on, MN5 operates in a saturation region to provide impedance such that the voltage at the negative input of OPAMP remains greater than the voltage at the positive input of OPAMP to eliminate the zero degeneracy point.

2. The current-mode bandgap reference voltage circuit of claim 1, wherein R1 and R2 have equal resistance values.

3. The current-mode bandgap reference voltage circuit as claimed in claim 1, wherein during start-up of the bandgap reference core circuit, the current of MN5 is equal to the current of MP3, when MN5 operates in saturation region, the sum of the impedances of R2 is greater than the impedance of R1, the currents of MP3 and MP4 are equal, and the voltage of the negative input terminal of OPAMP is greater than the voltage of the positive input terminal of OPAMP.

4. The current-mode bandgap reference voltage circuit as claimed in claim 3, wherein during start-up of the bandgap reference core circuit, before the turn-on voltage of Q1 and Q2 is reached, the voltage at the negative input terminal of OPAMP is kept larger than that at the positive input terminal of OPAMP to eliminate zero degeneracy point and non-ideal degeneracy point before Q1 and Q2 are turned on.

5. The current-mode bandgap reference voltage circuit as claimed in claim 3, wherein after the on-state voltages of Q1 and Q2 are reached, Q1 and Q2 are turned on, MN5 has a current smaller than MP3, MN5 enters a linear region, and the impedance of R2 and the impedance of R1 are equal to realize the symmetry of the bandgap reference core circuit, and when the voltage of the positive input terminal and the voltage of the negative input terminal of the OPAMP are equal, the bandgap reference core circuit is enabled to output the reference voltage Vref.

6. The current-mode bandgap reference voltage circuit according to any of claims 1 to 5, wherein the reference voltage Vref is adjusted by adjusting the magnitude of the turn-on voltages of Q1 and Q2.

7. A starting method of a current-mode bandgap reference voltage circuit, applied to the current-mode bandgap reference voltage circuit of claim 1, comprising:

s1, in the starting process of a band-gap reference core circuit, the current of MN5 is equal to the current of MP3, when MN5 works in a saturation region, the sum of the impedances of R2 paths is larger than the impedance of R1 path, the currents of MP3 and MP4 are equal, and the voltage of the negative input end of an operational amplifier OPAMP is larger than the voltage of the positive input end of the OPAMP;

s2, before the conducting voltage of the Q1 and the Q2 is reached, the voltage of the negative input end of the OPAMP is kept larger than that of the positive input end of the OPAMP so as to eliminate a zero degeneracy point and a non-ideal degeneracy point before the Q1 and the Q2 are conducted;

s3, after the conduction voltages of the Q1 and the Q2 are reached, the Q1 and the Q2 are conducted, the current of the MN5 is smaller than that of the MP3, the MN5 enters a linear region, and the impedance of the R2 path is equal to that of the R1 path, so that the symmetry of the band-gap reference core circuit is realized;

8. The method of claim 7, further comprising:

the magnitude of the reference voltage Vref is adjusted by adjusting the ratio of the number of Q1 and Q2 and the resistance values of R1, R3 and R4, wherein R3 is arranged between the positive input ends of Q2 and OPAMP, R1 is connected with R3 in parallel, and R4 is connected with the drain of MP 5.

9. A computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to carry out the method of claim 7 or 8 when executed.

10. An electronic device comprising a memory and a processor, wherein the memory has stored therein a computer program, and wherein the processor is arranged to execute the computer program to perform the method of claim 7 or 8.