CN115618185A - Matrix eigenvector solving method and system based on FPGA, storage medium and terminal - Google Patents

Matrix eigenvector solving method and system based on FPGA, storage medium and terminal Download PDF

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CN115618185A
CN115618185A CN202211399098.3A CN202211399098A CN115618185A CN 115618185 A CN115618185 A CN 115618185A CN 202211399098 A CN202211399098 A CN 202211399098A CN 115618185 A CN115618185 A CN 115618185A
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邓方科
吕清刚
李冬
余浪
廖钧华
陈晓龙
汪渊
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Chengdu Huaxintian Micro Technology Co ltd
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Abstract

The invention discloses a matrix eigenvector solving method, a system, a storage medium and a terminal based on an FPGA, comprising the following steps: receiving covariance matrix data and eigenvalues thereof by using an FPGA; and constructing a solving matrix according to the eigenvalues, and setting an n-order square matrix A to have n eigenvalues: lambda [ alpha ] 1 、λ 2 、…、λ n Let the characteristic value λ 1 If the corresponding feature vector is B, then there is a system of equations: AB = λ 1 B; solving a group of special solutions meeting the equation set by adopting a Kramer method, replacing each column of data of a left matrix with a column vector on the right side of the equation, and constructing n solving matrices for each eigenvalue; calculating the value of each solution matrix determinant; and calculating a characteristic vector according to the value of the determinant of the solving matrix. The invention can solve the eigenvectors of all eigenvalues, the whole calculation process is suitable for both real number field and complex number field, the application range is wide, and the method can directly ensure thatUsed in the music algorithm.

Description

Matrix eigenvector solving method and system based on FPGA, storage medium and terminal
Technical Field
The invention relates to the field of matrix operation, in particular to a method, a system, a storage medium and a terminal for solving a matrix eigenvector based on an FPGA.
Background
Matrix operation is one of the commonly used mathematical operations, and has very wide application in image processing and array signal processing. Matrix operations are largely used in the estimation of DOA (direction of arrival) based on the music algorithm.
The music algorithm is a method based on the feature space decomposition of a matrix, wherein the most critical part is the calculation of eigenvalues and eigenvectors of a signal covariance matrix. In the music algorithm, the signal space and the noise space are divided according to the size of the eigenvalue, the eigenvector corresponding to the eigenvalue larger than the predetermined threshold constitutes a signal space matrix, the eigenvector corresponding to the eigenvalue smaller than the predetermined threshold constitutes a noise space matrix, and the signal space matrix and the noise space matrix are required to participate in the operation when traversing the space spectrum, so the eigenvectors corresponding to all the eigenvalues are required to be calculated.
In general, there are two ways of calculating the eigenvector of the matrix, QR decomposition and power method. Where QR decomposition is only applicable to compute eigenvectors of a real symmetric matrix, whereas the signal covariance matrix in the music algorithm is almost impossible to be a real symmetric matrix. The power method can only solve the eigenvector corresponding to the maximum eigenvalue or the minimum eigenvalue of the matrix, and the music algorithm needs to solve a plurality of eigenvectors, so that the two methods are not suitable for the music algorithm.
Disclosure of Invention
The invention aims to provide a matrix eigenvector solving method, a system, a storage medium and a terminal based on an FPGA (field programmable gate array) aiming at solving the problem of the matrix eigenvector in the existing music algorithm.
The purpose of the invention is realized by the following technical scheme:
in a first aspect, a method for solving a matrix eigenvector based on an FPGA is provided, which includes the following steps:
s1, receiving covariance matrix data and eigenvalues thereof by using an FPGA;
s2, constructing a solving matrix according to the eigenvalues, and setting an n-order square matrix A to have n eigenvalues: lambda 1 、λ 2 、…、λ n Let the characteristic value λ 1 If the corresponding feature vector is B, then there is a system of equations: AB = λ 1 B, wherein B is a column vector;
solving a group of special solutions meeting the equation set by adopting a Kramer method, replacing each column of data of a left matrix with a column vector on the right side of the equation, and constructing n solving matrices for each eigenvalue;
s3, calculating the value of each solution matrix determinant;
and S4, calculating a characteristic vector according to the value of the determinant of the solved matrix.
In one example, a method for solving a matrix eigenvector based on an FPGA includes, before the step S1:
and expanding the covariance matrix data and the eigenvalues thereof.
In one example, a method for solving a matrix eigenvector based on an FPGA for expanding the covariance matrix data and eigenvalues thereof includes:
and expanding the covariance matrix data and the eigenvalues thereof by 2-10 times.
In one example, a matrix eigenvector solution method based on an FPGA stores the enlarged covariance matrix data and eigenvalues into an array of registers, respectively.
In one example, a method of solving an FPGA-based matrix eigenvector, the eigenvector B = [1, B = 2 ,b 3 ,…,b n ]Wherein, in the step (A),
Figure BDA0003934299620000031
d, D 1 、D 2 …D n-1 Respectively representing n solving matrixes.
In one example, a method for solving a matrix eigenvector based on an FPGA multiplies the eigenvector B by a constant.
In one example, in the matrix eigenvector solution method based on the FPGA, when the value of the determinant of each solution matrix is calculated in step S3, a parallel operation method is adopted in the FPGA.
In a second aspect, an FPGA-based matrix eigenvector solving system is provided, the system comprising:
the data receiving module is used for receiving covariance matrix data by using the FPGA;
and the solving matrix constructing module is used for constructing a solving matrix in the FPGA according to the expanded eigenvalue, and the n-order square matrix A is provided with n eigenvalues: lambda [ alpha ] 1 、λ 2 、…、λ n Let the characteristic value λ 1 The corresponding feature vector is B, and then there is a system of equations: AB = λ 1 B, wherein B is a column vector;
solving a group of special solutions meeting the equation set by adopting a Clarmer rule, replacing each line of data of a left matrix with a right column vector of the equation, and constructing n solving matrices for each eigenvalue;
the solving matrix determinant calculation module is used for calculating the value of each solving matrix determinant in the FPGA;
and the eigenvector calculation module is used for calculating the eigenvector according to the value of the determinant of the solution matrix.
In a third aspect, a storage medium is provided, on which computer instructions are stored, which computer instructions when executed perform the steps of any of the matrix eigenvector solution methods.
In a fourth aspect, a terminal is provided, which includes a memory and a processor, where the memory stores computer instructions executable on the processor, and the processor executes the computer instructions to perform any one of the steps of the matrix eigenvector solution method.
It should be further noted that the technical features corresponding to the above options can be combined with each other or replaced to form a new technical solution without conflict.
Compared with the prior art, the invention has the beneficial effects that:
the invention solves the eigenvector of the matrix by constructing the solving matrix and then calculating the determinant of the solving matrix, the calculation process all belongs to the category of four arithmetic operations, the FPGA is simple to realize, the calculation process uses a large number of parallel operation modes, the operation time is greatly reduced, the whole calculation process is not only suitable for a real number field, but also suitable for a complex number field, the application range is wide, the eigenvector of all eigenvalues can be solved, and the method can be directly used in a music algorithm.
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Fig. 1 is a schematic flowchart of a method for solving a matrix eigenvector based on an FPGA according to an embodiment of the present invention.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
Furthermore, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Referring to fig. 1, in an exemplary embodiment, there is provided an FPGA-based matrix eigenvector solving method, including the following steps:
s1, receiving covariance matrix data and eigenvalues thereof by using an FPGA;
s2, constructing a solving matrix according to the eigenvalues, and setting an n-order square matrix A to have n eigenvalues: lambda 1 、λ 2 、…、λ n Let the characteristic value λ 1 The corresponding feature vector isB, then there is a system of equations: AB = λ 1 B, wherein B is a column vector;
solving a group of special solutions meeting the equation set by adopting a Clarmer rule, replacing each line of data of a left matrix with a right column vector of the equation, and constructing n solving matrices for each eigenvalue;
s3, calculating the value of each solution matrix determinant;
and S4, calculating a characteristic vector according to the value of the determinant of the solved matrix.
Specifically, B = [1, B ] 2 ,b 3 ,…,b n ]The system of equations: AB = λ 1 B can be written as:
Figure BDA0003934299620000051
can be expressed as:
Figure BDA0003934299620000052
since the characteristic vector of the matrix is multiplied by a constant and is still the characteristic vector of the matrix, the characteristic vector has a plurality of vectors, so that the B vector satisfying the above formula has a plurality of vectors, and only one group of special solutions is required, so that B can be ensured 1 =1, the above equation system becomes:
Figure BDA0003934299620000053
since already order b 1 =1, so the number of unknowns is one less than the number of equations, the first set of equations may be discarded and collated to yield:
Figure BDA0003934299620000061
writing the above equation in matrix form:
Figure BDA0003934299620000062
because the B vector has a unique solution and can be solved by using the Kramer method, the column vectors on the right side of the equation are used for replacing each column of data of the matrix on the left side, and n solving matrixes are constructed:
Figure BDA0003934299620000063
Figure BDA0003934299620000064
Figure BDA0003934299620000065
…………
Figure BDA0003934299620000066
further, it is possible to obtain:
Figure BDA0003934299620000071
d, D 1 、D 2 …D n-1 Respectively representing n solving matrixes, det representing the value of determinant of the solving matrix, so that the characteristic value lambda can be obtained 1 The corresponding eigenvector is B, and by analogy, the eigenvectors corresponding to all eigenvalues can be obtained. Since the calculation process does not limit the parameters to real or complex numbers, the above conclusions apply in both the real and complex domains.
In one example, a method for solving a matrix eigenvector based on an FPGA includes, before the step S1:
and expanding the covariance matrix data and the eigenvalue thereof by a certain multiple when inputting because the FPGA cannot process decimal, and preferably expanding the covariance matrix data and the eigenvalue thereof by 2-10 times to ensure the calculation accuracy.
In one example, the method for solving the matrix eigenvector based on the FPGA stores the enlarged covariance matrix data and eigenvalues into the array of the register respectively, specifically, taking a 4 × 4 square array as an example, the FPGA receives 4 × 4 parameters, each parameter is stored into the x [3] [3] two-dimensional array of the register, and 4 eigenvalues are stored into the j [3] array at the same time.
Further, when each matrix determinant value is solved, a parallel operation method, 4-order matrix and 4 eigenvalues are adopted in the FPGA, and 16 3-order solving matrices are required to be constructed, and are recorded as jz1-jz 16. The 16 solving matrixes have no dependency relationship with each other, so that the operation time is saved by adopting a parallel operation method in the FPGA. Multiplication is needed for calculating the value of the determinant, the bit width of the register is required to be large enough to ensure that the data operation process does not overflow, and the calculation result is stored in the registers hls1-hls 16.
In one example, a method for solving a matrix eigenvector based on an FPGA multiplies the eigenvector B by a constant. Specifically, since the eigenvector is still the matrix eigenvector by multiplying a constant, for convenience of calculation, the eigenvector may be multiplied by det (D), and then the eigenvector may also be expressed as B = [ det (D), det (D) 1 ),det(D 2 ),...,det(D n-1 )]。
Specifically, taking a 4 th order matrix as an example, the result of the feature vector obtained by calculation is as follows:
B 1 =[1,hls2/hls1,hls3/hls1,hls4/hls1];B 2 =[1,hls6/hls5,hls7/hls5,hls8/hls5];B 3 =[1,hls10/hls9,hls11/hls9,hls12/hls9];B 4 =[1,hls14/hls13,hls15/hls13,hls16/hls13]. The eigenvectors can be multiplied by constants according to the back-end processing requirements to facilitate data representation and operation, if B is to be used 1 、B 2 、B 3 、B 4 Multiplying by hls1, hls5, hls9 and hls13 respectively, the characteristic vector is: b is 1 =[hls1,hls2,hls3,hls4];=[hls5,hls6,hls7,hls8];B 3 =[hls9,hls10,hls11,hls12];B 4 =[hls13,hls14,hls15,hls16]。
In one example, an example matrix calculation process is given, which is calculated as follows:
inputting a matrix:
Figure BDA0003934299620000081
its characteristic value lambda 1 =14、λ 2 =-3、λ 3 =1、λ 4 =4。
Constructing a solving matrix:
based on lambda 1 =14 a matrix can be constructed:
Figure BDA0003934299620000082
Figure BDA0003934299620000083
based on lambda 2 = 3 a matrix can be constructed:
Figure BDA0003934299620000084
Figure BDA0003934299620000091
based on lambda 3 =1 a matrix can be constructed:
Figure BDA0003934299620000092
Figure BDA0003934299620000093
based on lambda 4 =4 a matrix can be constructed:
Figure BDA0003934299620000094
Figure BDA0003934299620000095
calculating the value of the determinant of each solution matrix:
hls1=(jz1[0][0]*jz1[1][1]*jz1[2][2]+jz1[0][1]*jz1[1][2]*jz1[2][0]+jz1[0][2]*jz1[1][0]*jz1[2][1])-(jz1[0][2]*jz1[1][1]*jz1[2][0]+jz1[0][1]*jz1[1][0]*jz1[2][2]+jz1[0][0]*jz1[1][2]*jz1[2][1])=-817;
the same principle is that:
hls2=-475、hls3=-266、hls4=-1349;
hls5=237、hls6=-237、hls7=-79、hls8=79;
hls9=-11、hls10=-33、hls11=-33、hls12=-55;
hls13=-13、hls14=15、hls15=54、hls16=-89;
the feature vectors are:
B 1 =[-817,-475,-266,-1349];
B 2 =[237,-237,-79,79];
B 3 =[-11,-33,-33,-55];
B 4 =[-13,15,54,-89]。
in another exemplary embodiment, there is provided an FPGA-based matrix eigenvector solving system, the system comprising:
the data receiving module is used for receiving the covariance matrix data by using the FPGA;
the solving matrix building module is used for building a solving matrix in the FPGA according to the expanded eigenvalue, and the n-order square matrix A is provided with n eigenvalues: lambda [ alpha ] 1 、λ 2 、…、λ n Let the characteristic value λ 1 If the corresponding feature vector is B, then there is a system of equations: AB = λ 1 B, wherein B is a column vector;
solving a group of special solutions meeting the equation set by adopting a Clarmer rule, replacing each line of data of a left matrix with a right column vector of the equation, and constructing n solving matrices for each eigenvalue;
the solving matrix determinant calculating module is used for calculating the value of each solving matrix determinant in the FPGA;
and the eigenvector calculation module is used for calculating the eigenvector according to the value of the determinant of the solution matrix.
In another exemplary embodiment, a storage medium is provided having stored thereon computer instructions which, when executed, perform the steps of any one of the matrix eigenvector solution methods.
Based on such understanding, the technical solution of the present embodiment or parts of the technical solution may be essentially implemented in the form of a software product, which is stored in a storage medium and includes several instructions to enable a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method of the embodiments of the present invention. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
In another exemplary embodiment, a terminal is provided, which includes a memory and a processor, the memory stores computer instructions executable on the processor, and the processor executes the computer instructions to perform any one of the steps of the matrix eigenvector solution method.
The processor may be a single or multi-core central processing unit or a specific integrated circuit, or one or more integrated circuits configured to implement the present invention.
Embodiments of the subject matter and the functional operations described in this specification can be implemented in: tangibly embodied computer software or firmware, computer hardware including the structures disclosed in this specification and their structural equivalents, or a combination of one or more of them. Embodiments of the subject matter described in this specification can be implemented as one or more computer programs, i.e., one or more modules of computer program instructions, encoded on a tangible, non-transitory program carrier for execution by, or to control the operation of, data processing apparatus. Alternatively or additionally, the program instructions may be encoded on an artificially generated propagated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode and transmit information to suitable receiver apparatus for execution by the data processing apparatus.
The processes and logic flows described in this specification can be performed by one or more programmable computers executing one or more computer programs to perform corresponding functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application-specific integrated circuit).
Processors suitable for the execution of a computer program include, by way of example, both general and/or special purpose microprocessors, or any other type of central processing unit. Generally, a central processing unit will receive instructions and data from a read-only memory and/or a random access memory. The basic components of a computer include a central processing unit for implementing or executing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto-optical disks, or optical disks. However, a computer does not necessarily have such a device. Moreover, a computer may be embedded in another device, e.g., a mobile telephone, a Personal Digital Assistant (PDA), a mobile audio or video player, a game console, a Global Positioning System (GPS) receiver, or a portable storage device such as a Universal Serial Bus (USB) flash drive, to name a few.
While this specification contains many specific implementation details, these should not be construed as limitations on the scope of any invention or of what may be claimed, but rather as descriptions of features specific to particular embodiments of particular inventions. Certain features that are described in this specification in the context of separate embodiments can also be implemented in combination in a single embodiment. In other instances, features described in connection with one embodiment may be implemented as discrete components or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.
Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous. Moreover, the separation of various system modules and components in the embodiments described above should not be understood as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.
The above detailed description is for the purpose of describing the invention in detail, and it should not be construed that the detailed description is limited to the description, and it will be apparent to those skilled in the art that various modifications and substitutions can be made without departing from the spirit of the invention.

Claims (10)

1. A matrix eigenvector solving method based on FPGA is characterized by comprising the following steps:
s1, receiving covariance matrix data and eigenvalues thereof by using an FPGA (field programmable gate array);
s2, constructing a solving matrix according to the eigenvalues, and setting an n-order square matrix A to have n eigenvalues: lambda [ alpha ] 1 、λ 2 、…、λ n Let the characteristic value λ 1 The corresponding feature vector is B, and then there is a system of equations: AB = λ 1 B, wherein B is a column vector;
solving a group of special solutions meeting the equation set by adopting a Clarmer rule, replacing each line of data of a left matrix with a right column vector of the equation, and constructing n solving matrices for each eigenvalue;
s3, calculating the value of each solution matrix determinant;
and S4, calculating a characteristic vector according to the value of the determinant of the solved matrix.
2. The method for solving the matrix eigenvector based on the FPGA according to claim 1, characterized in that before the step S1, the method comprises:
and expanding the covariance matrix data and the eigenvalues thereof.
3. The method for solving the matrix eigenvector based on the FPGA as claimed in claim 2, wherein the expanding the covariance matrix data and its eigenvalues comprises:
and expanding the covariance matrix data and the eigenvalues thereof by 2-10 times.
4. The method of claim 3, wherein the enlarged covariance matrix data and eigenvalues are stored in the array of registers.
5. The method according to claim 1, wherein the eigenvector B = [1, B ] 2 ,b 3 ,…,b n ]Wherein, in the process,
Figure FDA0003934299610000011
d, D 1 、D 2 …D n-1 Respectively representing n solving matrixes.
6. The method of claim 5, wherein the eigenvector B is multiplied by a constant.
7. The method for solving the matrix eigenvector based on the FPGA as claimed in claim 1, wherein when calculating the value of the determinant of each solving matrix in the step S3, a parallel operation method is adopted in the FPGA.
8. An FPGA-based matrix eigenvector solving system, characterized in that the system comprises:
the data receiving module is used for receiving the covariance matrix data by using the FPGA;
the solving matrix building module is used for building a solving matrix in the FPGA according to the expanded eigenvalue, and the n-order square matrix A is provided with n eigenvalues: lambda 1 、λ 2 、…、λ n Let the characteristic value λ 1 The corresponding feature vector is B, and then there is a system of equations: AB = λ 1 B, wherein B is a column vector;
solving a group of special solutions meeting the equation set by adopting a Clarmer rule, replacing each line of data of a left matrix with a right column vector of the equation, and constructing n solving matrices for each eigenvalue;
the solving matrix determinant calculation module is used for calculating the value of each solving matrix determinant in the FPGA;
and the eigenvector calculation module is used for calculating the eigenvector according to the value of the determinant of the solution matrix.
9. A storage medium having stored thereon computer instructions which, when executed, perform the steps of the matrix eigenvector solution method of any one of claims 1-7.
10. A terminal comprising a memory and a processor, the memory having stored thereon computer instructions executable on the processor, wherein the processor executes the computer instructions to perform the steps of the method for solving for a matrix eigenvector as recited in any one of claims 1-7.
CN202211399098.3A 2022-11-09 2022-11-09 Matrix eigenvector solving method and system based on FPGA, storage medium and terminal Pending CN115618185A (en)

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