CN115498863B - HV bleeder circuit for power management chip - Google Patents
HV bleeder circuit for power management chip Download PDFInfo
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- CN115498863B CN115498863B CN202211451957.9A CN202211451957A CN115498863B CN 115498863 B CN115498863 B CN 115498863B CN 202211451957 A CN202211451957 A CN 202211451957A CN 115498863 B CN115498863 B CN 115498863B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
- H02H9/045—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
- H02M3/33523—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The invention relates to an HV bleeder circuit for a power management chip, which belongs to the technical field of power management and comprises an HV sampling module, a bleeder control module and a bleeder module, wherein the HV sampling module is used for sampling HV voltage of an HV pin to obtain sampling voltage, the bleeder control module is used for judging whether the sampling voltage is in a descending section or not, and whether the sampling voltage is smaller than a first preset voltage value and larger than a second preset voltage value or not, so as to obtain a judging result, and when the judging result is yes, the bleeder module is driven to work, and the bleeder module is used for carrying out bleeder step-down on the HV voltage, so that the HV bleeder circuit disclosed by the invention only carries out bleeder step-down on the HV voltage within a specific voltage range, thereby ingeniously solving the problem that the flyback converter is easy to misjudge that the AC input is powered down in normal work, and meanwhile, the HV bleeder circuit has better energy consumption performance.
Description
Technical Field
The invention relates to the technical field of power management, in particular to an HV bleeder circuit (namely a high-voltage bleeder circuit) for a power management chip.
Background
The flyback converter is widely applied to a power management chip due to simplicity, reliability and high efficiency. Ideally, the valley potential of the HV voltage (i.e., the voltage of the high voltage pin) at the HV pin (i.e., the high voltage pin) of the flyback converter is approximately zero, and in practical cases, due to parasitic capacitance or the like, the valley potential of the HV voltage at the HV pin of the flyback converter is far higher than zero, resulting in that the HV voltage may not be able to cross the power management chip to set the X-CAP discharge determination threshold V within a prescribed time S And misjudging that the AC (i.e. alternating current) input is powered down, so that equipment is stopped, and the use reliability of the flyback converter is affected.
In order to solve the above problems, it is commonly used to add an additional bleeder circuit to the HV pin, wherein the bleeder circuit obtains a delay start time of the bleeder circuit by adding an internal timer circuit, but in practical application, since the delay circuit cannot be very accurate, the delay time is too long, which causes that the HV voltage at the HV pin cannot be reduced to V S In addition, too short delay time can lead to too early discharge time, so that the power consumption is large, and the problem that the discharge effect cannot be ensured is solved.
Based on this, a new HV bleeder circuit is needed.
Disclosure of Invention
The invention aims to provide an HV bleeder circuit for a power management chip, which is used for performing bleeder and voltage reduction on HV voltage only in a specific voltage range, so that the problem that the flyback converter is easy to misjudge as AC input power failure in normal operation is skillfully solved, and meanwhile, the HV bleeder circuit has better energy consumption performance.
In order to achieve the above object, the present invention provides the following solutions:
an HV bleeder circuit for a power management chip, the HV bleeder circuit comprising: the device comprises an HV sampling module, a drainage control module and a drainage module;
the input end of the HV sampling module is electrically connected with an HV pin of a flyback converter in the power management chip; the HV sampling module is used for sampling the HV voltage of the HV pin to obtain a sampling voltage;
the input end of the leakage flow control module is electrically connected with the output end of the HV sampling module; the leakage control module is used for judging whether the sampling voltage is in a descending section or not, and whether the sampling voltage is smaller than a first preset voltage value and larger than a second preset voltage value or not, so as to obtain a judging result, and when the judging result is yes, the leakage control module is driven to work; the first preset voltage value is larger than an X-CAP discharge judgment threshold; the second preset voltage value is smaller than the X-CAP discharge judgment threshold value;
the input end of the drainage module is electrically connected with the output end of the drainage control module; the bleeder module is used for performing bleeder and depressurization on the HV voltage.
In some embodiments, the HV sampling module includes a first voltage dividing resistor and a second voltage dividing resistor; one end of the first voltage dividing resistor is electrically connected with one end of the second voltage dividing resistor, the other end of the first voltage dividing resistor is the input end of the HV sampling module, the other end of the second voltage dividing resistor is grounded, and the joint of the first voltage dividing resistor and the second voltage dividing resistor is the output end of the HV sampling module.
In some embodiments, the leakage control module includes a first voltage comparator, a second voltage comparator, a rising edge valid D flip-flop, and an and gate;
the reverse input ends of the first voltage comparator and the second voltage comparator are both connected with the output end of the HV sampling module; the positive input end of the first voltage comparator is connected with the first preset voltage value; the positive input end of the second voltage comparator is connected with the second preset voltage value;
the CLK end of the rising edge effective D trigger is connected with the output end of the first voltage comparator, and the reset end is connected with the output end of the second voltage comparator;
the input end of the AND gate is respectively connected with the output end of the rising edge effective D trigger and the output end of the first voltage comparator; the output end of the AND gate is the output end of the leakage flow control module.
In some embodiments, the bleeder module comprises a switching tube; the first end of the switching tube is electrically connected with the output end of the leakage control module; the leakage control module drives the leakage module to work by controlling the switching tube to be conducted.
In some embodiments, the switching tube is a MOS tube.
In some embodiments, the bleeder module further comprises a bleeder resistor; one end of the bleeder resistor is electrically connected with the HV pin, and the other end of the bleeder resistor is electrically connected with the second end of the switching tube; the third end of the switch tube is grounded.
According to the specific embodiment provided by the invention, the invention discloses the following technical effects:
the invention provides an HV bleeder circuit for a power management chip, which comprises an HV sampling module, a bleeder control module and a bleeder module, wherein the HV sampling module is used for sampling HV voltage of an HV pin to obtain sampling voltage, the bleeder control module is used for judging whether the sampling voltage is in a descending section or not, and whether the sampling voltage is smaller than a first preset voltage value and larger than a second preset voltage value or not, so as to obtain a judging result, and when the judging result is yes, the bleeder module is driven to work, and the bleeder module is used for carrying out bleeder step-down on the HV voltage, so that the HV bleeder circuit disclosed by the invention only carries out bleeder step-down on the HV voltage within a specific voltage range, thereby skillfully solving the problem that the AC input is easy to be misjudged as power down in normal work of a flyback converter, and simultaneously having better energy consumption performance.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a flyback topology circuit provided in embodiment 1 of the present invention;
FIG. 2 is a waveform diagram of the HV voltage under ideal conditions provided in example 1 of the present invention;
FIG. 3 is a schematic diagram of a flyback topology with parasitic parameters considered according to embodiment 1 of the present invention;
fig. 4 is a waveform diagram of HV voltage in practical situations provided in embodiment 1 of the present invention;
FIG. 5 is a schematic diagram of a conventional bleeder circuit according to embodiment 1 of the present invention;
FIG. 6 is a schematic waveform diagram of related points of a conventional bleeder circuit according to embodiment 1 of the present invention;
fig. 7 is a schematic circuit diagram of an HV bleeder circuit according to embodiment 1 of the present invention;
fig. 8 is a waveform schematic diagram of related points of the HV bleeder circuit provided in embodiment 1 of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The invention aims to provide an HV bleeder circuit for a power management chip, which is used for performing bleeder and voltage reduction on HV voltage only in a specific voltage range, so that the problem that the flyback converter is easy to misjudge as AC input power failure in normal operation is skillfully solved, and meanwhile, the HV bleeder circuit has better energy consumption performance.
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description.
Example 1:
the flyback converter is simple, reliable and efficient, and is widely applied to power management chips in the power management fields of quick charge, mobile power supply, adapter and the like. For example, with respect to the adapter, due to the generation of the general Type-C interface and the PD general protocol, all small power consumer electronics such as mobile phones and notebook computers can share the adapter, and as the power of the adapter is gradually provided, from 20W, 40W, 65W to 135W, the flyback converter is the most general topology structure in the power management chips of the adapters with different power levels.
As shown in fig. 1, the flyback topology circuit in the power management chip in most application scenarios comprises a flyback circuit and a flyback converter, wherein the flyback circuit comprises an X capacitor (X-CAP), high-voltage rectifying diodes D1 and D2, a rectifying circuit, a Bulk capacitor C2 and a transformer T, the flyback circuit rectifies input alternating current into direct current through the rectifying circuit, the direct current is filtered by the Bulk capacitor C2 and then is sent to the transformer T, and the transformer T sends energy to an output circuit to realize energy transmission, and meanwhile, the isolation requirement of primary and secondary sides of the transformer T is met. The flyback circuit generally rectifies the input alternating current into approximate steamed bread waves through two high-voltage rectifying diodes D1 and D2, and then sends the approximate steamed bread waves into an HV pin of the flyback converter through the current limiting of a resistor R1 so as to realize the high-voltage starting function of the flyback converter, wherein V in the graph 1 HV I.e. the HV voltage at the HV pin. The flyback circuit adds an X capacitor at the AC input end, so that the differential mode interference can be reduced.
Due to safety requirements, the residual charge of the X capacitor must be timely discharged within a specified time after the charging plug is pulled out, and the voltage is reduced to a safe voltage range, so as to prevent injury caused by personnel mistaken touch, namely the current situationThe common method of the X-CAP discharge technology and the X-CAP discharge technology is to set the X-CAP discharge judgment threshold V by whether the HV voltage crosses the chip in a specified time S As a criterion, setting an X-CAP discharge judgment threshold V when HV voltage cannot pass through the chip S When the charging plug is not input, the charging plug is pulled out, and the residual charge of the X capacitor is required to be discharged, but false triggering risks exist in practical application. This is because, in an ideal case, the waveform frequency of the rectified input ac flowing through the high-voltage rectifying diodes D1 and D2 is 2 times the ac frequency, as shown in fig. 2, the valley-bottom potential of the steamed bread wave corresponding to the HV voltage is approximately zero, while in a practical case, as shown in fig. 3, the valley-bottom potential of the steamed bread wave is far higher than zero due to the parasitic capacitance C1 and the like, as shown in fig. 4, the HV voltage may not cross the chip to set the X-CAP discharge determination threshold V within a prescribed time S This will misjudge that the AC input is powered down, causing equipment downtime, affecting the reliability of the flyback converter.
In order to make the valley potential of the HV voltage approach to zero value in the normal working process, it is common practice to add an additional bleeder circuit on the HV pin, as shown in fig. 3, the specific circuit structure of the bleeder circuit is shown in fig. 5, the waveform diagram of the relevant point location is shown in fig. 6, and the HV voltage is obtained after sampling by two voltage dividing resistors R2 and R3 with large resistance values HV0 Which is connected with the positive input end of the voltage comparator U1, the negative input end of the voltage comparator U1 is connected with the preset voltage V TH There is generally V S <V TH When V HV0 <V TH When the switching tube Q1 is disconnected, the discharging circuit is disconnected and does not work; when V is HV0 >V TH When the voltage comparator U1 outputs high and the internal timer of the delay turn-on circuit begins to count, the switch tube Q1 is closed and the discharge circuit is started when the internal set time Td is reached HV0 The level continues to drop until V HV0 <V TH The voltage comparator U1 turns over, triggers the action of the turn-off control circuit, the switch tube Q1 is disconnected, the discharging circuit is immediately disconnected, and the delay turn-on circuit is reset at the same time, V HV0 The level changes along with the steamed bread wave until the V is satisfied again HV0 >V TH When the internal timer starts counting again, the process is circulated in this way to ensure that the power management chip works normally.
Because of the existence of the bleeder current, the system loss is inevitably increased, and particularly, the energy efficiency requirement is hardly met when the system is in light load or idle load, so that the bleeder circuit ensures that the voltage of the circuit is equal to the voltage of the circuit HV Discharging to X-CAP determination threshold V S On the premise of reducing the power consumption as much as possible, the conventional bleeder circuit generally has the steps of obtaining the delay starting time of the bleeder circuit by adding an internal timer circuit so as to achieve the purpose of controlling the system loss under different conditions, but in practical application, the delay circuit cannot be quite accurate, and the HV voltage at the HV pin cannot be reduced to V due to overlong delay time S In addition, too short delay time can lead to too early discharge time, so that the power consumption is large, and the problem that the discharge effect cannot be ensured is solved.
In view of the foregoing, there is a strong need to design a novel HV bleeder circuit to overcome the above-mentioned drawbacks of the prior art.
The embodiment is used for providing the HV bleeder circuit for the power management chip, is positioned in the power management chip, can well adapt to the application scene of the flyback converter, reliably solves the problem of false triggering caused by power failure of the AC input, simultaneously controls the extra loss of the bleeder circuit to the power supply system, and reduces the complexity and the cost of the circuit to a certain extent. As shown in fig. 7, the HV bleeder circuit of the present embodiment includes: the system comprises an HV sampling module, a drain flow control module and a drain flow module.
The input end of the HV sampling module is electrically connected with an HV pin of a flyback converter in the power management chip, and the HV sampling module is used for sampling HV voltage of the HV pin to obtain sampling voltage.
The input end of the bleeder control module is electrically connected with the output end of the HV sampling module, the bleeder control module is used for judging whether the sampling voltage is in a descending section or not, whether the sampling voltage is smaller than a first preset voltage value and larger than a second preset voltage value or not, a judging result is obtained, and when the judging result is yes, the bleeder control module is driven to work, the first preset voltage value is larger than an X-CAP discharge judging threshold value, and the second preset voltage value is smaller than the X-CAP discharge judging threshold value.
The input end of the bleeder module is electrically connected with the output end of the bleeder control module, and the bleeder module is used for performing bleeder and voltage reduction on the HV voltage.
The HV sampling module of this embodiment may include a first voltage dividing resistor R4 and a second voltage dividing resistor R5, where one end of the first voltage dividing resistor R4 is electrically connected with one end of the second voltage dividing resistor R5, the other end of the first voltage dividing resistor R4 is an input end of the HV sampling module, and is electrically connected with an HV pin of the flyback converter, the other end of the second voltage dividing resistor R5 is grounded, and a junction between the first voltage dividing resistor R4 and the second voltage dividing resistor R5 is an output end of the HV sampling module. The HV sampling module is used for measuring HV voltage V of HV pin HV Collecting, and dividing by a first dividing resistor R4 and a second dividing resistor R5 to obtain a sampling voltage V HV0 。
The leakage control module of the present embodiment may include a first voltage comparator U2, a second voltage comparator U3, a rising edge valid D flip-flop U4, and an and gate U5.
The reverse input ends of the first voltage comparator U2 and the second voltage comparator U3 are connected with the output end of the HV sampling module, namely connected with the sampling voltage V HV0 The positive input end of the first voltage comparator U2 is connected with a first preset voltage value V TH1 The positive input end of the second voltage comparator U3 is connected with a second preset voltage value V TH2 ，V TH2 <V S <V TH1 ，V TH1 、V TH2 Can be flexibly set according to actual application scenes, V S An X-CAP discharge determination threshold is set for the chip interior.
The rising edge effective D trigger U4 is a rising edge effective D trigger with a reset end, the CLK end of the rising edge effective D trigger is connected with the output end of the first voltage comparator U2, and the reset end RST is connected with the output end of the second voltage comparator U3.
The input end of the and gate U5 is connected to the output end Q of the rising edge valid D flip-flop U4 (this signal is shown as X1) and the output end of the first voltage comparator U2 (this signal is shown as X2), respectively, and the output end of the and gate U5 is the output end of the drain control module.
The bleeder module of this embodiment may be a resistive bleeder module, and it includes switch tube Q2 and bleeder resistor R6, and the first end of switch tube Q2 is connected with bleeder control module's output electricity, and bleeder control module switches on through control switch tube Q2, and the drive bleeder module work, bleeder resistor R6 one end is connected with HV pin electricity, and the other end is connected with switch tube Q2's second end electricity, and switch tube Q2's third ground connection.
The switching tube Q2 of the embodiment may be a MOS tube, at this time, a gate of the MOS tube is connected to an output end of the drain control module, a source is grounded, and a drain is connected to the drain resistor R6.
Based on the above structure, the HV bleeder circuit of this embodiment operates as follows: as shown in fig. 8, the HV voltage is continuously monitored by sampling by the HV sampling module, at V HV0 Descending segment, and when V HV0 <V TH1 ，V TH2 <V HV0 At time (i.e. time t 1), the first voltage comparator U2 (i.e. CLK end, X2) turns to high level, the second voltage comparator U3 (i.e. RST end) outputs to low level, the reset end RST of the rising edge valid D flip-flop U4 is not valid, the output end Q (i.e. X1) of the rising edge valid D flip-flop U4 turns to high level, and the and gate U5 outputs to high level after the two input signals X1, X2 are and, the MOS transistor Q2 is turned on, V HV Continuous leakage through leakage resistor R6, V HV Continuously descend, correspondingly V HV0 Continuously decreasing (i.e., time period t1-t 2); up to V HV0 <V TH2 The second voltage comparator U3 turns high, the reset end RST of the rising edge effective D trigger U4 is effective, the output end Q turns low, the AND gate U5 outputs low, at this time the MOS tube Q2 is disconnected, V HV Stopping the leakage flow, V HV0 Following the rectified waveform and varying the resistance after voltage division (i.e., time period t2-t 3); until the next V HV0 The rising section of the waveform due to the presence of V HV0 <V TH1 The CLK terminal of the rising edge active D flip-flop U4 is always high and the RST terminal is also kept high (i.e., time period t3-t 4); when V is TH2 <V HV0 When RST is toggled low, but no up is generated because CLK remains high all the timeA rising edge, so the discharge path is still in an off state (i.e., time period t4-t 5); thereafter V HV0 The waveform continues to rise following the rectified waveform until V TH1 <V HV0 When the first voltage comparator U2 (i.e., CLK, X2) toggles to low level (i.e., time period t5-t 6), the output Q of the rising-edge active D flip-flop U4 is still low level; after this, V HV0 The waveform changes with the rectified waveform until V HV0 The waveform satisfies V in the descending section HV0 <V TH1 When the first voltage comparator U2 (i.e., CLK, X2) is turned to high level, the second voltage comparator U3 outputs low level, RST terminal is not active, rising edge active D flip-flop U4 outputs high level, and gate U5 outputs high level, MOS transistor Q2 is turned on, and the discharge path is restarted (i.e., time period t6-t 7), thus the above process is circulated.
The present embodiment uses two voltage comparators U2, U3, a rising edge D flip-flop U4 and an AND gate U5, so that the HV bleeder circuit is only at V TH2 <V HV0 <V TH1 Within the interval and V HV0 The voltage of the HV voltage is discharged and reduced when the waveform is in the descending section, the problem that the AC input is easily misjudged to be powered down in the normal operation of the flyback converter is skillfully solved, and meanwhile, the flyback converter has good energy consumption performance and low circuit complexity.
The principles and embodiments of the present invention have been described herein with reference to specific examples, the description of which is intended only to assist in understanding the methods of the present invention and the core ideas thereof; also, it is within the scope of the present invention to be modified by those of ordinary skill in the art in light of the present teachings. In view of the foregoing, this description should not be construed as limiting the invention.
Claims (5)
1. An HV bleeder circuit for a power management chip, the HV bleeder circuit comprising: the device comprises an HV sampling module, a drainage control module and a drainage module;
the input end of the HV sampling module is electrically connected with an HV pin of a flyback converter in the power management chip; the HV sampling module is used for sampling the HV voltage of the HV pin to obtain a sampling voltage;
the input end of the leakage flow control module is electrically connected with the output end of the HV sampling module; the leakage control module is used for judging whether the sampling voltage is in a descending section or not, and whether the sampling voltage is smaller than a first preset voltage value and larger than a second preset voltage value or not, so as to obtain a judging result, and when the judging result is yes, the leakage control module is driven to work; the first preset voltage value is larger than an X-CAP discharge judgment threshold; the second preset voltage value is smaller than the X-CAP discharge judgment threshold value;
the input end of the drainage module is electrically connected with the output end of the drainage control module; the bleeder module is used for performing bleeder and depressurization on the HV voltage;
the leakage control module comprises a first voltage comparator, a second voltage comparator, a rising edge effective D trigger and an AND gate; the reverse input ends of the first voltage comparator and the second voltage comparator are both connected with the output end of the HV sampling module; the positive input end of the first voltage comparator is connected with the first preset voltage value; the positive input end of the second voltage comparator is connected with the second preset voltage value; the CLK end of the rising edge effective D trigger is connected with the output end of the first voltage comparator, and the reset end is connected with the output end of the second voltage comparator; the input end of the AND gate is respectively connected with the output end of the rising edge effective D trigger and the output end of the first voltage comparator; the output end of the AND gate is the output end of the leakage flow control module.
2. The HV bleeder circuit for a power management chip of claim 1, wherein the HV sampling module comprises a first voltage dividing resistor and a second voltage dividing resistor; one end of the first voltage dividing resistor is electrically connected with one end of the second voltage dividing resistor, the other end of the first voltage dividing resistor is the input end of the HV sampling module, the other end of the second voltage dividing resistor is grounded, and the joint of the first voltage dividing resistor and the second voltage dividing resistor is the output end of the HV sampling module.
3. The HV bleeder circuit for a power management chip of claim 1, wherein the bleeder module comprises a switching tube; the first end of the switching tube is electrically connected with the output end of the leakage control module; the leakage control module drives the leakage module to work by controlling the switching tube to be conducted.
4. The HV bleeder circuit for a power management chip according to claim 3, wherein the switching tube is a MOS tube.
5. A HV bleeder circuit for a power management chip according to claim 3, wherein the bleeder module further comprises a bleeder resistor; one end of the bleeder resistor is electrically connected with the HV pin, and the other end of the bleeder resistor is electrically connected with the second end of the switching tube; the third end of the switch tube is grounded.
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