CN115483895A - Low-noise amplifier - Google Patents
Low-noise amplifier Download PDFInfo
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- CN115483895A CN115483895A CN202211131611.0A CN202211131611A CN115483895A CN 115483895 A CN115483895 A CN 115483895A CN 202211131611 A CN202211131611 A CN 202211131611A CN 115483895 A CN115483895 A CN 115483895A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
- H03F1/565—Modifications of input or output impedances, not otherwise provided for using inductive elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/42—Modifications of amplifiers to extend the bandwidth
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/60—Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators
- H03F3/605—Distributed amplifiers
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Abstract
The application relates to the technical field of electronic information, in particular to a low-noise amplifier. The circuit comprises a basic circuit, a common gate buffer, a bias circuit and a protection circuit; the basic circuit is a two-stage common source structure, the common-gate buffer is connected with the output end of the basic circuit and one end of the common-gate buffer is grounded, the bias circuit comprises a first bias circuit and a second bias circuit, the first bias circuit is connected with the output end of the common-gate buffer to provide bias voltage for the common-gate buffer, the bias circuit is connected with the output end of the basic circuit to provide bias voltage for the basic circuit, and the protection circuit is connected with the input end of the basic circuit and one end of the protection circuit is grounded. In the present embodiment, noise is mainly concentrated on the input tube and the feedback resistor, and it is possible to maintain a certain flatness of the noise coefficient at 6 to 18 GHz.
Description
Technical Field
The application relates to the technical field of electronic information, in particular to a low-noise amplifier.
Background
Broadband CMOS low noise amplifiers have become the dominant application trend today. In a CMOS process, when a working bandwidth is large, it is difficult to satisfy indexes such as good port matching, low noise coefficient, certain bandwidth gain, and low power consumption at the same time, and a conventional broadband ground noise amplifier structure is designed by taking into consideration the above indexes. Compared with the traditional amplifier, the distributed amplifier can improve the upper limit of the gain-bandwidth product, and further realize wider bandwidth. The distributed amplifier is composed of a plurality of branches, and the significant disadvantages of the distributed amplifier are high power consumption and large area. The resistor parallel negative feedback structure can provide good port matching and a certain gain bandwidth, and the introduction of the feedback resistor reduces the gain, so that the noise performance is deteriorated to a certain extent, and in addition, the feedback can cause stability problems. The common-gate structure can easily realize good input matching, then the noise coefficient is larger under high frequency, the power consumption required for realizing high gain is larger, and the structure is often adopted for low gain and large bandwidth. The band-pass filter structure can realize good port matching in a certain bandwidth and has good noise performance. However, in practical use, more inductive and capacitive elements are needed, and coordination between impedance matching and noise is also a difficulty in the prior art.
Disclosure of Invention
The application aims to provide a low-noise amplifier to solve the problems of impedance matching and noise coordination in the prior art.
In order to achieve the above purpose, the embodiments of the present application employ the following technical solutions:
in one aspect, an embodiment of the present application provides a low noise amplifier, including a basic circuit, a common gate buffer, a bias circuit, and a protection circuit; the basic circuit is of a two-stage common source structure, the common-gate buffer is connected with the output end of the basic circuit, one end of the common-gate buffer is grounded, the bias circuit comprises a first bias circuit and a second bias circuit, the first bias circuit is connected with the output end of the common-gate buffer to provide bias voltage for the common-gate buffer, the bias circuit is connected with the output end of the basic circuit to provide bias voltage for the basic circuit, and the protection circuit is connected with the input end of the basic circuit and one end of the protection circuit is grounded.
Optionally, the basic circuit includes a first branch and a second branch, and a first transistor and a second transistor are respectively disposed in the first branch and the second branch, and the first transistor and the second transistor share the same bias current.
Optionally, the first branch includes a first transistor, a first resistor, a first capacitor, and a first inductor, a gate of the first transistor is connected to the first inductor, and the first inductor is connected to a voltage input terminal through a protection circuit; the first resistor and the first capacitor are connected in parallel with the first transistor and the first inductor.
Optionally, the drain of the first transistor is connected to a second inductor input terminal, and the second inductor output terminal is connected to ground.
Optionally, the second branch includes a second transistor, a gate of the second transistor is connected to a third inductor, a drain of the second transistor is connected to the source of the first transistor through a fourth inductor, and a drain of the second transistor is ac-shorted to ground through a second capacitor.
Optionally, the second branch includes a third capacitor, and the third capacitor is connected in parallel with the third inductor and the fourth inductor and in series with a third resistor.
Optionally, the source of the third transistor is connected to the common-gate buffer, the common-gate buffer includes a third transistor, the source of the third transistor is connected to the source of the third transistor through a fourth resistor, and the drain of the third transistor is grounded through a fifth inductor; and the fourth capacitor is connected with the source electrode of the second transistor and the drain electrode of the third transistor in parallel.
Optionally, the bias circuit includes a first bias circuit and a second bias circuit, the second bias circuit is connected to the gate of the third transistor, and the first bias circuit is connected to the parallel circuit of the first branch.
Optionally, the first bias circuit includes a fourth transistor, a gate of the fourth transistor is connected to the parallel circuit of the first branch, a source of the fourth transistor is connected to a fifth resistor, and a drain of the fourth transistor is connected to a sixth resistor; the second bias circuit includes a seventh resistor and an eighth resistor.
Optionally, the protection circuit comprises a first diode and a second diode.
Compared with the prior art, the method has the following beneficial effects:
the embodiment of the application provides a low-noise amplifier which can realize lower input impedance in a bandwidth of 6-18 GHz. A parallel feedback branch is introduced into a traditional inductance source degeneration cascode amplifier structure, an inductance is inserted between a common source stage and a common gate stage, and a source end of the common gate stage is connected to the ground through a large capacitor in an alternating-current short-circuit mode, so that the common source terminal and the common gate stage respectively resonate near 8GHZ and 16GHZ and the Q value of a resonant network is adjusted, and therefore broadband input impedance matching is achieved. In the present embodiment, noise is mainly concentrated on the input tube and the feedback resistor, and the flatness of the noise coefficient to be kept constant at 6 to 18GHz can be achieved.
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and it will be apparent to those skilled in the art that other related drawings can be obtained from the drawings without inventive effort.
Fig. 1 is a schematic structural diagram of a distributed amplifier in the prior art.
Fig. 2 is an overall circuit schematic diagram of a low noise amplifier according to an embodiment of the present disclosure.
Fig. 3 is a schematic circuit diagram of a low noise amplifier according to an embodiment of the present disclosure.
In the figure:
100-low noise amplifier; 110-a base circuit; 120-common gate buffer; 130-a bias circuit; 140-a protection circuit;
111-a first branch; 112-a second branch; 131-a first bias circuit; 132-second bias circuit.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present application, as presented in the figures, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.
In the prior art, the distributed amplifier usually adopts a multi-stage connection structure, and a plurality of inductors are usually required to realize connection between each stage of amplifying circuit. In the early days of this amplifier circuit design, the overall size of the distributed amplifier was larger than other structures due to the typically large area of on-chip inductance, which is detrimental to control of chip size and cost. In recent years, with the progress of transmission line and on-chip inductor design and manufacturing processes, inductors with higher Q values and smaller sizes help distributed structures to gradually compensate for this drawback. In the currently commonly used distributed amplifier, as shown in fig. 1, when a signal is inputted through a gate line, and then each transistor is sequentially activated, the signal is amplified by transconductance times by each transistor, and then added along a drain line, and a residual signal on the gate line and a reflected signal on the drain line are both amplified by a resistor R at a corresponding terminal end g 、R d And is consumed. If the design is reasonable, the phase speeds of the grid transmission line and the drain transmission line are the same, then the signals can be amplified step by step and superposed, and therefore gain and power synthesis is achieved. The distributed structure can be equivalent to a low-pass filter, the input and output capacitors of the tube can be equivalent to shunt capacitors in a ladder structure of the filter, the integral cutoff frequency is high, and the broadband characteristic is achieved.
Wherein, the characteristic impedance for the input gate line is:
the output drain line characteristic impedance is:
since Cgs is generally used>Cds, the bandwidth of the low noise amplifier is mainly limited by the gate capacitance, and the cut-off frequency of the equivalent gate line is:
the capacitance of the tube gates in series broadens the bandwidth but also reduces the gain accordingly.
The distributed structure enters the transmission line through the input and output capacitors of the absorption tubes, transconductance of all stages of tubes is superposed under the condition that impedance matching elements are not added, and therefore a gain bandwidth product exceeding that of a single tube is obtained, and the working bandwidth is expanded. But compared with a single tube, the distributed structure has larger noise coefficient and is excessively complex in circuit structure. Therefore, the coordination between impedance matching and noise for the distributed amplifier in the prior art is also a difficulty in the prior art.
In view of this, embodiments of the present application provide a low noise amplifier, which achieves the coordination between impedance matching and low noise.
The ground noise amplifier provided by the application is exemplified as follows:
referring to fig. 2, as an alternative implementation, a low noise amplifier includes a base circuit, a common gate buffer, a bias circuit, and a protection circuit. The basic circuit is of a two-stage common source structure and is divided into a first branch and a second branch, the common-gate buffer is connected with the output end of the basic circuit, one end of the common-gate buffer is grounded, the bias circuit comprises a first bias circuit and a second bias circuit, the first bias circuit is connected with the output end of the common-gate buffer and provides bias voltage for the common-gate buffer, the bias circuit is connected with the output end of the basic circuit and provides bias voltage for the basic circuit, and the protection circuit is connected with the input end of the basic circuit and one end of the protection circuit is grounded.
Specifically, referring to fig. 3, the basic circuit in this embodiment includes a first branch and a second branch, each of which is provided with a first transistor M 1 And a second transistorM 2 The first transistor M 1 And the second transistor M 2 Sharing the same bias current. Wherein the first branch comprises a first transistor M 1 A first resistor R FB A first capacitor C FB And a first inductance L G1 The first transistor M 1 And the first inductor L G1 Is connected, and the first inductance L G1 Is connected with a voltage input end V through a protection circuit IN (ii) a The first resistor R FB And said first capacitance C FB Is connected to the first transistor M 1 And the first inductance L G1 And (4) connecting in parallel. And, the first transistor M 1 The drain electrode is connected with a second inductor L S1 Said second inductance L S1 The output end is connected to ground.
In particular, the second branch comprises a second transistor M 2 The second transistor M 2 Is connected with a third inductor L G2 The drain electrode of the second transistor passes through a fourth inductor L D1 And the first transistor M 1 And the source of the second transistor M is connected, and the second transistor M 2 Through the second capacitor C 2 The ac is shorted to ground. Wherein the second branch circuit comprises a third capacitor C 1 Said third capacitance C 1 And the third inductance L G2 And the fourth inductance L D1 Connected in parallel with a third resistor R b Are connected in series. Specifically, the second transistor M 2 Is connected to the common gate buffer, which comprises a third transistor M 3 The source of the third transistor M3 passes through a fourth resistor R D3 And the third transistor M 3 The source of the third transistor M 3 The drain electrode passes through a fifth inductor L S3 Grounding; further comprising a second transistor M 2 A source and the third transistor M 3 Fourth capacitor C with parallel-connected drain electrodes 3 。
In this embodiment, the bias circuit includes a first bias circuit and a second bias circuit, the second bias circuit being connected to the third transistor M 3 The first bias circuit is connected with the first gateThe parallel circuits of the branches are connected. Wherein the first bias circuit comprises a fourth transistor M 4 Said fourth transistor M 4 Is connected with the parallel circuit of the first branch, and the source of the fourth transistor is connected with a fifth resistor R 1 The drain electrode of the fourth transistor is connected with a sixth resistor R 2 (ii) a The second bias circuit comprises a seventh resistor R 4 And an eighth resistor R 5 。
In this embodiment, the protection circuit includes a first diode D 1 And a second diode D 2 。
Specifically, as described in detail with reference to fig. 3, the basic circuit in the low noise amplifier provided in this embodiment is a two-stage common source structure with current multiplexing, where the basic circuit includes a transistor M 1 And a transistor M 2 Composition of, wherein M 1 And a transistor M 2 Share the same bias current and pass through a large capacitor C 2 The alternating current is short-circuited to ground, which can be regarded as a current-multiplexed two-stage common source structure. Transistor M 1 Inductor L G1 And L S1 An inductance source degeneration common source amplifier is formed, and input impedance matching can be achieved at a high-frequency point; resistance R FB And a capacitor C FB Form a parallel feedback branch circuit, and combine LC parallel load, namely L D1 And C gs2 Input impedance matching can be done at high frequency points. The input matching network grade at this time is two parallel RLC branches, and input matching can be completed within 6-18 GHz by controlling the Q values of the two branches. Transistor M 2 Grid weather trunk L G2 And is coated on the inductor L D2 Plays an important role in improving high-frequency gain. Capacitor C 3 Is the blocking capacitance between the input stage and the common gate buffer. Inductor L S1 The method is realized in a microstrip line mode.
The input stage of the common-gate buffer is a common-gate amplifier consisting of a transistor M3 and an inductor LS3, R D3 Is a common-gate load resistor and a capacitor C out And an inductance L out And an LC matching network is formed to realize the input matching of the circuit.
For the bias circuit, the transistor M 4 Electricity, electricityResistance R 1 And a resistance R 2 Forming a simple bias circuit as transistor M 1 A bias voltage is provided. Transistor M 2 Is biased by a supply voltage V DD1 Provided is a method. Resistance R 3 And a resistance R 4 Comprising a simple biasing circuit of transistor M 3 A bias voltage is provided.
The protection circuit is an EDS protection circuit and comprises a diode D 1 And D 2 。
The embodiment of the application provides a low-noise amplifier which can realize lower input impedance in a bandwidth of 6-18 GHz. A parallel feedback branch is introduced into a traditional inductance source degeneration cascode amplifier structure, an inductance is inserted between a common source stage and a common gate stage, and a source end of the common gate stage is connected to the ground through a large capacitor in an alternating-current short-circuit mode, so that the common source terminal and the common gate stage respectively resonate near 8GHZ and 16GHZ and the Q value of a resonant network is adjusted, and therefore broadband input impedance matching is achieved. In this embodiment, noise is mainly concentrated on the input tube and the feedback resistor, and the flatness of the noise coefficient can be maintained at 6 to 18 GHz.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
It will be evident to those skilled in the art that the present application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Claims (10)
1. A low noise amplifier is characterized by comprising a basic circuit, a common gate buffer, a bias circuit and a protection circuit; the basic circuit is of a two-stage common source structure, the common-gate buffer is connected with the output end of the basic circuit, one end of the common-gate buffer is grounded, the bias circuit comprises a first bias circuit and a second bias circuit, the first bias circuit is connected with the output end of the common-gate buffer to provide bias voltage for the common-gate buffer, the bias circuit is connected with the output end of the basic circuit to provide bias voltage for the basic circuit, and the protection circuit is connected with the input end of the basic circuit and one end of the protection circuit is grounded.
2. The low noise amplifier of claim 1, wherein the base circuit comprises a first branch and a second branch, each having a first transistor and a second transistor, the first and second transistors sharing a same bias current.
3. The low noise amplifier according to claim 2, wherein the first branch comprises a first transistor, a first resistor, a first capacitor and a first inductor, a gate of the first transistor is connected to the first inductor, and the first inductor is connected to a voltage input terminal through a protection circuit; the first resistor and the first capacitor are connected in parallel with the first transistor and the first inductor.
4. The low noise amplifier of claim 4, wherein the drain of the first transistor is connected to a second inductor input terminal, and the second inductor output terminal is connected to ground.
5. The low noise amplifier according to claim 2, wherein the second branch comprises a second transistor, a gate of the second transistor is connected with a third inductor, a drain of the second transistor is connected with a source of the first transistor through a fourth inductor, and a drain of the second transistor is ac-shorted to ground through a second capacitor.
6. The low noise amplifier of claim 5, wherein the second branch comprises a third capacitor connected in parallel with the third inductor and the fourth inductor and in series with a third resistor.
7. The low noise amplifier of claim 6, wherein the source of the third transistor is connected to the common gate buffer, the common gate buffer comprises a third transistor, the source of the third transistor is connected to the source of the third transistor through a fourth resistor, and the drain of the third transistor is grounded through a fifth inductor; and the fourth capacitor is connected with the source electrode of the second transistor and the drain electrode of the third transistor in parallel.
8. The low noise amplifier of claim, wherein the bias circuit comprises a first bias circuit and a second bias circuit, the second bias circuit being connected to the gate of the third transistor, the first bias circuit being connected to the parallel circuit of the first branch.
9. The low noise amplifier according to claim 8, wherein the first bias circuit comprises a fourth transistor, a gate of the fourth transistor is connected to the parallel circuit of the first branch, a source of the fourth transistor is connected to a fifth resistor, and a drain of the fourth transistor is connected to a sixth resistor; the second bias circuit includes a seventh resistor and an eighth resistor.
10. The low noise amplifier of claim 1, wherein the protection circuit comprises a first diode and a second diode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211131611.0A CN115483895A (en) | 2022-09-15 | 2022-09-15 | Low-noise amplifier |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202211131611.0A CN115483895A (en) | 2022-09-15 | 2022-09-15 | Low-noise amplifier |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070146020A1 (en) * | 2005-11-29 | 2007-06-28 | Advanced Analogic Technologies, Inc | High Frequency Power MESFET Gate Drive Circuits |
| WO2007132274A2 (en) * | 2006-05-17 | 2007-11-22 | University Of Bradford | High frequency low noise amplifier |
| CN102356542A (en) * | 2009-03-19 | 2012-02-15 | 高通股份有限公司 | Cascode amplifier with protection circuitry |
| CN110752829A (en) * | 2019-09-23 | 2020-02-04 | 航天科工微电子***研究院有限公司 | Bias circuit and amplifier circuit applied to 5G WiFi communication low-noise amplifier |
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2022
- 2022-09-15 CN CN202211131611.0A patent/CN115483895A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070146020A1 (en) * | 2005-11-29 | 2007-06-28 | Advanced Analogic Technologies, Inc | High Frequency Power MESFET Gate Drive Circuits |
| WO2007132274A2 (en) * | 2006-05-17 | 2007-11-22 | University Of Bradford | High frequency low noise amplifier |
| CN102356542A (en) * | 2009-03-19 | 2012-02-15 | 高通股份有限公司 | Cascode amplifier with protection circuitry |
| CN110752829A (en) * | 2019-09-23 | 2020-02-04 | 航天科工微电子***研究院有限公司 | Bias circuit and amplifier circuit applied to 5G WiFi communication low-noise amplifier |
Non-Patent Citations (1)
| Title |
|---|
| 底京浩: "6～18GHz CMOS低噪声放大器设计", 《中国优秀硕士学位论文全文数据库信息科技辑》, no. 6, pages 23 - 39 * |
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