CN115411092A - Silicon carbide semiconductor device and manufacturing method thereof - Google Patents
Silicon carbide semiconductor device and manufacturing method thereof Download PDFInfo
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- CN115411092A CN115411092A CN202110580457.4A CN202110580457A CN115411092A CN 115411092 A CN115411092 A CN 115411092A CN 202110580457 A CN202110580457 A CN 202110580457A CN 115411092 A CN115411092 A CN 115411092A
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- ohmic contact
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 62
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 61
- 239000004065 semiconductor Substances 0.000 title claims abstract description 36
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000000463 material Substances 0.000 claims abstract description 88
- 239000000758 substrate Substances 0.000 claims abstract description 47
- 238000000034 method Methods 0.000 claims abstract description 19
- 238000005224 laser annealing Methods 0.000 claims description 24
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 12
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 10
- 229910021334 nickel silicide Inorganic materials 0.000 claims description 8
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052759 nickel Inorganic materials 0.000 claims description 5
- 239000010936 titanium Substances 0.000 claims description 4
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- 229910052750 molybdenum Inorganic materials 0.000 claims description 3
- 239000011733 molybdenum Substances 0.000 claims description 3
- 229910052715 tantalum Inorganic materials 0.000 claims description 3
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 239000010937 tungsten Substances 0.000 claims description 3
- PEUPIGGLJVUNEU-UHFFFAOYSA-N nickel silicon Chemical compound [Si].[Ni] PEUPIGGLJVUNEU-UHFFFAOYSA-N 0.000 claims description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 abstract description 18
- 229910052799 carbon Inorganic materials 0.000 abstract description 18
- 238000009825 accumulation Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 144
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 238000000151 deposition Methods 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 230000008021 deposition Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000015556 catabolic process Effects 0.000 description 4
- 230000007547 defect Effects 0.000 description 4
- 238000005336 cracking Methods 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 238000000227 grinding Methods 0.000 description 3
- 229910021332 silicide Inorganic materials 0.000 description 3
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 3
- 239000002356 single layer Substances 0.000 description 3
- 238000000137 annealing Methods 0.000 description 2
- 150000001721 carbon Chemical class 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 125000004432 carbon atom Chemical group C* 0.000 description 1
- 150000001722 carbon compounds Chemical class 0.000 description 1
- 239000003575 carbonaceous material Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 150000002736 metal compounds Chemical class 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- -1 titanium carbide) Chemical class 0.000 description 1
- MTPVUVINMAGMJL-UHFFFAOYSA-N trimethyl(1,1,2,2,2-pentafluoroethyl)silane Chemical compound C[Si](C)(C)C(F)(F)C(F)(F)F MTPVUVINMAGMJL-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
- H01L29/1608—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
Abstract
A method for manufacturing a silicon carbide semiconductor device includes the steps of: providing a semiconductor element structure on a silicon carbide substrate, the semiconductor element structure being formed on a front surface of the silicon carbide substrate; a multilayer structure is formed on a back surface of the silicon carbide substrate, and the multilayer structure comprises a plurality of ohmic contact layers and a plurality of catching material layers. By dispersing the trapping material into multiple layers and adjusting the thickness combination of the ohmic contact layer and the trapping material layer, the trapping material layer can trap carbon with sufficient content even if the trapping material layer is thin (enough thickness for spheroidization), thereby reducing carbon accumulation.
Description
Technical Field
The present invention relates to semiconductor devices, and more particularly, to silicon carbide semiconductor devices and methods of fabricating the same.
Background
The semiconductor power device generally requires a high Breakdown voltage (Breakdown voltage), and has as small an on-resistance as possible, a low reverse leakage current, and a fast Switching speed, so as to reduce a Conduction loss (Conduction loss) and a Switching loss (Switching loss) during operation. Silicon carbide (SiC) has characteristics such as a wide band gap (band Eg =3.26 eV), a high critical breakdown field strength (2.2 MV/cm), and a high thermal conductivity (4.9W/cm-K), and is considered to be an excellent material for power switching elements. Under the same breakdown voltage condition, the thickness of a voltage-withstanding layer (Drift layer with low doping concentration) of a power element made of silicon carbide is only one tenth of that of a silicon (Si) power element, and theoretically, the on-resistance can reach one hundred times of that of silicon.
However, after the power device made of silicon carbide as a base material is processed and manufactured through the steps of grinding, annealing, deposition and the like, excess carbon atoms after reacting with nickel to form nickel silicide are easily gathered and accumulated on the grain boundary, so that the multi-layer structure of the semiconductor device is peeled and cracked, the resistance value is greatly improved, and the reliability of the semiconductor device is affected.
Disclosure of Invention
The main purpose of the present invention is to solve the problems of peeling and cracking of the multilayer structure and the increase of the resistance value between devices due to the deposition of carbon material during the manufacturing process between the multilayer structures of the conventional silicon carbide semiconductor device.
To achieve the above object, the present invention provides a method for manufacturing a silicon carbide semiconductor device, comprising the steps of: providing a semiconductor element structure on a silicon carbide substrate, the semiconductor element structure being formed on a front surface of the silicon carbide substrate; forming a multilayer structure on a back surface of the silicon carbide substrate, wherein the multilayer structure comprises a first ohmic contact layer formed on the back surface, a first capture material layer formed on the first ohmic contact layer, a second ohmic contact layer formed on the first capture material layer, a second capture material layer formed on the second ohmic contact layer, and a third ohmic contact layer formed on the second capture material layer.
In one embodiment of the present invention, after the multi-layer structure is formed, a laser annealing step is performed on the multi-layer structure.
In an embodiment of the present invention, after the laser annealing step, a metal layer is formed on a side of the multilayer structure away from the silicon carbide substrate.
In an embodiment of the invention, the material of the ohmic contact layer is nickel, nickel-silicon bilayer, nickel silicide or a combination thereof.
In an embodiment of the invention, the material of the trapping material layer is titanium, molybdenum, tungsten, tantalum or a combination thereof.
In an embodiment of the invention, the total thickness of the multi-layer structure is between 105nm and 405 nm.
In an embodiment of the invention, the thickness of the ohmic contact layer is between 25nm and 120nm, and the thickness of the trapping material layer is between 15nm and 45 nm.
In an embodiment of the invention, a thickness of the ohmic contact layer is greater than a thickness of the trapping material layer.
In order to achieve the above object, the present invention also provides a silicon carbide semiconductor device manufactured by the above method.
In order to achieve the above object, the present invention further provides a method for manufacturing a silicon carbide semiconductor device, comprising the steps of: providing a semiconductor element structure on a silicon carbide substrate, the semiconductor element structure being formed on a front surface of the silicon carbide substrate; forming a first multi-layer structure on a back surface of the silicon carbide substrate, wherein the first multi-layer structure comprises a plurality of ohmic contact layers and at least one capturing material layer arranged between the ohmic contact layers; performing a first laser annealing step on the first multilayer structure to form a first ohmic contact to the silicon carbide substrate; forming a second multi-layer structure on the first ohmic contact, the second multi-layer structure including at least one trapping material layer and at least one ohmic contact layer disposed on the trapping material layer; and performing a second laser annealing step on the second multilayer structure to form a second ohmic contact attached to the silicon carbide substrate by the second multilayer structure and the first ohmic contact.
In an embodiment of the present invention, the total thickness of the first multi-layer structure is between 65nm and 285 nm.
In an embodiment of the invention, the total thickness of the second multi-layer structure is between 40nm and 165 nm.
In an embodiment of the invention, the thickness of the ohmic contact layer is between 25nm and 120nm, and the thickness of the trapping material layer is between 15nm and 45 nm.
Drawings
Fig. 1A to fig. 1D are schematic manufacturing process diagrams of a first embodiment of the invention.
FIG. 2 is a schematic diagram of the spheroidization of the trapping material in an embodiment of the present invention.
Fig. 3A to fig. 3E are schematic manufacturing process diagrams according to a second embodiment of the invention.
Detailed Description
The present invention provides a method for manufacturing a silicon carbide semiconductor device, which is schematically illustrated in fig. 1A to 1D as a manufacturing flow according to a first embodiment of the present invention. As shown in fig. 1A, a silicon carbide substrate 10 and a semiconductor device structure 20 are provided, the silicon carbide substrate 10 includes a front surface 11 and a back surface 12 opposite to the front surface, and the semiconductor device structure 20 is disposed on the front surface 11 of the silicon carbide substrate 10. In the present invention, the Semiconductor device structure 20 is a vertical Semiconductor power device structure, so that the Semiconductor device structure 20 forms a power Transistor device, such as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), a Junction Field Effect Transistor (JFET), and an Insulated Gate Bipolar Transistor (IGBT), on the silicon carbide substrate 10. Optionally performing a back grinding step on the back surface 12 of the sic substrate 10 after the semiconductor device structure 20 is disposed, so that the ground sic substrate 10 is thinned to a thickness between 50 μm and 150 μm; in addition, after the back grinding step, a dry etching process may be optionally performed on the back surface 12 of the silicon carbide substrate 10 to relieve stress.
As shown in fig. 1B, a plurality of ohmic contact layers and a plurality of trapping material layers are alternately deposited on the back surface 12 of the silicon carbide substrate 10 to form a multi-layered structure 30, wherein the multi-layered structure 30 comprises a first ohmic contact layer 31A formed on the back surface 12, a first trapping material layer 32A formed on the first ohmic contact layer 31A, a second ohmic contact layer 31B formed on the first trapping material layer 32A, a second trapping material layer 32B formed on the second ohmic contact layer 31B, and a third ohmic contact layer 31C formed on the second trapping material layer 32B. In this embodiment, the first ohmic contact layer 31A, the first trapping material layer 32A, the second ohmic contact layer 31B, the second trapping material layer 32B, and the third ohmic contact layer 31C are sequentially deposited.
The ohmic contact layers 31A, 31B, 31C and the trapping material layers 32A, 32B can be formed by evaporation, sputtering, chemical vapor deposition, spin coating, or other techniques. The ohmic contact layers 31A, 31B, and 31C are made of metal or metal compound for forming ohmic contact, and the ohmic contact layers 31A, 31B, and 31C may be made of Nickel, nickel/silicon double layer, or Nickel Silicide (Nickel Silicide). The trapping material layers 32A, 32B include at least one trapping material (trapping material) for trapping carbon diffused from the silicon carbide substrate 10 in a subsequent process, and the trapping material layers 32A, 32B may be titanium, molybdenum, tungsten, tantalum, or a combination thereof. In this embodiment, the capturing material layers 32A and 32B are composed of only a single type of capturing material.
As shown in fig. 1C, after the multi-layer structure 30 is deposited, a Laser annealing (Laser annealing) step is performed on the multi-layer structure 30 to form an ohmic contact 40 on the multi-layer structure 30. During the laser annealing of the multilayer structure 30, the composition of the multilayer structure 30 will diffuse downward, while the composition of the silicon carbide substrate 10 will diffuse upward. The silicon carbide substrate 10 will react with the metal of the ohmic contact layers 31A, 31B, 31C to form metal silicide (e.g., nickel silicide) and precipitate Carbon, and the precipitated Carbon will be captured by the capture material of the capture material layer 32 to form Carbon compound (e.g., titanium carbide), thereby avoiding the precipitated Carbon from remaining on the interface between the silicon carbide substrate 10 and the ohmic contact 40 and/or the upper surface of the ohmic contact 40, or forming defects such as Carbon clusters (Carbon clusters) or interstitial Carbon (Carbon inter-contacts). The aforementioned defects cause the problems of interface peeling and cracking, and increase the resistance. In various embodiments, the light source of the laser annealing step may be selected from an ultraviolet light or a green laser, the temperature of the laser annealing step is between 800 ℃ and 1500 ℃, and the time of the laser annealing step is between 10ns and 150 ns.
As shown in fig. 1D, after laser annealing, a metal layer 50 is disposed on the other side of the ohmic contact 40 away from the silicon carbide substrate 10. In other embodiments, a nickel silicide layer may be deposited prior to disposing the metal layer 50, followed by deposition of the metal layer 50.
In the present invention, the multi-layer structure 30 includes at least three thick ohmic contact layers and at least two thin trapping material layers sandwiched between the thick ohmic contact layers. In terms of thickness design, the multilayer structure 30 needs to have a proper total thickness, and if the thickness of the multilayer structure 30 is too thick, the silicon carbide substrate 10 will be consumed too much; if the thickness of the multi-layer structure 30 is too thin, the ohmic contact 40 cannot be effectively formed. A low contact resistance can only be achieved with a suitable total thickness of the multilayer structure 30. According to an embodiment of the present invention, the total thickness of the multi-layer structure 30 is between 105nm and 450nm, preferably between 150nm and 200 nm. After the laser annealing, the thickness of the ohmic contact 40 is between 200nm and 600nm, and the thickness of the ohmic contact 40 is greater than the thickness of the multilayer structure 30 before the laser annealing.
The prior art uses a single layer of trapping material, and if the single layer of trapping material is too thin, the trapping material will not react well with the carbon dissipated from the silicon carbide substrate; however, if the single layer of the trapping material layer is too thick, the trapping material will not be able to be spheroidized (Balling) at the high temperature of the laser annealing, and will not react with the carbon of the silicon carbide substrate and will also affect the silicon diffusion of the silicon carbide substrate, and furthermore, the supersaturated trapping material will react with the silicon of the silicon carbide substrate to form a metal silicide (Ti silicide), which will adversely affect the device.
Referring to fig. 2, a schematic diagram of the capture material spheroidization in an embodiment of the present invention, in order to solve the problems encountered in the prior art, the present invention proposes to put at least two capture material layers 32A and 32B into the multi-layer structure 30 for ohmic contact, wherein the capture material layers 32A and 32B will form the spheroidization 321A and 321B during high temperature annealing. By dispersing the trapping material in multiple layers, the trapping material is expanded to a three-dimensional structure, and the effect of trapping can be exerted in the vertical direction (as shown by the arrow in fig. 2); by adjusting the thickness combination of the ohmic contact layers 31A, 31B, 31C and the trapping material layers 32A, 32B, the trapping material layers 32A, 32B have a sufficient amount of carbon to trap carbon even when they are thin (thick enough to be spherical), and do not affect the diffusion of silicon in the sic substrate, thereby achieving an optimal trapping capability.
In this embodiment, the ohmic contact layers 31A, 31B, and 31C have a thickness T 1A 、T 1B 、T 1C Is greater than the thickness T of the catching material layers 32A and 32B 2A 、T 2B In other words, the thickness T of any one of the ohmic contact layers 31A, 31B, 31C 1A 、T 1B 、T 1C Greater than the thickness T of either of the trapping material layers 32A, 32B 2A 、T 2B Thickness T of the ohmic contact layers 31A, 31B, 31C 1A 、T 1B 、T 1C A thickness T of the ohmic contact layers 31A, 31B, 31C between 25nm and 120nm 1A 、T 1B 、T 1C The thickness T of the capturing material layers 32A, 32B may be the same or different 2A 、T 2B Between 15nm and 45nm, respectively, the thickness T of the trapping material layers 32A and 32B 2A 、T 2B May be the same or different. According to an embodiment of the invention, the thickness T of the ohmic contact layers 31A, 31B, 31C 1A 、T 1B 、T 1C A thickness T of the trapping material layers 32A and 32B between 40nm and 60nm 2A 、T 2B Between 20nm and 30nm, respectively; according to another embodiment of the present invention, the ohmic contact layers 31A, 31B, 31C have a thickness T 1A 、T 1B 、T 1C 50nm each, and the thickness T of the trapping material layers 32A, 32B 2A 、T 2B Each at 25nm.
In this embodiment, the distance between the trapping material layer 32A and the lower surface 302 of the multi-layer structure 30 is equal to the distance between the trapping material layer 32B and the upper surface 301 of the multi-layer structure 30, i.e., the thickness T of the ohmic contact layers 31A, 31C 1A 、T 1C Are the same. According to an embodiment of the present invention, the distance between the capturing material layer 32A and the lower surface 302 of the multi-layer structure 30 may be larger than the distance between the capturing material layer 32B and the upper surface 301 of the multi-layer structure 30, so that the ohmic contact layer 31A has sufficient content to react with the underlying silicon carbide substrate 10 to avoid poor adhesion. For example, the thickness T of the ohmic contact layers 31A, 31B, 31C 1A 、T 1B 、T 1C 25nm, 50nm and 75nm, respectively, and the thickness T of the trapping material layers 32A and 32B 2A 、T 2B Each at 25nm.
According to other embodiments of the present invention, the ohmic contact layer and the trapping material layer can be formed by other combinations of numbers, such as four layers of the ohmic contact layer and three layers of the trapping material layer; or five ohmic contact layers and four trapping material layers. In combination with the foregoing, the thickness of the trapping material layer may be less than 15nm. Thus, at the high temperature of the laser annealing, the trapping material of the trapping material layer can form more spherical shapes.
According to the multi-layer structure 30 of the present invention, the carbon deposition between the multi-layer structure 30 due to the dissipation of the silicon carbide substrate 10 is effectively reduced, and the conventional problems of easy peeling and cracking of ohmic contact are solved, thereby preventing the resistance from being increased.
Referring to fig. 3A to 3E, which are schematic manufacturing process diagrams of a second embodiment of the present invention, the difference between this embodiment and the embodiment of fig. 1A to 1D is that the multi-layer structure 30 is subjected to the laser annealing step at least two times.
First, as shown in fig. 3A and 3B, a first ohmic contact layer 31A, a first trapping material layer 32A, and a second ohmic contact layer 31B are sequentially deposited on the back surface 12 of the silicon carbide substrate 10, and a first multi-layered structure 30A is formed on the back surface 12 of the silicon carbide substrate 10. A first laser annealing step is performed on the first multi-layer structure 30A to form a first ohmic contact 40A, wherein the thickness of the first multi-layer structure 30A is between 65nm and 285 nm.
Thereafter, as shown in fig. 3C and 3D, a second trapping material layer 32B and a third ohmic contact layer 31C are sequentially deposited on the first ohmic contact 40A, and a second multi-layer structure 30B is formed on the ohmic contact 40A. After depositing the second multi-layer structure 30B, a second laser annealing step is performed on the second multi-layer structure 30B to form a second ohmic contact 40B by the first ohmic contact 40A and the second multi-layer structure 30B, wherein the thickness of the second multi-layer structure 30B is between 40nm and 165 nm. In this embodiment, the thicknesses and the numbers of the first ohmic contact layer 31A, the first trapping material layer 32A, the second ohmic contact layer 31B, the second trapping material layer 32B and the third ohmic contact layer 31C can be selected as described in the above embodiments.
As shown in fig. 3E, after laser annealing, the metal layer 50 is disposed on the other side of the second ohmic contact 40B away from the silicon carbide substrate 10. In other embodiments, a nickel silicide layer may be deposited prior to disposing the metal layer 50, followed by deposition of the metal layer 50.
Therefore, the second ohmic contact 40B is crystallized and can capture carbon more effectively through the two laser annealing steps, thereby greatly improving the adhesion capability.
In summary, the present invention provides at least two thin layers of trapping material in the multi-layered structure for forming ohmic contact, and the trapping material is designed into a multi-layered structure, so that the trapping material layer can be effectively spheroidized on different planes and can also provide a sufficient content. Therefore, the carbon can be fully captured without influencing the diffusion of the silicon carbide substrate, thereby avoiding the precipitated carbon from remaining on the interface between the silicon carbide substrate and the ohmic contact layer and/or the upper surface of the ohmic contact layer, or forming defects such as carbon clusters or interstitial carbon and the like, thereby increasing the adhesion degree of the interface, and avoiding the resistance value from being increased due to the reduction of the defects, thereby improving the performance of the silicon carbide semiconductor device.
Claims (13)
1. A method for manufacturing a silicon carbide semiconductor device, comprising the steps of:
providing a semiconductor element structure on a silicon carbide substrate, the semiconductor element structure being formed on a front surface of the silicon carbide substrate; and
forming a multilayer structure on a back surface of the silicon carbide substrate, wherein the multilayer structure comprises a first ohmic contact layer formed on the back surface, a first capture material layer formed on the first ohmic contact layer, a second ohmic contact layer formed on the first capture material layer, a second capture material layer formed on the second ohmic contact layer, and a third ohmic contact layer formed on the second capture material layer.
2. The method of manufacturing a silicon carbide semiconductor device as claimed in claim 1, wherein a laser annealing step is performed on the multilayer structure after the multilayer structure is formed.
3. The method according to claim 2, wherein a metal layer is formed on the side of the multilayer structure remote from the silicon carbide substrate after the laser annealing step.
4. The method of claim 1, wherein the first ohmic contact layer, the second ohmic contact layer and the third ohmic contact layer are made of nickel, nickel-silicon bilayer, nickel silicide or a combination thereof.
5. The method of claim 1, wherein the first trapping material layer and the second trapping material layer are made of titanium, molybdenum, tungsten, tantalum, or a combination thereof.
6. The method of claim 1, wherein the multilayer structure has a total thickness of between 105nm and 405 nm.
7. The method according to claim 1, wherein the first, second and third ohmic contact layers have a thickness of 25nm to 120nm, and the first and second trapping material layers have a thickness of 15nm to 45 nm.
8. The method of manufacturing a silicon carbide semiconductor device according to claim 1, wherein a thickness of any one of the first ohmic contact layer, the second ohmic contact layer and the third ohmic contact layer is larger than a thickness of any one of the first trapping material layer and the second trapping material layer.
9. A silicon carbide semiconductor device produced by the production method according to any one of claims 1 to 8.
10. A method for manufacturing a silicon carbide semiconductor device, comprising the steps of:
providing a semiconductor element structure on a silicon carbide substrate, the semiconductor element structure being formed on a front surface of the silicon carbide substrate;
forming a first multilayer structure on a back surface of the silicon carbide substrate, wherein the first multilayer structure comprises a plurality of ohmic contact layers and at least one trapping material layer arranged among the ohmic contact layers;
performing a first laser annealing step on the first multilayer structure to form a first ohmic contact to the silicon carbide substrate;
forming a second multi-layer structure on the first ohmic contact, the second multi-layer structure including at least one trapping material layer and at least one ohmic contact layer disposed on the trapping material layer; and
and carrying out a second laser annealing step on the second multilayer structure, so that the second multilayer structure and the first ohmic contact jointly form a second ohmic contact attached to the silicon carbide substrate.
11. The method of claim 10, wherein the first multilayer structure has a total thickness of between 65nm and 285 nm.
12. The method of claim 10, wherein the second multi-layer structure has a total thickness of between 40nm and 165 nm.
13. The method of claim 10, wherein the ohmic contact layer has a thickness between about 25nm and about 120nm, and the trapping material layer has a thickness between about 15nm and about 45 nm.
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| CN202110580457.4A CN115411092A (en) | 2021-05-26 | 2021-05-26 | Silicon carbide semiconductor device and manufacturing method thereof |
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2021
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