CN1153572A - Testing of memory content - Google Patents

Abstract

A method of testing a memory associated with a microprocessor, particularly for use in smart cards. The method involves comparing the output from the memory (2) passed along a read path (10) with predetermined data signals generated externally and passed via a port (7) along a read path (9). Comparison is carried out in a comparison device (3) which may, for example, be the microprocessor, suitably programmed. The output form the comparison device (3) is a simple pass/fail verification signal applied to a port (5). The stored data held in memory (2) may be permanently held data such as in a ROM, or (where the memory is alterable) may be specially written to the memory for the purpose of the test.

Description

The test of memory content

The present invention relates to the test of the content of the storer that links to each other with a microprocessor.This storer can be the unalterable storer of content (ROM (read-only memory) or ROM), or the content storer that can change, such as EPROM (EPROM), or RAM (random access storage device).

Under many occasions, require the storer that has kept predefine information is tested.An example is to be used in the integrated credit card, and common people are referred to as to be smart card (smart card).Usually, be by smart card is linked to each other with a reader (reader), read the content of this storer, and can test the content of smart card memory with the mode that the data that should provide compare by the mode of checksum validation or by reading content.The content of storer is normally maintained secrecy, and might test by analog memory its information is carried out unauthorized visit.A target of the present invention is to overcome this problem.

According to the present invention, a kind of method of testing memory content is provided, this storer links to each other with a microprocessor in a module, this method comprises: predefined data is added on this module as input, data in this module and the data that are kept in the storer are compared, and by relatively being verified as verification output of correct or incorrect generation according to memory content.

Data in storer can be the data that reside in the storer permanent or semipermanently, such as routine data and/or initialization data, perhaps can be to be written to data in the storer as first step in method of testing.Can test the function of writing that electricity can change storer by latter's method.

This module can be the integrated circuit that comprises storer and microprocessor, or by the one group of integrated circuit that encapsulates or similar approach links together.In smart card, this module generally is an integrated circuit.

By using above-mentioned internal storage comparison techniques, this memory content is not directly visited concerning the outside.The full content of being exported is exactly a checking signal.

Determine the content of storer in order to attempt duplicity ground, might be undertaken by the continuous many groups test data of automatic input, the content of these test datas is changed regularly, imports data up to the content of this storer of checking signal output expression corresponding to this.The multiple mode of dealing with this problem is arranged now.

According to a feature of the present invention, this microprocessor is programmed to postpone sending of each checking or non-checking output.Delay between two continuous output can be several milliseconds or several seconds.Its objective is and ban use of chronic in system test.

The another kind of method that prevents fraudulent memory check is before relatively the input data to be encrypted, such as encrypting by a cryptographic algorithm.Should the input data just clearly not related then with the content of storer.Its algorithm or key can be with every batch of smart card difference.

With reference to the accompanying drawings the present invention is further described, accompanying drawing wherein is to describe the skeleton diagram of realizing method of the present invention.

Referring to accompanying drawing, it shows an integrated circuit 1, and this integrated circuit has the storer 2 and the comparison means 3 that for example is a microprocessor form that comprise the EEPROM of a given data, can programme to realize that data relatively to this device.Dotted line 4 represent one with outside interface.Three ports 5,6 and 7 are arranged on interface 4, between integrated circuit 1 and outside, carry out the transmission of signal by these ports.Internal path from port 7 is divided into two paths: lead to writing path 8 and leading to the path of reading of comparison means 3 of storer 2.

Test is by being input to routine data integrated circuit 1 and utilizing comparison means 3 to carry out inside and relatively carry out.By external device (ED) (not shown) generating routine data, and by data-in port 7 with read path 9 and be sent to comparison means 3.The corresponding data that is stored in the storer 2 is sent to comparison means 3 by reading path 10.In comparison means, will compare from the data of two paths 9 and 10, utilize the indication comparative result this comparative result to be sent to the external world by port 5 for validation signal by (Pass) or failure (Fail).This method has prevented that memory content from leaving integrated circuit 1, thereby guarantees to have the confidentiality of height.This reads the address and control signal can be produced by the external device (ED) (not shown), and is input to this integrated circuit at interface 4 through an address/control port 6.This address/control signal is sent to storer and control in a usual manner, and 3 data transmit from storer 2 to comparison means.

In an alternate embodiments (not shown), port 5 and 7 is combined into a multiplexed read/write port, and has left out port 6.Subport 7 and path 8 Input Address and control signal by combined port 5/7 on multiplexed basis, and these signals previously used be port 6.

This scheme also allows the data-in port 7 by interface 4 and writes that path 8 is written to storer 2 with test data and the function of writing that electricity can change storer is tested.Also be that the mode with foregoing description is verified correct write operation under the control of address/control signal.In this way can be to such as the duration, retention time and elementary boundary attributes such as (cell margin) is tested.

By the limit memory content might make up still and might carry out the duplicity visit the content of storer 2.As can be seen, the number of times of the passing through of generation/failure signal is few more, and its duplicity visit is just difficult more.Such as, just produce one by/failure signal if whenever read one 8 byte, need so at most to read byte of limit test 256 times.If the word of whenever reading one 16 just produces one by/failure signal, need so at most to read word of limit test 65536 times.Similarly, need read the word of one 32 of limit tests for 4294967296 times.By using this strategy, just make the limit test of extracting memory content become infeasible at an easy rate.

A kind of attached helping property means for safety are to guarantee tested word leap storage page border, perhaps carry out with variable-size.

Claims (10)

1. the method for the content of the storer that in a module, links to each other of a test with a microprocessor, this method comprises:

Import predetermined data to this module, data in this module and the data that are kept in the storer are compared, and by relatively sending a checking output according to this memory content correctness of checking from this module.

2. method according to claim 1, wherein described predetermined data are sent to comparison means as described module component part as first input, wherein the content with this storer is sent to described comparison means as second input, and the described comparison means data that will be applied to two input end compare and produce indication this relatively for by or a checking output signal of failure.

3. method according to claim 1 or 2, the wherein said data that are kept in the storer comprise the data that reside in the storer.

4. method of writing function that is used to test this storer according to claim 1 or 2, the wherein said data that are kept in this storer comprise as input and are added to the test data of this module and were written to data in this storer before relatively.

5. method according to claim 2 and 4, wherein said storer is that electricity is changeable, and have one and write input end, and as previously mentioned described test data is sent to the described input end of writing, and before being sent to second input end of described comparison means, it is temporarily stored in the described storer.

6. the method according to aforementioned arbitrary claim is wherein just sent this validation signal after through a time delay.

7. the method according to aforementioned arbitrary claim wherein also is included in and encrypts described predetermined data relatively before.

8. the method according to aforementioned arbitrary claim is wherein programmed to carry out described data relatively to described microprocessor.

9. method according to aforementioned arbitrary claim, wherein said module comprises one or more integrated circuit, these integrated circuit comprise described storer and microprocessor.

10. method according to claim 9, wherein said one or more integrated circuit are installed on the smart card.