CN115223310A - OTG priority selection circuit and multichannel charging circuit - Google Patents
OTG priority selection circuit and multichannel charging circuit Download PDFInfo
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- CN115223310A CN115223310A CN202210765828.0A CN202210765828A CN115223310A CN 115223310 A CN115223310 A CN 115223310A CN 202210765828 A CN202210765828 A CN 202210765828A CN 115223310 A CN115223310 A CN 115223310A
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- G—PHYSICS
- G07—CHECKING-DEVICES
- G07G—REGISTERING THE RECEIPT OF CASH, VALUABLES, OR TOKENS
- G07G1/00—Cash registers
- G07G1/12—Cash registers electronically operated
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/00032—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries characterised by data exchange
- H02J7/00034—Charger exchanging data with an electronic device, i.e. telephone, whose internal battery is under charge
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/18—Multiprotocol handlers, e.g. single devices capable of handling multiple protocols
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Abstract
The embodiment of the application provides an OTG priority selection circuit and multichannel charging circuit, relates to circuit technical field, and this equipment includes: the device comprises a back interface, a Type-C interface, a processing unit and a first selection circuit; the processing unit is used for determining a USB control signal and outputting the USB control signal to the first selection circuit according to the priorities of the back interface and the Type-C interface when the first transmission signal and the second transmission signal are detected and the communication Type indicated by the first transmission signal is determined to be a USB protocol; and the first selection circuit is used for determining a transmission interface for OTG transmission with external equipment according to the USB control signal. When the back interface and the Type-C interface transmit data simultaneously, the processing unit determines the transmission interface according to the priority of the back interface and the Type-C interface, and the problem that the multiple interfaces cannot transmit data when connected simultaneously is solved.
Description
Technical Field
The embodiment of the invention relates to the technical field of circuits, in particular to an OTG priority selection circuit and a multi-path charging circuit.
Background
The card swiping machine (POS machine) generally performs charging and data transmission through an interface, and the conventional card swiping machine includes three interfaces, which are a base interface, a back interface and a Type-C interface. At present, the card swiping machine can be connected with only one interface for charging when charging, and when a plurality of interfaces are simultaneously connected with a power supply signal, the charging function cannot be realized. Meanwhile, the card swiping machine can only transmit data through one interface when transmitting data, and when a plurality of interfaces are connected simultaneously, the data transmission function cannot be realized.
Disclosure of Invention
The embodiment of the application provides an OTG priority selection circuit and a multi-path charging circuit, which are used for solving the problem that a plurality of interfaces are accessed to a power supply signal and cannot be charged, and the problem that a plurality of interfaces perform data transmission and cannot realize a data transmission function.
The embodiment of the present application provides an OTG priority selection circuit, which includes: the device comprises a back interface, a Type-C interface, a processing unit and a first selection circuit;
the back interface is used for transmitting a first transmission signal with external equipment;
the Type-C interface is used for transmitting a second transmission signal with external equipment;
the processing unit is configured to determine a USB control signal according to the priorities of the back interface and the Type-C interface and output the USB control signal to the first selection circuit when the first transmission signal and the second transmission signal are detected and the communication Type indicated by the first transmission signal is determined to be a USB protocol;
the first selection circuit is used for determining a transmission interface for OTG transmission with the external equipment according to the USB control signal; the transmission interface is the back interface or the Type-C interface.
Optionally, the back interface has a higher priority than the Type-C interface; the circuit further comprises a second selection circuit;
the first selection circuit is used for outputting a first indication signal to the second selection circuit according to the USB control signal;
the second selection circuit is configured to perform OTG transmission with the external device according to the USB protocol according to the first indication signal.
Optionally, the processing unit is further configured to output a second indication signal to the second selection circuit when only the first transmission signal is detected and the communication type indicated by the first transmission signal is an I2C protocol; when only the first transmission signal is detected and the communication type indicated by the first transmission signal is a UART protocol, outputting a third indication signal to the second selection circuit;
the second selection circuit is configured to instruct, according to the second indication signal, the back interface and the external device to perform OTG transmission according to the I2C protocol; and according to the third indication signal, indicating the back interface and the external device to perform OTG transmission according to the UART protocol.
Optionally, the processing unit is further configured to determine that the back interface is in an OTG mode according to a back voltage of the back interface;
and determining that the Type-C interface is in an OTG mode according to CC protocol setting.
Optionally, the method further comprises: the power supply unit, the third selection circuit and the fourth selection circuit;
the processing unit is further configured to output a first enable signal to the power supply unit and output a second enable signal to the third selection circuit when the Type-C interface is the transmission interface; when the back interface is the transmission interface, outputting a first enable signal to the power supply unit and outputting a third enable signal to the fourth selection circuit;
the power supply unit is used for outputting a power supply voltage according to the first enabling signal;
the third selection circuit is configured to output the power supply voltage to the Type-C interface after receiving the second enable signal;
the fourth selection circuit is configured to output the supply voltage to the back interface after receiving the third enable signal.
The embodiment of the application provides a multichannel charging circuit, this multichannel charging circuit includes:
the charging system comprises a base interface, a back interface, a Type-C interface, a charging switch and a charging unit;
the base interface is used for transmitting a first power supply signal input by external equipment;
the back interface is used for transmitting a second power supply signal input by external equipment;
the Type-C interface is used for transmitting a third power supply signal input by external equipment;
the charging switch is used for communicating a power interface with the charging unit according to the power supply priority; the power interface is the base interface or the back interface or the Type-C interface.
Optionally, the charging switch comprises a first load switch between the base interface and the charging unit, a second load switch between the back interface and the charging unit, and a third load switch between the Type-C interface and the charging unit; according to the power supply priority, the load switch with the high priority outputs control voltage, and the control voltage is used for controlling the load switch with the low priority to be in an off state.
Optionally, the charge switch is in an operating state at a low level;
the enabling end of the first load switch is grounded by default; the input end of the first load switch is connected with the enabling end of the second load switch; the input end of the first load switch is connected with the enabling end of the third load switch;
the input end of the second load is connected with the enabling end of the third load switch; and the input end of the third load switch is not connected.
Optionally, an electronic device includes the OTG priority selection circuit described above, and/or the multiplexing charging circuit described above.
Optionally, the electronic device is a POS machine.
In the embodiment of the application, when the back interface and the Type-C interface simultaneously transmit data, the processing unit determines the transmission interface according to the priorities of the back interface and the Type-C interface, so as to perform OTG transmission with an external device, and solve the problem that a plurality of interfaces are connected simultaneously at present and cannot transmit data.
When base interface, back interface and Type-C interface all had power signal, the switch that charges selects power source and charging unit intercommunication from base interface, back interface and Type-C interface according to the priority of supplying power, charges, has solved a plurality of interfaces of present stage and has inserted the unable problem of charging of power signal simultaneously.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a schematic structural diagram of an OTG priority selection circuit provided in an embodiment of the present application;
fig. 2 is a schematic structural diagram of a first selection circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of an OTG priority selection circuit provided in an embodiment of the present application;
fig. 4 is a schematic structural diagram of a second selection circuit according to an embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of an OTG priority selection circuit provided in an embodiment of the present application;
fig. 6 is a schematic structural diagram of a third selection circuit according to an embodiment of the present disclosure;
fig. 7 is a schematic structural diagram of a fourth selection circuit according to an embodiment of the present application;
fig. 8 is a schematic structural diagram of a multi-path charging circuit according to an embodiment of the present disclosure;
fig. 9 is a schematic structural diagram of a multi-path charging circuit according to an embodiment of the present disclosure;
fig. 10 is a schematic structural diagram of a charging switch according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
Fig. 1 shows a structure of an OTG priority selection circuit provided in an embodiment of the present application, where the OTG priority selection circuit includes a back interface 101 and a Type-C interface 102. The back interface 101 is used for transmitting a first transmission signal with an external device, and the Type-C interface 102 is used for transmitting a second transmission signal with the external device.
The OTG priority selection circuit further comprises a processing unit 103 and a first selection circuit 104. The processing unit 103 is configured to determine a USB control signal according to the priorities of the back interface 101 and the Type-C interface 102 and output the USB control signal to the first selection circuit 104 when detecting the first transmission signal and the second transmission signal and determining that the communication Type indicated by the first transmission signal is the USB protocol. The first selection circuit 104 is configured to determine a transmission interface for performing OTG transmission with an external device according to the USB control signal; the transmission interface is a back interface 101 or a Type-C interface 102.
The structure of the first selection circuit 104 is shown in fig. 2. The first selection circuit 104 comprises a first circuit first pin 201, a first circuit second pin 202, a first circuit third pin 203, a first circuit fourth pin 204, a first circuit fifth pin 205 and a first circuit sixth pin 206.
The first circuit first pin 201 and the first circuit second pin 202 are connected to the processing unit 103, and the USB control signal is transmitted through the first circuit first pin 201 and the first circuit second pin 202. The first circuit third pin 203 and the first circuit fourth pin 204 are connected to the Type-C interface 102 and the first circuit fifth pin 205 and the first circuit sixth pin 206 are connected to the back interface 101.
Optionally, the back interface 101 has priority over the Type-C interface 102. When the processing unit 103 detects the first transmission signal and the second transmission signal and determines that the communication type indicated by the first transmission signal is the USB protocol, it determines the USB control signal and outputs the USB control signal to the first selection circuit 104. The first selection circuit 104 determines the back interface 101 as a transmission interface for OTG transmission with an external device according to the USB control signal.
In the embodiment of the application, when the back interface and the Type-C interface simultaneously transmit data, the processing unit determines the transmission interface according to the priorities of the back interface and the Type-C interface, so as to perform OTG transmission with an external device, and solve the problem that a plurality of interfaces are connected simultaneously at present and cannot transmit data.
Optionally, the processing unit determines that the back interface is in the OTG mode according to a back voltage of the back interface; and judging the communication type through the range of the back voltage. When the back voltage is between 0.4 and 0.7V, the communication type is a USB protocol; when the back voltage is between 0.8 and 1.1V, the communication type is I2C protocol; when the back voltage is between 1.2-1.5V, the communication type is UART protocol.
And the processing unit determines that the Type-C interface is in the OTG mode according to the CC protocol setting.
As shown in fig. 3, the OTG priority selection circuit further includes a second selection circuit 105.
According to the signal detected by the processing unit 103 and the communication type indicated by the first transmission signal, the following three possible ways are included:
in a first possible implementation manner, when detecting the first transmission signal and the second transmission signal and determining that the communication Type indicated by the first transmission signal is the USB protocol, the processing unit 103 determines the USB control signal according to the priorities of the back interface 101 and the Type-C interface 102 and outputs the USB control signal to the first selection circuit 104.
The first selection circuit 104 outputs a first instruction signal to the second selection circuit 105 according to the USB control signal; the second selection circuit 105 instructs the back interface 101 and the external device to perform OTG transmission according to the USB protocol according to the first instruction signal.
In a second possible implementation manner, when only the first transmission signal is detected and the communication type indicated by the first transmission signal is the I2C protocol, the processing unit 103 outputs a second indication signal to the second selection circuit 105; the second selection circuit 105 instructs the back interface 101 to perform OTG transmission with the external device according to the I2C protocol according to the second indication signal.
In a third possible embodiment, when the processing unit 103 detects only the first transmission signal and the communication type indicated by the first transmission signal is the UART protocol, it outputs a third indication signal to the second selection circuit 105; the second selection circuit 105 instructs the back interface 101 to perform OTG transmission with an external device according to the UART protocol according to the third instruction signal.
In the embodiment of the present application, different communication types may increase the diversity of OTG transmission.
The structure of the second selection circuit 105 is shown in fig. 4. The second selection circuit 105 includes a second circuit first pin 401, a second circuit second pin 402, a second circuit third pin 403, a second circuit fourth pin 404, a second circuit fifth pin 405, a second circuit sixth pin 406, a second circuit seventh pin 407, a second circuit eighth pin 408, a second circuit ninth pin 409, and a second circuit tenth pin 410.
The first pin 401 of the second circuit and the second pin 402 of the second circuit are connected to the first selection circuit 104, and the first pin 401 of the second circuit and the second pin 402 of the second circuit are used for receiving the first indication signal.
The second circuit third pin 403 and the second circuit fourth pin 404 correspond to the I2C protocol; the fifth pin 405 of the second circuit and the sixth pin 406 of the second circuit correspond to the UART protocol; the seventh pin 407 of the second circuit and the eighth pin 408 of the second circuit correspond to the USB protocol.
A ninth pin 409 of the second circuit and a tenth pin 410 of the second circuit are connected to the back interface 101.
As shown in fig. 5, the OTG priority selection circuit further includes a power supply unit 106, a third selection circuit 107, and a fourth selection circuit 108.
When the Type-C interface 102 is a transmission interface, the processing unit 103 outputs a first enable signal to the power supply unit 106 and outputs a second enable signal to the third selection circuit 107. The power supply unit 106 outputs a power supply voltage according to the first enable signal. The third selection circuit 107 is configured to output the power supply voltage to the Type-C interface 102 after receiving the second enable signal.
The third selection circuit 107 is shown in fig. 6. The third selection circuit 107 includes a third circuit first pin 601 and a third circuit second pin 602. The first pin 601 of the third circuit is connected to the Type-C interface 102 for outputting a power supply voltage to the Type-C interface 102. The third circuit second pin 602 is connected to the power supply unit 106 for receiving a second enable signal.
When the back interface 101 is a transmission interface, the processing unit 103 outputs a first enable signal to the power supply unit 106 and outputs a third enable signal to the fourth selection circuit 108. The power supply unit 106 outputs a power supply voltage according to the first enable signal. The fourth selection circuit 108 is configured to output the supply voltage to the back interface 101 after receiving the third enable signal.
The fourth selection circuit 108 is shown in fig. 7. The fourth selection circuit 108 comprises a fourth circuit first pin 701 and a fourth circuit second pin 702. The fourth circuit first pin 701 is connected to the back interface 101 for outputting a supply voltage to the back interface 101. The second pin 702 of the fourth circuit is connected to the power supply unit 106 for receiving the third enable signal.
In the embodiment of the application, when the back interface is the transmission interface, the power supply unit only supplies power to the back interface and does not supply power to the Type-C interface; when the Type-C interface is the transmission interface, the power supply unit only supplies power to the Type-C interface and does not supply power to the back interface, so that power supply consumption is effectively reduced.
Fig. 8 shows a structure of a multi-path charging circuit provided in an embodiment of the present application, where the multi-path charging circuit includes a base interface 100, a back interface 101, and a Type-C interface 102.
The base interface 100 is used for transmitting a first power signal input by an external device; the back interface 101 is used for transmitting a second power signal input by the external device; the Type-C interface 102 is used for transmitting a third power signal input by an external device.
The multi-path charging circuit includes a charging switch 109 and a charging unit 110.
A charging switch 109 for communicating the power supply interface with the charging unit 110 according to the power supply priority; the power interface is a base interface 100 or a back interface 101 or a Type-C interface 102.
In this application embodiment, when base interface, back interface and Type-C interface all had power supply signal, the switch that charges selects power supply interface and charging unit intercommunication from base interface, back interface and Type-C interface according to the power supply priority, charges, has solved a plurality of interfaces of present stage and has inserted the unable problem of charging of power supply signal simultaneously.
Alternatively, the charge switch 109 is in an operation state at a low level.
As shown in fig. 9, the charging switch 109 includes a first load switch 1091 between the base interface 100 and the charging unit 110, a second load switch 1092 between the back interface 101 and the charging unit 110, and a third load switch 1093 between the Type-C interface 102 and the charging unit 110; according to the power supply priority, the load switch with the high priority outputs control voltage, and the control voltage is used for controlling the load switch with the low priority to be in an off state.
Alternatively, as shown in fig. 10, the enable terminal 10911 of the first load switch 1091 is grounded by default; the input end 10912 of the first load switch 1091 is connected to the enable end 10921 of the second load switch 1092; the input terminal 10912 of the first load switch is connected to the enable terminal 10931 of the third load switch 1093. The input end 10922 of the second load switch 1092 is connected to the enable end 10931 of the third load switch 1093; the input 10932 of the third load switch 1093 is not connected to any port.
Wherein the priority of the base interface 100 is higher than the priority of the back interface 101, and the priority of the back interface 101 is higher than the priority of the Type-C interface 102.
When the Type-C interface 102 is connected with the power supply first and the back interface 101 is connected with the power supply again, the method comprises the following processes:
when the Type-C interface 102 is connected to the power supply first, the third load switch 1093 of the Type-C interface 102 connects the Type-C interface 102 to the charging unit 110. When the back interface 101 is powered on again, the back interface 101 outputs a control voltage, the control voltage is used for the third load switch 1093 to be in an off state, and the second load switch 1092 of the back interface 101 connects the back interface 101 with the charging unit 110.
Specifically, when the back interface 101 is powered on again, the input end 10922 of the second load switch 1092 corresponding to the back interface 101 outputs a control voltage, so that the voltage of the enable end 10931 of the third load switch 1093 rises, and finally the third load switch 1093 is in an off state.
When the Type-C interface 102 is connected to the power supply first and the base interface 100 is connected to the power supply again, the method comprises the following processes:
when the Type-C interface 102 is connected to the power supply first, the third load switch 1093 of the Type-C interface 102 connects the Type-C interface 102 to the charging unit 110. When the base interface 100 is powered on again, the base interface 100 outputs a control voltage, the control voltage is used for the third load switch 1093 to be in an off state, and the first load switch 1091 of the base interface 100 connects the base interface 100 with the charging unit 110.
Specifically, when the base interface 100 is powered on again, the input end 10912 of the first load switch 1091 corresponding to the base interface 100 outputs a control voltage, so that the voltage of the enable end 10931 of the third load switch 1093 is increased, and finally the third load switch 1093 is in an off state.
When the back interface 101 is first powered on and the base interface 100 is then powered on, the following process is included:
when the back interface 101 is first connected to the power supply, the second load switch 1092 of the back interface 101 connects the back interface 101 to the charging unit 110. When the base interface 100 is powered on again, the base interface 100 outputs a control voltage, the control voltage is used for the second load switch 1092 to be in an off state, and the first load switch 1091 of the base interface 100 connects the base interface 100 with the charging unit 110.
Specifically, when the base interface 100 is powered on again, the input end 10912 of the first load switch 1091 corresponding to the base interface 100 outputs a control voltage, so that the voltage of the enable end 10921 of the second load switch 1092 rises, and finally the second load switch 1092 is in an off state.
When the Type-C interface 102 is connected with the power supply first, the back interface 101 is connected with the power supply, and the base interface 100 is connected with the power supply again, the method comprises the following processes:
when the Type-C interface 102 is connected to the power supply first, the third load switch 1093 of the Type-C interface 102 connects the Type-C interface 102 to the charging unit 110. When the back interface 101 is connected to a power source and the base interface 100 is connected to the power source again, the base interface 100 outputs a control voltage, the control voltage is used for the third load switch 1093 to be in an off state, and the first load switch 1091 of the base interface 100 connects the base interface 100 to the charging unit 110.
Specifically, when the back interface 101 is connected to a power source and the base interface 100 is connected to the power source again, the input end 10912 of the first load switch 1091 corresponding to the base interface 100 outputs a control voltage, so that the voltage of the enable end 10931 of the third load switch 1093 rises, and finally the third load switch 1093 is in an off state.
In the embodiment of the application, when different interfaces are connected to power supplies according to different conditions, the disconnection state of the multi-path charging circuit realizes that the charging switch selects the power supply interface to be communicated with the charging unit from the base interface, the back interface and the Type-C interface according to the power supply priority, and the charging is carried out.
The application protects an electronic device which is a POS machine. The electronic equipment can only comprise the OTG priority selection circuit, can also comprise the multipath charging circuit, and can also comprise the OTG priority selection circuit and the multipath charging circuit.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
Claims (10)
1. An OTG priority selection circuit, comprising: the device comprises a back interface, a Type-C interface, a processing unit and a first selection circuit;
the back interface is used for transmitting a first transmission signal with external equipment;
the Type-C interface is used for transmitting a second transmission signal with external equipment;
the processing unit is configured to determine a USB control signal according to the priorities of the back interface and the Type-C interface and output the USB control signal to the first selection circuit when the first transmission signal and the second transmission signal are detected and the communication Type indicated by the first transmission signal is determined to be a USB protocol;
the first selection circuit is used for determining a transmission interface for OTG transmission with the external equipment according to the USB control signal; the transmission interface is the back interface or the Type-C interface.
2. The OTG priority selection circuit of claim 1, wherein the back interface is prioritized over the Type-C interface; the circuit further comprises a second selection circuit;
the first selection circuit is used for outputting a first indication signal to the second selection circuit according to the USB control signal;
the second selection circuit is configured to instruct, according to the first indication signal, the back interface and the external device to perform OTG transmission according to the USB protocol.
3. The OTG priority selection circuit of claim 1, wherein the processing unit is further configured to output a second indication signal to the second selection circuit when only the first transmission signal is detected and the communication type indicated by the first transmission signal is an I2C protocol; when only the first transmission signal is detected and the communication type indicated by the first transmission signal is a UART protocol, outputting a third indication signal to the second selection circuit;
the second selection circuit is configured to instruct, according to the second indication signal, the back interface and the external device to perform OTG transmission according to the I2C protocol; and according to the third indication signal, indicating the back interface and the external device to perform OTG transmission according to the UART protocol.
4. The OTG priority selection circuit of any of claims 1 to 3 wherein the processing unit is further configured to determine that the back interface is in OTG mode based on a back voltage of the back interface;
and determining that the Type-C interface is in an OTG mode according to CC protocol setting.
5. The OTG priority selection circuit of claim 4, further comprising: the power supply unit, the third selection circuit and the fourth selection circuit;
the processing unit is further configured to output a first enable signal to the power supply unit and output a second enable signal to the third selection circuit when the Type-C interface is the transmission interface; when the back interface is the transmission interface, outputting a first enable signal to the power supply unit and outputting a third enable signal to the fourth selection circuit;
the power supply unit is used for outputting a power supply voltage according to the first enabling signal;
the third selection circuit is configured to output the power supply voltage to the Type-C interface after receiving the second enable signal;
the fourth selection circuit is configured to output the supply voltage to the back interface after receiving the third enable signal.
6. A multi-path charging circuit, comprising:
the charging device comprises a base interface, a back interface, a Type-C interface, a charging switch and a charging unit;
the base interface is used for transmitting a first power supply signal input by external equipment;
the back interface is used for transmitting a second power supply signal input by external equipment;
the Type-C interface is used for transmitting a third power supply signal input by external equipment;
the charging switch is used for communicating a power interface with the charging unit according to the power supply priority; the power interface is the base interface or the back interface or the Type-C interface.
7. The multi-channel charging circuit of claim 6, wherein the charging switch comprises a first load switch between the base interface and the charging unit, a second load switch between the back interface and the charging unit, and a third load switch between the Type-C interface and the charging unit; according to the power supply priority, the load switch with the high priority outputs control voltage, and the control voltage is used for controlling the load switch with the low priority to be in an off state.
8. The multi-channel charging circuit of claim 7 wherein said charging switch is in an on state at a low level;
the enabling end of the first load switch is grounded by default; the input end of the first load switch is connected with the enabling end of the second load switch; the input end of the first load switch is connected with the enabling end of the third load switch;
the input end of the second load is connected with the enabling end of the third load switch; and the input end of the third load switch is not connected.
9. An electronic device comprising an OTG priority selection circuit as claimed in any one of claims 1 to 5 and/or a multiplexing charging circuit as claimed in any one of claims 6 to 8.
10. The electronic device of claim 9, wherein the electronic device is a POS machine.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210765828.0A CN115223310A (en) | 2022-06-30 | 2022-06-30 | OTG priority selection circuit and multichannel charging circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210765828.0A CN115223310A (en) | 2022-06-30 | 2022-06-30 | OTG priority selection circuit and multichannel charging circuit |
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| CN115223310A true CN115223310A (en) | 2022-10-21 |
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| CN202210765828.0A Pending CN115223310A (en) | 2022-06-30 | 2022-06-30 | OTG priority selection circuit and multichannel charging circuit |
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