CN115221824B

CN115221824B - Asynchronous reconstruction method, device and computer equipment

Info

Publication number: CN115221824B
Application number: CN202210846023.9A
Authority: CN
Inventors: 吴少俊; 朱佳明; 吕世猛
Original assignee: Beijing Aurora Xingtong Technology Co ltd
Current assignee: Beijing Aurora Xingtong Technology Co ltd
Priority date: 2022-07-18
Filing date: 2022-07-18
Publication date: 2023-05-02
Anticipated expiration: 2042-07-18
Also published as: CN115221824A

Abstract

The invention discloses an asynchronous reconstruction method, an asynchronous reconstruction device and computer equipment. The asynchronous reconstruction method comprises the following steps: obtaining reconstruction data from a memory, wherein the reconstruction data comprises ELF reconstruction data and/or BIT reconstruction data; and loading the reconstruction data to the target loading position. The invention solves the technical problem that the reconstruction data in the prior art needs to simultaneously transmit ELF data and BIT data, so that the bus is occupied for a long time.

Description

Asynchronous reconstruction method, device and computer equipment

Technical Field

The present invention relates to the field of computer internet, and in particular, to an asynchronous reconstruction method, apparatus, and computer device.

Background

With the unique advantages of the programmability, an FPGA (Field-Programmable Gate Array, field programmable gate array) chip takes a place in the surge of the hundred flowers and the full-fledged chips, and based on the characteristics of flexible design, strong compatibility, parallel computing, strong applicability and the like, the FPGA chip is widely applied to wide industries including network communication, industrial control, consumer electronics, data centers, automotive electronics, artificial intelligence and the like. Wherein a representative FPGA chip is an Xilinx ZYNQ series FPGA SOC, and the architecture of the ZYNQ can be expressed by the following formula: zynq=arm+fpga, where ARM is an application level processor capable of running an operating system like Linux, vxworks, and Xilinx 7 series FPGA architecture can run Programmable Logic (PL). The QSPI start-up procedure of ZYNQ is divided into three phases: stage0, bootROM Stage, stage1, FSBL (First Stage Boot loader) Stage and Stage2, SSBL (Second Stage Boot loader) Stage, wherein bootROM is firmware loaded at the first time after power-on, fixed write is performed for manufacturers, users cannot modify, fixed functions are to load a small amount of data from Flash (nonvolatile memory), stage1 and Stage2 are generated by users and can be configured, and Stage2 contains reconstruction data, including ELF data required by ARM and BIT data required by FPGA.

The conventional reconstruction mode at present uses xilinx SDK tool to generate complete BOOT. Bin file, which contains: FSBL+BIT+ELF, then write BOOT. Bin into the corresponding Flash address through the arbitrary transmission or programming, load the present position Flash data in Stage0 and finish the reconfiguration of the software while starting next time. The above-described reconstruction method has the following drawbacks: 1. taking zynq7100 as an example, the reconstruction data BOOT.bin comprises a BIT file of 16.6MB and an ELF file of 322KB, if the ELF file of 322KB is updated independently, the unmodified BIT file of 16.6MB is packaged together and then is transmitted integrally, and the real effective data comprises the following percentages: 322 KB/(16.6mb+322kb) =1.86%, resulting in a huge waste of data transmission and data storage stages, while current embedded products are increasingly systemized, peripheral devices and loads are increasingly more, and conventional data or communication buses do not allow long-time bus occupation for data transmission.

Aiming at the problem that the reconstruction data in the prior art must transmit ELF data and BIT data simultaneously to cause long-time bus occupation, no effective solution has been proposed at present.

Disclosure of Invention

The embodiment of the invention provides an asynchronous reconstruction method, an asynchronous reconstruction device and computer equipment, which at least solve the technical problem that reconstruction data in the prior art needs to transmit ELF data and BIT data at the same time, so that buses are occupied for a long time.

According to an aspect of an embodiment of the present invention, there is provided an asynchronous reconstruction method, including: obtaining reconstruction data from a memory, wherein the reconstruction data comprises ELF reconstruction data and/or BIT reconstruction data; and loading the reconstruction data to the target loading position.

According to another aspect of the embodiment of the present invention, there is also provided an asynchronous reconstruction apparatus, including: the acquisition module is used for acquiring reconstruction data from the memory, wherein the reconstruction data comprises ELF reconstruction data and/or BIT reconstruction data; and the loading module is used for loading the reconstruction data to the target loading position.

According to another aspect of the embodiments of the present invention, there is also provided a computer device including a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing an asynchronous reconstruction method when executing the program.

In the embodiment of the invention, the reconstruction data comprises ELF reconstruction data and/or BIT reconstruction data by acquiring the reconstruction data from a memory; the method comprises the steps of loading the reconstruction data to a target loading position, and achieving the purposes of selecting an independent reconstruction ELF, an independent reconstruction BIT or simultaneously reconstructing ELF and BIT according to the requirements, so that the size of the reconstruction data is compressed, the bus occupation time is shortened, the technical effect of reducing the error code condition in data transmission is effectively achieved, and the technical problem that the reconstruction data in the prior art must simultaneously transmit ELF data and BIT data to occupy a bus for a long time is solved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiments of the invention and together with the description serve to explain the invention and do not constitute a limitation on the invention. In the drawings:

FIG. 1 is a schematic diagram of an asynchronous reconstruction method according to an embodiment of the present invention;

FIG. 2 is a schematic diagram of an alternative asynchronous reconstruction method according to an embodiment of the present invention;

FIG. 3 is a diagram showing a memory distribution of a Flash according to the prior art;

FIG. 4 is a schematic diagram of an alternative asynchronous reconstruction method according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of an alternative asynchronous reconstruction method according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of an alternative asynchronous reconstruction method according to an embodiment of the present invention;

fig. 7 is a schematic diagram of an asynchronous reconstruction device according to an embodiment of the present invention.

Detailed Description

It should be noted that, in the case of no conflict, the embodiments and features in the embodiments may be combined with each other. The invention will be described in detail below with reference to the drawings in connection with embodiments.

In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

Example 1

According to an embodiment of the present invention, there is provided a method embodiment of an asynchronous reconstruction method, it being noted that the steps illustrated in the flowchart of the figures may be performed in a computer system, such as a set of computer executable instructions, and that, although a logical sequence is illustrated in the flowchart, in some cases, the steps illustrated or described may be performed in a different order than that illustrated herein.

FIG. 1 is an asynchronous reconstruction method according to an embodiment of the present invention, as shown in FIG. 1, comprising the steps of:

step S102, obtaining reconstruction data from a memory, wherein the reconstruction data comprises ELF reconstruction data and/or BIT reconstruction data;

step S104, loading the reconstruction data to the target loading position.

In particular, the embodiment of the invention can be used for a use scenario using ZYNQ series products and having the need of reconstructing software codes. For example, aiming at a satellite product use scene, under the condition that reconstruction software is needed, microwave radio transmission data is generally adopted, and by using the scheme of the application, the transmission data volume can be reduced, so that the effect of compressing the microwave transmission duration is achieved.

In the embodiment of the invention, the reconstruction data comprises ELF reconstruction data and/or BIT reconstruction data by acquiring the reconstruction data from a memory; the method comprises the steps of loading the reconstruction data to a target loading position, and achieving the purposes of selecting an independent reconstruction ELF, an independent reconstruction BIT or simultaneously reconstructing ELF and BIT according to requirements, so that the size of the reconstruction data is compressed, the bus occupation time is shortened, the bus refers to a transmission channel for transmitting the reconstruction data, the technical effect of error code in data transmission is effectively reduced, and the technical problem that the reconstruction data in the prior art must simultaneously transmit ELF data and BIT data to occupy the bus for a long time is solved.

In an alternative embodiment, the memory includes a boot program, a data partition table, an ELF data store, and a BIT data store; the starting program comprises an address of a data partition table, the data partition table comprises an address of an ELF data storage area and an address of a BIT data storage area, the ELF data storage area is used for storing ELF data, and the BIT data storage area is used for storing BIT data.

Alternatively, the memory may be a non-volatile memory Flash, which has the advantage that no power-down data is lost. The boot program may be an FSBL (First Stage Boot loader, first stage boot program), the data partition TABLE may be represented by a TABLE, the FSBL includes an address of the TABLE, and thus reading the TABLE may be implemented, thereby obtaining an address of an ELF data storage area and an address of a BIT data storage area in the TABLE, and reading and loading the ELF data and the BIT data from the Flash.

Optionally, the memory distribution of Flash is shown in fig. 2, where table_0, table_1, and table_2 are collectively called as Table, and FSBL includes a Table address, i.e. a Table addr, and may point to an address of a start position of table_0, table_1, and table_2; in addition to the TABLE storing the address of the data memory area of the ELF, namely the address of the data memory area of the ELF, specifically the start address of the data memory area of the ELF, and the address of the data memory area of the BIT, namely the address of the start address of the data memory area of the BIT, specifically the start address of the data memory area of the BIT, the size of the data of the ELF and the BIT and the target loading position to be loaded are stored in the TABLE, the data memory area of the elf_0, the data_1, the data_2 of the ELF are shown, and the data memory area of the BIT0, the BIT1, the BIT2 of the BIT are shown. In the memory distribution, table_0, elf_0 and bit_0 are read-only areas, and cannot be reconstructed, as in the memory distribution of Flash shown in fig. 2, the maximum utilization of Flash space can be realized.

It should be specifically noted that, fig. 3 is a memory distribution diagram of a Flash in the prior art, and as can be seen from fig. 3, in the conventional manner, the boot. Bins are completely isolated from each other, and the ELF data and the BIT data can only act on the boot. Bin where they are located, but cannot cross to other boot. Bins; by adopting the memory distribution mode of Flash, ELF data and BIT data can be arbitrarily combined, and the configuration is more flexible.

In an alternative embodiment, the retrieving the reconstruction data from the memory in step S102 includes:

step S202, obtaining the address of a data partition table from a starting program;

step S204, the address of the ELF data storage area and/or the address of the BIT data storage area in the data partition table are obtained according to the address of the data partition table;

step S206, obtaining the reconstruction data according to the address of the ELF data storage area and/or the address of the BIT data storage area.

Alternatively, in the case where the reconfiguration data is already contained in the memory, the overall process applied to the ZYNQ series product to acquire and load the reconfiguration data from the memory may include a bootROM stage, an FSBL stage, and a user application stage as shown in fig. 4; step S202 is a bootROM stage before the address of the data partition table is obtained from the boot program, specifically, after the bootROM reads the boot image from Flash, the boot program FSBL is loaded into an OCM (On Chip Memory), the CPU (central processing unit) jumps to the 0 address of the OCM to start executing the boot program FSBL, and the conventional initialization work is finished in the FSBL first; the FSBL stage comprises: step S202, obtaining addresses of a data partition Table from a starting program, specifically selecting one of a plurality of Table addr registers in an FSBL, extracting a pointing address of the selected Table addr register, and then reading a Table Table with a specified length from the obtained address, namely reading Table_0, table_1, table_2 and the like; the FSBL stage also includes: step S204, the address of the ELF data storage area and/or the address of the BIT data storage area in the data partition table are obtained according to the address of the data partition table; specifically, the ELF data initial address, length and target loading position to be loaded are stored in the table_0, the table_1 and the table_2, the corresponding positions of the ELF data storage area and the BIT data storage area in Flash, namely the address of the ELF data storage area and the address of the BIT data storage area, can be calculated according to the information, and the address of the ELF data storage area in the data partition Table can be obtained according to the reconstruction requirement, or the address of the BIT data storage area can be obtained, or both the address of the ELF data storage area and the address of the BIT data storage area can be obtained; the FSBL stage also includes: step S206, obtaining reconstruction data according to the address of the ELF data storage area and/or the address of the BIT data storage area; the FSBL stage also includes: in step S104, the reconstructed data is loaded to a target loading location, specifically, the ELF reconstructed data and/or the BIT reconstructed data is loaded to the target loading location, where the target loading location may be an OCM or an external DDR (double rate synchronous dynamic random memory), and the FSBL stage is ended, and jumps to the user application stage to complete loading.

In the above alternative, the OCM and the CPU are both components of the ZYNQ series products.

In an alternative embodiment, the obtaining the reconstruction data according to the address of the ELF data storage area and/or the address of the BIT data storage area in step S206 includes:

step S302, when the reconstructed data is ELF reconstructed data, acquiring ELF reconstructed data stored in an ELF data storage area according to the address of the ELF data storage area;

step S304, under the condition that the reconstruction data is BIT reconstruction data, acquiring BIT reconstruction data stored in a BIT data storage area according to the address of the BIT data storage area;

in step S306, in the case that the reconstructed data is the ELF reconstructed data and the BIT reconstructed data, the ELF reconstructed data stored in the ELF data storage area is obtained according to the address of the ELF data storage area, and the BIT reconstructed data stored in the BIT data storage area is obtained according to the address of the BIT data storage area.

The embodiment can realize that when the reconstruction data is ELF reconstruction data, specific situations, such as ELF data update, need reconstruction, and BIT data do not update and need reconstruction, only ELF data can be acquired without acquiring BIT data again; similarly, in the case that the reconstructed data is BIT reconstructed data, a specific scenario, for example, when BIT data is updated and needs to be reconstructed, and if ELF data is not updated and needs not to be reconstructed, only BIT data can be acquired without acquiring ELF data again, so that the effects of acquiring and loading ELF data and BIT data which are matched at will are achieved.

In an alternative embodiment, if the step S102 fails to obtain the reconfiguration data from the memory for a preset number of times, the preset ELF data and BIT data are obtained, so as to ensure that the system operates normally and has the capability of continuing to reconfigure.

In an alternative embodiment, before the step S102 of obtaining the reconstruction data from the memory, the method further comprises:

in step S402, the reconstructed data stored in the boot image is programmed into the memory.

Specifically, after the Zynq series products develop application software by using the self-contained development environment, a boot image BOOT. Bin containing ELF data and BIT data files can be selectively generated, and after the boot image is programmed into the memory Flash, power-on self-starting can be performed.

Optionally, as shown in fig. 5, the process of regenerating the data in the memory, that is, the process of writing the reconstructed data stored in the boot image into the memory, includes the following steps:

1. a Boot Header (mirror Header) containing offset addresses of Image Header Table (mirror data zone table) and Partition Header Table (mirror partition table) is obtained from the Boot.

2. The DATA of Partition Header Table is obtained according to the offset address of Partition Header Table, which includes the storage location and size of the Partition 1 DATA (mirror DATA 1, usually FSBL), the Partition 2 DATA (mirror DATA 2, usually BIT) and the Partition 3 DATA (mirror DATA 3, usually ELF) in the current boot.

3. Reading DATA according to the storage positions and sizes of the Partition 1 DATA, the Partition 2 DATA and the Partition 3 DATA, and storing the DATA as separate DATA files respectively, wherein the Partition 1 DATA corresponds to FSBL DATA, the Partition 2 DATA corresponds to ELF DATA, and the Partition 3 DATA corresponds to BIT DATA, and optionally, the FSBL DATA is general DATA, so that each extraction is not required, and therefore, only the Partition 2 DATA and the Partition 3 DATA can be extracted and stored as ELF DATA and BIT DATA.

4. And writing a TABLE file according to the storage positions of the pre-planned ELF data and the BIT data file (the ELF and BIT data can be stored in any position of an ELF partition and a BIT partition in Flash), wherein the file contains the parameters such as the initial address, the length, the loading target position and the like of the pre-planned ELF and BIT data file, and the TABLE file is also generated into a corresponding data file.

The above steps generate TABLE, ELF, BIT three files, and the divided areas can be arranged according to the Flash memory distribution, and if the update occurs later, step S402 needs to be executed, and the updated reconstruction data is written into the memory, i.e. the reconstruction data stored in the boot image is written into the memory.

In an alternative embodiment, where the reconstructed data is ELF reconstructed data, step S402 includes programming the reconstructed data stored in the boot image into memory including:

step S502, the memory acquires ELF reconstruction data stored in the boot image;

step S504, generating a data partition table according to the size of ELF reconstruction data and the address of an ELF data storage area;

step S506, the data partition table is programmed according to the address of the data partition table, and ELF reconstruction data is programmed according to the address of the ELF data storage area.

Specifically, as shown in fig. 6, when the reconstructed data is the ELF reconstructed data, that is, when only the ELF data is updated, after the software modification is completed, a boot image is generated, the ELF data and BIT data in the boot image are extracted and respectively stored, and according to the positions of the elf_1 and bit_2 and the current size of the ELF data and BIT data in the Flash memory allocation TABLE, a TABLE file is written and stored, and the TABLE file is written to the position of the table_1 in the Flash distribution TABLE; and writing ELF data into the ELF_1 position in the Flash distribution table. That is, the independent reconstruction of the ELF data can be carried out without loading BIT data, compared with the traditional reconstruction mode which needs to carry out the whole BOOT.bin reconstruction, the Zynq series z7100 product is taken as an example, and the method is as follows: (1-ELF data size/(BIT data size+elf data size) = (1-322 KB/(16.6mb+322 KB)) = (100% = 98.14), 98.14% of the reconstructed data size may be compressed, where 322KB is an empirical value, and according to the current engineering empirical software, the actual size is about 322KB, and 16.6MB is the fixed BIT size of the current serial chip, and is fixed and unchanged.

As shown in the following diagram, the BOOT. Bin in the conventional mode is completely isolated, and ELF and BIT files only act on the current BOOT. Bin and cannot be used in a crossing way; the design scheme of the patent can be used for arbitrary combination of ELF and BIT files, and is flexible in configuration

In an alternative embodiment, in the case where the reconstructed data is BIT reconstructed data, step S402 includes writing the reconstructed data stored in the boot image to the memory:

step S602, the memory acquires BIT reconstruction data stored in the boot image;

step S604, a data partition table is generated according to the size of BIT reconstruction data and the address of a BIT data storage area;

step S606, the data partition table is programmed according to the address of the data partition table, and BIT reconstruction data is programmed according to the address of the BIT data storage area.

Similarly, in the case where the reconstructed data is BIT reconstructed data, that is, only BIT data is updated, the individual reconstructed BIT data may be loaded with individual BIT data, without loading the ELF data.

In an alternative embodiment, in the case that the reconstructed data is the ELF reconstructed data and the BIT reconstructed data, step S402 includes writing the reconstructed data stored in the boot image to the memory:

step S702, the memory acquires ELF reconstruction data and BIT reconstruction data stored in the boot image;

step S704, a data partition table is generated according to the size of ELF reconstruction data, the address of the ELF data storage area, the size of BIT reconstruction data and the address of the BIT data storage area;

step S706, writing the ELF reconstruction data according to the address of the data partition table, and writing the BIT reconstruction data according to the address of the BIT data storage area.

According to the 3 embodiments, compared with the prior art which wants to update ELF data or BIT data independently, ELF+BIT data is required to be repackaged into BOOT. Bin, flash space is occupied even if BIT data or ELF data therein is unchanged, and the invention can realize independent reconstruction of ELF, independent reconstruction of BIT or simultaneous reconstruction of ELF and BIT according to the flexibility of requirements, so that Flash space is more optimized, multiple addresses are avoided from being occupied by repeated files, program loading is more flexible, and different ELF data and BIT data can be selected to operate in cooperation with each other so as to meet different functional requirements of different working occasions.

Example 2

According to an embodiment of the present invention, there is provided a product embodiment of an asynchronous reconstruction device, and fig. 7 is an asynchronous reconstruction device according to an embodiment of the present invention, as shown in fig. 7, the device includes an acquisition module and a loading module, where the acquisition module is configured to acquire reconstruction data from a memory, where the reconstruction data includes an ELF reconstruction data and/or a BIT reconstruction data; and the loading module is used for loading the reconstruction data to the target loading position.

Here, it should be noted that the above-mentioned acquiring module and loading module correspond to step S102 to step S104 in embodiment 1, and the above-mentioned modules are the same as examples and application scenarios implemented by the corresponding steps, but are not limited to those disclosed in embodiment 1. It should be noted that the modules described above may be implemented as part of an apparatus in a computer system, such as a set of computer-executable instructions.

In an alternative embodiment, the acquisition modules include a first acquisition module, a second acquisition module, and a third acquisition module; the first acquisition module is used for acquiring the address of the data partition table from the starting program; the second acquisition module is used for acquiring the address of the ELF data storage area and/or the address of the BIT data storage area in the data partition table according to the address of the data partition table; and the third acquisition module is used for acquiring the reconstruction data according to the address of the ELF data storage area and/or the address of the BIT data storage area.

Here, it should be noted that the first, second, and third acquisition modules correspond to steps S202 to S206 in embodiment 1, and the modules are the same as examples and application scenarios implemented by the corresponding steps, but are not limited to those disclosed in embodiment 1. It should be noted that the modules described above may be implemented as part of an apparatus in a computer system, such as a set of computer-executable instructions.

In an optional embodiment, the third obtaining module includes a fourth obtaining module, a fifth obtaining module, and a sixth obtaining module, where the fourth obtaining module is configured to obtain, according to an address of the ELF data storage area, the ELF reconstruction data stored in the ELF data storage area when the reconstruction data is the ELF reconstruction data; a fifth obtaining module, configured to obtain, according to the address of the BIT data storage area, BIT reconstruction data stored in the BIT data storage area when the reconstruction data is BIT reconstruction data; and a sixth acquisition module, configured to acquire the ELF reconstruction data stored in the ELF data storage area according to the address of the ELF data storage area and acquire the BIT reconstruction data stored in the BIT data storage area according to the address of the BIT data storage area when the reconstruction data is the ELF reconstruction data and the BIT reconstruction data.

Here, it should be noted that the first, second, and third acquisition modules correspond to steps S302 to S306 in embodiment 1, and the modules are the same as examples and application scenarios implemented by the corresponding steps, but are not limited to those disclosed in embodiment 1. It should be noted that the modules described above may be implemented as part of an apparatus in a computer system, such as a set of computer-executable instructions.

In an alternative embodiment, the apparatus further comprises: and the programming module is used for programming the reconstruction data stored in the starting mirror image into the memory before the acquisition module acquires the reconstruction data from the memory.

Here, the programming module corresponds to step S402 in embodiment 1, and the module is the same as the example and application scenario implemented by the corresponding step, but is not limited to the disclosure of embodiment 1. It should be noted that the modules described above may be implemented as part of an apparatus in a computer system, such as a set of computer-executable instructions.

In an alternative embodiment, in the case that the reconstructed data is the ELF reconstructed data, the programming module includes a seventh obtaining module, a first generating module, and a first programming module, where the seventh obtaining module is configured to enable the memory to obtain the ELF reconstructed data stored in the boot image; the first generation module is used for generating a data partition table according to the size of ELF reconstruction data and the address of an ELF data storage area; the first programming module is used for programming the data partition table according to the address of the data partition table and programming ELF reconstruction data according to the address of the ELF data storage area.

Here, the seventh obtaining module, the first generating module, and the first writing module correspond to steps S502 to S506 in embodiment 1, and the modules are the same as examples and application scenarios implemented by the corresponding steps, but are not limited to those disclosed in embodiment 1. It should be noted that the modules described above may be implemented as part of an apparatus in a computer system, such as a set of computer-executable instructions.

In an optional embodiment, in a case where the reconstructed data is BIT reconstructed data, the programming module includes an eighth obtaining module, a second generating module, and a second programming module, where the eighth obtaining module is configured to enable the memory to obtain BIT reconstructed data stored in the boot image; the second generation module is used for generating a data partition table according to the size of BIT reconstruction data and the address of a BIT data storage area; the second programming module is used for programming the data partition table according to the address of the data partition table and programming BIT reconstruction data according to the address of the BIT data storage area.

Here, the eighth obtaining module, the second generating module, and the second writing module correspond to steps S602 to S606 in embodiment 1, and the above modules are the same as examples and application scenarios implemented by the corresponding steps, but are not limited to those disclosed in embodiment 1. It should be noted that the modules described above may be implemented as part of an apparatus in a computer system, such as a set of computer-executable instructions.

In an optional embodiment, in a case that the reconstructed data is the ELF reconstructed data and the BIT reconstructed data, the programming module includes a ninth obtaining module, a third generating module, and a third programming module, where the ninth obtaining module is configured to enable the memory to obtain the ELF reconstructed data and the BIT reconstructed data stored in the boot image; the third generation module is used for generating a data partition table according to the size of ELF reconstruction data, the address of an ELF data storage area, the size of BIT reconstruction data and the address of a BIT data storage area; and the third programming module is used for programming the data partition table according to the address of the data partition table, programming ELF reconstruction data according to the address of the ELF data storage area, and programming BIT reconstruction data according to the address of the BIT data storage area.

Here, the ninth obtaining module, the third generating module, and the third writing module correspond to steps S702 to S706 in embodiment 1, and the above modules are the same as examples and application scenarios implemented by the corresponding steps, but are not limited to those disclosed in embodiment 1. It should be noted that the modules described above may be implemented as part of an apparatus in a computer system, such as a set of computer-executable instructions.

Example 3

According to an embodiment of the present invention, there is provided a storage medium including a stored program, wherein the device in which the storage medium is controlled to execute the asynchronous reconstruction method as described in embodiment 1 when the program runs.

Example 4

According to an embodiment of the present invention, there is provided a processor for running a program, wherein the program runs while performing the asynchronous reconstruction method as described in embodiment 1.

Example 5

According to an embodiment of the present invention, there is provided a computer device including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the asynchronous reconstruction method described in the above embodiment 1.

Example 6

According to the embodiment of the invention, the terminal comprises an acquisition module, a loading module and a processor, wherein the acquisition module is used for acquiring reconstruction data from a memory, and the reconstruction data comprises ELF reconstruction data and/or BIT reconstruction data; the loading module is used for loading the reconstruction data to the target loading position; a processor that runs a program, wherein the program runs an asynchronous reconstruction method as described in embodiment 1 on data output from the acquisition module and the loading module.

Example 7

According to an embodiment of the invention, a terminal is provided, which is characterized by comprising an acquisition module, a loading module and a storage medium, wherein the acquisition module is used for acquiring reconstruction data from a memory, and the reconstruction data comprises ELF reconstruction data and/or BIT reconstruction data; the loading module is used for loading the reconstruction data to the target loading position; a storage medium storing a program, wherein the program performs an asynchronous reconstruction method as described in embodiment 1 on data output from the acquisition module and the loading module at run-time.

The foregoing embodiment numbers of the present invention are merely for the purpose of description, and do not represent the advantages or disadvantages of the embodiments.

In the foregoing embodiments of the present invention, the descriptions of the embodiments are emphasized, and for a portion of this disclosure that is not described in detail in this embodiment, reference is made to the related descriptions of other embodiments.

In the several embodiments provided in the present application, it should be understood that the disclosed technology content may be implemented in other manners. The above-described embodiments of the apparatus are merely exemplary, and the division of the units, for example, may be a logic function division, and may be implemented in another manner, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some interfaces, units or modules, or may be in electrical or other forms.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.

The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied essentially or in part or all of the technical solution or in part in the form of a software product stored in a storage medium, including instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing program codes.

The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.

Claims

1. An asynchronous reconstruction method, comprising:

obtaining reconstruction data from a memory, wherein the reconstruction data comprises ELF reconstruction data and/or BIT reconstruction data;

loading the reconstruction data to a target loading position;

the memory comprises a starting program, a data partition table, an ELF data storage area and a BIT data storage area, wherein the starting program comprises an address of the data partition table, the data partition table comprises an address of the ELF data storage area and an address of the BIT data storage area, the ELF data storage area is used for storing ELF data, and the BIT data storage area is used for storing BIT data.

2. The method of claim 1, wherein the retrieving the reconstructed data from the memory comprises:

acquiring the address of the data partition table from the starting program;

acquiring the address of the ELF data storage area and/or the address of the BIT data storage area in the data partition table according to the address of the data partition table;

and acquiring the reconstruction data according to the address of the ELF data storage area and/or the address of the BIT data storage area.

3. The method of claim 2, wherein the retrieving the reconstructed data based on the address of the ELF data storage area and/or the address of the BIT data storage area comprises:

acquiring ELF reconstruction data stored in the ELF data storage area according to the address of the ELF data storage area under the condition that the reconstruction data is ELF reconstruction data;

under the condition that the reconstruction data is BIT reconstruction data, acquiring the BIT reconstruction data stored in the BIT data storage area according to the address of the BIT data storage area;

and under the condition that the reconstruction data are ELF reconstruction data and BIT reconstruction data, acquiring the ELF reconstruction data stored in the ELF data storage area according to the address of the ELF data storage area, and acquiring the BIT reconstruction data stored in the BIT data storage area according to the address of the BIT data storage area.

4. A method according to any one of claims 1-3, wherein prior to said retrieving the reconstructed data from memory, the method further comprises:

the reconstructed data stored in the boot image is programmed into the memory.

5. The method of claim 4, wherein, in the case where the reconstructed data is an ELF reconstructed data, the programming the reconstructed data stored in the boot image into the memory comprises:

the memory obtains the ELF reconstruction data stored in the boot image;

generating the data partition table according to the size of the ELF reconstruction data and the address of the ELF data storage area;

and programming the data partition table according to the address of the data partition table, and programming the ELF reconstruction data according to the address of the ELF data storage area.

6. The method of claim 4, wherein, in the case where the reconstructed data is BIT reconstructed data, the programming the reconstructed data stored in the boot image into the memory comprises:

the memory acquires the BIT reconstruction data stored in the boot image;

generating the data partition table according to the size of the BIT reconstruction data and the address of the BIT data storage area;

and programming the data partition table according to the address of the data partition table, and programming the BIT reconstruction data according to the address of the BIT data storage area.

7. The method of claim 4, wherein, in the case where the reconstructed data is the ELF reconstructed data and the BIT reconstructed data, the programming the reconstructed data stored in the boot image into the memory comprises:

the memory acquires the ELF reconstruction data and the BIT reconstruction data stored in the boot image;

generating the data partition table according to the size of the ELF reconstruction data, the address of the ELF data storage area, the size of the BIT reconstruction data and the address of the BIT data storage area;

and programming the data partition table according to the address of the data partition table, programming the ELF reconstruction data according to the address of the ELF data storage area, and programming the BIT reconstruction data according to the address of the BIT data storage area.

8. An asynchronous reconstruction device, comprising:

the acquisition module is used for acquiring reconstruction data from the memory, wherein the reconstruction data comprises ELF reconstruction data and/or BIT reconstruction data;

the loading module is used for loading the reconstruction data to a target loading position;

9. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the asynchronous reconstruction method of any one of claims 1 to 7 when the program is executed by the processor.