CN115117152A - Reverse conducting IGBT device and preparation method thereof - Google Patents

Reverse conducting IGBT device and preparation method thereof Download PDF

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Publication number
CN115117152A
CN115117152A CN202211030903.5A CN202211030903A CN115117152A CN 115117152 A CN115117152 A CN 115117152A CN 202211030903 A CN202211030903 A CN 202211030903A CN 115117152 A CN115117152 A CN 115117152A
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region
diode
igbt
well region
cellular
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马千成
刘杰
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Shenzhen Xiner Semiconductor Technology Co Ltd
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Shenzhen Xiner Semiconductor Technology Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
    • H01L27/0727—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
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    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
    • H01L29/66333—Vertical insulated gate bipolar transistors
    • H01L29/66348—Vertical insulated gate bipolar transistors with a recessed gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7398—Vertical transistors, e.g. vertical IGBT with both emitter and collector contacts in the same substrate side
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/872—Schottky diodes

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Abstract

The invention discloses a reverse conducting IGBT device and a preparation method thereof, relating to the technical field of IGBT manufacturing, wherein the reverse conducting IGBT device comprises: IGBT cellular region and diode cellular region, diode cellular region includes: a substrate; the drift region is arranged on the upper surface of the substrate; the first metal silicide is arranged on the upper surface of the drift region, the first metal silicide is in direct contact with the drift region to form Schottky contact, a Schottky diode structure is formed, and a well region is not arranged in the Schottky diode structure; because the Schottky diode has smaller conduction voltage drop when being conducted, the reverse conducting IGBT has smaller loss when in normal operation.

Description

Reverse conducting IGBT device and preparation method thereof
Technical Field
The invention relates to the technical field of IGBT manufacturing, in particular to a reverse conducting type IGBT device and a preparation method thereof.
Background
Insulated Gate Bipolar Transistors (IGBTs) are key semiconductor components in power systems and are widely applied to various high-voltage power control systems, and specific application circuits generally require that the IGBTs have bidirectional conduction capability, but the traditional IGBT device is a unidirectional conduction device, which requires that the IGBTs have to be reversely connected with a diode in parallel to meet the application of the power systems, thereby increasing the complexity of the power system circuits and the hardware cost.
In order to solve the above problems, in the prior art, a reverse conducting IGBT is manufactured, an N-type impurity is doped at a back surface of a conventional IGBT device, a coexisting form of the N-type impurity and a P-type impurity is formed at the back surface, and a diode cathode structure and a diode anode structure are respectively formed in an N-type impurity region at the back surface and a P-type impurity region at the front surface; compared with the traditional IGBT, the reverse conducting type IGBT integrates the diode characteristic, is independently used in application, does not need to be connected with a diode in parallel, greatly simplifies the complexity of a system and further reduces the application cost; however, the conventional PN junction diode is integrated by the method, and the loss of the diode is large when the diode is conducted due to the large conduction voltage drop of the diode, so that the loss of the reverse conducting type IGBT is large when the reverse conducting type IGBT works.
Disclosure of Invention
Therefore, it is necessary to provide a reverse conducting IGBT device and a manufacturing method thereof to solve the problem of large operating loss of the reverse conducting IGBT in the prior art.
In a first aspect, the present invention provides a reverse conducting IGBT device, including:
IGBT cellular region and diode cellular region, diode cellular region includes:
a substrate;
the drift region is arranged on the upper surface of the substrate;
the first metal silicide is arranged on the upper surface of the drift region, and is in direct contact with the drift region to form Schottky contact so as to form a Schottky diode structure, and a well region is not arranged in the Schottky diode structure.
The scheme has the following beneficial effects:
according to the reverse conducting type IGBT device, the Schottky diode is used for replacing a conventional PN junction diode, and the conduction voltage drop of the Schottky diode is smaller than that of the conventional PN junction diode when the reverse conducting type IGBT device works normally, so that the loss generated by the conduction voltage drop of the diode is greatly reduced when the reverse conducting type IGBT device works normally, and the integral loss of the reverse conducting type IGBT device when the reverse conducting type IGBT device works is reduced.
Optionally, the diode cell region further includes:
the oxide dielectric layer is arranged on the upper surface of the drift region in the diode cellular region;
the first metal contact hole is formed in an oxide dielectric layer in the diode cell area, and the first metal silicide is arranged at the bottom of the oxide dielectric layer;
a first top layer metal disposed on an upper surface of the first metal silicide.
Optionally, the IGBT cell area includes:
a substrate;
the drift region is arranged on the upper surface of the substrate;
the well region is arranged on the upper surface of the drift region;
the first conduction type heavily doped region is arranged on the upper surface of the well region, and the bottom of the first conduction type heavily doped region extends to the inside of the well region;
the source region is arranged on the upper surface of the well region;
a trench structure disposed within the drift region;
a polysilicon layer disposed within the trench structure;
the second metal silicide is arranged on the upper surface of the first conduction type heavily doped region;
the oxide dielectric layer is arranged on the upper surfaces of the source region and the polycrystalline silicon layer;
the second metal contact hole is formed in the oxide dielectric layer in the IGBT cellular area, and the second metal silicide is arranged at the bottom of the oxide dielectric layer;
a second top metal disposed on an upper surface of the second metal silicide.
Optionally, a well region plane formed by the well region of the IGBT cell region, the first well region of the diode cell region, and the second well region is in a shape of a Chinese character 'ao', so that a sufficient diode region is left for the schottky diode structure on the well region plane.
Optionally, the diode area is rectangular, the width of the diode area is a planar well area distance between a first well area and a second well area of the diode unit cell area, and the planar well area distance is determined according to a leakage current preset value of the schottky diode structure.
Optionally, the IGBT cell area further includes:
the buffer layer is arranged on the lower surface of the substrate;
and the collector region is arranged on the lower surface of the buffer layer corresponding to the IGBT cellular region.
Optionally, the diode cell region further includes:
the buffer layer is arranged on the lower surface of the substrate;
and the cathode region is arranged on the lower surface of the buffer layer corresponding to the diode region. In a second aspect, the present invention provides a method for manufacturing a reverse conducting IGBT device, including:
providing a substrate, and arranging a drift region on the upper surface of the substrate, wherein the drift region is of an N-type;
forming a groove structure on the upper surface of the drift region in the IGBT cellular region, and filling a polycrystalline silicon layer in the groove structure to form a grid;
forming a well region on the upper surface of the substrate in the IGBT cellular region by using a set well region pattern, wherein the well region is a P-type well region;
performing ion implantation of a first conductivity type in the upper surface of the well region to form a first conductivity type heavily doped region;
performing ion implantation of a second conductive type on the upper surface of the well region to form a source region;
depositing an oxide dielectric layer on the upper surfaces of the polycrystalline silicon layer, the first conductive type heavily doped region, the source region and the diode cell region inner substrate;
forming a first metal contact hole in an oxide dielectric layer in the diode cell region, wherein the bottom of the first metal contact hole extends into a drift region in the diode cell region; forming a second metal contact hole in the oxide dielectric layer in the IGBT cellular region, wherein the bottom of the second metal contact hole extends into the drift region of the IGBT cellular region;
forming a first metal silicide at the bottom of the first metal contact hole, and forming a second metal silicide at the bottom of the second metal contact hole;
and forming a first top layer metal on the upper surface of the first metal silicide, and forming a second top layer metal on the upper surface of the second metal silicide to obtain an IGBT cellular area, wherein a Schottky diode structure is arranged in the diode cellular area, and a well region is not arranged in the Schottky diode structure.
The scheme has the following beneficial effects:
according to the preparation method of the reverse conducting type IGBT device, the Schottky diode is integrated into the IGBT through a preset well region graph, an IGBT cellular region and a diode cellular region are divided in the well region graph, the injection of first conducting type ions in the diode cellular region is shielded through the well region graph, the first conducting type ions are injected only in the IGBT region, then the metal silicide is arranged in the diode cellular region, and a Schottky diode structure is formed with the drift region, so that the reverse conducting type IGBT integrated with the Schottky diode is obtained; the reverse conducting IGBT prepared by the method has small loss in normal operation.
Optionally, a planar shape of the well region pattern is a shape of a Chinese character 'ao', so that a sufficient diode region is left on the plane of the well region for the schottky diode structure.
Optionally, the method for manufacturing the reverse conducting IGBT device further includes the step of manufacturing a PN junction diode in the diode cell region:
forming a first well region and a second well region in the diode cellular region by using a set well region pattern, so that a well region plane formed by the well region of the IGBT cellular region, the first well region of the diode cellular region and the second well region is in a concave shape;
forming a third metal contact hole in an oxide dielectric layer corresponding to the first well region in the diode cellular region, and forming a fourth metal contact hole in an oxide dielectric layer corresponding to the second well region in the diode cellular region;
injecting P + ions into the upper surfaces of the drift regions at the bottoms of the third metal contact hole and the fourth metal contact hole to form a third metal silicide, wherein the third metal silicide forms ohmic contact with the drift regions in the diode cell region;
and the P + ions, the P-type well region in the diode cellular region and the N-type drift region form a PN junction diode.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive labor.
Fig. 1 is a schematic structural diagram of a first reverse conducting IGBT provided in an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a second reverse conducting IGBT according to an embodiment of the present invention;
fig. 3 is a schematic plan view of a reverse conducting IGBT according to an embodiment of the present invention;
fig. 4 is a flowchart of a method for manufacturing a reverse conducting IGBT device according to an embodiment of the present invention;
the symbols are as follows:
A. an IGBT cell area; b diode cell area; 1. a substrate; 2. a drift region; 3. a groove structure, 4, a polysilicon layer; 5. a well region; 51. a well region of the IGBT cellular region; 52. a first well region of the diode cell region; 53. a second well region of the diode cell region; 6. a first conductive type heavily doped region; 7. a source region; 8. metal contact holes in IGBT cellular areas; 9. top layer metal of the IGBT cellular region; 10. IGBT cellular region metal silicide; 11. a diode region metal contact hole; 12. a top metal of the diode region; 13. metal silicide of diode region; 14. an oxide dielectric layer; 15. a buffer layer; 16. an IGBT collector region; 17. a diode cathode region; 18. a Schottky diode region.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention.
In an embodiment, there is provided a structure of a reverse conducting IGBT as shown in fig. 1, the reverse conducting IGBT including an IGBT cell region a and a diode cell region B, wherein the diode cell region B includes:
the substrate 1 may be silicon (Si) material, but the substrate 1 may also be any other material suitable for manufacturing a reverse conducting IGBT, such as germanium (Ge), silicon carbide (SiC), and the like.
And a drift region 2, wherein the drift region 2 is arranged on the upper surface of the substrate 1.
And the diode area metal silicide 13 is arranged on the upper surface of the drift area 2, the diode area metal silicide 13 is directly contacted with the drift area 2 to form Schottky contact, a Schottky diode structure is formed, and a region corresponding to the Schottky diode structure is not provided with a well region.
The IGBT cellular region A of the reverse conducting type IGBT device can realize forward conduction of reverse conducting type IGBT current, and the Schottky diode structure formed by the diode region metal silicide 13 and the drift region 2 in the diode cellular region B realizes reverse conduction of the reverse conducting type IGBT current when conducting.
The reverse conducting type IGBT of the embodiment uses the Schottky diode to replace a conventional PN junction diode, and during normal work, the conduction voltage drop of the Schottky diode is smaller than that of the conventional PN junction diode, so that during normal work of the reverse conducting type IGBT, the loss generated by the conduction voltage drop of the diode is greatly reduced, and the integral loss of the reverse conducting type IGBT during work is reduced.
In an embodiment, there is provided a structure of a reverse conducting IGBT as shown in fig. 2, the reverse conducting IGBT including an IGBT cell region a and a diode cell region B, wherein the structure and position of the IGBT cell region a and the diode cell region B are the same as those of the IGBT cell region a and the diode cell region B in fig. 1, except that the diode cell region B further includes: the diode area comprises an oxide dielectric layer 14, a diode area metal contact hole 11 and a diode area top layer metal 12, wherein the oxide dielectric layer 14 is arranged on the upper surface of a drift area in a diode cell area B; the material of the oxide dielectric layer 14 may be silicon oxide, for example, silicon dioxide.
The diode area metal contact hole 11 is arranged in the oxide dielectric layer 14, and the diode area top metal 12 is arranged on the upper surface of the diode area metal silicide 13, is positioned in the diode area metal contact hole 11, and is tightly attached to the diode area metal silicide 13 to form conductive connection.
In this embodiment, the diode cell region B further includes: the diode comprises a buffer layer 15 and a diode cathode region 17, wherein the buffer layer 15 is arranged on the lower surface of the substrate 1 of the diode cell region B, and the diode cathode region 17 is arranged on the diode cell region B corresponding to the lower surface of the buffer layer 15; in this embodiment, the buffer layer 15 is formed by N-type light doping, and the diode cathode region 17 is formed by N-type heavy doping.
In this embodiment, the IGBT cell area a includes: the semiconductor device comprises a substrate 1, a drift region 2, a well region 51 of an IGBT cellular region, a first conductive type heavily doped region 6, a source region 7, a trench structure 3, a polycrystalline silicon layer 4, an IGBT cellular region metal silicide 10, an oxide dielectric layer 14, an IGBT cellular region metal contact hole 8 and an IGBT cellular region top layer metal 9, wherein the substrate 1 is the same as the substrate 1 in the figure 1 and can be made of the same material; the drift region 2 is disposed on the upper surface of the substrate 1.
A groove structure 3 with a preset width is arranged in the drift region 2, and the groove structure 3 is arranged in the IGBT cellular region A; the groove structure 3 is filled with a polycrystalline silicon layer 4 to form a grid electrode of the reverse conducting IGBT, and a grid dielectric layer is arranged between the inner wall of the groove structure 3 and the polycrystalline silicon layer 4.
The well region 5 is arranged on the upper surface of the drift region 2, and the well region 5 is formed by P-type doping; referring to fig. 3, a schematic plane structure diagram of a reverse conducting IGBT provided in this embodiment is shown, in which a planar shape of the well region 5 is a concave shape, the well region 5 includes a well region 51 of an IGBT cell region, a first well region 52 of a diode cell region, and a second well region 53 of the diode cell region, a well region interval is provided in a region of the diode cell region B, a schottky diode region 18 is provided in the interval, a schottky diode structure is provided in the region, upper and lower sides of the well region interval belong to a common diode region, a first well region 52 of the diode cell region and a second well region 53 of the diode cell region are provided in the common diode region, a common diode in the common diode region is formed by a PN structure, and the common diode region is configured to have an effect of: when reverse voltage is applied to the common diode area, electrons are combined with holes in the common diode area and cannot flow back to a power supply beyond the PN junction, the holes are occupied all the time, the holes are exhausted, a depletion area is formed, and the depletion area continuously diffuses towards the Schottky diode area and is widened in width due to the fact that the electrons are continuously combined with the holes; the depletion region of the normal diode region protects the schottky diode region 18 when a reverse voltage is applied to the diode cell region to reduce the leakage current of the schottky diode.
The well region spacing may be such that there are sufficient schottky diode regions 18 left for the schottky diode structure at the plane of the well region 5; the width of the Schottky diode region 18 is determined according to the reverse bias leakage current preset value of the Schottky diode structure; therefore, under the condition that the default value of the bias leakage current of actual demand is determined, the width of the Schottky diode region 18 can be determined, the size of the well region interval can be adjusted along with the difference of the dosage of ions injected into the well region 5 and the diffusion temperature, when the well region interval is adjusted to be large, the reverse bias leakage current of the Schottky diode is large, when the well region interval is adjusted to be small, the reverse bias leakage current of the Schottky diode is small, through controlling the well region interval, the reverse bias leakage current of the Schottky diode is restrained, and meanwhile, the breakdown voltage of the reverse conducting type IGBT is ensured to be in a normal range.
The first conductive type heavily doped region 6 is arranged on the upper surface of the well region 5, the bottom of the first conductive type heavily doped region 6 extends into the well region 5, and the width of the first conductive type heavily doped region 6 is smaller than that of the well region 5; in this embodiment, the first conductive type heavily doped region 6 is formed by P-type heavily doped.
The source region 7 is arranged on the upper surface of the well region 5, distributed on two sides in the well region 5 of the IGBT cellular region A and respectively adjacent to the trench structure 3, and the upper surface of the source region 7 is in contact with the oxide dielectric layer 14; in this embodiment, the source region 7 is formed by N-type heavy doping.
The IGBT cell region metal silicide 10 is arranged on the upper surface of the first conduction type heavily doped region 6, the upper surface of the IGBT cell region metal silicide 10 is in contact with the oxide medium layer 14, the width of the IGBT cell region metal silicide 10 is the same as that of the first conduction type heavily doped region 6, and the IGBT cell region metal silicide 10 is in ohmic contact with the first conduction type heavily doped region 6 and the source region 7.
The oxide medium layer 14 is arranged on the upper surfaces of the source region 7 and the polycrystalline silicon layer 4, an IGBT cellular region metal contact hole 8 is formed in the position, corresponding to the IGBT cellular region metal silicide 10, of the oxide medium layer 14, the IGBT cellular region metal contact hole 8 is located above the IGBT cellular region metal silicide 10, an IGBT cellular region top layer metal 9 is arranged in the IGBT cellular region metal contact hole 8, and the IGBT cellular region top layer metal 9 is tightly attached to the IGBT cellular region metal silicide 10 to form conductive connection.
In this embodiment, the IGBT cell region a further includes: the IGBT device comprises a buffer layer 15 and an IGBT collector region 16, wherein the buffer layer 15 is arranged on the lower surface of the substrate 1 of the IGBT cell region A, and the IGBT collector region 16 is arranged on the IGBT cell region corresponding to the lower surface of the buffer layer 15; in this embodiment, IGBT collector region 16 is formed by P-type light doping.
When a voltage is applied in the forward direction, the IGBT cell area A is in a conducting state, the diode cell area B is in a reverse blocking state, and when a voltage is applied in the reverse direction, the IGBT cell area A is in a blocking state, and the diode cell area B is in a forward conducting state, so that the reverse conducting function of the IGBT is realized.
In the reverse conducting type IGBT device of this embodiment, the IGBT cell region is provided with a collector region, a buffer layer, a well region, a source region, a P-type heavily doped region, and a metal silicide to form an IGBT structure; a Schottky diode region is arranged in the diode cell region through the well region interval to replace a conventional PN junction diode; the reverse bias leakage current of the Schottky diode is restrained by controlling the interval of the well region, and meanwhile, the breakdown voltage of the reverse conducting IGBT is ensured to be in a normal range; during normal work, the conduction voltage drop of the Schottky diode is smaller than that of a conventional PN junction diode, so that during normal work of the reverse conducting type IGBT, the loss generated by the conduction voltage drop of the diode is greatly reduced, and the integral loss during work of the reverse conducting type IGBT is reduced.
In one embodiment, a method for manufacturing a reverse conducting IGBT device as shown in fig. 4 is provided, and the method may include the following steps:
step S1, providing a substrate, and disposing a drift region on an upper surface of the substrate.
In this embodiment, an N-drift region may be disposed on the semiconductor material, or an N-type semiconductor material may be used as the substrate of the reverse conducting IGBT device, so that the substrate has the N-drift region.
And step S2, forming a groove structure on the upper surface of the drift region in the IGBT cellular region, and filling a polysilicon layer in the groove structure to form a grid.
The N-drift region corresponding to the upper surface of the substrate is divided into an IGBT cellular region and a diode cellular region according to functions, and U-shaped grooves with certain width and certain depth are etched in the positions, adjacent to the IGBT cellular region and the diode cellular region.
Arranging silicon dioxide (SiO) on the inner wall of the groove 2 ) And then filling a polysilicon layer in the groove for forming the gate dielectric layer so as to form the gate.
In this embodiment, etching the trench and forming the gate are performed in the prior art, and are not described herein again.
In step S3, a well region is formed on the upper surface of the substrate in the IGBT cell region using the set well region pattern.
After the gate is formed in step S2, a planar well region pattern is formed on the upper surface of the substrate, and P-type doping is injected on the upper surface of the corresponding region of the IGBT cell region according to the well region pattern to form a P-well region.
In this embodiment, the pattern of the well region is a shape of a Chinese character 'ao', referring to fig. 3, a well region interval is arranged in the diode cell region, the interval is used for manufacturing a schottky diode structure, the upper side and the lower side of the well region interval are common diode structure regions, and the well region interval can enable enough schottky diode regions 18 to be reserved for the schottky diode structure on the plane of the well region.
In the embodiment, the well region interval is determined according to a preset value of reverse bias leakage current of the Schottky diode structure; the well region spacing can be adjusted according to actual needs, the size can be adjusted along with the difference of the dosage of well region injection ions and the diffusion temperature, when the well region spacing is adjusted to be large, the reverse bias leakage current of the Schottky diode is large, when the well region spacing is adjusted to be small, the reverse bias leakage current of the Schottky diode is restrained by controlling the well region spacing, and meanwhile, the breakdown voltage of the reverse conducting IGBT is ensured to be in a normal range.
Step S4, performing first conductive type ion implantation in the upper surface of the well region to form a first conductive type heavily doped region.
And setting a P-type heavily doped region with a certain width on the upper surface of the well region, and then injecting P-type ions to form the P-type heavily doped region.
In this embodiment, the impurity doped in the P-type heavily doped region may be, but is not limited to: boron (B), aluminum (Al), gallium (Ga), and the like.
Step S5, performing second conductive type ion implantation on the upper surface of the well region to form a source region.
And injecting N-type ions into the region from the two sides of the P-type heavily doped region to the region between the two sides of the groove on the upper surface of the well region to form an N-type heavily doped region, namely a source region.
In this embodiment, the impurity doped into the N-type heavily doped region may be, but is not limited to: phosphorus (P), arsenic (As), tellurium (Sb), selenium (Se), protons (H +), and the like.
Step S6, depositing an oxide dielectric layer on the upper surfaces of the polysilicon layer, the first conductive type heavily doped region, the source region and the substrate in the diode cell region.
In this embodiment, in the step 1-5, ion implantation on the upper surface of the substrate is completed, and in this step, an oxide dielectric layer is deposited on the upper surfaces of the formed polysilicon layer, the first conductivity type heavily doped region, the source region, and the substrate in the diode cell region, and the deposited oxide dielectric layer may adopt a preparation process such as a radio frequency magnetron sputtering method, a chemical vapor deposition method, a pulsed laser deposition, an atomic beam deposition, and the like.
Step S7, forming a first metal contact hole in an oxide dielectric layer in the diode cell region, wherein the bottom of the first metal contact hole extends into a drift region of the diode cell region; and forming a second metal contact hole in the oxide dielectric layer in the IGBT cellular region, wherein the bottom of the second metal contact hole extends into the drift region of the IGBT cellular region.
Forming a diode cell area metal contact hole and an IGBT cell area metal contact hole in the oxide dielectric layer, wherein the diode metal contact hole is positioned in the diode cell area; the metal contact holes of the IGBT cellular region are positioned in the IGBT cellular region, are arranged above the P-type heavily doped region and correspond to the P-type heavily doped region, and are through holes.
Step S8, forming a first metal silicide at the bottom of the first metal contact hole, and forming a second metal silicide at the bottom of the second metal contact hole.
Arranging a diode cell region metal silicide at the bottom of the diode metal contact hole, wherein the lower surface of the diode cell region metal silicide is tightly attached to the drift region of the substrate to form a Schottky structure; and arranging an IGBT cell area metal silicide at the bottom of the IGBT cell area metal contact hole, wherein the IGBT cell area metal silicide is tightly attached to the P-type heavily doped area and the source area, and the IGBT cell area metal silicide forms ohmic contact with the P-type heavily doped area and the source area.
Step S9, a first top metal layer is formed on the first metal silicide upper surface, and a second top metal layer is formed on the second metal silicide upper surface, so as to obtain an IGBT cell region and a diode cell region that constitutes a schottky diode structure and is not provided with a well region.
And respectively filling top layer metal on the upper surfaces of the metal silicide of the diode cell area and the metal silicide of the IGBT cell area, thereby obtaining an upper structure of the substrate of the IGBT cell area and an upper structure of the substrate of the diode cell area, namely the upper structure of the reverse conducting type IGBT substrate.
In this embodiment, the method for manufacturing the reverse conducting IGBT device further includes the step of manufacturing a PN junction diode in the diode cell region:
in this embodiment, a first well region and a second well region are formed in the diode cell region by using a set well region pattern, so that a well region plane formed by the well region of the IGBT cell region, the first well region of the diode cell region, and the second well region is in a shape of a Chinese character 'ao'.
After the oxide dielectric layer is formed in step S6, metal contact holes of a common diode are formed in the corresponding oxide dielectric layer above the first well region and the second well region of the diode cell region, and P + ions are injected into the upper surface of the drift region at the bottom of the metal contact holes of the common diode to form metal silicide, which forms ohmic contact with the drift region in the diode cell region.
Therefore, the P + ions and the P-type well region and the N-type drift region in the diode cellular region form a PN junction diode.
After obtaining the upper structure of the reverse conducting IGBT substrate, preparing a lower structure of the substrate, wherein the method comprises the following steps:
(1) and thinning the lower surface of the substrate to a preset thickness, and implanting N-type ions to form an N-buffer layer.
In the embodiment, the buffer layer is arranged to form a Field Stop (FS) IGBT, and the N-buffer layer plays a role of an electric Field Stop layer and can improve the breakdown voltage of the IGBT; the electric field of this type of IGBT decays slower in the N-drift region and faster in the buffer layer.
As another embodiment, a Non-punch Through (NPT) IGBT may be formed without providing the N-buffer layer, and the electric field of this type IGBT decays at a single rate in the N-drift region.
(2) Injecting P-type ions into a region of the lower surface of the buffer layer corresponding to the well region to form a collector region of the IGBT; and injecting N-type ions into the region of the lower surface of the buffer layer corresponding to the diode region to form the cathode region of the diode.
(3) And depositing a metal layer on the lower surface of the substrate to form a collector of the IGBT.
According to the preparation method of the reverse conducting IGBT device, the Schottky diode is controlled and integrated into the IGBT through the preset well region graph, the well region distance of the well region graph is controlled, reverse bias leakage current of the Schottky diode can be restrained, and meanwhile breakdown voltage of the IGBT can be guaranteed to be in a normal range; the injection of P-type ions in a cell region of the diode is shielded through a well region pattern, the P-type ions are injected only in an IGBT region of the well region pattern and a pickup region of the well region, and then metal silicide is arranged in a well region interval to form a Schottky diode structure, so that the conduction loss of the reverse conducting type IGBT is effectively reduced.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.

Claims (10)

1. A reverse conducting IGBT device, comprising:
IGBT cellular region and diode cellular region, diode cellular region includes:
a substrate;
a drift region disposed on an upper surface of the substrate;
the first metal silicide is arranged on the upper surface of the drift region, and is in direct contact with the drift region to form Schottky contact so as to form a Schottky diode structure, and a well region is not arranged in the Schottky diode structure.
2. The reverse conducting IGBT device according to claim 1, wherein the diode cell region further includes:
the oxide dielectric layer is arranged on the upper surface of the drift region in the diode cellular region;
the first metal contact hole is formed in an oxide dielectric layer in the diode cell area, and the first metal silicide is arranged at the bottom of the oxide dielectric layer;
a first top layer metal disposed on an upper surface of the first metal silicide.
3. The reverse conducting IGBT device according to claim 1, wherein the IGBT cell region includes:
a substrate;
the drift region is arranged on the upper surface of the substrate;
the well region is arranged on the upper surface of the drift region;
the first conduction type heavily doped region is arranged on the upper surface of the well region, and the bottom of the first conduction type heavily doped region extends to the inside of the well region;
the source region is arranged on the upper surface of the well region;
a trench structure disposed within the drift region;
a polysilicon layer disposed within the trench structure;
the second metal silicide is arranged on the upper surface of the first conduction type heavily doped region;
the oxide dielectric layer is arranged on the upper surfaces of the source region and the polycrystalline silicon layer;
the second metal contact hole is formed in the oxide dielectric layer in the IGBT cellular region, and the second metal silicide is arranged at the bottom of the oxide dielectric layer;
a second top metal disposed on an upper surface of the second metal silicide.
4. The reverse conducting IGBT device according to claim 3, wherein a well region plane formed by the well region of the IGBT cell region, the first well region and the second well region of the diode cell region is in a recessed shape, so that a sufficient diode region is left for the schottky diode structure on the well region plane.
5. The reverse conducting IGBT device according to claim 4, wherein the diode region is rectangular, and a width of the diode region is a planar well region pitch between the first well region and the second well region of the diode cell region, the planar well region pitch being determined according to a preset leakage current value of the schottky diode structure.
6. The reverse conducting IGBT device according to claim 3, wherein the IGBT cell region further comprises:
the buffer layer is arranged on the lower surface of the substrate;
and the collector region is arranged on the lower surface of the buffer layer corresponding to the IGBT cellular region.
7. The reverse conducting IGBT device according to claim 2, wherein the diode cell region further includes:
the buffer layer is arranged on the lower surface of the substrate;
and the cathode region is arranged on the lower surface of the buffer layer corresponding to the diode region.
8. A preparation method of a reverse conducting IGBT device is characterized by comprising the following steps:
providing a substrate, and arranging a drift region on the upper surface of the substrate, wherein the drift region is of an N-type;
forming a groove structure on the upper surface of a drift region in an IGBT cellular region, and filling a polycrystalline silicon layer in the groove structure to form a grid;
forming a well region on the upper surface of the substrate in the IGBT cellular region by using a set well region pattern, wherein the well region is a P-type well region;
performing ion implantation of a first conductivity type in the upper surface of the well region to form a first conductivity type heavily doped region;
performing ion implantation of a second conductive type on the upper surface of the well region to form a source region;
depositing an oxide dielectric layer on the upper surfaces of the polycrystalline silicon layer, the first conductive type heavily doped region, the source region and the diode cell region inner substrate;
forming a first metal contact hole in an oxide medium layer in the diode cellular region, wherein the bottom of the first metal contact hole extends into a drift region of the diode cellular region; forming a second metal contact hole in the oxide dielectric layer in the IGBT cellular region, wherein the bottom of the second metal contact hole extends into the drift region of the IGBT cellular region;
forming a first metal silicide at the bottom of the first metal contact hole, and forming a second metal silicide at the bottom of the second metal contact hole;
and forming a first top layer metal on the upper surface of the first metal silicide, and forming a second top layer metal on the upper surface of the second metal silicide to obtain an IGBT cellular area, wherein a Schottky diode structure is arranged in the diode cellular area, and a well region is not arranged in the Schottky diode structure.
9. The method as claimed in claim 8, wherein the planar shape of the well region pattern is a concave shape, so that enough diode region is left on the plane of the well region for the schottky diode structure.
10. The method of manufacturing a reverse conducting IGBT device according to claim 9, characterized by further comprising a step of manufacturing a PN junction diode in a diode cell region:
forming a first well region and a second well region in the diode cellular region by using a set well region pattern, so that a well region plane formed by the well region of the IGBT cellular region, the first well region of the diode cellular region and the second well region is in a concave shape;
forming a third metal contact hole in an oxide dielectric layer corresponding to the first well region in the diode cellular region, and forming a fourth metal contact hole in an oxide dielectric layer corresponding to the second well region in the diode cellular region;
injecting P + ions into the upper surfaces of the drift regions at the bottoms of the third metal contact hole and the fourth metal contact hole to form a third metal silicide, wherein the third metal silicide forms ohmic contact with the drift regions in the diode cell region;
and the P + ions, the P-type well region in the diode cellular region and the N-type drift region form a PN junction diode.
CN202211030903.5A 2022-08-26 2022-08-26 Reverse conducting IGBT device and preparation method thereof Pending CN115117152A (en)

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Application publication date: 20220927