CN115083958A - Method for sucking wafer and electronic equipment - Google Patents
Method for sucking wafer and electronic equipment Download PDFInfo
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- CN115083958A CN115083958A CN202210576439.3A CN202210576439A CN115083958A CN 115083958 A CN115083958 A CN 115083958A CN 202210576439 A CN202210576439 A CN 202210576439A CN 115083958 A CN115083958 A CN 115083958A
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
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Abstract
The application relates to the technical field of semiconductors, and provides a method for sucking a wafer, which comprises the following steps: receiving a region division rule input by a user; dividing the crystal ring into a plurality of areas according to an area division rule, wherein the plurality of areas comprise a first area and a second area, and the second area is adjacent to the first area; sucking the wafer in the first area according to a first path from a preset position of the first area; when the wafer on the first path is completely sucked, and when a wafer which is not sucked exists at a position adjacent to the first path in the first area, sucking the wafer which is not sucked according to the second path; and when the wafer on the first path is completely sucked and no wafer which is not sucked exists in the position adjacent to the first path in the first area, sucking the wafer in the second area according to a third path, wherein the starting position of the third path is positioned on the side adjacent to the first area. The method can realize the purpose of separately sucking the wafers in different areas on the wafer ring under the condition of not missing the wafers.
Description
Technical Field
The present disclosure relates to the field of semiconductor technologies, and in particular, to a method for sucking a wafer and an electronic device.
Background
As is known, since the brightness uniformity of the wafer in different areas on the wafer ring is different, the brightness of the wafer in some areas is high, and the brightness of the wafer in some areas is low, the wafer in the areas with different brightness needs to be separately sucked when the wafer is sucked. The current method for sucking the wafer is the nearest neighbor method, but the nearest neighbor method cannot realize the separate sucking of the wafer in different areas on the wafer ring.
Therefore, how to separately suck the wafers in different areas on the wafer ring without missing the wafers is a problem which needs to be solved urgently at present.
Disclosure of Invention
The application provides a method for sucking a wafer and electronic equipment, which can realize the purpose of separately sucking wafers in different areas on a wafer ring under the condition of not missing the wafer.
In a first aspect, a method for sucking a wafer is provided, including: receiving a region division rule input by a user; dividing a crystal ring into a plurality of areas according to the area division rule, wherein the plurality of areas comprise a first area and a second area, and the second area is an area adjacent to the first area; sucking the wafer in the first area according to a first path from a preset position of the first area; recording the wafer suction condition of the adjacent position of the first path; when the wafer on the first path is completely sucked, and when a wafer which is not sucked exists at a position adjacent to the first path in the first area, generating a second path according to the position adjacent to the first path in the first area, and sucking the wafer which is not sucked according to the second path; when the wafer suction on the first path is finished, and when no wafer which is not sucked exists at the position adjacent to the first path in the first area, generating a third path according to the wafer at the position adjacent to the first path in the second area, and sucking the wafer in the second area according to the third path, wherein the starting position of the third path is located on the edge adjacent to the first area.
The above method may be performed by an electronic device or a chip in an electronic device. The electronic equipment firstly absorbs a part of wafers in the first area according to the first path, then generates a second path according to the wafers which are recorded in the adjacent position of the first path in the first area and are not absorbed, and then continuously absorbs the rest wafers in the first area according to the second path so as to prevent the wafers in the first area from being left; and when all the wafers in the first area are sucked, generating a third path according to the previously recorded wafers at the positions adjacent to the first path in the second area, sucking the wafers in the second area according to the third path, and repeating the steps until the wafers in all the areas on the wafer ring are sucked separately. Therefore, the wafers in other areas (for example, the second area) are sucked only after all the wafers in the current area (for example, the first area) are sucked, and the wafers in other areas are not sucked under the condition that the wafers in the current area are not sucked completely, so that the condition that the wafers with different brightness are sucked in a disordered manner is avoided, and the purpose of separately sucking the wafers in different areas on the wafer ring under the condition that the wafers are not omitted is achieved.
Optionally, the recording the wafer suction condition at the position adjacent to the first path includes: recording the wafer suction condition adjacent to the first path in the first area; or recording the wafer suction condition of the position adjacent to the first path in the second area.
In this embodiment, the electronic device records the wafer suction condition at the position adjacent to the first path in the first region, so as to finish sucking all the wafers in the first region, and in addition, the electronic device records the wafer suction condition at the position adjacent to the first path in the second region, so that the electronic device directly transfers to the second region to continue sucking the wafers after finishing sucking all the wafers in the first region, without stopping in the middle, thereby improving the efficiency of sucking the wafers in different regions by the electronic device.
Optionally, the first path is to sequentially absorb the wafers in the first area line by line from a preset position of the first area.
In this embodiment, the electronic device sequentially sucks the wafers in the first area line by line from the preset position of the first area, so as to finish sucking all the wafers in the path (i.e., the first path). Optionally, the starting position of the second path is adjacent to the preset position of the first path, and the second path sequentially sucks the wafers which are not sucked from the starting position of the second path line by line.
In this embodiment, the electronic device sequentially sucks the wafers in the first area line by line from the start position of the second path one by one, so as to avoid missing the wafers in the first area. Optionally, the third path is to sequentially suck the wafers in the second area line by line from the start position of the third path.
In this embodiment, the electronic device sequentially sucks the wafers in the second area line by line from the start position of the third path, so as to finish sucking all the wafers under the path (i.e., the third path).
Optionally, the area division rule is to divide the wafer ring into a plurality of wafer areas with different brightness according to different brightness of the wafers on the wafer ring.
In a second aspect, an electronic device is provided, comprising a processor and a memory, the memory being configured to store a computer program, the processor being configured to invoke and run the computer program from the memory, such that the electronic device performs the method of any of the first aspects.
In a third aspect, a computer-readable storage medium is provided, storing a computer program which, when executed by a processor, causes the processor to perform the method of any of the first aspects.
Advantageous effects in the second and third aspects of the present application refer to the advantageous effects of the first aspect.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
FIG. 1 is a schematic flow chart illustrating a method for sucking a wafer according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a wafer ring divided into a plurality of wafer regions according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of another wafer ring divided into a plurality of wafer regions according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a path for an electronic device to suck wafers in different areas according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a path for another electronic device to pick up a wafer in different areas according to another embodiment of the present invention;
FIG. 6 is a schematic diagram of a path for an electronic device to suction a wafer from a second area to a different area according to an embodiment of the present invention;
fig. 7 is a schematic diagram of a path for the electronic device to suck the wafer in the first area according to the first path and the second path in the embodiment of the present invention;
fig. 8 is a schematic structural diagram of an electronic device in an embodiment of the invention.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
Furthermore, in the description of the present application and the appended claims, the terms "first," "second," "third," and the like are used for distinguishing between descriptions and not necessarily for describing or implying relative importance.
Reference throughout this specification to "one embodiment" or "some embodiments," or the like, means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the present application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," or the like, in various places throughout this specification are not necessarily all referring to the same embodiment, but rather "one or more but not all embodiments" unless specifically stated otherwise. The terms "comprising," "including," "having," and variations thereof mean "including, but not limited to," unless expressly specified otherwise. In addition, in the drawings of the specification, different black solid lines intersect with each other, but are not connected.
Because the brightness uniformity of the wafers in different areas on the wafer ring is different, the wafers in the areas with different brightness uniformity are separately sucked. The application provides a method for sucking wafers, which can realize the purpose of separately sucking wafers in different areas on a wafer ring under the condition of not missing the wafers.
The present application will now be described in further detail with reference to the accompanying drawings and specific examples.
Fig. 1 is a flowchart illustrating a method for sucking a wafer, which may be performed by an electronic device or a chip on the electronic device. The method comprises the following steps:
s101, receiving a region division rule input by a user.
For example, the area division rule is used to divide the wafer on the wafer ring into different wafer areas according to different brightnesses of the wafer, that is, after the electronic device that divides the wafer on the wafer ring into the same wafer area having the same brightness receives the area division rule, the electronic device divides the wafer ring into the wafer areas having different brightnesses according to the area division rule, so that the electronic device can separately absorb the wafers in the different wafer areas on the wafer ring.
Optionally, the area division rule is to divide the wafer ring into a plurality of wafer areas with different brightness according to different brightness of the wafers on the wafer ring, where the width of each wafer area in the plurality of wafer areas may be equal or unequal, and the width of each wafer area may be represented by the number of rows of the wafers in each wafer area or the number of rows of the wafers. The reason is that the wafer ring can rotate 360 °, and a row of wafers in the wafer ring becomes a row of wafers after 90 ° rotation, so only the case where the width of each wafer area is expressed by the number of rows of wafers in the wafer area will be discussed here.
For example, as shown in fig. 2, the electronic device divides the wafer on the wafer ring (indicated by the black and solid circles in fig. 2) into four wafer regions with the same width according to different brightness of the wafer, that is, the width of each of the four wafer regions is 4 rows of wafers, where the brightness of all the wafers in the wafer region 1 (e.g., the first region) is substantially the same, and the wafer region 1 includes four rows of wafers, and the brightness of all the wafers in each of the wafer region 2 (e.g., the second region), the wafer region 3 and the wafer region 4 is also substantially the same. The brightness levels of the four wafer areas are that the brightness of the wafer area 1 is lower than that of the wafer area 2, the brightness of the wafer area 2 is lower than that of the wafer area 3, and the brightness of the wafer area 3 is lower than that of the wafer area 4. After the electronic equipment divides the wafer areas, the width of each wafer area is recorded, so that a grabbing path is designed according to the width of each area to grab the wafers in different wafer areas separately, and the purpose of classifying the wafers in different brightness areas is achieved.
For another example, as shown in fig. 3, the electronic device divides the wafer on the wafer ring (indicated by a black solid line circle in fig. 3) into three wafer regions with different widths according to different brightness of the wafer, where the width of the wafer region 1 is 4 rows of wafers, the width of the wafer region 2 is 5 rows of wafers, and the width of the wafer region 3 is 7 rows of wafers; the brightness of all wafers in the wafer area 1 (e.g., the first area) is substantially the same, and the wafer area 1 contains 4 rows of wafers, and the brightness of all wafers in each of the wafer areas 2 (e.g., the second area) and 3 is also substantially the same. The brightness levels of the 3 wafer areas are that the brightness of the wafer area 1 is lower than that of the wafer area 2, and the brightness of the wafer area 2 is lower than that of the wafer area 3. After the electronic equipment divides the wafer areas, the width of each wafer area is recorded, so that a grabbing path is designed according to the width of each area to grab the wafers in different wafer areas separately, and the purpose of classifying the wafers in different brightness areas is achieved.
S102, dividing the crystal ring into a plurality of areas according to an area division rule, wherein the plurality of areas comprise a first area and a second area, and the second area is an area adjacent to the first area.
For example, as shown in fig. 4, the electronic device divides the wafer ring into a plurality of regions in columns according to a region division rule, the plurality of regions including: the wafer ring comprises a first area and a second area, wherein the first area and the second area are adjacent to each other in position on the wafer ring, the width of the first area is 4 rows of wafers, and the width of the second area is 5 rows of wafers. After the electronic equipment sucks 4 rows of wafers in the first area, the electronic equipment can directly suck the wafers in the second area. For another example, the electronic device may also divide the wafer ring into a plurality of regions according to rows, and since the wafer ring can rotate 360 °, the principle that the electronic device divides the wafer ring into a plurality of regions according to rows is the same as the principle that the wafer is divided into a plurality of regions according to columns, which is not described herein again.
S103, sucking the wafer in the first area according to the first path from the preset position of the first area.
For example, when a certain row is used as the start position, the wafer at one side position of the wafers at the edge positions on both sides of the row needs to be selected as the start point (i.e., the start position of the suction path), for example, as shown in fig. 4, the width of the first area is 4 rows of wafers, the width of the second area is 5 rows of wafers, the memory position 1 (i.e., the row where the wafer at the Y position is located) is the start position, and the wafer at the Y position in the memory position 1 is used as the start point (i.e., the start position) of the second path; the first path is a route for the electronic equipment to suck the wafer from the first area. A route shown by a black solid line with an arrow in the first area is a first path, and a black arrow on the first path represents the moving direction of the electronic equipment when the electronic equipment sucks the wafer; the electronic device may sequentially suck the wafers line by line from a preset position (e.g., from the wafer at the X position) of the first path in the direction indicated by the arrow in the first path until the last wafer indicated by the first path is sucked. Since the electronic device can see the adjacent row or column of wafers when sucking the wafer, when the electronic device recognizes from the preset position of the first path, the electronic device records the position of the adjacent row of wafers, for example, records the position of the previous row of wafers adjacent to the preset position, i.e., the memory position 1 shown in fig. 4 (i.e., the row where the wafer at the Y position is located); when the electronic equipment starts to suck from the preset position to the last wafer (i.e. the wafer at the Z position) on the row of the preset position in the first area according to the first path, the position of a row of wafers in the second area adjacent to the first path (i.e. the memory position 2 shown in fig. 4) is recorded. When the electronic device records the position of a row of wafers in the second area adjacent to the first path, the electronic device may select any row (for example, row a) in the memory location 2 as a starting location for the electronic device to suck the wafers in the second area, and the electronic device may start to suck the wafers according to a predetermined path from the wafer at the leftmost edge position (for example, W position) or the rightmost edge position (for example, U position) of the selected row (for example, row a) (for example, the predetermined path design mode refers to the design mode of the first path).
For example, as shown in fig. 5, when the electronic device records the memory location 3 adjacent to the first path in the second area, when the electronic device sucks the wafer in the second area, the memory location 3 may be used as a start location for sucking the wafer in the second area, and one wafer at the leftmost edge (i.e., the wafer at the P position) in the memory location 3 may be used as a start point or one wafer at the rightmost edge (i.e., the wafer at the Q position) in the memory location 3 may be used as a start point.
For another example, as shown in fig. 5, when the electronic device sucks a portion of the wafer in the first area according to the first path, the electronic device detects a position where the wafer is previously recorded; the electronic equipment detects that the positions where the wafers are stored previously are a memory position 1 and a memory position 2; the electronic device will turn from the current position (i.e. the position Z where the last wafer of the first path is located) to the memory position 1 (as shown by the dotted arrow in fig. 5), and use the wafer at the Y position of the memory position 1 as the starting position (i.e. the starting point) to generate a second path and suck the remaining wafers in the first area according to the second path; then, when the wafer in the first area is completely sucked, the electronic device may select one row (for example, row a in fig. 5) from the memory location 2 as a preset location to generate a first path in a second area and sequentially suck the wafers line by line according to the first path in the second area, where a starting point (i.e., a starting location) of the first path in the second area may be a wafer in a W position or a wafer in a U position; for example, the electronic device generates a first path in the second area according to the W-position wafer or the U-position wafer in the a-th row as a start position, and sequentially sucks the wafers one by one from the W-position wafer or the U-position wafer in the a-th row line by line according to the first path in the second area.
When the electronic device sucks the wafer in the row A in the second area according to the first path in the second area, whether the wafer exists at a position adjacent to the first path in the second area is detected, wherein the wafer at the position adjacent to the first path in the second area refers to a wafer in a row above or below the position adjacent to the row A in the second area and a wafer in a position adjacent to the first path in the second area in the third area. When the electronic device sucks the first path in the second area of the wafer in the second area, the electronic device sucks the wafer in the row a first and then sucks the wafer in the row next to the row a, and at this time, the wafer in the position (i.e., the memory position) adjacent to the first path in the second area refers to the wafer in the row above the position adjacent to the row a in the second area. When the electronic device sucks the first path in the second area of the wafer in the second area, the electronic device sucks the wafer in the row a first and then sucks the wafer in the row a last, and at this time, the wafer in the position (i.e. the memory position) adjacent to the first path in the second area refers to the wafer in the row next to the row a in the second area.
In this embodiment, the electronic device sequentially sucks the wafers in the first area line by line from the preset position of the first area, so as to finish sucking all the wafers under the path (i.e., the first path).
And S104, recording the wafer suction condition of the adjacent position of the first path.
For example, as shown in fig. 4, after the electronic device determines a wafer area to be sucked first, a preset position is selected as a starting position in the wafer area, for example, the electronic device sucks a first area first, and starts sucking the wafer from the preset position in the first area first; when the electronic equipment starts to suck the wafer according to the first path from the preset position, recording the wafer sucking condition of the adjacent position of the first path; for the first area shown in fig. 4, the electronic device records memory location 1 and memory location 2 adjacent to the first path.
Optionally, recording the wafer suction condition at the position adjacent to the first path includes: recording the wafer suction condition adjacent to the first path in the first area; or recording the wafer suction condition in the second area, which is adjacent to the first path.
For example, the sequence of the electronic device sucking the wafers in different areas depends on recording the sucking condition of the wafers at the adjacent positions when the wafers are sucked. As shown in fig. 6, taking 4 rows of wafers from the first area to the fourth area as an example, the electronic device first starts to suck the wafers from the second area; when the electronic equipment sucks the wafer in the second area, the positions of adjacent wafers in the first area and the third area are recorded, so that the electronic equipment can suck the wafer in the third area after sucking the wafer in the second area; the electronic equipment records the wafers at the adjacent positions in the fourth area when absorbing the wafers in the third area, so that the electronic equipment can continue to absorb the wafers in the fourth area after absorbing the wafers in the third area; since the rightmost edge of the fourth area has no other area, the wafer in the first area has not been sucked, and the position of the wafer in the first area has been recorded, after the electronic device has sucked the wafer in the fourth area, the electronic device may continue sucking the wafer in the first area from the wafer in the first area, which has been recorded as the starting position of the wafer in the second area.
Or, the electronic device starts to suck the wafer from the second area; when the electronic equipment sucks the wafer in the second area, the positions of adjacent wafers in the first area and the third area are recorded, so that the electronic equipment can suck the wafer in the first area after sucking the wafer in the second area; because the leftmost edge of the first area has no other area, and when the electronic device sucks the wafer in the second area, the wafer at the adjacent position in the third area is recorded, so that after the electronic device finishes sucking the wafer in the first area, the wafer at the previously recorded adjacent position between the third area and the second area can be used as the starting position to suck the wafer in the third area; because the electronic device records the wafers at the adjacent positions in the fourth area when sucking the wafers in the third area, the electronic device can continue to suck the wafers in the fourth area after sucking the wafers in the third area.
In this embodiment, the electronic device records the wafer suction condition at the position adjacent to the first path in the first region, so as to finish sucking all the wafers in the first region, and in addition, the electronic device records the wafer suction condition at the position adjacent to the first path in the second region, so that the electronic device directly transfers to the second region to continue sucking the wafers after finishing sucking all the wafers in the first region, without stopping in the middle, thereby improving the efficiency of sucking the wafers in different regions by the electronic device.
S105, when the wafer on the first path is completely sucked, and when a non-sucked wafer exists at a position adjacent to the first path in the first area, generating a second path according to the position adjacent to the first path in the first area, and sucking the non-sucked wafer according to the second path.
For example, as shown in fig. 5, when the electronic device has sucked the wafer on the first path (i.e. the portion in the first area) according to the first path, the electronic device may detect that there is no previously recorded position where the wafer exists in the first area, for example, the position is stored as a memory position 1, at this time, after the electronic device has sucked the wafer at the last position Z under the first path, the electronic device may generate a second path (as shown in fig. 5) according to the previously recorded position where the wafer exists (for example, the position is stored as a memory position 1), and then suck the remaining wafer in the first area according to the second path. Optionally, the starting position of the second path (i.e., the row where the wafer at the Y position is located) is adjacent to the preset position of the first path (i.e., the row where the wafer at the X position is located), and the second path is to sequentially absorb the remaining wafers that are not absorbed in the first area one by one from the starting position of the second path (e.g., the wafer at the Y position) line by line, so as to avoid missing the wafers in the first area.
And S106, when the wafer suction on the first path is finished and when the non-sucked wafer does not exist at the position adjacent to the first path in the first area, generating a third path according to the wafer at the position adjacent to the first path in the second area and sucking the wafer in the second area according to the third path, wherein the initial position of the third path is positioned on the edge adjacent to the first area.
For example, as shown in fig. 7, when the preset position is a wafer at a position M, the electronic device sucks the wafer in the first area according to the first path with the wafer at the position M as a starting position until the last wafer at a position N in the first area is completely sucked; of course, the first path may also be configured to suck the wafers one by one in sequence line by line with the wafer at the N position as the start position in the reverse direction (compared with the moving direction when the wafer is sucked by the first path with the wafer at the M position as the start position), until the wafer at the last position M in the first area is sucked. Here, the moving direction of the wafer sucking in the first path with the M-position wafer as the start position is only taken as an example, and the moving direction of the wafer sucking in the first path with the N-position wafer as the start position is similar, and the details are not repeated here. Since there is no other wafer in the row above the row where the M position is located (i.e. there is no wafer that is not sucked in the position adjacent to the first path in the first area), when the electronic device sucks the wafer according to the first path, only the position of the wafer in the second area adjacent to the first area is recorded (for example, the position 9 is memorized); when the wafer suction on the first path is finished, and when there is no wafer which is not sucked in the position adjacent to the first path in the first area, the electronic device does not generate the second path in the first area, but generates a third path with the memory position 9 recorded in the second area where the wafer exists as a starting position, and sucks the wafer in the second area according to the third path, wherein the starting position of the third path (for example, the L position in the second area) is located on the side adjacent to the first area. Optionally, the third path refers to sequentially sucking the wafers in the second area line by line from a start position of the third path (for example, a wafer at an L position is used as a start point) so as to finish sucking all the wafers in the path (i.e., the third path).
For another example, as shown in fig. 6, the electronic device first starts to suck the wafer from the wafer at the preset position a in the second area according to the first path; when the electronic equipment sucks the wafer in the second area according to the first path, the position of the wafer adjacent to the first path in the second area (namely, a memory position 4), the position of the wafer adjacent to the first path in the third area (namely, a memory position 6) and the position of the wafer adjacent to the first path in the first area (namely, a memory position 5) are respectively recorded. When the electronic equipment finishes sucking all the wafers under the path according to the first path, the position where the wafer exists and recorded in advance can be detected; when there are other wafers in the second area (for example, the memory location 4), optionally, the electronic device may generate a second path starting from the wafer at the location B of the memory location 4 and suck the remaining portion of the wafer in the second area according to the second path, until the wafer at the location C is sucked, it is not calculated that the suction of the wafer in the second area is completed. After the wafer in the second area is completely sucked, the electronic device will remove the sucked wafer in the third area or remove the sucked wafer in the first area, where the example of removing the sucked wafer in the third area by the electronic device is taken; at this time, the electronic device will select one row from the memory location 6 in the third area as the preset location (i.e. the starting location) to suck the wafer in the third area; optionally, after the last wafer at the position C in the second area is electrically sucked, selecting the wafer at the position D in the memory location 6 as an initial position to generate a third path, sucking the wafer in the third area according to the third path, recording a memory location 7 in the third area adjacent to the third path and recording a memory location 8 in the fourth area adjacent to the third path, where the memory location 8 is one row in the fourth area, and thus it can be seen that the electronic device can record a row of an adjacent area to the current sucking area and also record a column of the adjacent area as a memory location; when the electronic device has sucked all the wafers in the third area, the memory position 8 in the fourth area is used as an initial position, and all the wafers in the fourth area are sucked according to a preset path (refer to the design mode of the first path or the second path, which is not described herein again); when the suction of all the wafers in the fourth area is finished, the electronic equipment detects whether the positions where the wafers exist recorded previously exist, and at the moment, the electronic equipment detects that the wafers which are not sucked exist in the first area; after all the wafers in the fourth area are sucked, the electronic device generates a new sucking path by taking the wafer at any position in the memory positions 5 as a starting position (namely a preset position), and sucks the wafer in the first area by using the new sucking path, wherein the new sucking path is used for sucking the wafers in the first area sequentially one by one from the wafer at any position in the memory positions 5 as the starting position line by line, and detecting whether the wafer which is not sucked exists at a position adjacent to the new sucking path; if so, recording the position of the wafer; if not, no record is made. When the electronic device has completely absorbed all the wafers in the first area, it is only necessary that the electronic device has completely absorbed the wafers on the whole wafer ring.
In summary, the electronic device first sucks a part of the wafers in the first area according to the first path, then generates a second path according to the wafers which are not sucked and are recorded in the adjacent position of the first path in the first area, and then continues sucking the remaining wafers in the first area according to the second path to prevent the wafers in the first area from being left; and when all the wafers in the first area are sucked, generating a third path according to the previously recorded wafers at the positions adjacent to the first path in the second area, sucking the wafers in the second area according to the third path, and repeating the steps until the wafers in all the areas on the wafer ring are sucked separately. Therefore, the wafer in other areas (for example, the second area) is sucked only after all the wafers in the current area (for example, the first area) are sucked, and the wafer in other areas is not sucked under the condition that the wafer in the current area is not sucked, so that the condition that the wafers with different brightness are sucked in a disordered manner is avoided, and the purpose of separately sucking the wafers in different areas on the wafer ring under the condition that the wafers are not missed is achieved.
Fig. 8 shows a schematic structural diagram of an electronic device provided in the present application. The dashed lines in fig. 8 indicate that the unit or the module is optional. The electronic device 800 may be used to implement the methods described in the method embodiments above. The electronic device 800 may be a server or a chip.
The electronic device 800 includes one or more processors 801, and the one or more processors 801 may enable the electronic device 800 to implement the method in the method embodiment corresponding to fig. 1. The processor 801 may be a general purpose processor or a special purpose processor. For example, the processor 801 may be a Central Processing Unit (CPU). The CPU may be configured to control the electronic device 800, execute software programs, and process data of the software programs. The electronic device 800 may also include a communication unit 805 to enable input (reception) and output (transmission) of signals.
For example, the electronic device 800 may be a chip and the communication unit 805 may be an input and/or output circuit of the chip, or the communication unit 805 may be a communication interface of the chip, which may be an integral part of the electronic device.
Also for example, the communication unit 805 may be a transceiver of the electronic device 800, or the communication unit 805 may be a transceiver circuit of the electronic device 800.
The electronic device 800 may include one or more memories 802 having stored thereon a program 804, where the program 804 may be executed by the processor 801 to generate instructions 803, so that the processor 801 may execute the method described in the above method embodiments according to the instructions 803. Optionally, data may also be stored in the memory 802. Alternatively, processor 801 may also read data stored in memory 802, which may be stored at the same memory address as program 804, or at a different memory address than program 804.
The processor 801 and the memory 802 may be provided separately or integrated together, for example, On a System On Chip (SOC) of the electronic device.
The specific manner in which the processor 801 performs the method of picking up a wafer may be referred to in the description of the method embodiments.
It should be understood that the steps of the above-described method embodiments may be performed by logic circuits in the form of hardware or instructions in the form of software in the processor 801. The Processor 801 may be a CPU, Digital Signal Processor (DSP), Field Programmable Gate Array (FPGA), or other Programmable logic device, such as discrete gates, transistor logic, or discrete hardware components.
The application also provides a computer program product which, when executed by the processor 801, implements the method of any of the method embodiments of the application.
The computer program product may be stored in the memory 802, for example, as a program 804, and the program 804 may be pre-processed, compiled, assembled, and linked to obtain an executable object file capable of being executed by the processor 801.
The present application also provides a computer-readable storage medium having stored thereon a computer program which, when executed by a computer, implements the method of any of the method embodiments of the present application. The computer program may be a high-level language program or an executable object program.
Such as memory 802. The memory 802 may be volatile memory or non-volatile memory, or the memory 802 may include both volatile and non-volatile memory. The non-volatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable PROM (EEPROM), or a flash Memory. Volatile Memory can be Random Access Memory (RAM), which acts as external cache Memory. By way of example, but not limitation, many forms of RAM are available, such as Static random access memory (Static RAM, SRAM), Dynamic Random Access Memory (DRAM), Synchronous dynamic random access memory (Synchronous DRAM, SDRAM), Double Data Rate Synchronous dynamic random access memory (DDR SDRAM), Enhanced Synchronous SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), and Direct Rambus RAM (DRRAM).
It can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes and the generated technical effects of the above-described apparatuses and devices may refer to the corresponding processes and technical effects in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, the disclosed system, apparatus and method may be implemented in other ways. For example, some features of the method embodiments described above may be omitted, or not performed. The above-described embodiments of the apparatus are merely exemplary, the division of the unit is only one logical function division, and there may be other division ways in actual implementation, and a plurality of units or components may be combined or integrated into another system. In addition, the coupling between the units or the coupling between the components may be direct coupling or indirect coupling, and the coupling includes electrical, mechanical or other connections.
The above examples are only for illustrating the technical solutions of the present application, and are not limited thereto. Although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: it is to be understood that modifications may be made to the above-described embodiments, or equivalents may be substituted for some of the features of the embodiments, and such modifications or substitutions are not to be construed as essential to the spirit and scope of the embodiments of the present invention.
Claims (8)
1. A method of sucking a wafer, the method comprising:
receiving a region division rule input by a user;
dividing a wafer ring into a plurality of regions according to the region division rule, wherein the plurality of regions comprise a first region and a second region, and the second region is a region adjacent to the first region;
sucking the wafer in the first area according to a first path from a preset position of the first area;
recording the wafer suction condition of the adjacent position of the first path;
when the wafer on the first path is completely sucked, and when a wafer which is not sucked exists at a position adjacent to the first path in the first area, generating a second path according to the position adjacent to the first path in the first area, and sucking the wafer which is not sucked according to the second path;
when the wafer suction on the first path is finished, and when no wafer which is not sucked exists at the position adjacent to the first path in the first area, generating a third path according to the wafer at the position adjacent to the first path in the second area, and sucking the wafer in the second area according to the third path, wherein the starting position of the third path is located on the edge adjacent to the first area.
2. The method of claim 1, wherein said recording wafer suction adjacent to said first path comprises:
recording the wafer suction condition adjacent to the first path in the first area; or recording the wafer suction condition of the position adjacent to the first path in the second area.
3. The method according to claim 1 or 2, wherein the first path is to sequentially suck the wafers in the first area line by line from a preset position of the first area.
4. The method according to claim 1 or 2, wherein a starting position of the second path is adjacent to a preset position of the first path, and the second path is used for sequentially sucking the wafers which are not sucked line by line from the starting position of the second path.
5. The method as claimed in claim 1 or 2, wherein the third path is used for sequentially sucking the wafers in the second area line by line from the starting position of the third path.
6. The method as claimed in claim 1 or 2, wherein the region division rule is to divide the wafer ring into a plurality of wafer regions with different brightness according to different brightness of the wafers on the wafer ring.
7. An electronic device, characterized in that the electronic device comprises a processor and a memory for storing a computer program, the processor being adapted to call up and run the computer program from the memory such that the electronic device performs the method of any of claims 1 to 6.
8. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, causes the processor to carry out the method of any one of claims 1 to 6.
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| CN115831814A (en) * | 2022-11-22 | 2023-03-21 | 深圳新益昌科技股份有限公司 | Wafer searching method, system, device and readable storage medium |
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