CN115022141A - GMSK signal digital modulation transmitting device and method - Google Patents
GMSK signal digital modulation transmitting device and method Download PDFInfo
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- CN115022141A CN115022141A CN202210686847.4A CN202210686847A CN115022141A CN 115022141 A CN115022141 A CN 115022141A CN 202210686847 A CN202210686847 A CN 202210686847A CN 115022141 A CN115022141 A CN 115022141A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/20—Modulator circuits; Transmitter circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/20—Modulator circuits; Transmitter circuits
- H04L27/2003—Modulator circuits; Transmitter circuits for continuous phase modulation
- H04L27/2007—Modulator circuits; Transmitter circuits for continuous phase modulation in which the phase change within each symbol period is constrained
- H04L27/2017—Modulator circuits; Transmitter circuits for continuous phase modulation in which the phase change within each symbol period is constrained in which the phase changes are non-linear, e.g. generalized and Gaussian minimum shift keying, tamed frequency modulation
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- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The invention discloses a GMSK signal digital modulation transmitting device and a method, wherein the device comprises: the signal source coding circuit is used for converting a digital signal sent by a computer into a serial code element signal and generating a switching signal; the GMSK baseband shaping circuit is used for respectively carrying out symbol accumulation and filtering on the serial symbols; the sampling increasing circuit is used for interpolating the sequence value accumulated by the code element and the sequence value after filtering; the digital up-conversion circuit is used for generating GMSK modulation signal data according to the sequence value accumulated by the code elements after interpolation and the sequence value after filtering; the DA conversion circuit is used for converting GMSK modulation signal data into an analog signal; the TR component is used for carrying out up-conversion and power amplification on the analog signal and carrying out transmission or reception on the signal according to the switching signal. The invention can effectively avoid the unbalanced error of amplitude and phase between I, Q two paths caused by the analog modulation mode; and the FPGA operation resources are greatly reduced.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a GMSK signal digital modulation transmitting device and method.
Background
Pulse shaping techniques may use a gaussian pulse shaping filter, i.e., Gaussian Minimum Shift Keying (GMSK) signal modulation, that is particularly efficient when combined with Minimum Shift Keying (MSK) modulation or other modulation schemes suitable for more power efficient nonlinear amplifiers. GMSK signal modulation is a binary modulation method which is changed by MSK signal modulation, the Gaussian pulse forming technology of the baseband smoothes the phase curve of the MSK signal, stabilizes the instantaneous frequency change of the signal, and greatly reduces the spectrum side lobe level of the transmitted signal. GMSK has excellent power efficiency due to its constant envelope characteristics and has excellent spectral efficiency after Gaussian filtering, which makes GMSK highly attractive.
GMSK signal modulation is mainly used in mobile communication systems, existing GMSK signal modulation mainly has analog and digital forms, and the problem of modulation with large sampling rate and bandwidth does not exist in the analog modulation mode, but the analog circuit design of the analog modulation mode is complex, and unbalanced errors of amplitude and phase exist between two paths of modulation signals I, Q. The digital modulation mode mostly adopts the framework of an FPGA chip, a digital up-conversion (DUC) chip and a DAC chip, and is mostly realized in a GMSK signal modulation transmitting device with smaller sampling rate and bandwidth. For a full-digital GMSK signal modulation mode with a large sampling rate and bandwidth, a digital filter of the full-digital GMSK signal modulation mode is high in design order, and occupies a large amount of hardware resources such as multipliers and adders; the invention can realize GMSK digital modulation with larger sampling rate and bandwidth by using less resources by optimizing the GMSK digital modulation process.
Disclosure of Invention
In view of this, the invention provides a GMSK signal digital modulation transmitting apparatus and method, which effectively avoid the problem of unbalanced errors of amplitude and phase between I, Q two paths caused by an analog modulation mode; the problems that a digital filter is high in design order and occupies a plurality of hardware resources such as a multiplier and an adder are solved through a multi-sampling rate filter and a digital up-conversion technology, and the method is suitable for a GMSK signal modulation device with a large sampling rate and bandwidth.
The invention discloses a GMSK signal digital modulation transmitting device, which is suitable for digital GMSK signal modulation with larger sampling rate and bandwidth, and comprises an information source coding circuit, a GMSK baseband forming circuit, an upsampling circuit, a digital up-conversion circuit, a DA conversion circuit and a TR component which are connected in sequence;
the signal source coding circuit is used for converting a digital signal sent by a computer into a serial code element signal and generating a switching signal;
the GMSK baseband shaping circuit is used for respectively performing symbol accumulation and filtering on serial symbols output by the signal source coding circuit;
the up-sampling circuit is used for interpolating the sequence value accumulated by the code element output by the GMSK baseband shaping circuit and the sequence value after filtering;
the digital up-conversion circuit is used for generating GMSK modulation signal data according to the sequence value accumulated by the code elements after interpolation by the up-sampling circuit and the sequence value after filtering;
the DA conversion circuit is used for converting GMSK modulation signal data into an analog signal;
and the TR component is used for performing up-conversion and power amplification on the analog signal output by the DA conversion circuit and transmitting or receiving a signal according to the switching signal generated by the source coding circuit.
Further, the source coding circuit is specifically configured to:
firstly, bit filling and NRZI coding are carried out on input parallel code element information, and code element information and coding completion flag signals are output in parallel after NRZI coding is completed; secondly, the code element information which completes NRZI coding is converted into serial output, and the code element rate is low at the moment.
Further, the GMSK baseband shaping circuit is specifically configured to:
firstly, zero insertion filling is carried out on the data after serial-parallel conversion, and the data after zero insertion filling is respectively subjected to code element accumulation and FIR filtering to complete Gaussian filtering phase accumulation.
Further, the digital up-conversion circuit includes:
the summation module is used for directly summing the sequence value accumulated by the code elements after interpolation, the sequence value after FIR filtering and the calculated phase value of the carrier signal to obtain the phase value of the GMSK modulation signal data;
and the DDS is used for generating GMSK modulation signal data according to the phase value obtained by the summation module.
Furthermore, the digital up-conversion circuit is also used for carrying out spectrum shifting on the baseband signal with the data rate increased by the up-sampling to a radio frequency signal with the frequency far greater than the code element rate.
Furthermore, the source coding circuit, the GMSK baseband shaping circuit, the upsampling circuit and the digital up-conversion circuit are all arranged on the FPGA.
The invention also discloses a GMSK signal digital modulation method, which comprises the following steps:
the information source coding circuit converts a digital signal sent by a computer into a serial code element signal and generates a switching signal;
the GMSK baseband shaping circuit respectively performs symbol accumulation and filtering on serial symbols output by the information source coding circuit;
the sampling increasing circuit interpolates the sequence value accumulated by the code elements output by the GMSK baseband shaping circuit and the sequence value after filtering;
the digital up-conversion circuit generates GMSK modulation signal data according to the sequence value accumulated by the code elements interpolated by the up-sampling circuit and the sequence value after filtering;
the DA conversion circuit converts GMSK modulation signal data into an analog signal;
and the TR component performs up-conversion and power amplification on the analog signal output by the DA conversion circuit, and performs signal transmission or reception according to the switching signal generated by the source coding circuit.
Further, the source coding circuit converts the input parallel symbol information into serial symbols, including:
firstly, carrying out bit filling and NRZI coding on input parallel code element information, and after the NRZI coding is finished, parallelly outputting the code element information and a coding completion flag signal; secondly, the code element information which completes NRZI coding is converted into serial output, and the code element rate is low at the moment.
Further, the digital up-conversion circuit generates GMSK modulated signal data according to the sequence value accumulated by the symbol interpolated by the up-sampling circuit and the sequence value filtered by the up-sampling circuit, including:
directly summing the sequence value accumulated by the code elements after interpolation, the sequence value after FIR filtering and the calculated phase value of the carrier signal to obtain the phase value of GMSK modulation signal data, and then sending the phase value to a DDS to generate the GMSK modulation signal data; the baseband signal with the increased sampling and data rate is shifted to a radio frequency signal with the frequency much larger than the code element rate.
Further, the DDS generates a high-speed sinusoidal signal through an orthogonal method to complete digital up-conversion.
Due to the adoption of the technical scheme, the invention has the following advantages: the invention is suitable for various application environments such as radar, communication, countermeasure and the like, can greatly reduce FPGA operation resources, saves resources for defining more complex communication functions for a software radio communication system, and can generate GMSK modulation signals modulated by constant envelopes.
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In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments described in the embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings.
Fig. 1 is a schematic structural diagram of a GMSK signal digital modulation transmitting apparatus according to an embodiment of the present invention;
fig. 2 is a schematic flow chart of a GMSK signal digital modulation transmission method according to an embodiment of the present invention.
Detailed Description
The present invention will be further described with reference to the accompanying drawings and examples, it being understood that the examples described are only some of the examples and are not intended to limit the invention to the embodiments described herein. All other embodiments available to those of ordinary skill in the art are intended to be within the scope of the embodiments of the present invention.
The embodiment of the invention adopts a hardware framework mode of FPGA + DAC: the FPGA mainly completes source coding and GMSK signal modulation. The code rate of the source coding is low, and bit filling and NRZI coding are completed. The GMSK signal modulation mainly comprises a GMSK baseband forming module, a digital up-conversion circuit and an up-sampling circuit, so that the sampling rate of the signal is far greater than the signal bandwidth, and the sampling rate output by the FPGA meets the requirement of the intermediate frequency data rate of the DAC. Fig. 1 shows a configuration of a GMSK signal modulated transmitter according to the present invention, which includes the following details:
a) a source coding circuit: firstly, carrying out bit filling and NRZI coding on input parallel code element information, and after the NRZI coding is finished, parallelly outputting the code element information and a coding completion flag signal; and secondly, converting the code element information which completes NRZI coding into serial output, wherein the code element rate is lower.
b) GMSK baseband shaping circuit: the serial symbols with a low input rate are subjected to gaussian shaping filtering, and since the symbol rate at this time is low, a gaussian filter with a low order can be used for baseband shaping. In order to reduce the order of the Gaussian filter, firstly, zero insertion filling is carried out on the data after serial-parallel conversion, and the data after zero insertion filling are respectively subjected to code element accumulation and FIR filtering to complete the Gaussian filtering phase accumulation function.
c) The up-sampling circuit: interpolation is respectively carried out on the sequence value accumulated by the code elements and the sequence value after FIR filtering so as to improve the data rate;
d) digital up-conversion circuit: and directly summing the sequence value accumulated by the code elements after interpolation, the sequence value after FIR filtering and the calculated phase value of the carrier signal to obtain the phase value of GMSK modulation signal data, and then sending the phase value to a DDS (direct digital synthesizer) to generate the GMSK modulation signal data. The baseband signal with the increased sampling and data rate is shifted to a radio frequency signal with the frequency much larger than the code element rate.
e) A DA conversion circuit: converting the digital GMSK signal into an analog signal and sending the analog signal to a TR component;
f) a TR component: analog up-conversion, power amplification and other processing are carried out on the analog signal output by the DA;
referring to fig. 2, the flow of digital modulation of GMSK signals is as follows:
s1, converting the digital signal sent by the computer into a serial code element signal by the information source coding circuit and generating a switch signal;
the computer sends a message to the information source coding module through the serial port, the information source coding module converts the received message into a serial code element and generates a switching signal, the code element signal rate is low, and the switching signal is used for controlling the TR to transmit and receive;
s2, GMSK baseband shaping circuit carries out symbol accumulation and filtering on serial symbols output by the source coding circuit;
the code rate is usually only a few ksHz to a few dozens of kHz, and Gaussian shaping filtering is carried out on serial code elements with lower input rate through a GMSK baseband shaping circuit;
s3, the up-sampling circuit interpolates the sequence value accumulated by the code element output by the GMSK baseband shaping circuit and the sequence value after filtering;
carrying out interpolation filtering on the formed baseband signals to improve the data sampling rate;
s4, the digital up-conversion circuit generates GMSK modulation signal data according to the sequence value accumulated by the code element after interpolation by the up-sampling circuit and the sequence value after filtering;
mixing the baseband signals with increased sampling and increased data sampling rate by a digital up-conversion circuit to complete frequency spectrum shifting to radio frequency signals with frequency much higher than the code element rate;
s5, converting GMSK modulation signal data into an analog signal by a DA conversion circuit;
converting the digital GMSK signal into an analog signal through a DA conversion circuit, and sending the analog signal to a TR component;
and the S6 and TR components carry out up-conversion and power amplification on the analog signals output by the DA conversion circuit and carry out signal transmission or reception according to the switching signals generated by the source coding circuit.
Analog signals output by the DA are subjected to analog filtering, power amplification and the like through the TR component, and finally transmitted through the antenna.
Real-time and dynamic parameter configuration:
a) according to different transmission requirements, different code element coding modes can be configured, and coding efficiency is improved.
b) According to the working frequency of the channel, GMSK modulation signals with different frequencies can be configured, and various channel transmissions can be compatible.
The preferred device is as follows:
preferred examples of the application device thereof are composed of Field Programmable Gate Arrays (FPGAs), analog-to-digital converters (ADCs), peripheral clocks, power supplies, etc., as follows:
a) field Programmable Gate Array (FPGA): as a main implementation chip of an optimized GMSK modulation signal, the performance of FPGA has a direct influence on GMSK fast modulation, considering that the optimized encoding process includes a large number of operations such as DDS and FIR, there is a certain demand for resources, typically, LUT resources are about more than one hundred thousand, and multiplier resources (DSP) are about more than one thousand;
b) digital-to-analog converter (DAC): the ADC mainly plays a role in digital-to-analog conversion in the wireless transmitting device, and an LVDS bus is required to be established between the ADC and the FPGA for transmitting data;
c) peripheral clock, power: the circuit is used for supplying power to a chip on a board, outputting a system clock, outputting a reset output, outputting a high-speed serial interface special clock, an interface adaptation circuit, a peripheral data storage circuit and the like.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting the same, and although the present invention is described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: modifications and equivalents may be made to the embodiments of the invention without departing from the spirit and scope of the invention, which is to be covered by the claims.
Claims (10)
1. A GMSK signal digital modulation transmitting device is suitable for digital GMSK signal modulation with a large sampling rate and a large bandwidth, and is characterized by comprising an information source coding circuit, a GMSK baseband forming circuit, an upsampling circuit, a digital up-conversion circuit, a DA conversion circuit and a TR component which are sequentially connected;
the signal source coding circuit is used for converting a digital signal sent by a computer into a serial code element signal and generating a switching signal;
the GMSK baseband shaping circuit is used for respectively carrying out symbol accumulation and filtering on serial symbols output by the information source coding circuit;
the up-sampling circuit is used for interpolating the sequence value accumulated by the code element output by the GMSK baseband shaping circuit and the sequence value after filtering;
the digital up-conversion circuit is used for generating GMSK modulation signal data according to the sequence value accumulated by the code elements after interpolation by the up-sampling circuit and the sequence value after filtering;
the DA conversion circuit is used for converting GMSK modulation signal data into an analog signal;
and the TR component is used for carrying out up-conversion and power amplification on the analog signal output by the DA conversion circuit and transmitting or receiving a signal according to the switching signal generated by the source coding circuit.
2. The apparatus of claim 1, wherein the source coding circuitry is specifically configured to:
firstly, bit filling and NRZI coding are carried out on input parallel code element information, and code element information and coding completion flag signals are output in parallel after NRZI coding is completed; secondly, the code element information which completes NRZI coding is converted into serial output, and the code element rate is low at the moment.
3. The apparatus of claim 1, wherein the GMSK baseband shaping circuit is specifically configured to:
firstly, zero insertion filling is carried out on the data after serial-parallel conversion, and the data after zero insertion filling is respectively subjected to code element accumulation and FIR filtering to complete Gaussian filtering phase accumulation.
4. The apparatus of claim 1, wherein the digital up-conversion circuit comprises:
the summation module is used for directly summing the sequence value accumulated by the code elements after interpolation, the sequence value after FIR filtering and the calculated phase value of the carrier signal to obtain the phase value of the GMSK modulation signal data;
and the DDS is used for generating GMSK modulation signal data according to the phase value obtained by the summation module.
5. The apparatus of claim 1, wherein the digital up-conversion circuit is further configured to shift the frequency spectrum of the up-sampled baseband signal with increased data rate to a radio frequency signal with a frequency much greater than the symbol rate.
6. The apparatus of claim 1, wherein the source coding circuitry, the GMSK baseband shaping circuitry, the upsampling circuitry, and the digital upconversion circuitry are disposed on an FPGA.
7. A GMSK signal digital modulation transmission method is characterized by comprising the following steps:
the information source coding circuit converts a digital signal sent by a computer into a serial code element signal and generates a switching signal;
the GMSK baseband shaping circuit respectively performs symbol accumulation and filtering on serial symbols output by the information source coding circuit;
the sampling increasing circuit interpolates the sequence value accumulated by the code elements output by the GMSK baseband shaping circuit and the sequence value after filtering;
the digital up-conversion circuit generates GMSK modulation signal data according to the sequence value accumulated by the code elements after interpolation by the up-sampling circuit and the sequence value after filtering;
the DA conversion circuit converts GMSK modulation signal data into an analog signal;
and the TR component performs up-conversion and power amplification on the analog signal output by the DA conversion circuit, and performs signal transmission or reception according to the switching signal generated by the source coding circuit.
8. The method of claim 7, wherein the source coding circuit converts the input parallel symbol information into serial symbols, comprising:
firstly, carrying out bit filling and NRZI coding on input parallel code element information, and after the NRZI coding is finished, parallelly outputting the code element information and a coding completion flag signal; secondly, the code element information which completes NRZI coding is converted into serial output, and the code element rate is low at the moment.
9. The method of claim 7, wherein the digital up-conversion circuit generates GMSK modulated signal data from the interpolated symbol-accumulated sequence values and the filtered sequence values from the up-sampling circuit, comprising:
directly summing the sequence value accumulated by the code elements after interpolation, the sequence value after FIR filtering and the calculated phase value of the carrier signal to obtain the phase value of GMSK modulation signal data, and then sending the phase value to a DDS to generate the GMSK modulation signal data; the baseband signal with the increased sampling and data rate is shifted to a radio frequency signal with the frequency much larger than the code element rate.
10. The method of claim 9, wherein the DDS generates a high speed sinusoidal signal by quadrature method to perform digital up-conversion.
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